32x: watchdog for Star Wars, SCI IRQs for X-men (also needs idle loop hacks)

[picodrive.git] / pico / 32x / 32x.c

diff --git a/pico/32x/32x.c b/pico/32x/32x.c
index 20a942a..eb49da7 100644 (file)
--- a/pico/32x/32x.c
+++ b/pico/32x/32x.c
@@ -1,6 +1,7 @@
 #include "../pico_int.h"
 #include "../sound/ym2612.h"
 
+SH2 sh2s[2];
 struct Pico32x Pico32x;
 
 static void sh2_irq_cb(int id, int level)
@@ -27,9 +28,10 @@ void p32x_update_irls(void)
 
   elprintf(EL_32X, "update_irls: m %d, s %d", mlvl, slvl);
   sh2_irl_irq(&msh2, mlvl);
-  if (mlvl)
-    p32x_poll_event(0);
   sh2_irl_irq(&ssh2, slvl);
+  mlvl = mlvl ? 1 : 0;
+  slvl = slvl ? 1 : 0;
+  p32x_poll_event(mlvl | (slvl << 1), 0);
 }
 
 void Pico32xStartup(void)
@@ -50,6 +52,9 @@ void Pico32xStartup(void)
   if (!Pico.m.pal)
     Pico32x.vdp_regs[0] |= P32XV_nPAL;
 
+  PREG8(Pico32xMem->sh2_peri_regs[0], 4) =
+  PREG8(Pico32xMem->sh2_peri_regs[1], 4) = 0x84; // SCI SSR
+
   emu_32x_startup();
 }
 
@@ -63,6 +68,7 @@ void PicoPower32x(void)
 
   Pico32x.regs[0] = 0x0082; // SH2 reset?
   Pico32x.vdp_regs[0x0a/2] = P32XV_VBLK|P32XV_HBLK|P32XV_PEN;
+  Pico32x.sh2_regs[0] = P32XS2_ADEN;
 }
 
 void PicoUnload32x(void)
@@ -92,55 +98,88 @@ static void p32x_start_blank(void)
     Pico32xSwapDRAM(Pico32x.pending_fb ^ 1);
   }
 
-  p32x_poll_event(1);
+  Pico32x.sh2irqs |= P32XI_VINT;
+  p32x_update_irls();
+  p32x_poll_event(3, 1);
 }
 
-// FIXME..
-static __inline void SekRunM68k(int cyc)
+static __inline void run_m68k(int cyc)
 {
-  int cyc_do;
-  SekCycleAim += cyc;
   if (Pico32x.emu_flags & P32XF_68KPOLL) {
-    SekCycleCnt = SekCycleAim;
+    SekCycleCnt += cyc;
     return;
   }
-  if ((cyc_do = SekCycleAim - SekCycleCnt) <= 0)
-    return;
-#if defined(EMU_CORE_DEBUG)
-  // this means we do run-compare
-  SekCycleCnt+=CM_compareRun(cyc_do, 0);
-#elif defined(EMU_C68K)
-  PicoCpuCM68k.cycles=cyc_do;
+#if defined(EMU_C68K)
+  PicoCpuCM68k.cycles = cyc;
   CycloneRun(&PicoCpuCM68k);
-  SekCycleCnt+=cyc_do-PicoCpuCM68k.cycles;
+  SekCycleCnt += cyc - PicoCpuCM68k.cycles;
 #elif defined(EMU_M68K)
-  SekCycleCnt+=m68k_execute(cyc_do);
+  SekCycleCnt += m68k_execute(cyc);
 #elif defined(EMU_F68K)
-  SekCycleCnt+=fm68k_emulate(cyc_do+1, 0, 0);
+  SekCycleCnt += fm68k_emulate(cyc+1, 0, 0);
 #endif
 }
 
 // ~1463.8, but due to cache misses and slow mem
 // it's much lower than that
-#define SH2_LINE_CYCLES 700
+//#define SH2_LINE_CYCLES 735
+#define CYCLES_M68K2SH2(x) ((x) * 6 / 4)
 
 #define PICO_32X
-#define RUN_SH2S \
+#define CPUS_RUN_SIMPLE(m68k_cycles,s68k_cycles) \
+{ \
+  int slice; \
+  SekCycleAim += m68k_cycles; \
+  while (SekCycleCnt < SekCycleAim) { \
+    slice = SekCycleCnt; \
+    run_m68k(SekCycleAim - SekCycleCnt); \
+    slice = SekCycleCnt - slice; /* real count from 68k */ \
+    if (SekCycleCnt < SekCycleAim) \
+      elprintf(EL_32X, "slice %d", slice); \
+    if (!(Pico32x.emu_flags & (P32XF_SSH2POLL|P32XF_SSH2VPOLL))) \
+      sh2_execute(&ssh2, CYCLES_M68K2SH2(slice)); \
+    if (!(Pico32x.emu_flags & (P32XF_MSH2POLL|P32XF_MSH2VPOLL))) \
+      sh2_execute(&msh2, CYCLES_M68K2SH2(slice)); \
+  } \
+}
+
+#define STEP_68K 24
+#define CPUS_RUN_LOCKSTEP(m68k_cycles,s68k_cycles) \
+{ \
+  int i; \
+  for (i = 0; i <= (m68k_cycles) - STEP_68K; i += STEP_68K) { \
+    run_m68k(STEP_68K); \
+    if (!(Pico32x.emu_flags & (P32XF_MSH2POLL|P32XF_MSH2VPOLL))) \
+      sh2_execute(&msh2, CYCLES_M68K2SH2(STEP_68K)); \
+    if (!(Pico32x.emu_flags & (P32XF_SSH2POLL|P32XF_SSH2VPOLL))) \
+      sh2_execute(&ssh2, CYCLES_M68K2SH2(STEP_68K)); \
+  } \
+  /* last step */ \
+  i = (m68k_cycles) - i; \
+  run_m68k(i); \
   if (!(Pico32x.emu_flags & (P32XF_MSH2POLL|P32XF_MSH2VPOLL))) \
-    sh2_execute(&msh2, SH2_LINE_CYCLES); \
+    sh2_execute(&msh2, CYCLES_M68K2SH2(i)); \
   if (!(Pico32x.emu_flags & (P32XF_SSH2POLL|P32XF_SSH2VPOLL))) \
-    sh2_execute(&ssh2, SH2_LINE_CYCLES);
+    sh2_execute(&ssh2, CYCLES_M68K2SH2(i)); \
+}
+
+#define CPUS_RUN CPUS_RUN_SIMPLE
+//#define CPUS_RUN CPUS_RUN_LOCKSTEP
 
 #include "../pico_cmn.c"
 
 void PicoFrame32x(void)
 {
+  pwm_frame_smp_cnt = 0;
+
   Pico32x.vdp_regs[0x0a/2] &= ~P32XV_VBLK; // get out of vblank
-  if ((Pico32x.vdp_regs[0] & 3 ) != 0) // no forced blanking
-    Pico32x.vdp_regs[0x0a/2] &= ~P32XV_PEN; // no pal access
+  if ((Pico32x.vdp_regs[0] & P32XV_Mx) != 0) // no forced blanking
+    Pico32x.vdp_regs[0x0a/2] &= ~P32XV_PEN; // no palette access
 
-  p32x_poll_event(1);
+  p32x_poll_event(3, 1);
 
   PicoFrameStart();
   PicoFrameHints();
+  elprintf(EL_32X, "poll: %02x", Pico32x.emu_flags);
 }
+