+++ /dev/null
-/*\r
- * PicoDrive\r
- * (C) notaz, 2006-2009\r
- *\r
- * This work is licensed under the terms of MAME license.\r
- * See COPYING file in the top-level directory.\r
- */\r
-\r
-.equ SRR_MAPPED, (1 << 0)\r
-.equ SRR_READONLY, (1 << 1)\r
-.equ SRF_EEPROM, (1 << 1)\r
-.equ POPT_EN_32X, (1 << 20)\r
-\r
-.text\r
-.align 4\r
-\r
-.global PicoRead8_sram\r
-.global PicoRead8_io\r
-.global PicoRead16_sram\r
-.global PicoRead16_io\r
-.global PicoWrite8_io\r
-.global PicoWrite16_io\r
-\r
-PicoRead8_sram: @ u32 a, u32 d\r
- ldr r2, =(SRam)\r
- ldr r3, =(Pico+0x22200)\r
- ldr r1, [r2, #8] @ SRam.end\r
- cmp r0, r1\r
- bgt m_read8_nosram\r
- ldr r1, [r2, #4] @ SRam.start\r
- cmp r0, r1\r
- blt m_read8_nosram\r
- ldrb r1, [r3, #0x11] @ Pico.m.sram_reg\r
- tst r1, #SRR_MAPPED\r
- beq m_read8_nosram\r
- ldr r1, [r2, #0x0c]\r
- tst r1, #SRF_EEPROM\r
- bne m_read8_eeprom\r
- ldr r1, [r2, #4] @ SRam.start\r
- ldr r2, [r2] @ SRam.data\r
- sub r0, r0, r1\r
- add r0, r0, r2\r
- ldrb r0, [r0]\r
- bx lr\r
-\r
-m_read8_nosram:\r
- ldr r1, [r3, #4] @ romsize\r
- cmp r0, r1\r
- movgt r0, #0\r
- bxgt lr @ bad location\r
- @ XXX: banking unfriendly\r
- ldr r1, [r3]\r
- eor r0, r0, #1\r
- ldrb r0, [r1, r0]\r
- bx lr\r
-\r
-m_read8_eeprom:\r
- stmfd sp!,{r0,lr}\r
- bl EEPROM_read\r
- ldmfd sp!,{r1,lr}\r
- tst r1, #1\r
- moveq r0, r0, lsr #8\r
- bx lr\r
-\r
-\r
-PicoRead8_io: @ u32 a, u32 d\r
- bic r2, r0, #0x001f @ most commonly we get i/o port read,\r
- cmp r2, #0xa10000 @ so check for it first\r
- beq io_ports_read\r
-\r
-m_read8_not_io:\r
- and r2, r0, #0xfc00\r
- cmp r2, #0x1000\r
- bne m_read8_not_brq\r
-\r
- ldr r3, =(Pico+0x22200)\r
- mov r1, r0\r
- ldr r0, [r3, #8] @ Pico.m.rotate\r
- add r0, r0, #1\r
- strb r0, [r3, #8]\r
- eor r0, r0, r0, lsl #6\r
-\r
- tst r1, #1\r
- bxne lr @ odd addr -> open bus\r
- bic r0, r0, #1 @ bit0 defined in this area\r
- and r2, r1, #0xff00\r
- cmp r2, #0x1100\r
- bxne lr @ not busreq\r
-\r
- ldrb r1, [r3, #(8+0x01)] @ Pico.m.z80Run\r
- ldrb r2, [r3, #(8+0x0f)] @ Pico.m.z80_reset\r
- orr r0, r0, r1\r
- orr r0, r0, r2\r
- bx lr\r
-\r
-m_read8_not_brq:\r
- ldr r2, =PicoOpt\r
- ldr r2, [r2]\r
- tst r2, #POPT_EN_32X\r
- bne PicoRead8_32x\r
- mov r0, #0\r
- bx lr\r
-\r
-@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@\r
-\r
-PicoRead16_sram: @ u32 a, u32 d\r
- ldr r2, =(SRam)\r
- ldr r3, =(Pico+0x22200)\r
- ldr r1, [r2, #8] @ SRam.end\r
- cmp r0, r1\r
- bgt m_read16_nosram\r
- ldr r1, [r2, #4] @ SRam.start\r
- cmp r0, r1\r
- blt m_read16_nosram\r
- ldrb r1, [r3, #0x11] @ Pico.m.sram_reg\r
- tst r1, #SRR_MAPPED\r
- beq m_read16_nosram\r
- ldr r1, [r2, #0x0c]\r
- tst r1, #SRF_EEPROM\r
- bne EEPROM_read\r
- ldr r1, [r2, #4] @ SRam.start\r
- ldr r2, [r2] @ SRam.data\r
- sub r0, r0, r1\r
- add r0, r0, r2\r
- ldrb r1, [r0], #1\r
- ldrb r0, [r0]\r
- orr r0, r0, r1, lsl #8\r
- bx lr\r
-\r
-m_read16_nosram:\r
- ldr r1, [r3, #4] @ romsize\r
- cmp r0, r1\r
- movgt r0, #0\r
- bxgt lr @ bad location\r
- @ XXX: banking unfriendly\r
- ldr r1, [r3]\r
- ldrh r0, [r1, r0]\r
- bx lr\r
-\r
-\r
-PicoRead16_io: @ u32 a, u32 d\r
- bic r2, r0, #0x001f @ most commonly we get i/o port read,\r
- cmp r2, #0xa10000 @ so check for it first\r
- bne m_read16_not_io\r
- stmfd sp!,{lr}\r
- bl io_ports_read @ same as read8\r
- orr r0, r0, r0, lsl #8 @ only has bytes mirrored\r
- ldmfd sp!,{pc}\r
-\r
-m_read16_not_io:\r
- and r2, r0, #0xfc00\r
- cmp r2, #0x1000\r
- bne m_read16_not_brq\r
-\r
- ldr r3, =(Pico+0x22200)\r
- and r2, r0, #0xff00\r
- ldr r0, [r3, #8] @ Pico.m.rotate\r
- add r0, r0, #1\r
- strb r0, [r3, #8]\r
- eor r0, r0, r0, lsl #5\r
- eor r0, r0, r0, lsl #8\r
- bic r0, r0, #0x100 @ bit8 defined in this area\r
- cmp r2, #0x1100\r
- bxne lr @ not busreq\r
-\r
- ldrb r1, [r3, #(8+0x01)] @ Pico.m.z80Run\r
- ldrb r2, [r3, #(8+0x0f)] @ Pico.m.z80_reset\r
- orr r0, r0, r1, lsl #8\r
- orr r0, r0, r2, lsl #8\r
- bx lr\r
-\r
-m_read16_not_brq:\r
- ldr r2, =PicoOpt\r
- ldr r2, [r2]\r
- tst r2, #POPT_EN_32X\r
- bne PicoRead16_32x\r
- mov r0, #0\r
- bx lr\r
-\r
-@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@\r
-\r
-PicoWrite8_io: @ u32 a, u32 d\r
- bic r2, r0, #0x1e @ most commonly we get i/o port write,\r
- eor r2, r2, #0xa10000 @ so check for it first\r
- eors r2, r2, #1\r
- beq io_ports_write\r
-\r
-m_write8_not_io:\r
- tst r0, #1\r
- bne m_write8_not_z80ctl @ even addrs only\r
- and r2, r0, #0xff00\r
- cmp r2, #0x1100\r
- moveq r0, r1\r
- beq ctl_write_z80busreq\r
- cmp r2, #0x1200\r
- moveq r0, r1\r
- beq ctl_write_z80reset\r
-\r
-m_write8_not_z80ctl:\r
- @ unlikely\r
- eor r2, r0, #0xa10000\r
- eor r2, r2, #0x003000\r
- eors r2, r2, #0x0000f1\r
- bne m_write8_not_sreg\r
- ldr r3, =(Pico+0x22200)\r
- ldrb r2, [r3, #(8+9)] @ Pico.m.sram_reg\r
- and r1, r1, #(SRR_MAPPED|SRR_READONLY)\r
- bic r2, r2, #(SRR_MAPPED|SRR_READONLY)\r
- orr r2, r2, r1\r
- strb r2, [r3, #(8+9)]\r
- bx lr\r
-\r
-m_write8_not_sreg:\r
- ldr r2, =PicoOpt\r
- ldr r2, [r2]\r
- tst r2, #POPT_EN_32X\r
- bne PicoWrite8_32x\r
- bx lr\r
-\r
-@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@\r
-\r
-PicoWrite16_io: @ u32 a, u32 d\r
- bic r2, r0, #0x1f @ most commonly we get i/o port write,\r
- cmp r2, #0xa10000 @ so check for it first\r
- beq io_ports_write\r
-\r
-m_write16_not_io:\r
- and r2, r0, #0xff00\r
- cmp r2, #0x1100\r
- moveq r0, r1, lsr #8\r
- beq ctl_write_z80busreq\r
- cmp r2, #0x1200\r
- moveq r0, r1, lsr #8\r
- beq ctl_write_z80reset\r
-\r
-m_write16_not_z80ctl:\r
- @ unlikely\r
- eor r2, r0, #0xa10000\r
- eor r2, r2, #0x003000\r
- eors r2, r2, #0x0000f0\r
- bne m_write16_not_sreg\r
- ldr r3, =(Pico+0x22200)\r
- ldrb r2, [r3, #(8+9)] @ Pico.m.sram_reg\r
- and r1, r1, #(SRR_MAPPED|SRR_READONLY)\r
- bic r2, r2, #(SRR_MAPPED|SRR_READONLY)\r
- orr r2, r2, r1\r
- strb r2, [r3, #(8+9)]\r
- bx lr\r
-\r
-m_write16_not_sreg:\r
- ldr r2, =PicoOpt\r
- ldr r2, [r2]\r
- tst r2, #POPT_EN_32X\r
- bne PicoWrite16_32x\r
- bx lr\r
-\r
-.pool\r
-\r
-@ vim:filetype=armasm\r
notaz.gp2x.de / picodrive.git / blobdiff