#define CALLER_SAVE_REGS 0x120f
#endif
+#define unused __attribute__((unused))
+
extern int cycle_count;
extern int last_count;
extern int pcaddr;
0,
0};
-unsigned int needs_clear_cache[1<<(TARGET_SIZE_2-17)];
+static unsigned int needs_clear_cache[1<<(TARGET_SIZE_2-17)];
/* Linker */
-void set_jump_target(int addr,u_int target)
+static void set_jump_target(int addr,u_int target)
{
u_char *ptr=(u_char *)addr;
u_int *ptr2=(u_int *)ptr;
// This optionally copies the instruction from the target of the branch into
// the space before the branch. Works, but the difference in speed is
// usually insignificant.
-void set_jump_target_fillslot(int addr,u_int target,int copy)
+#if 0
+static void set_jump_target_fillslot(int addr,u_int target,int copy)
{
u_char *ptr=(u_char *)addr;
u_int *ptr2=(u_int *)ptr;
*ptr2=(*ptr2&0xFF000000)|(((target-(u_int)ptr2-8)<<6)>>8);
}
}
+#endif
/* Literal pool */
-add_literal(int addr,int val)
+static void add_literal(int addr,int val)
{
assert(literalcount<sizeof(literals)/sizeof(literals[0]));
literals[literalcount][0]=addr;
literalcount++;
}
-void *kill_pointer(void *stub)
+static void *kill_pointer(void *stub)
{
int *ptr=(int *)(stub+4);
assert((*ptr&0x0ff00000)==0x05900000);
// get address that insn one after stub loads (dyna_linker arg1),
// treat it as a pointer to branch insn,
// return addr where that branch jumps to
-int get_pointer(void *stub)
+static int get_pointer(void *stub)
{
//printf("get_pointer(%x)\n",(int)stub);
int *ptr=(int *)(stub+4);
// Find the "clean" entry point from a "dirty" entry point
// by skipping past the call to verify_code
-u_int get_clean_addr(int addr)
+static u_int get_clean_addr(int addr)
{
int *ptr=(int *)addr;
#ifndef HAVE_ARMV7
return (u_int)ptr;
}
-int verify_dirty(int addr)
+static int verify_dirty(u_int *ptr)
{
u_int *ptr=(u_int *)addr;
#ifndef HAVE_ARMV7
// This doesn't necessarily find all clean entry points, just
// guarantees that it's not dirty
-int isclean(int addr)
+static int isclean(int addr)
{
#ifndef HAVE_ARMV7
int *ptr=((u_int *)addr)+4;
}
// get source that block at addr was compiled from (host pointers)
-void get_bounds(int addr,u_int *start,u_int *end)
+static void get_bounds(int addr,u_int *start,u_int *end)
{
u_int *ptr=(u_int *)addr;
#ifndef HAVE_ARMV7
// Note: registers are allocated clean (unmodified state)
// if you intend to modify the register, you must call dirty_reg().
-void alloc_reg(struct regstat *cur,int i,signed char reg)
+static void alloc_reg(struct regstat *cur,int i,signed char reg)
{
int r,hr;
int preferred_reg = (reg&7);
SysPrintf("This shouldn't happen (alloc_reg)");exit(1);
}
-void alloc_reg64(struct regstat *cur,int i,signed char reg)
+static void alloc_reg64(struct regstat *cur,int i,signed char reg)
{
int preferred_reg = 8+(reg&1);
int r,hr;
// Allocate a temporary register. This is done without regard to
// dirty status or whether the register we request is on the unneeded list
// Note: This will only allocate one register, even if called multiple times
-void alloc_reg_temp(struct regstat *cur,int i,signed char reg)
+static void alloc_reg_temp(struct regstat *cur,int i,signed char reg)
{
int r,hr;
int preferred_reg = -1;
}
SysPrintf("This shouldn't happen");exit(1);
}
+
// Allocate a specific ARM register.
-void alloc_arm_reg(struct regstat *cur,int i,signed char reg,char hr)
+static void alloc_arm_reg(struct regstat *cur,int i,signed char reg,int hr)
{
int n;
int dirty=0;
}
// Alloc cycle count into dedicated register
-alloc_cc(struct regstat *cur,int i)
+static void alloc_cc(struct regstat *cur,int i)
{
alloc_arm_reg(cur,i,CCREG,HOST_CCREG);
}
/* Assembler */
-char regname[16][4] = {
+static unused char regname[16][4] = {
"r0",
"r1",
"r2",
"lr",
"pc"};
-void output_w32(u_int word)
+static void output_w32(u_int word)
{
*((u_int *)out)=word;
out+=4;
}
-u_int rd_rn_rm(u_int rd, u_int rn, u_int rm)
+
+static u_int rd_rn_rm(u_int rd, u_int rn, u_int rm)
{
assert(rd<16);
assert(rn<16);
assert(rm<16);
return((rn<<16)|(rd<<12)|rm);
}
-u_int rd_rn_imm_shift(u_int rd, u_int rn, u_int imm, u_int shift)
+
+static u_int rd_rn_imm_shift(u_int rd, u_int rn, u_int imm, u_int shift)
{
assert(rd<16);
assert(rn<16);
assert((shift&1)==0);
return((rn<<16)|(rd<<12)|(((32-shift)&30)<<7)|imm);
}
-u_int genimm(u_int imm,u_int *encoded)
+
+static u_int genimm(u_int imm,u_int *encoded)
{
*encoded=0;
if(imm==0) return 1;
}
return 0;
}
-void genimm_checked(u_int imm,u_int *encoded)
+
+static void genimm_checked(u_int imm,u_int *encoded)
{
u_int ret=genimm(imm,encoded);
assert(ret);
}
-u_int genjmp(u_int addr)
+
+static u_int genjmp(u_int addr)
{
int offset=addr-(int)out-8;
if(offset<-33554432||offset>=33554432) {
return ((u_int)offset>>2)&0xffffff;
}
-void emit_mov(int rs,int rt)
+static void emit_mov(int rs,int rt)
{
assem_debug("mov %s,%s\n",regname[rt],regname[rs]);
output_w32(0xe1a00000|rd_rn_rm(rt,0,rs));
}
-void emit_movs(int rs,int rt)
+static void emit_movs(int rs,int rt)
{
assem_debug("movs %s,%s\n",regname[rt],regname[rs]);
output_w32(0xe1b00000|rd_rn_rm(rt,0,rs));
}
-void emit_add(int rs1,int rs2,int rt)
+static void emit_add(int rs1,int rs2,int rt)
{
assem_debug("add %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
output_w32(0xe0800000|rd_rn_rm(rt,rs1,rs2));
}
-void emit_adds(int rs1,int rs2,int rt)
+static void emit_adds(int rs1,int rs2,int rt)
{
assem_debug("adds %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
output_w32(0xe0900000|rd_rn_rm(rt,rs1,rs2));
}
-void emit_adcs(int rs1,int rs2,int rt)
+static void emit_adcs(int rs1,int rs2,int rt)
{
assem_debug("adcs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
output_w32(0xe0b00000|rd_rn_rm(rt,rs1,rs2));
}
-void emit_sbc(int rs1,int rs2,int rt)
+static void emit_sbc(int rs1,int rs2,int rt)
{
assem_debug("sbc %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
output_w32(0xe0c00000|rd_rn_rm(rt,rs1,rs2));
}
-void emit_sbcs(int rs1,int rs2,int rt)
+static void emit_sbcs(int rs1,int rs2,int rt)
{
assem_debug("sbcs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
output_w32(0xe0d00000|rd_rn_rm(rt,rs1,rs2));
}
-void emit_neg(int rs, int rt)
+static void emit_neg(int rs, int rt)
{
assem_debug("rsb %s,%s,#0\n",regname[rt],regname[rs]);
output_w32(0xe2600000|rd_rn_rm(rt,rs,0));
}
-void emit_negs(int rs, int rt)
+static void emit_negs(int rs, int rt)
{
assem_debug("rsbs %s,%s,#0\n",regname[rt],regname[rs]);
output_w32(0xe2700000|rd_rn_rm(rt,rs,0));
}
-void emit_sub(int rs1,int rs2,int rt)
+static void emit_sub(int rs1,int rs2,int rt)
{
assem_debug("sub %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
output_w32(0xe0400000|rd_rn_rm(rt,rs1,rs2));
}
-void emit_subs(int rs1,int rs2,int rt)
+static void emit_subs(int rs1,int rs2,int rt)
{
assem_debug("subs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
output_w32(0xe0500000|rd_rn_rm(rt,rs1,rs2));
}
-void emit_zeroreg(int rt)
+static void emit_zeroreg(int rt)
{
assem_debug("mov %s,#0\n",regname[rt]);
output_w32(0xe3a00000|rd_rn_rm(rt,0,0));
}
-void emit_loadlp(u_int imm,u_int rt)
+static void emit_loadlp(u_int imm,u_int rt)
{
add_literal((int)out,imm);
assem_debug("ldr %s,pc+? [=%x]\n",regname[rt],imm);
output_w32(0xe5900000|rd_rn_rm(rt,15,0));
}
-void emit_movw(u_int imm,u_int rt)
+
+static void emit_movw(u_int imm,u_int rt)
{
assert(imm<65536);
assem_debug("movw %s,#%d (0x%x)\n",regname[rt],imm,imm);
output_w32(0xe3000000|rd_rn_rm(rt,0,0)|(imm&0xfff)|((imm<<4)&0xf0000));
}
-void emit_movt(u_int imm,u_int rt)
+
+static void emit_movt(u_int imm,u_int rt)
{
assem_debug("movt %s,#%d (0x%x)\n",regname[rt],imm&0xffff0000,imm&0xffff0000);
output_w32(0xe3400000|rd_rn_rm(rt,0,0)|((imm>>16)&0xfff)|((imm>>12)&0xf0000));
}
-void emit_movimm(u_int imm,u_int rt)
+
+static void emit_movimm(u_int imm,u_int rt)
{
u_int armval;
if(genimm(imm,&armval)) {
#endif
}
}
-void emit_pcreladdr(u_int rt)
+
+static void emit_pcreladdr(u_int rt)
{
assem_debug("add %s,pc,#?\n",regname[rt]);
output_w32(0xe2800000|rd_rn_rm(rt,15,0));
}
-void emit_loadreg(int r, int hr)
+static void emit_loadreg(int r, int hr)
{
if(r&64) {
SysPrintf("64bit load in 32bit mode!\n");
output_w32(0xe5900000|rd_rn_rm(hr,FP,0)|offset);
}
}
-void emit_storereg(int r, int hr)
+
+static void emit_storereg(int r, int hr)
{
if(r&64) {
SysPrintf("64bit store in 32bit mode!\n");
output_w32(0xe5800000|rd_rn_rm(hr,FP,0)|offset);
}
-void emit_test(int rs, int rt)
+static void emit_test(int rs, int rt)
{
assem_debug("tst %s,%s\n",regname[rs],regname[rt]);
output_w32(0xe1100000|rd_rn_rm(0,rs,rt));
}
-void emit_testimm(int rs,int imm)
+static void emit_testimm(int rs,int imm)
{
u_int armval;
assem_debug("tst %s,#%d\n",regname[rs],imm);
output_w32(0xe3100000|rd_rn_rm(0,rs,0)|armval);
}
-void emit_testeqimm(int rs,int imm)
+static void emit_testeqimm(int rs,int imm)
{
u_int armval;
assem_debug("tsteq %s,$%d\n",regname[rs],imm);
output_w32(0x03100000|rd_rn_rm(0,rs,0)|armval);
}
-void emit_not(int rs,int rt)
+static void emit_not(int rs,int rt)
{
assem_debug("mvn %s,%s\n",regname[rt],regname[rs]);
output_w32(0xe1e00000|rd_rn_rm(rt,0,rs));
}
-void emit_mvnmi(int rs,int rt)
+static void emit_mvnmi(int rs,int rt)
{
assem_debug("mvnmi %s,%s\n",regname[rt],regname[rs]);
output_w32(0x41e00000|rd_rn_rm(rt,0,rs));
}
-void emit_and(u_int rs1,u_int rs2,u_int rt)
+static void emit_and(u_int rs1,u_int rs2,u_int rt)
{
assem_debug("and %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
output_w32(0xe0000000|rd_rn_rm(rt,rs1,rs2));
}
-void emit_or(u_int rs1,u_int rs2,u_int rt)
+static void emit_or(u_int rs1,u_int rs2,u_int rt)
{
assem_debug("orr %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
output_w32(0xe1800000|rd_rn_rm(rt,rs1,rs2));
}
-void emit_or_and_set_flags(int rs1,int rs2,int rt)
+
+static void emit_or_and_set_flags(int rs1,int rs2,int rt)
{
assem_debug("orrs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
output_w32(0xe1900000|rd_rn_rm(rt,rs1,rs2));
}
-void emit_orrshl_imm(u_int rs,u_int imm,u_int rt)
+static void emit_orrshl_imm(u_int rs,u_int imm,u_int rt)
{
assert(rs<16);
assert(rt<16);
output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|(imm<<7));
}
-void emit_orrshr_imm(u_int rs,u_int imm,u_int rt)
+static void emit_orrshr_imm(u_int rs,u_int imm,u_int rt)
{
assert(rs<16);
assert(rt<16);
output_w32(0xe1800020|rd_rn_rm(rt,rt,rs)|(imm<<7));
}
-void emit_xor(u_int rs1,u_int rs2,u_int rt)
+static void emit_xor(u_int rs1,u_int rs2,u_int rt)
{
assem_debug("eor %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
output_w32(0xe0200000|rd_rn_rm(rt,rs1,rs2));
}
-void emit_addimm(u_int rs,int imm,u_int rt)
+static void emit_addimm(u_int rs,int imm,u_int rt)
{
assert(rs<16);
assert(rt<16);
else if(rs!=rt) emit_mov(rs,rt);
}
-void emit_addimm_and_set_flags(int imm,int rt)
+static void emit_addimm_and_set_flags(int imm,int rt)
{
assert(imm>-65536&&imm<65536);
u_int armval;
output_w32(0xe2900000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
}
}
-void emit_addimm_no_flags(u_int imm,u_int rt)
+
+static void emit_addimm_no_flags(u_int imm,u_int rt)
{
emit_addimm(rt,imm,rt);
}
-void emit_addnop(u_int r)
+static void emit_addnop(u_int r)
{
assert(r<16);
assem_debug("add %s,%s,#0 (nop)\n",regname[r],regname[r]);
output_w32(0xe2800000|rd_rn_rm(r,r,0));
}
-void emit_adcimm(u_int rs,int imm,u_int rt)
+static void emit_adcimm(u_int rs,int imm,u_int rt)
{
u_int armval;
genimm_checked(imm,&armval);
output_w32(0xe2a00000|rd_rn_rm(rt,rs,0)|armval);
}
-void emit_rscimm(int rs,int imm,u_int rt)
+static void emit_rscimm(int rs,int imm,u_int rt)
{
assert(0);
u_int armval;
output_w32(0xe2e00000|rd_rn_rm(rt,rs,0)|armval);
}
-void emit_addimm64_32(int rsh,int rsl,int imm,int rth,int rtl)
+static void emit_addimm64_32(int rsh,int rsl,int imm,int rth,int rtl)
{
// TODO: if(genimm(imm,&armval)) ...
// else
emit_adcimm(rsh,0,rth);
}
-void emit_andimm(int rs,int imm,int rt)
+static void emit_andimm(int rs,int imm,int rt)
{
u_int armval;
if(imm==0) {
}
}
-void emit_orimm(int rs,int imm,int rt)
+static void emit_orimm(int rs,int imm,int rt)
{
u_int armval;
if(imm==0) {
}
}
-void emit_xorimm(int rs,int imm,int rt)
+static void emit_xorimm(int rs,int imm,int rt)
{
u_int armval;
if(imm==0) {
}
}
-void emit_shlimm(int rs,u_int imm,int rt)
+static void emit_shlimm(int rs,u_int imm,int rt)
{
assert(imm>0);
assert(imm<32);
output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|(imm<<7));
}
-void emit_lsls_imm(int rs,int imm,int rt)
+static void emit_lsls_imm(int rs,int imm,int rt)
{
assert(imm>0);
assert(imm<32);
output_w32(0xe1b00000|rd_rn_rm(rt,0,rs)|(imm<<7));
}
-void emit_lslpls_imm(int rs,int imm,int rt)
+static unused void emit_lslpls_imm(int rs,int imm,int rt)
{
assert(imm>0);
assert(imm<32);
output_w32(0x51b00000|rd_rn_rm(rt,0,rs)|(imm<<7));
}
-void emit_shrimm(int rs,u_int imm,int rt)
+static void emit_shrimm(int rs,u_int imm,int rt)
{
assert(imm>0);
assert(imm<32);
output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x20|(imm<<7));
}
-void emit_sarimm(int rs,u_int imm,int rt)
+static void emit_sarimm(int rs,u_int imm,int rt)
{
assert(imm>0);
assert(imm<32);
output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x40|(imm<<7));
}
-void emit_rorimm(int rs,u_int imm,int rt)
+static void emit_rorimm(int rs,u_int imm,int rt)
{
assert(imm>0);
assert(imm<32);
output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x60|(imm<<7));
}
-void emit_shldimm(int rs,int rs2,u_int imm,int rt)
+static void emit_shldimm(int rs,int rs2,u_int imm,int rt)
{
assem_debug("shld %%%s,%%%s,%d\n",regname[rt],regname[rs2],imm);
assert(imm>0);
output_w32(0xe1800020|rd_rn_rm(rt,rt,rs2)|((32-imm)<<7));
}
-void emit_shrdimm(int rs,int rs2,u_int imm,int rt)
+static void emit_shrdimm(int rs,int rs2,u_int imm,int rt)
{
assem_debug("shrd %%%s,%%%s,%d\n",regname[rt],regname[rs2],imm);
assert(imm>0);
output_w32(0xe1800000|rd_rn_rm(rt,rt,rs2)|((32-imm)<<7));
}
-void emit_signextend16(int rs,int rt)
+static void emit_signextend16(int rs,int rt)
{
#ifndef HAVE_ARMV6
emit_shlimm(rs,16,rt);
#endif
}
-void emit_signextend8(int rs,int rt)
+static void emit_signextend8(int rs,int rt)
{
#ifndef HAVE_ARMV6
emit_shlimm(rs,24,rt);
#endif
}
-void emit_shl(u_int rs,u_int shift,u_int rt)
+static void emit_shl(u_int rs,u_int shift,u_int rt)
{
assert(rs<16);
assert(rt<16);
assem_debug("lsl %s,%s,%s\n",regname[rt],regname[rs],regname[shift]);
output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x10|(shift<<8));
}
-void emit_shr(u_int rs,u_int shift,u_int rt)
+
+static void emit_shr(u_int rs,u_int shift,u_int rt)
{
assert(rs<16);
assert(rt<16);
assem_debug("lsr %s,%s,%s\n",regname[rt],regname[rs],regname[shift]);
output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x30|(shift<<8));
}
-void emit_sar(u_int rs,u_int shift,u_int rt)
+
+static void emit_sar(u_int rs,u_int shift,u_int rt)
{
assert(rs<16);
assert(rt<16);
output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x50|(shift<<8));
}
-void emit_orrshl(u_int rs,u_int shift,u_int rt)
+static void emit_orrshl(u_int rs,u_int shift,u_int rt)
{
assert(rs<16);
assert(rt<16);
assem_debug("orr %s,%s,%s,lsl %s\n",regname[rt],regname[rt],regname[rs],regname[shift]);
output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|0x10|(shift<<8));
}
-void emit_orrshr(u_int rs,u_int shift,u_int rt)
+
+static void emit_orrshr(u_int rs,u_int shift,u_int rt)
{
assert(rs<16);
assert(rt<16);
output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|0x30|(shift<<8));
}
-void emit_cmpimm(int rs,int imm)
+static void emit_cmpimm(int rs,int imm)
{
u_int armval;
if(genimm(imm,&armval)) {
}
}
-void emit_cmovne_imm(int imm,int rt)
+static void emit_cmovne_imm(int imm,int rt)
{
assem_debug("movne %s,#%d\n",regname[rt],imm);
u_int armval;
genimm_checked(imm,&armval);
output_w32(0x13a00000|rd_rn_rm(rt,0,0)|armval);
}
-void emit_cmovl_imm(int imm,int rt)
+
+static void emit_cmovl_imm(int imm,int rt)
{
assem_debug("movlt %s,#%d\n",regname[rt],imm);
u_int armval;
genimm_checked(imm,&armval);
output_w32(0xb3a00000|rd_rn_rm(rt,0,0)|armval);
}
-void emit_cmovb_imm(int imm,int rt)
+
+static void emit_cmovb_imm(int imm,int rt)
{
assem_debug("movcc %s,#%d\n",regname[rt],imm);
u_int armval;
genimm_checked(imm,&armval);
output_w32(0x33a00000|rd_rn_rm(rt,0,0)|armval);
}
-void emit_cmovs_imm(int imm,int rt)
+
+static void emit_cmovs_imm(int imm,int rt)
{
assem_debug("movmi %s,#%d\n",regname[rt],imm);
u_int armval;
genimm_checked(imm,&armval);
output_w32(0x43a00000|rd_rn_rm(rt,0,0)|armval);
}
-void emit_cmove_reg(int rs,int rt)
+
+static void emit_cmove_reg(int rs,int rt)
{
assem_debug("moveq %s,%s\n",regname[rt],regname[rs]);
output_w32(0x01a00000|rd_rn_rm(rt,0,rs));
}
-void emit_cmovne_reg(int rs,int rt)
+
+static void emit_cmovne_reg(int rs,int rt)
{
assem_debug("movne %s,%s\n",regname[rt],regname[rs]);
output_w32(0x11a00000|rd_rn_rm(rt,0,rs));
}
-void emit_cmovl_reg(int rs,int rt)
+
+static void emit_cmovl_reg(int rs,int rt)
{
assem_debug("movlt %s,%s\n",regname[rt],regname[rs]);
output_w32(0xb1a00000|rd_rn_rm(rt,0,rs));
}
-void emit_cmovs_reg(int rs,int rt)
+
+static void emit_cmovs_reg(int rs,int rt)
{
assem_debug("movmi %s,%s\n",regname[rt],regname[rs]);
output_w32(0x41a00000|rd_rn_rm(rt,0,rs));
}
-void emit_slti32(int rs,int imm,int rt)
+static void emit_slti32(int rs,int imm,int rt)
{
if(rs!=rt) emit_zeroreg(rt);
emit_cmpimm(rs,imm);
if(rs==rt) emit_movimm(0,rt);
emit_cmovl_imm(1,rt);
}
-void emit_sltiu32(int rs,int imm,int rt)
+
+static void emit_sltiu32(int rs,int imm,int rt)
{
if(rs!=rt) emit_zeroreg(rt);
emit_cmpimm(rs,imm);
if(rs==rt) emit_movimm(0,rt);
emit_cmovb_imm(1,rt);
}
-void emit_slti64_32(int rsh,int rsl,int imm,int rt)
+
+static void emit_slti64_32(int rsh,int rsl,int imm,int rt)
{
assert(rsh!=rt);
emit_slti32(rsl,imm,rt);
emit_cmovl_imm(1,rt);
}
}
-void emit_sltiu64_32(int rsh,int rsl,int imm,int rt)
+
+static void emit_sltiu64_32(int rsh,int rsl,int imm,int rt)
{
assert(rsh!=rt);
emit_sltiu32(rsl,imm,rt);
}
}
-void emit_cmp(int rs,int rt)
+static void emit_cmp(int rs,int rt)
{
assem_debug("cmp %s,%s\n",regname[rs],regname[rt]);
output_w32(0xe1500000|rd_rn_rm(0,rs,rt));
}
-void emit_set_gz32(int rs, int rt)
+
+static void emit_set_gz32(int rs, int rt)
{
//assem_debug("set_gz32\n");
emit_cmpimm(rs,1);
emit_movimm(1,rt);
emit_cmovl_imm(0,rt);
}
-void emit_set_nz32(int rs, int rt)
+
+static void emit_set_nz32(int rs, int rt)
{
//assem_debug("set_nz32\n");
if(rs!=rt) emit_movs(rs,rt);
else emit_test(rs,rs);
emit_cmovne_imm(1,rt);
}
-void emit_set_gz64_32(int rsh, int rsl, int rt)
+
+static void emit_set_gz64_32(int rsh, int rsl, int rt)
{
//assem_debug("set_gz64\n");
emit_set_gz32(rsl,rt);
emit_cmovne_imm(1,rt);
emit_cmovs_imm(0,rt);
}
-void emit_set_nz64_32(int rsh, int rsl, int rt)
+
+static void emit_set_nz64_32(int rsh, int rsl, int rt)
{
//assem_debug("set_nz64\n");
emit_or_and_set_flags(rsh,rsl,rt);
emit_cmovne_imm(1,rt);
}
-void emit_set_if_less32(int rs1, int rs2, int rt)
+
+static void emit_set_if_less32(int rs1, int rs2, int rt)
{
//assem_debug("set if less (%%%s,%%%s),%%%s\n",regname[rs1],regname[rs2],regname[rt]);
if(rs1!=rt&&rs2!=rt) emit_zeroreg(rt);
if(rs1==rt||rs2==rt) emit_movimm(0,rt);
emit_cmovl_imm(1,rt);
}
-void emit_set_if_carry32(int rs1, int rs2, int rt)
+
+static void emit_set_if_carry32(int rs1, int rs2, int rt)
{
//assem_debug("set if carry (%%%s,%%%s),%%%s\n",regname[rs1],regname[rs2],regname[rt]);
if(rs1!=rt&&rs2!=rt) emit_zeroreg(rt);
if(rs1==rt||rs2==rt) emit_movimm(0,rt);
emit_cmovb_imm(1,rt);
}
-void emit_set_if_less64_32(int u1, int l1, int u2, int l2, int rt)
+
+static void emit_set_if_less64_32(int u1, int l1, int u2, int l2, int rt)
{
//assem_debug("set if less64 (%%%s,%%%s,%%%s,%%%s),%%%s\n",regname[u1],regname[l1],regname[u2],regname[l2],regname[rt]);
assert(u1!=rt);
emit_sbcs(u1,u2,HOST_TEMPREG);
emit_cmovl_imm(1,rt);
}
-void emit_set_if_carry64_32(int u1, int l1, int u2, int l2, int rt)
+
+static void emit_set_if_carry64_32(int u1, int l1, int u2, int l2, int rt)
{
//assem_debug("set if carry64 (%%%s,%%%s,%%%s,%%%s),%%%s\n",regname[u1],regname[l1],regname[u2],regname[l2],regname[rt]);
assert(u1!=rt);
emit_cmovb_imm(1,rt);
}
-void emit_call(int a)
+static void emit_call(int a)
{
assem_debug("bl %x (%x+%x)\n",a,(int)out,a-(int)out-8);
u_int offset=genjmp(a);
output_w32(0xeb000000|offset);
}
-void emit_jmp(int a)
+
+static void emit_jmp(int a)
{
assem_debug("b %x (%x+%x)\n",a,(int)out,a-(int)out-8);
u_int offset=genjmp(a);
output_w32(0xea000000|offset);
}
-void emit_jne(int a)
+
+static void emit_jne(int a)
{
assem_debug("bne %x\n",a);
u_int offset=genjmp(a);
output_w32(0x1a000000|offset);
}
-void emit_jeq(int a)
+
+static void emit_jeq(int a)
{
assem_debug("beq %x\n",a);
u_int offset=genjmp(a);
output_w32(0x0a000000|offset);
}
-void emit_js(int a)
+
+static void emit_js(int a)
{
assem_debug("bmi %x\n",a);
u_int offset=genjmp(a);
output_w32(0x4a000000|offset);
}
-void emit_jns(int a)
+
+static void emit_jns(int a)
{
assem_debug("bpl %x\n",a);
u_int offset=genjmp(a);
output_w32(0x5a000000|offset);
}
-void emit_jl(int a)
+
+static void emit_jl(int a)
{
assem_debug("blt %x\n",a);
u_int offset=genjmp(a);
output_w32(0xba000000|offset);
}
-void emit_jge(int a)
+
+static void emit_jge(int a)
{
assem_debug("bge %x\n",a);
u_int offset=genjmp(a);
output_w32(0xaa000000|offset);
}
-void emit_jno(int a)
+
+static void emit_jno(int a)
{
assem_debug("bvc %x\n",a);
u_int offset=genjmp(a);
output_w32(0x7a000000|offset);
}
-void emit_jc(int a)
+
+static void emit_jc(int a)
{
assem_debug("bcs %x\n",a);
u_int offset=genjmp(a);
output_w32(0x2a000000|offset);
}
-void emit_jcc(int a)
+
+static void emit_jcc(int a)
{
assem_debug("bcc %x\n",a);
u_int offset=genjmp(a);
output_w32(0x3a000000|offset);
}
-void emit_callreg(u_int r)
+static void emit_callreg(u_int r)
{
assert(r<15);
assem_debug("blx %s\n",regname[r]);
output_w32(0xe12fff30|r);
}
-void emit_jmpreg(u_int r)
+
+static void emit_jmpreg(u_int r)
{
assem_debug("mov pc,%s\n",regname[r]);
output_w32(0xe1a00000|rd_rn_rm(15,0,r));
}
-void emit_readword_indexed(int offset, int rs, int rt)
+static void emit_readword_indexed(int offset, int rs, int rt)
{
assert(offset>-4096&&offset<4096);
assem_debug("ldr %s,%s+%d\n",regname[rt],regname[rs],offset);
output_w32(0xe5100000|rd_rn_rm(rt,rs,0)|(-offset));
}
}
-void emit_readword_dualindexedx4(int rs1, int rs2, int rt)
+
+static void emit_readword_dualindexedx4(int rs1, int rs2, int rt)
{
assem_debug("ldr %s,%s,%s lsl #2\n",regname[rt],regname[rs1],regname[rs2]);
output_w32(0xe7900000|rd_rn_rm(rt,rs1,rs2)|0x100);
}
-void emit_ldrcc_dualindexed(int rs1, int rs2, int rt)
+
+static void emit_ldrcc_dualindexed(int rs1, int rs2, int rt)
{
assem_debug("ldrcc %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
output_w32(0x37900000|rd_rn_rm(rt,rs1,rs2));
}
-void emit_ldrccb_dualindexed(int rs1, int rs2, int rt)
+
+static void emit_ldrccb_dualindexed(int rs1, int rs2, int rt)
{
assem_debug("ldrccb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
output_w32(0x37d00000|rd_rn_rm(rt,rs1,rs2));
}
-void emit_ldrccsb_dualindexed(int rs1, int rs2, int rt)
+
+static void emit_ldrccsb_dualindexed(int rs1, int rs2, int rt)
{
assem_debug("ldrccsb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
output_w32(0x319000d0|rd_rn_rm(rt,rs1,rs2));
}
-void emit_ldrcch_dualindexed(int rs1, int rs2, int rt)
+
+static void emit_ldrcch_dualindexed(int rs1, int rs2, int rt)
{
assem_debug("ldrcch %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
output_w32(0x319000b0|rd_rn_rm(rt,rs1,rs2));
}
-void emit_ldrccsh_dualindexed(int rs1, int rs2, int rt)
+
+static void emit_ldrccsh_dualindexed(int rs1, int rs2, int rt)
{
assem_debug("ldrccsh %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
output_w32(0x319000f0|rd_rn_rm(rt,rs1,rs2));
}
-void emit_readword_indexed_tlb(int addr, int rs, int map, int rt)
+
+static void emit_readword_indexed_tlb(int addr, int rs, int map, int rt)
{
if(map<0) emit_readword_indexed(addr, rs, rt);
else {
emit_readword_dualindexedx4(rs, map, rt);
}
}
-void emit_readdword_indexed_tlb(int addr, int rs, int map, int rh, int rl)
+
+static void emit_readdword_indexed_tlb(int addr, int rs, int map, int rh, int rl)
{
if(map<0) {
if(rh>=0) emit_readword_indexed(addr, rs, rh);
emit_readword_indexed_tlb(addr, rs, map, rl);
}
}
-void emit_movsbl_indexed(int offset, int rs, int rt)
+
+static void emit_movsbl_indexed(int offset, int rs, int rt)
{
assert(offset>-256&&offset<256);
assem_debug("ldrsb %s,%s+%d\n",regname[rt],regname[rs],offset);
output_w32(0xe15000d0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
}
}
-void emit_movsbl_indexed_tlb(int addr, int rs, int map, int rt)
+
+static void emit_movsbl_indexed_tlb(int addr, int rs, int map, int rt)
{
if(map<0) emit_movsbl_indexed(addr, rs, rt);
else {
}
}
}
-void emit_movswl_indexed(int offset, int rs, int rt)
+
+static void emit_movswl_indexed(int offset, int rs, int rt)
{
assert(offset>-256&&offset<256);
assem_debug("ldrsh %s,%s+%d\n",regname[rt],regname[rs],offset);
output_w32(0xe15000f0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
}
}
-void emit_movzbl_indexed(int offset, int rs, int rt)
+
+static void emit_movzbl_indexed(int offset, int rs, int rt)
{
assert(offset>-4096&&offset<4096);
assem_debug("ldrb %s,%s+%d\n",regname[rt],regname[rs],offset);
output_w32(0xe5500000|rd_rn_rm(rt,rs,0)|(-offset));
}
}
-void emit_movzbl_dualindexedx4(int rs1, int rs2, int rt)
+
+static void emit_movzbl_dualindexedx4(int rs1, int rs2, int rt)
{
assem_debug("ldrb %s,%s,%s lsl #2\n",regname[rt],regname[rs1],regname[rs2]);
output_w32(0xe7d00000|rd_rn_rm(rt,rs1,rs2)|0x100);
}
-void emit_movzbl_indexed_tlb(int addr, int rs, int map, int rt)
+
+static void emit_movzbl_indexed_tlb(int addr, int rs, int map, int rt)
{
if(map<0) emit_movzbl_indexed(addr, rs, rt);
else {
}
}
}
-void emit_movzwl_indexed(int offset, int rs, int rt)
+
+static void emit_movzwl_indexed(int offset, int rs, int rt)
{
assert(offset>-256&&offset<256);
assem_debug("ldrh %s,%s+%d\n",regname[rt],regname[rs],offset);
output_w32(0xe15000b0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
}
}
+
static void emit_ldrd(int offset, int rs, int rt)
{
assert(offset>-256&&offset<256);
output_w32(0xe14000d0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
}
}
-void emit_readword(int addr, int rt)
+
+static void emit_readword(int addr, int rt)
{
u_int offset = addr-(u_int)&dynarec_local;
assert(offset<4096);
assem_debug("ldr %s,fp+%d\n",regname[rt],offset);
output_w32(0xe5900000|rd_rn_rm(rt,FP,0)|offset);
}
-void emit_movsbl(int addr, int rt)
+
+static unused void emit_movsbl(int addr, int rt)
{
u_int offset = addr-(u_int)&dynarec_local;
assert(offset<256);
assem_debug("ldrsb %s,fp+%d\n",regname[rt],offset);
output_w32(0xe1d000d0|rd_rn_rm(rt,FP,0)|((offset<<4)&0xf00)|(offset&0xf));
}
-void emit_movswl(int addr, int rt)
+
+static unused void emit_movswl(int addr, int rt)
{
u_int offset = addr-(u_int)&dynarec_local;
assert(offset<256);
assem_debug("ldrsh %s,fp+%d\n",regname[rt],offset);
output_w32(0xe1d000f0|rd_rn_rm(rt,FP,0)|((offset<<4)&0xf00)|(offset&0xf));
}
-void emit_movzbl(int addr, int rt)
+
+static unused void emit_movzbl(int addr, int rt)
{
u_int offset = addr-(u_int)&dynarec_local;
assert(offset<4096);
assem_debug("ldrb %s,fp+%d\n",regname[rt],offset);
output_w32(0xe5d00000|rd_rn_rm(rt,FP,0)|offset);
}
-void emit_movzwl(int addr, int rt)
+
+static unused void emit_movzwl(int addr, int rt)
{
u_int offset = addr-(u_int)&dynarec_local;
assert(offset<256);
output_w32(0xe1d000b0|rd_rn_rm(rt,FP,0)|((offset<<4)&0xf00)|(offset&0xf));
}
-void emit_writeword_indexed(int rt, int offset, int rs)
+static void emit_writeword_indexed(int rt, int offset, int rs)
{
assert(offset>-4096&&offset<4096);
assem_debug("str %s,%s+%d\n",regname[rt],regname[rs],offset);
output_w32(0xe5000000|rd_rn_rm(rt,rs,0)|(-offset));
}
}
-void emit_writeword_dualindexedx4(int rt, int rs1, int rs2)
+
+static void emit_writeword_dualindexedx4(int rt, int rs1, int rs2)
{
assem_debug("str %s,%s,%s lsl #2\n",regname[rt],regname[rs1],regname[rs2]);
output_w32(0xe7800000|rd_rn_rm(rt,rs1,rs2)|0x100);
}
-void emit_writeword_indexed_tlb(int rt, int addr, int rs, int map, int temp)
+
+static void emit_writeword_indexed_tlb(int rt, int addr, int rs, int map, int temp)
{
if(map<0) emit_writeword_indexed(rt, addr, rs);
else {
emit_writeword_dualindexedx4(rt, rs, map);
}
}
-void emit_writedword_indexed_tlb(int rh, int rl, int addr, int rs, int map, int temp)
+
+static void emit_writedword_indexed_tlb(int rh, int rl, int addr, int rs, int map, int temp)
{
if(map<0) {
if(rh>=0) emit_writeword_indexed(rh, addr, rs);
}
}
}
-void emit_writehword_indexed(int rt, int offset, int rs)
+
+static void emit_writehword_indexed(int rt, int offset, int rs)
{
assert(offset>-256&&offset<256);
assem_debug("strh %s,%s+%d\n",regname[rt],regname[rs],offset);
output_w32(0xe14000b0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
}
}
-void emit_writebyte_indexed(int rt, int offset, int rs)
+
+static void emit_writebyte_indexed(int rt, int offset, int rs)
{
assert(offset>-4096&&offset<4096);
assem_debug("strb %s,%s+%d\n",regname[rt],regname[rs],offset);
output_w32(0xe5400000|rd_rn_rm(rt,rs,0)|(-offset));
}
}
-void emit_writebyte_dualindexedx4(int rt, int rs1, int rs2)
+
+static void emit_writebyte_dualindexedx4(int rt, int rs1, int rs2)
{
assem_debug("strb %s,%s,%s lsl #2\n",regname[rt],regname[rs1],regname[rs2]);
output_w32(0xe7c00000|rd_rn_rm(rt,rs1,rs2)|0x100);
}
-void emit_writebyte_indexed_tlb(int rt, int addr, int rs, int map, int temp)
+
+static void emit_writebyte_indexed_tlb(int rt, int addr, int rs, int map, int temp)
{
if(map<0) emit_writebyte_indexed(rt, addr, rs);
else {
}
}
}
-void emit_strcc_dualindexed(int rs1, int rs2, int rt)
+
+static void emit_strcc_dualindexed(int rs1, int rs2, int rt)
{
assem_debug("strcc %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
output_w32(0x37800000|rd_rn_rm(rt,rs1,rs2));
}
-void emit_strccb_dualindexed(int rs1, int rs2, int rt)
+
+static void emit_strccb_dualindexed(int rs1, int rs2, int rt)
{
assem_debug("strccb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
output_w32(0x37c00000|rd_rn_rm(rt,rs1,rs2));
}
-void emit_strcch_dualindexed(int rs1, int rs2, int rt)
+
+static void emit_strcch_dualindexed(int rs1, int rs2, int rt)
{
assem_debug("strcch %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
output_w32(0x318000b0|rd_rn_rm(rt,rs1,rs2));
}
-void emit_writeword(int rt, int addr)
+
+static void emit_writeword(int rt, int addr)
{
u_int offset = addr-(u_int)&dynarec_local;
assert(offset<4096);
assem_debug("str %s,fp+%d\n",regname[rt],offset);
output_w32(0xe5800000|rd_rn_rm(rt,FP,0)|offset);
}
-void emit_writehword(int rt, int addr)
+
+static unused void emit_writehword(int rt, int addr)
{
u_int offset = addr-(u_int)&dynarec_local;
assert(offset<256);
assem_debug("strh %s,fp+%d\n",regname[rt],offset);
output_w32(0xe1c000b0|rd_rn_rm(rt,FP,0)|((offset<<4)&0xf00)|(offset&0xf));
}
-void emit_writebyte(int rt, int addr)
+
+static unused void emit_writebyte(int rt, int addr)
{
u_int offset = addr-(u_int)&dynarec_local;
assert(offset<4096);
output_w32(0xe5c00000|rd_rn_rm(rt,FP,0)|offset);
}
-void emit_umull(u_int rs1, u_int rs2, u_int hi, u_int lo)
+static void emit_umull(u_int rs1, u_int rs2, u_int hi, u_int lo)
{
assem_debug("umull %s, %s, %s, %s\n",regname[lo],regname[hi],regname[rs1],regname[rs2]);
assert(rs1<16);
assert(lo<16);
output_w32(0xe0800090|(hi<<16)|(lo<<12)|(rs2<<8)|rs1);
}
-void emit_smull(u_int rs1, u_int rs2, u_int hi, u_int lo)
+
+static void emit_smull(u_int rs1, u_int rs2, u_int hi, u_int lo)
{
assem_debug("smull %s, %s, %s, %s\n",regname[lo],regname[hi],regname[rs1],regname[rs2]);
assert(rs1<16);
output_w32(0xe0c00090|(hi<<16)|(lo<<12)|(rs2<<8)|rs1);
}
-void emit_clz(int rs,int rt)
+static void emit_clz(int rs,int rt)
{
assem_debug("clz %s,%s\n",regname[rt],regname[rs]);
output_w32(0xe16f0f10|rd_rn_rm(rt,0,rs));
}
-void emit_subcs(int rs1,int rs2,int rt)
+static void emit_subcs(int rs1,int rs2,int rt)
{
assem_debug("subcs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
output_w32(0x20400000|rd_rn_rm(rt,rs1,rs2));
}
-void emit_shrcc_imm(int rs,u_int imm,int rt)
+static void emit_shrcc_imm(int rs,u_int imm,int rt)
{
assert(imm>0);
assert(imm<32);
output_w32(0x31a00000|rd_rn_rm(rt,0,rs)|0x20|(imm<<7));
}
-void emit_shrne_imm(int rs,u_int imm,int rt)
+static void emit_shrne_imm(int rs,u_int imm,int rt)
{
assert(imm>0);
assert(imm<32);
output_w32(0x11a00000|rd_rn_rm(rt,0,rs)|0x20|(imm<<7));
}
-void emit_negmi(int rs, int rt)
+static void emit_negmi(int rs, int rt)
{
assem_debug("rsbmi %s,%s,#0\n",regname[rt],regname[rs]);
output_w32(0x42600000|rd_rn_rm(rt,rs,0));
}
-void emit_negsmi(int rs, int rt)
+static void emit_negsmi(int rs, int rt)
{
assem_debug("rsbsmi %s,%s,#0\n",regname[rt],regname[rs]);
output_w32(0x42700000|rd_rn_rm(rt,rs,0));
}
-void emit_orreq(u_int rs1,u_int rs2,u_int rt)
+static void emit_orreq(u_int rs1,u_int rs2,u_int rt)
{
assem_debug("orreq %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
output_w32(0x01800000|rd_rn_rm(rt,rs1,rs2));
}
-void emit_orrne(u_int rs1,u_int rs2,u_int rt)
+static void emit_orrne(u_int rs1,u_int rs2,u_int rt)
{
assem_debug("orrne %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
output_w32(0x11800000|rd_rn_rm(rt,rs1,rs2));
}
-void emit_bic_lsl(u_int rs1,u_int rs2,u_int shift,u_int rt)
+static void emit_bic_lsl(u_int rs1,u_int rs2,u_int shift,u_int rt)
{
assem_debug("bic %s,%s,%s lsl %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
output_w32(0xe1C00000|rd_rn_rm(rt,rs1,rs2)|0x10|(shift<<8));
}
-void emit_biceq_lsl(u_int rs1,u_int rs2,u_int shift,u_int rt)
+static void emit_biceq_lsl(u_int rs1,u_int rs2,u_int shift,u_int rt)
{
assem_debug("biceq %s,%s,%s lsl %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
output_w32(0x01C00000|rd_rn_rm(rt,rs1,rs2)|0x10|(shift<<8));
}
-void emit_bicne_lsl(u_int rs1,u_int rs2,u_int shift,u_int rt)
+static void emit_bicne_lsl(u_int rs1,u_int rs2,u_int shift,u_int rt)
{
assem_debug("bicne %s,%s,%s lsl %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
output_w32(0x11C00000|rd_rn_rm(rt,rs1,rs2)|0x10|(shift<<8));
}
-void emit_bic_lsr(u_int rs1,u_int rs2,u_int shift,u_int rt)
+static void emit_bic_lsr(u_int rs1,u_int rs2,u_int shift,u_int rt)
{
assem_debug("bic %s,%s,%s lsr %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
output_w32(0xe1C00000|rd_rn_rm(rt,rs1,rs2)|0x30|(shift<<8));
}
-void emit_biceq_lsr(u_int rs1,u_int rs2,u_int shift,u_int rt)
+static void emit_biceq_lsr(u_int rs1,u_int rs2,u_int shift,u_int rt)
{
assem_debug("biceq %s,%s,%s lsr %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
output_w32(0x01C00000|rd_rn_rm(rt,rs1,rs2)|0x30|(shift<<8));
}
-void emit_bicne_lsr(u_int rs1,u_int rs2,u_int shift,u_int rt)
+static void emit_bicne_lsr(u_int rs1,u_int rs2,u_int shift,u_int rt)
{
assem_debug("bicne %s,%s,%s lsr %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
output_w32(0x11C00000|rd_rn_rm(rt,rs1,rs2)|0x30|(shift<<8));
}
-void emit_teq(int rs, int rt)
+static void emit_teq(int rs, int rt)
{
assem_debug("teq %s,%s\n",regname[rs],regname[rt]);
output_w32(0xe1300000|rd_rn_rm(0,rs,rt));
}
-void emit_rsbimm(int rs, int imm, int rt)
+static void emit_rsbimm(int rs, int imm, int rt)
{
u_int armval;
genimm_checked(imm,&armval);
}
// Load 2 immediates optimizing for small code size
-void emit_mov2imm_compact(int imm1,u_int rt1,int imm2,u_int rt2)
+static void emit_mov2imm_compact(int imm1,u_int rt1,int imm2,u_int rt2)
{
emit_movimm(imm1,rt1);
u_int armval;
// Conditionally select one of two immediates, optimizing for small code size
// This will only be called if HAVE_CMOV_IMM is defined
-void emit_cmov2imm_e_ne_compact(int imm1,int imm2,u_int rt)
+static void emit_cmov2imm_e_ne_compact(int imm1,int imm2,u_int rt)
{
u_int armval;
if(genimm(imm2-imm1,&armval)) {
}
// special case for checking invalid_code
-void emit_cmpmem_indexedsr12_reg(int base,int r,int imm)
+static void emit_cmpmem_indexedsr12_reg(int base,int r,int imm)
{
assert(imm<128&&imm>=0);
assert(r>=0&&r<16);
emit_cmpimm(HOST_TEMPREG,imm);
}
-void emit_callne(int a)
+static void emit_callne(int a)
{
assem_debug("blne %x\n",a);
u_int offset=genjmp(a);
}
// Used to preload hash table entries
-void emit_prefetchreg(int r)
+static unused void emit_prefetchreg(int r)
{
assem_debug("pld %s\n",regname[r]);
output_w32(0xf5d0f000|rd_rn_rm(0,r,0));
}
// Special case for mini_ht
-void emit_ldreq_indexed(int rs, u_int offset, int rt)
+static void emit_ldreq_indexed(int rs, u_int offset, int rt)
{
assert(offset<4096);
assem_debug("ldreq %s,[%s, #%d]\n",regname[rt],regname[rs],offset);
output_w32(0x05900000|rd_rn_rm(rt,rs,0)|offset);
}
-void emit_bicne_imm(int rs,int imm,int rt)
+static unused void emit_bicne_imm(int rs,int imm,int rt)
{
u_int armval;
genimm_checked(imm,&armval);
output_w32(0x13c00000|rd_rn_rm(rt,rs,0)|armval);
}
-void emit_biccs_imm(int rs,int imm,int rt)
+static unused void emit_biccs_imm(int rs,int imm,int rt)
{
u_int armval;
genimm_checked(imm,&armval);
output_w32(0x23c00000|rd_rn_rm(rt,rs,0)|armval);
}
-void emit_bicvc_imm(int rs,int imm,int rt)
+static unused void emit_bicvc_imm(int rs,int imm,int rt)
{
u_int armval;
genimm_checked(imm,&armval);
output_w32(0x73c00000|rd_rn_rm(rt,rs,0)|armval);
}
-void emit_bichi_imm(int rs,int imm,int rt)
+static unused void emit_bichi_imm(int rs,int imm,int rt)
{
u_int armval;
genimm_checked(imm,&armval);
output_w32(0x83c00000|rd_rn_rm(rt,rs,0)|armval);
}
-void emit_orrvs_imm(int rs,int imm,int rt)
+static unused void emit_orrvs_imm(int rs,int imm,int rt)
{
u_int armval;
genimm_checked(imm,&armval);
output_w32(0x63800000|rd_rn_rm(rt,rs,0)|armval);
}
-void emit_orrne_imm(int rs,int imm,int rt)
+static void emit_orrne_imm(int rs,int imm,int rt)
{
u_int armval;
genimm_checked(imm,&armval);
output_w32(0x13800000|rd_rn_rm(rt,rs,0)|armval);
}
-void emit_andne_imm(int rs,int imm,int rt)
+static void emit_andne_imm(int rs,int imm,int rt)
{
u_int armval;
genimm_checked(imm,&armval);
output_w32(0x12000000|rd_rn_rm(rt,rs,0)|armval);
}
-void emit_addpl_imm(int rs,int imm,int rt)
+static unused void emit_addpl_imm(int rs,int imm,int rt)
{
u_int armval;
genimm_checked(imm,&armval);
output_w32(0x52800000|rd_rn_rm(rt,rs,0)|armval);
}
-void emit_jno_unlikely(int a)
+static void emit_jno_unlikely(int a)
{
//emit_jno(a);
assem_debug("addvc pc,pc,#? (%x)\n",/*a-(int)out-8,*/a);
assem_debug("}\n");
output_w32(0xe88b0000|reglist);
}
+
static void restore_regs_all(u_int reglist)
{
int i;
assem_debug("}\n");
output_w32(0xe89b0000|reglist);
}
+
// Save registers before function call
static void save_regs(u_int reglist)
{
reglist&=CALLER_SAVE_REGS; // only save the caller-save registers, r0-r3, r12
save_regs_all(reglist);
}
+
// Restore registers after function call
static void restore_regs(u_int reglist)
{
/* Stubs/epilogue */
-void literal_pool(int n)
+static void literal_pool(int n)
{
if(!literalcount) return;
if(n) {
literalcount=0;
}
-void literal_pool_jumpover(int n)
+static void literal_pool_jumpover(int n)
{
if(!literalcount) return;
if(n) {
set_jump_target(jaddr,(int)out);
}
-emit_extjump2(u_int addr, int target, int linker)
+static void emit_extjump2(u_int addr, int target, int linker)
{
u_char *ptr=(u_char *)addr;
assert((ptr[3]&0x0e)==0xa);
+ (void)ptr;
+
emit_loadlp(target,0);
emit_loadlp(addr,1);
assert(addr>=BASE_ADDR&&addr<(BASE_ADDR+(1<<TARGET_SIZE_2)));
emit_jmp(linker);
}
-emit_extjump(int addr, int target)
+static void emit_extjump(int addr, int target)
{
emit_extjump2(addr, target, (int)dyna_linker);
}
-emit_extjump_ds(int addr, int target)
+
+static void emit_extjump_ds(int addr, int target)
{
emit_extjump2(addr, target, (int)dyna_linker_ds);
}
#include "pcsxmem.h"
#include "pcsxmem_inline.c"
-do_readstub(int n)
+static void do_readstub(int n)
{
assem_debug("do_readstub %x\n",start+stubs[n][3]*4);
literal_pool(256);
}
// return memhandler, or get directly accessable address and return 0
-u_int get_direct_memhandler(void *table,u_int addr,int type,u_int *addr_host)
+static u_int get_direct_memhandler(void *table,u_int addr,int type,u_int *addr_host)
{
u_int l1,l2=0;
l1=((u_int *)table)[addr>>12];
}
}
-inline_readstub(int type, int i, u_int addr, signed char regmap[], int target, int adj, u_int reglist)
+static void inline_readstub(int type, int i, u_int addr, signed char regmap[], int target, int adj, u_int reglist)
{
int rs=get_reg(regmap,target);
int rth=get_reg(regmap,target|64);
restore_regs(reglist);
}
-do_writestub(int n)
+static void do_writestub(int n)
{
assem_debug("do_writestub %x\n",start+stubs[n][3]*4);
literal_pool(256);
emit_jmp(ra);
}
-inline_writestub(int type, int i, u_int addr, signed char regmap[], int target, int adj, u_int reglist)
+static void inline_writestub(int type, int i, u_int addr, signed char regmap[], int target, int adj, u_int reglist)
{
int rs=get_reg(regmap,-1);
int rth=get_reg(regmap,target|64);
restore_regs(reglist);
}
-do_unalignedwritestub(int n)
+static void do_unalignedwritestub(int n)
{
assem_debug("do_unalignedwritestub %x\n",start+stubs[n][3]*4);
literal_pool(256);
#endif
}
-void printregs(int edi,int esi,int ebp,int esp,int b,int d,int c,int a)
-{
- printf("regs: %x %x %x %x %x %x %x (%x)\n",a,b,c,d,ebp,esi,edi,(&edi)[-1]);
-}
-
-do_invstub(int n)
+static void do_invstub(int n)
{
literal_pool(20);
u_int reglist=stubs[n][3];
return entry;
}
-void do_dirty_stub_ds()
+static void do_dirty_stub_ds()
{
// Careful about the code output here, verify_dirty needs to parse it.
#ifndef HAVE_ARMV7
emit_call((int)&verify_code_ds);
}
-do_cop1stub(int n)
+static void do_cop1stub(int n)
{
literal_pool(256);
assem_debug("do_cop1stub %x\n",start+stubs[n][3]*4);
/* Special assem */
-void shift_assemble_arm(int i,struct regstat *i_regs)
+static void shift_assemble_arm(int i,struct regstat *i_regs)
{
if(rt1[i]) {
if(opcode2[i]<=0x07) // SLLV/SRLV/SRAV
#define shift_assemble shift_assemble_arm
-void loadlr_assemble_arm(int i,struct regstat *i_regs)
+static void loadlr_assemble_arm(int i,struct regstat *i_regs)
{
int s,th,tl,temp,temp2,addr,map=-1;
int offset;
}
#define loadlr_assemble loadlr_assemble_arm
-void cop0_assemble(int i,struct regstat *i_regs)
+static void cop0_assemble(int i,struct regstat *i_regs)
{
if(opcode2[i]==0) // MFC0
{
}
}
-void cop2_assemble(int i,struct regstat *i_regs)
+static void cop2_assemble(int i,struct regstat *i_regs)
{
u_int copr=(source[i]>>11)&0x1f;
signed char temp=get_reg(i_regs->regmap,-1);
}
}
-void cop1_unusable(int i,struct regstat *i_regs)
+static void cop1_unusable(int i,struct regstat *i_regs)
{
// XXX: should just just do the exception instead
if(!cop1_usable) {
}
}
-void cop1_assemble(int i,struct regstat *i_regs)
+static void cop1_assemble(int i,struct regstat *i_regs)
{
cop1_unusable(i, i_regs);
}
-void fconv_assemble_arm(int i,struct regstat *i_regs)
+static void fconv_assemble_arm(int i,struct regstat *i_regs)
{
cop1_unusable(i, i_regs);
}
#define fconv_assemble fconv_assemble_arm
-void fcomp_assemble(int i,struct regstat *i_regs)
+static void fcomp_assemble(int i,struct regstat *i_regs)
{
cop1_unusable(i, i_regs);
}
-void float_assemble(int i,struct regstat *i_regs)
+static void float_assemble(int i,struct regstat *i_regs)
{
cop1_unusable(i, i_regs);
}
-void multdiv_assemble_arm(int i,struct regstat *i_regs)
+static void multdiv_assemble_arm(int i,struct regstat *i_regs)
{
// case 0x18: MULT
// case 0x19: MULTU
}
#define multdiv_assemble multdiv_assemble_arm
-void do_preload_rhash(int r) {
+static void do_preload_rhash(int r) {
// Don't need this for ARM. On x86, this puts the value 0xf8 into the
// register. On ARM the hash can be done with a single instruction (below)
}
-void do_preload_rhtbl(int ht) {
+static void do_preload_rhtbl(int ht) {
emit_addimm(FP,(int)&mini_ht-(int)&dynarec_local,ht);
}
-void do_rhash(int rs,int rh) {
+static void do_rhash(int rs,int rh) {
emit_andimm(rs,0xf8,rh);
}
-void do_miniht_load(int ht,int rh) {
+static void do_miniht_load(int ht,int rh) {
assem_debug("ldr %s,[%s,%s]!\n",regname[rh],regname[ht],regname[rh]);
output_w32(0xe7b00000|rd_rn_rm(rh,ht,rh));
}
-void do_miniht_jump(int rs,int rh,int ht) {
+static void do_miniht_jump(int rs,int rh,int ht) {
emit_cmp(rh,rs);
emit_ldreq_indexed(ht,4,15);
#ifdef CORTEX_A8_BRANCH_PREDICTION_HACK
#endif
}
-void do_miniht_insert(u_int return_address,int rt,int temp) {
+static void do_miniht_insert(u_int return_address,int rt,int temp) {
#ifndef HAVE_ARMV7
emit_movimm(return_address,rt); // PC into link register
add_to_linker((int)out,return_address,1);
#endif
}
-void wb_valid(signed char pre[],signed char entry[],u_int dirty_pre,u_int dirty,uint64_t is32_pre,uint64_t u,uint64_t uu)
+static void wb_valid(signed char pre[],signed char entry[],u_int dirty_pre,u_int dirty,uint64_t is32_pre,uint64_t u,uint64_t uu)
{
//if(dirty_pre==dirty) return;
int hr,reg,new_hr;
/* using strd could possibly help but you'd have to allocate registers in pairs
-void wb_invalidate_arm(signed char pre[],signed char entry[],uint64_t dirty,uint64_t is32,uint64_t u,uint64_t uu)
+static void wb_invalidate_arm(signed char pre[],signed char entry[],uint64_t dirty,uint64_t is32,uint64_t u,uint64_t uu)
{
int hr;
int wrote=-1;
// Clearing the cache is rather slow on ARM Linux, so mark the areas
// that need to be cleared, and then only clear these areas once.
-void do_clear_cache()
+static void do_clear_cache()
{
int i,j;
for (i=0;i<(1<<(TARGET_SIZE_2-17));i++)
notaz.gp2x.de / pcsx_rearmed.git / commitdiff