Add copyright message to gles_video
[gpsp.git] / memory.h
1 /* gameplaySP
2  *
3  * Copyright (C) 2006 Exophase <exophase@gmail.com>
4  *
5  * This program is free software; you can redistribute it and/or
6  * modify it under the terms of the GNU General Public License as
7  * published by the Free Software Foundation; either version 2 of
8  * the License, or (at your option) any later version.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
13  * General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program; if not, write to the Free Software
17  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
18  */
19
20 #ifndef MEMORY_H
21 #define MEMORY_H
22
23 typedef enum
24 {
25   DMA_START_IMMEDIATELY,
26   DMA_START_VBLANK,
27   DMA_START_HBLANK,
28   DMA_START_SPECIAL,
29   DMA_INACTIVE
30 } dma_start_type;
31
32 typedef enum
33 {
34   DMA_16BIT,
35   DMA_32BIT
36 } dma_length_type;
37
38 typedef enum
39 {
40   DMA_NO_REPEAT,
41   DMA_REPEAT
42 } dma_repeat_type;
43
44 typedef enum
45 {
46   DMA_INCREMENT,
47   DMA_DECREMENT,
48   DMA_FIXED,
49   DMA_RELOAD
50 } dma_increment_type;
51
52 typedef enum
53 {
54   DMA_NO_IRQ,
55   DMA_TRIGGER_IRQ
56 } dma_irq_type;
57
58 typedef enum
59 {
60   DMA_DIRECT_SOUND_A,
61   DMA_DIRECT_SOUND_B,
62   DMA_NO_DIRECT_SOUND
63 } dma_ds_type;
64
65 typedef struct
66 {
67   u32 dma_channel;
68   u32 source_address;
69   u32 dest_address;
70   u32 length;
71   dma_repeat_type repeat_type;
72   dma_ds_type direct_sound_channel;
73   dma_increment_type source_direction;
74   dma_increment_type dest_direction;
75   dma_length_type length_type;
76   dma_start_type start_type;
77   dma_irq_type irq;
78 } dma_transfer_type;
79
80 typedef enum
81 {
82   REG_DISPCNT = 0x000,
83   REG_DISPSTAT = 0x002,
84   REG_VCOUNT = 0x003,
85   REG_BG0CNT = 0x004,
86   REG_BG1CNT = 0x005,
87   REG_BG2CNT = 0x006,
88   REG_BG3CNT = 0x007,
89   REG_BG0HOFS = 0x08,
90   REG_BG0VOFS = 0x09,
91   REG_BG1HOFS = 0x0A,
92   REG_BG1VOFS = 0x0B,
93   REG_BG2HOFS = 0x0C,
94   REG_BG2VOFS = 0x0D,
95   REG_BG3HOFS = 0x0E,
96   REG_BG3VOFS = 0x0F,
97   REG_BG2PA = 0x10,
98   REG_BG2PB = 0x11,
99   REG_BG2PC = 0x12,
100   REG_BG2PD = 0x13,
101   REG_BG2X_L = 0x14,
102   REG_BG2X_H = 0x15,
103   REG_BG2Y_L = 0x16,
104   REG_BG2Y_H = 0x17,
105   REG_BG3PA = 0x18,
106   REG_BG3PB = 0x19,
107   REG_BG3PC = 0x1A,
108   REG_BG3PD = 0x1B,
109   REG_BG3X_L = 0x1C,
110   REG_BG3X_H = 0x1D,
111   REG_BG3Y_L = 0x1E,
112   REG_BG3Y_H = 0x1F,
113   REG_WIN0H = 0x20,
114   REG_WIN1H = 0x21,
115   REG_WIN0V = 0x22,
116   REG_WIN1V = 0x23,
117   REG_WININ = 0x24,
118   REG_WINOUT = 0x25,
119   REG_BLDCNT = 0x28,
120   REG_BLDALPHA = 0x29,
121   REG_BLDY = 0x2A,
122   REG_TM0D = 0x80,
123   REG_TM0CNT = 0x81,
124   REG_TM1D = 0x82,
125   REG_TM1CNT = 0x83,
126   REG_TM2D = 0x84,
127   REG_TM2CNT = 0x85,
128   REG_TM3D = 0x86,
129   REG_TM3CNT = 0x87,
130   REG_P1 = 0x098,
131   REG_P1CNT = 0x099,
132   REG_RCNT = 0x9A,
133   REG_IE = 0x100,
134   REG_IF = 0x101,
135   REG_IME = 0x104,
136   REG_HALTCNT = 0x180
137 } hardware_register;
138
139 typedef enum
140 {
141   FLASH_DEVICE_MACRONIX_64KB   = 0x1C,
142   FLASH_DEVICE_AMTEL_64KB      = 0x3D,
143   FLASH_DEVICE_SST_64K         = 0xD4,
144   FLASH_DEVICE_PANASONIC_64KB  = 0x1B,
145   FLASH_DEVICE_MACRONIX_128KB  = 0x09
146 } flash_device_id_type;
147
148 typedef enum
149 {
150   FLASH_MANUFACTURER_MACRONIX  = 0xC2,
151   FLASH_MANUFACTURER_AMTEL     = 0x1F,
152   FLASH_MANUFACTURER_PANASONIC = 0x32,
153   FLASH_MANUFACTURER_SST       = 0xBF
154 } flash_manufacturer_id_type;
155
156 u8 function_cc read_memory8(u32 address);
157 u32 function_cc read_memory16(u32 address);
158 u16 function_cc read_memory16_signed(u32 address);
159 u32 function_cc read_memory32(u32 address);
160 cpu_alert_type function_cc write_memory8(u32 address, u8 value);
161 cpu_alert_type function_cc write_memory16(u32 address, u16 value);
162 cpu_alert_type function_cc write_memory32(u32 address, u32 value);
163
164 extern u8 *memory_regions[16];
165 extern u32 memory_limits[16];
166
167 /* EDIT: Shouldn't this be extern ?! */
168 extern u32 waitstate_cycles_sequential[16][3];
169
170 extern u32 gamepak_size;
171 extern char gamepak_title[13];
172 extern char gamepak_code[5];
173 extern char gamepak_maker[3];
174 extern char gamepak_filename[512];
175
176 cpu_alert_type dma_transfer(dma_transfer_type *dma);
177 u8 *memory_region(u32 address, u32 *memory_limit);
178 u32 load_gamepak(char *name);
179 u32 load_backup(char *name);
180 s32 load_bios(char *name);
181 void update_backup();
182 void update_backup_force();
183 void init_memory();
184 void init_gamepak_buffer();
185 void bios_region_read_allow();
186 void bios_region_read_protect();
187 u8 *load_gamepak_page(u32 physical_index);
188 void memory_write_mem_savestate(file_tag_type savestate_file);
189 void memory_read_savestate(file_tag_type savestate_file);
190 void load_state(char *savestate_filename);
191 void save_state(char *savestate_filename, u16 *screen_capture);
192
193 extern u8 *gamepak_rom;
194 extern u32 gamepak_ram_buffer_size;
195 extern u32 oam_update;
196 extern u32 gbc_sound_update;
197 extern u32 gbc_sound_wave_update;
198 extern dma_transfer_type dma[4];
199
200 extern u8 *write_mem_ptr;
201
202 extern u16 palette_ram[512];
203 extern u16 oam_ram[512];
204 extern u16 palette_ram_converted[512];
205 extern u16 io_registers[1024 * 16];
206 extern u8 ewram[1024 * 256 * 2];
207 extern u8 iwram[1024 * 32 * 2];
208 extern u8 vram[1024 * 96 * 2];
209
210 extern u8 bios_rom[1024 * 32];
211 extern u32 bios_read_protect;
212
213 extern u8 *memory_map_read[8 * 1024];
214 extern u32 *reg;
215 extern u8 *memory_map_write[8 * 1024];
216
217 extern flash_device_id_type flash_device_id;
218
219 #endif