new acc mode timing, VDP FIFO code
[libpicofe.git] / gp2x / 940ctl.c
CommitLineData
6ab2f79c 1// Code for communication with ARM940 and control of it.\r
2// (c) Copyright 2007, Grazvydas "notaz" Ignotas\r
3\r
720ee7f6 4#include <stdio.h>\r
5#include <stdlib.h>\r
6#include <string.h>\r
7#include <unistd.h>\r
8#include <sys/mman.h>\r
9#include <sys/ioctl.h>\r
10#include <fcntl.h>\r
11#include <errno.h>\r
12\r
b30a8e67 13#include "code940/940shared.h"\r
720ee7f6 14#include "gp2x.h"\r
15#include "emu.h"\r
16#include "menu.h"\r
edbb82f8 17#include "mp3.h"\r
c7a4ff64 18#include "../common/arm_utils.h"\r
19#include "../common/menu.h"\r
598e7c06 20#include "../../Pico/PicoInt.h"\r
49fe50f0 21#include "../../Pico/sound/mix.h"\r
22\r
720ee7f6 23/* we will need some gp2x internals here */\r
24extern volatile unsigned short *gp2x_memregs; /* from minimal library rlyeh */\r
25extern volatile unsigned long *gp2x_memregl;\r
26\r
8f1b51ef 27extern int reset_timing;\r
720ee7f6 28static unsigned char *shared_mem = 0;\r
29static _940_data_t *shared_data = 0;\r
edbb82f8 30_940_ctl_t *shared_ctl = 0;\r
31unsigned char *mp3_mem = 0;\r
598e7c06 32\r
60b4b403 33#define MP3_SIZE_MAX (0x400000 + 0x800000) // 12M\r
95151aea 34#define CODE940_FILE "pico940.bin"\r
720ee7f6 35\r
36int crashed_940 = 0;\r
37\r
979ba09f 38static FILE *loaded_mp3 = 0;\r
720ee7f6 39\r
40/***********************************************************/\r
41\r
42#define MAXOUT (+32767)\r
43#define MINOUT (-32768)\r
44\r
45/* limitter */\r
46#define Limit(val, max,min) { \\r
47 if ( val > max ) val = max; \\r
48 else if ( val < min ) val = min; \\r
49}\r
50\r
51/* these will be managed locally on our side */\r
52extern int *ym2612_dacen;\r
53extern INT32 *ym2612_dacout;\r
54extern void *ym2612_regs;\r
55\r
56static UINT8 *REGS = 0; /* we will also keep local copy of regs for savestates and such */\r
57static INT32 addr_A1; /* address line A1 */\r
58static int dacen;\r
59static INT32 dacout;\r
60static UINT8 ST_address; /* address register */\r
61static UINT8 ST_status; /* status flag */\r
62static UINT8 ST_mode; /* mode CSM / 3SLOT */\r
63static int ST_TA; /* timer a */\r
64static int ST_TAC; /* timer a maxval */\r
65static int ST_TAT; /* timer a ticker */\r
66static UINT8 ST_TB; /* timer b */\r
67static int ST_TBC; /* timer b maxval */\r
68static int ST_TBT; /* timer b ticker */\r
69\r
70static int writebuff_ptr = 0;\r
71\r
72\r
73/* OPN Mode Register Write */\r
79cad122 74static int set_timers( int v )\r
720ee7f6 75{\r
79cad122 76 int change;\r
77\r
720ee7f6 78 /* b7 = CSM MODE */\r
79 /* b6 = 3 slot mode */\r
80 /* b5 = reset b */\r
81 /* b4 = reset a */\r
82 /* b3 = timer enable b */\r
83 /* b2 = timer enable a */\r
84 /* b1 = load b */\r
85 /* b0 = load a */\r
79cad122 86 change = (ST_mode ^ v) & 0xc0;\r
720ee7f6 87 ST_mode = v;\r
88\r
89 /* reset Timer b flag */\r
90 if( v & 0x20 )\r
91 ST_status &= ~2;\r
92\r
93 /* reset Timer a flag */\r
94 if( v & 0x10 )\r
95 ST_status &= ~1;\r
79cad122 96\r
97 return change;\r
720ee7f6 98}\r
99\r
100/* YM2612 write */\r
101/* a = address */\r
102/* v = value */\r
103/* returns 1 if sample affecting state changed */\r
104int YM2612Write_940(unsigned int a, unsigned int v)\r
105{\r
79cad122 106 int addr;\r
107 int upd = 1; /* the write affects sample generation */\r
720ee7f6 108\r
109 v &= 0xff; /* adjust to 8 bit bus */\r
110 a &= 3;\r
111\r
79cad122 112 //printf("%05i:%03i: ym w ([%i] %02x)\n", Pico.m.frame_count, Pico.m.scanline, a, v);\r
113\r
720ee7f6 114 switch( a ) {\r
115 case 0: /* address port 0 */\r
d032c15a 116 if (!addr_A1 && ST_address == v)\r
117 return 0; /* address already selected, don't send this command to 940 */\r
720ee7f6 118 ST_address = v;\r
d032c15a 119 /* don't send DAC or timer related address changes to 940 */\r
120 if (!addr_A1 && (v & 0xf0) == 0x20 &&\r
121 (v == 0x24 || v == 0x25 || v == 0x26 || v == 0x2a))\r
122 return 0;\r
720ee7f6 123 addr_A1 = 0;\r
79cad122 124 upd = 0;\r
720ee7f6 125 break;\r
126\r
127 case 1: /* data port 0 */\r
128 if (addr_A1 != 0) {\r
129 return 0; /* verified on real YM2608 */\r
130 }\r
131\r
132 addr = ST_address;\r
133 REGS[addr] = v;\r
134\r
135 switch( addr & 0xf0 )\r
136 {\r
137 case 0x20: /* 0x20-0x2f Mode */\r
138 switch( addr )\r
139 {\r
140 case 0x24: { // timer A High 8\r
141 int TAnew = (ST_TA & 0x03)|(((int)v)<<2);\r
142 if(ST_TA != TAnew) {\r
143 // we should reset ticker only if new value is written. Outrun requires this.\r
144 ST_TA = TAnew;\r
145 ST_TAC = (1024-TAnew)*18;\r
146 ST_TAT = 0;\r
147 }\r
148 return 0;\r
149 }\r
150 case 0x25: { // timer A Low 2\r
151 int TAnew = (ST_TA & 0x3fc)|(v&3);\r
152 if(ST_TA != TAnew) {\r
153 ST_TA = TAnew;\r
154 ST_TAC = (1024-TAnew)*18;\r
155 ST_TAT = 0;\r
156 }\r
157 return 0;\r
158 }\r
159 case 0x26: // timer B\r
160 if(ST_TB != v) {\r
161 ST_TB = v;\r
162 ST_TBC = (256-v)<<4;\r
163 ST_TBC *= 18;\r
164 ST_TBT = 0;\r
165 }\r
166 return 0;\r
167 case 0x27: /* mode, timer control */\r
79cad122 168 if (set_timers( v ))\r
169 break; // other side needs ST.mode for 3slot mode\r
170 return 0;\r
720ee7f6 171 case 0x2a: /* DAC data (YM2612) */\r
172 dacout = ((int)v - 0x80) << 6; /* level unknown (notaz: 8 seems to be too much) */\r
173 return 0;\r
174 case 0x2b: /* DAC Sel (YM2612) */\r
175 /* b7 = dac enable */\r
176 dacen = v & 0x80;\r
79cad122 177 upd = 0;\r
720ee7f6 178 break; // other side has to know this\r
179 default:\r
180 break;\r
181 }\r
182 break;\r
183 }\r
184 break;\r
185\r
186 case 2: /* address port 1 */\r
d032c15a 187 if (addr_A1 && ST_address == v)\r
188 return 0;\r
720ee7f6 189 ST_address = v;\r
190 addr_A1 = 1;\r
79cad122 191 upd = 0;\r
720ee7f6 192 break;\r
193\r
194 case 3: /* data port 1 */\r
195 if (addr_A1 != 1) {\r
196 return 0; /* verified on real YM2608 */\r
197 }\r
198\r
199 addr = ST_address | 0x100;\r
200 REGS[addr] = v;\r
201 break;\r
202 }\r
203\r
79cad122 204 //printf("ym pass\n");\r
205\r
720ee7f6 206 if(currentConfig.EmuOpt & 4) {\r
79cad122 207 UINT16 *writebuff = shared_ctl->writebuffsel ? shared_ctl->writebuff0 : shared_ctl->writebuff1;\r
208\r
209 /* detect rapid ym updates */\r
210 if (upd && !(writebuff_ptr & 0x80000000) && Pico.m.scanline < 224) {\r
211 int mid = Pico.m.pal ? 68 : 93;\r
212 if (Pico.m.scanline > mid) {\r
213 //printf("%05i:%03i: rapid ym\n", Pico.m.frame_count, Pico.m.scanline);\r
214 writebuff[writebuff_ptr++ & 0xffff] = 0xfffe;\r
215 writebuff_ptr |= 0x80000000;\r
216 //printf("%05i:%03i: ym w ([%02x] %02x, upd=%i)\n", Pico.m.frame_count, Pico.m.scanline, addr, v, upd);\r
720ee7f6 217 }\r
79cad122 218 }\r
219\r
220 /* queue this write for 940 */\r
221 if ((writebuff_ptr&0xffff) < 2047) {\r
222 writebuff[writebuff_ptr++ & 0xffff] = (a<<8)|v;\r
720ee7f6 223 } else {\r
d032c15a 224 printf("warning: writebuff_ptr > 2047 ([%i] %02x)\n", a, v);\r
720ee7f6 225 }\r
226 }\r
227\r
228 return 0; // cause the engine to do updates once per frame only\r
229}\r
230\r
231UINT8 YM2612Read_940(void)\r
232{\r
233 return ST_status;\r
234}\r
235\r
236\r
237int YM2612PicoTick_940(int n)\r
238{\r
239 //int ret = 0;\r
240\r
241 // timer A\r
242 if(ST_mode & 0x01 && (ST_TAT+=64*n) >= ST_TAC) {\r
243 ST_TAT -= ST_TAC;\r
244 if(ST_mode & 0x04) ST_status |= 1;\r
245 // CSM mode total level latch and auto key on\r
246/* FIXME\r
247 if(ST_mode & 0x80) {\r
248 CSMKeyControll( &(ym2612_940->CH[2]) ); // Vectorman2, etc.\r
249 ret = 1;\r
250 }\r
251*/\r
252 }\r
253\r
254 // timer B\r
255 if(ST_mode & 0x02 && (ST_TBT+=64*n) >= ST_TBC) {\r
256 ST_TBT -= ST_TBC;\r
257 if(ST_mode & 0x08) ST_status |= 2;\r
258 }\r
259\r
260 return 0;\r
261}\r
262\r
263\r
edbb82f8 264#define CHECK_BUSY(job) \\r
265 (gp2x_memregs[0x3b46>>1] & (1<<(job-1)))\r
266\r
267static void wait_busy_940(int job)\r
720ee7f6 268{\r
269 int i;\r
720ee7f6 270\r
edbb82f8 271 job--;\r
272 for (i = 0; (gp2x_memregs[0x3b46>>1] & (1<<job)) && i < 0x10000; i++)\r
b30a8e67 273 spend_cycles(8*1024); // tested to be best for mp3 dec\r
720ee7f6 274 if (i < 0x10000) return;\r
275\r
276 /* 940 crashed */\r
b30a8e67 277 printf("940 crashed (cnt: %i, ve: ", shared_ctl->loopc);\r
720ee7f6 278 for (i = 0; i < 8; i++)\r
279 printf("%i ", shared_ctl->vstarts[i]);\r
280 printf(")\n");\r
edbb82f8 281 printf("irq pending flags: DUALCPU %04x, SRCPND %08lx (see 26), INTPND %08lx\n",\r
49fe50f0 282 gp2x_memregs[0x3b46>>1], gp2x_memregl[0x4500>>2], gp2x_memregl[0x4510>>2]);\r
edbb82f8 283 printf("last lr: %08x, lastjob: %i\n", shared_ctl->last_lr, shared_ctl->lastjob);\r
49fe50f0 284 printf("trying to interrupt..\n");\r
285 gp2x_memregs[0x3B3E>>1] = 0xffff;\r
edbb82f8 286 for (i = 0; gp2x_memregs[0x3b46>>1] && i < 0x10000; i++)\r
49fe50f0 287 spend_cycles(8*1024);\r
288 printf("i = 0x%x\n", i);\r
edbb82f8 289 printf("irq pending flags: DUALCPU %04x, SRCPND %08lx (see 26), INTPND %08lx\n",\r
49fe50f0 290 gp2x_memregs[0x3b46>>1], gp2x_memregl[0x4500>>2], gp2x_memregl[0x4510>>2]);\r
edbb82f8 291 printf("last lr: %08x, lastjob: %i\n", shared_ctl->last_lr, shared_ctl->lastjob);\r
49fe50f0 292\r
6ab2f79c 293 strcpy(menuErrorMsg, "940 crashed, too much overclock?");\r
720ee7f6 294 engineState = PGS_Menu;\r
295 crashed_940 = 1;\r
720ee7f6 296}\r
297\r
298\r
edbb82f8 299static void add_job_940(int job)\r
720ee7f6 300{\r
edbb82f8 301 if (job <= 0 || job > 16) {\r
302 printf("add_job_940: bad job: %i\n", job);\r
303 return;\r
49fe50f0 304 }\r
edbb82f8 305\r
306 // generate interrupt for this job\r
307 job--;\r
308 gp2x_memregs[(0x3B20+job*2)>>1] = 1;\r
309\r
310// printf("added %i, pending %04x\n", job+1, gp2x_memregs[0x3b46>>1]);\r
720ee7f6 311}\r
312\r
313\r
314void YM2612PicoStateLoad_940(void)\r
315{\r
316 int i, old_A1 = addr_A1;\r
317\r
fb88e614 318 /* make sure JOB940_PICOSTATELOAD gets done before next JOB940_YM2612UPDATEONE */\r
319 add_job_940(JOB940_PICOSTATELOAD);\r
320 if (CHECK_BUSY(JOB940_PICOSTATELOAD)) wait_busy_940(JOB940_PICOSTATELOAD);\r
321\r
322 writebuff_ptr = 0;\r
323\r
720ee7f6 324 // feed all the registers and update internal state\r
325 for(i = 0; i < 0x100; i++) {\r
326 YM2612Write_940(0, i);\r
327 YM2612Write_940(1, REGS[i]);\r
328 }\r
329 for(i = 0; i < 0x100; i++) {\r
330 YM2612Write_940(2, i);\r
331 YM2612Write_940(3, REGS[i|0x100]);\r
332 }\r
333\r
334 addr_A1 = old_A1;\r
720ee7f6 335}\r
336\r
337\r
338static void internal_reset(void)\r
339{\r
340 writebuff_ptr = 0;\r
341 ST_mode = 0;\r
342 ST_status = 0; /* normal mode */\r
343 ST_TA = 0;\r
344 ST_TAC = 0;\r
345 ST_TB = 0;\r
346 ST_TBC = 0;\r
347 dacen = 0;\r
348}\r
349\r
350\r
52d3dd5f 351/* this must be called after mmu hack, the allocated regions must not get cached */\r
352void sharedmem_init(void)\r
353{\r
354 if (shared_mem != NULL) return;\r
355\r
356 shared_mem = (unsigned char *) mmap(0, 0x210000, PROT_READ|PROT_WRITE, MAP_SHARED, memdev, 0x2000000);\r
357 if(shared_mem == MAP_FAILED)\r
358 {\r
359 printf("mmap(shared_data) failed with %i\n", errno);\r
360 exit(1);\r
361 }\r
362 shared_data = (_940_data_t *) (shared_mem+0x100000);\r
363 /* this area must not get buffered on either side */\r
364 shared_ctl = (_940_ctl_t *) (shared_mem+0x200000);\r
60b4b403 365 mp3_mem = (unsigned char *) mmap(0, MP3_SIZE_MAX, PROT_READ|PROT_WRITE, MAP_SHARED, memdev, 0x2400000);\r
52d3dd5f 366 if (mp3_mem == MAP_FAILED)\r
367 {\r
368 printf("mmap(mp3_mem) failed with %i\n", errno);\r
369 exit(1);\r
370 }\r
371 crashed_940 = 1;\r
372}\r
373\r
374\r
4dfd9f42 375void sharedmem_deinit(void)\r
376{\r
377 munmap(shared_mem, 0x210000);\r
378 munmap(mp3_mem, MP3_SIZE_MAX);\r
379 shared_mem = mp3_mem = NULL;\r
380 shared_data = NULL;\r
381 shared_ctl = NULL;\r
382}\r
383\r
384\r
720ee7f6 385extern char **g_argv;\r
386\r
387/* none of the functions in this file should be called before this one */\r
388void YM2612Init_940(int baseclock, int rate)\r
389{\r
390 printf("YM2612Init_940()\n");\r
8dfb9fd5 391 printf("Mem usage: shared_data: %i, shared_ctl: %i\n", sizeof(*shared_data), sizeof(*shared_ctl));\r
720ee7f6 392\r
8dfb9fd5 393 Reset940(1, 2);\r
720ee7f6 394 Pause940(1);\r
395\r
49fe50f0 396 gp2x_memregs[0x3B40>>1] = 0; // disable DUALCPU interrupts for 920\r
397 gp2x_memregs[0x3B42>>1] = 1; // enable DUALCPU interrupts for 940\r
720ee7f6 398\r
edbb82f8 399 gp2x_memregl[0x4504>>2] = 0; // make sure no FIQs will be generated\r
400 gp2x_memregl[0x4508>>2] = ~(1<<26); // unmask DUALCPU ints in the undocumented 940's interrupt controller\r
401\r
402\r
720ee7f6 403 if (crashed_940)\r
404 {\r
405 unsigned char ucData[1024];\r
406 int nRead, i, nLen = 0;\r
407 char binpath[1024];\r
408 FILE *fp;\r
409\r
410 strncpy(binpath, g_argv[0], 1023);\r
411 binpath[1023] = 0;\r
412 for (i = strlen(binpath); i > 0; i--)\r
413 if (binpath[i] == '/') { binpath[i] = 0; break; }\r
95151aea 414 strcat(binpath, "/" CODE940_FILE);\r
720ee7f6 415\r
416 fp = fopen(binpath, "rb");\r
417 if(!fp)\r
418 {\r
13059a60 419 memset(gp2x_screen, 0, 320*240*2);\r
420 text_out16(10, 100, "failed to open required file:");\r
421 text_out16(10, 110, CODE940_FILE);\r
422 gp2x_video_flip2();\r
720ee7f6 423 printf("failed to open %s\n", binpath);\r
424 exit(1);\r
425 }\r
426\r
427 while(1)\r
428 {\r
429 nRead = fread(ucData, 1, 1024, fp);\r
430 if(nRead <= 0)\r
431 break;\r
432 memcpy(shared_mem + nLen, ucData, nRead);\r
433 nLen += nRead;\r
434 }\r
435 fclose(fp);\r
436 crashed_940 = 0;\r
437 }\r
438\r
439 memset(shared_data, 0, sizeof(*shared_data));\r
440 memset(shared_ctl, 0, sizeof(*shared_ctl));\r
441\r
442 REGS = YM2612GetRegs();\r
443\r
444 ym2612_dacen = &dacen;\r
445 ym2612_dacout = &dacout;\r
446\r
447 internal_reset();\r
448\r
979ba09f 449 loaded_mp3 = 0;\r
450\r
49fe50f0 451 gp2x_memregs[0x3B46>>1] = 0xffff; // clear pending DUALCPU interrupts for 940\r
edbb82f8 452 gp2x_memregl[0x4500>>2] = 0xffffffff; // clear pending IRQs in SRCPND\r
453 gp2x_memregl[0x4510>>2] = 0xffffffff; // clear pending IRQs in INTPND\r
720ee7f6 454\r
455 /* start the 940 */\r
8dfb9fd5 456 Reset940(0, 2);\r
720ee7f6 457 Pause940(0);\r
458\r
459 // YM2612ResetChip_940(); // will be done on JOB940_YM2612INIT\r
edbb82f8 460\r
461 /* now cause 940 to init it's ym2612 stuff */\r
462 shared_ctl->baseclock = baseclock;\r
463 shared_ctl->rate = rate;\r
464 add_job_940(JOB940_INITALL);\r
720ee7f6 465}\r
466\r
467\r
468void YM2612ResetChip_940(void)\r
469{\r
470 printf("YM2612ResetChip_940()\n");\r
471 if (shared_data == NULL) {\r
472 printf("YM2612ResetChip_940: reset before init?\n");\r
473 return;\r
474 }\r
475\r
720ee7f6 476 internal_reset();\r
477\r
edbb82f8 478 add_job_940(JOB940_YM2612RESETCHIP);\r
720ee7f6 479}\r
480\r
481\r
edbb82f8 482int YM2612UpdateOne_940(int *buffer, int length, int stereo, int is_buf_empty)\r
598e7c06 483{\r
edbb82f8 484 int *ym_buf = shared_data->ym_buffer;\r
4dfd9f42 485 int ym_active_chs;\r
49fe50f0 486\r
edbb82f8 487 //printf("YM2612UpdateOne_940()\n");\r
488\r
489 if (CHECK_BUSY(JOB940_YM2612UPDATEONE)) wait_busy_940(JOB940_YM2612UPDATEONE);\r
490\r
4dfd9f42 491 ym_active_chs = shared_ctl->ym_active_chs;\r
edbb82f8 492\r
4dfd9f42 493 // mix in ym buffer. is_buf_empty means nobody mixed there anything yet and it may contain trash\r
494 if (is_buf_empty && ym_active_chs) memcpy32(buffer, ym_buf, length<<stereo);\r
495 else memset32(buffer, 0, length<<stereo);\r
edbb82f8 496\r
497 if (shared_ctl->writebuffsel == 1) {\r
79cad122 498 shared_ctl->writebuff0[writebuff_ptr & 0xffff] = 0xffff;\r
49fe50f0 499 } else {\r
79cad122 500 shared_ctl->writebuff1[writebuff_ptr & 0xffff] = 0xffff;\r
598e7c06 501 }\r
edbb82f8 502 writebuff_ptr = 0;\r
503\r
504 /* predict sample counter for next frame */\r
505 if (PsndLen_exc_add) {\r
506 if (PsndLen_exc_cnt + PsndLen_exc_add >= 0x10000) length = PsndLen + 1;\r
507 else length = PsndLen;\r
508 }\r
509\r
510 /* give 940 ym job */\r
511 shared_ctl->writebuffsel ^= 1;\r
512 shared_ctl->length = length;\r
513 shared_ctl->stereo = stereo;\r
514\r
515 add_job_940(JOB940_YM2612UPDATEONE);\r
516\r
4dfd9f42 517 return ym_active_chs;\r
598e7c06 518}\r
598e7c06 519\r
598e7c06 520\r
979ba09f 521static int mp3_samples_ready = 0, mp3_buffer_offs = 0;\r
edbb82f8 522static int mp3_play_bufsel = 0, mp3_job_started = 0;\r
598e7c06 523\r
edbb82f8 524void mp3_update(int *buffer, int length, int stereo)\r
720ee7f6 525{\r
edbb82f8 526 int length_mp3;\r
527 int cdda_on;\r
49fe50f0 528\r
edbb82f8 529 // not data track, CDC is reading, playback was started, track not ended\r
530 cdda_on = !(Pico_mcd->s68k_regs[0x36] & 1) && (Pico_mcd->scd.Status_CDC & 1) &&\r
531 loaded_mp3 && shared_ctl->mp3_offs < shared_ctl->mp3_len;\r
720ee7f6 532\r
edbb82f8 533 if (!cdda_on) return;\r
720ee7f6 534\r
edbb82f8 535 if (!(PicoOpt&0x200)) {\r
536 mp3_update_local(buffer, length, stereo);\r
537 return;\r
538 }\r
720ee7f6 539\r
edbb82f8 540 length_mp3 = length;\r
541 if (PsndRate == 22050) length_mp3 <<= 1; // mp3s are locked to 44100Hz stereo\r
542 else if (PsndRate == 11025) length_mp3 <<= 2; // so make length 44100ish\r
49fe50f0 543\r
edbb82f8 544 /* do we have to wait? */\r
545 if (mp3_job_started && mp3_samples_ready < length_mp3) {\r
546 if (CHECK_BUSY(JOB940_MP3DECODE)) wait_busy_940(JOB940_MP3DECODE);\r
547 mp3_job_started = 0;\r
548 mp3_samples_ready += 1152;\r
549 }\r
598e7c06 550\r
49fe50f0 551 /* mix mp3 data, only stereo */\r
edbb82f8 552 if (mp3_samples_ready >= length_mp3)\r
598e7c06 553 {\r
49fe50f0 554 int shr = 0;\r
555 void (*mix_samples)(int *dest_buf, short *mp3_buf, int count) = mix_16h_to_32;\r
556 if (PsndRate == 22050) { mix_samples = mix_16h_to_32_s1; shr = 1; }\r
557 else if (PsndRate == 11025) { mix_samples = mix_16h_to_32_s2; shr = 2; }\r
598e7c06 558\r
49fe50f0 559 if (1152 - mp3_buffer_offs >= length_mp3) {\r
edbb82f8 560 mix_samples(buffer, shared_data->mp3_buffer[mp3_play_bufsel] + mp3_buffer_offs*2, length<<1);\r
49fe50f0 561\r
562 mp3_buffer_offs += length_mp3;\r
598e7c06 563 } else {\r
edbb82f8 564 // collect samples from both buffers..\r
598e7c06 565 int left = 1152 - mp3_buffer_offs;\r
49fe50f0 566 if (mp3_play_bufsel == 0)\r
567 {\r
edbb82f8 568 mix_samples(buffer, shared_data->mp3_buffer[0] + mp3_buffer_offs*2, length<<1);\r
49fe50f0 569 mp3_buffer_offs = length_mp3 - left;\r
570 mp3_play_bufsel = 1;\r
571 } else {\r
572 mix_samples(buffer, shared_data->mp3_buffer[1] + mp3_buffer_offs*2, (left>>shr)<<1);\r
573 mp3_buffer_offs = length_mp3 - left;\r
574 mix_samples(buffer + ((left>>shr)<<1),\r
575 shared_data->mp3_buffer[0], (mp3_buffer_offs>>shr)<<1);\r
576 mp3_play_bufsel = 0;\r
577 }\r
720ee7f6 578 }\r
49fe50f0 579 mp3_samples_ready -= length_mp3;\r
720ee7f6 580 }\r
581\r
edbb82f8 582 // ask to decode more if we already can\r
583 if (!mp3_job_started)\r
598e7c06 584 {\r
edbb82f8 585 mp3_job_started = 1;\r
598e7c06 586 shared_ctl->mp3_buffsel ^= 1;\r
edbb82f8 587 add_job_940(JOB940_MP3DECODE);\r
598e7c06 588 }\r
720ee7f6 589}\r
598e7c06 590\r
591\r
592/***********************************************************/\r
593\r
594void mp3_start_play(FILE *f, int pos) // pos is 0-1023\r
595{\r
596 int byte_offs = 0;\r
597\r
7bc9cd7f 598 if (!(PicoOpt&0x800)) { // cdda disabled?\r
598e7c06 599 return;\r
600 }\r
601\r
602 if (loaded_mp3 != f)\r
603 {\r
dfa4c846 604 if (PicoMessage != NULL)\r
605 {\r
606 fseek(f, 0, SEEK_END);\r
607 if (ftell(f) > 2*1024*1024)\r
608 PicoMessage("Loading MP3...");\r
609 }\r
598e7c06 610 fseek(f, 0, SEEK_SET);\r
611 fread(mp3_mem, 1, MP3_SIZE_MAX, f);\r
60b4b403 612 if (!feof(f)) printf("Warning: mp3 was too large, not all data loaded.\n");\r
598e7c06 613 shared_ctl->mp3_len = ftell(f);\r
614 loaded_mp3 = f;\r
edbb82f8 615\r
616 if (PicoOpt&0x200) {\r
617 // as we are going to change 940's cacheable area, we must invalidate it's cache..\r
618 if (CHECK_BUSY(JOB940_MP3DECODE)) wait_busy_940(JOB940_MP3DECODE);\r
619 add_job_940(JOB940_INVALIDATE_DCACHE);\r
620 }\r
8f1b51ef 621 reset_timing = 1;\r
598e7c06 622 }\r
623\r
624 // seek..\r
625 if (pos) {\r
626 byte_offs = (shared_ctl->mp3_len << 6) >> 10;\r
627 byte_offs *= pos;\r
628 byte_offs >>= 6;\r
629 }\r
49fe50f0 630 // printf("mp3 pos1024: %i, byte_offs %i/%i\n", pos, byte_offs, shared_ctl->mp3_len);\r
598e7c06 631\r
632 shared_ctl->mp3_offs = byte_offs;\r
979ba09f 633\r
edbb82f8 634 // reset buffer pointers and stuff..\r
979ba09f 635 mp3_samples_ready = mp3_buffer_offs = mp3_play_bufsel = 0;\r
edbb82f8 636 mp3_job_started = 0;\r
979ba09f 637 shared_ctl->mp3_buffsel = 1; // will change to 0 on first decode\r
edbb82f8 638\r
639 if (!(PicoOpt&0x200)) mp3_start_local();\r
598e7c06 640}\r
641\r
642\r
98c9d8d9 643int mp3_get_offset(void)\r
644{\r
645 int offs1024 = 0;\r
646 int cdda_on;\r
647\r
7bc9cd7f 648 cdda_on = (PicoMCD & 1) && (PicoOpt&0x800) && !(Pico_mcd->s68k_regs[0x36] & 1) &&\r
edbb82f8 649 (Pico_mcd->scd.Status_CDC & 1) && loaded_mp3;\r
98c9d8d9 650\r
651 if (cdda_on) {\r
652 offs1024 = shared_ctl->mp3_offs << 7;\r
653 offs1024 /= shared_ctl->mp3_len;\r
654 offs1024 <<= 3;\r
655 }\r
656 printf("offs1024=%i (%i/%i)\n", offs1024, shared_ctl->mp3_offs, shared_ctl->mp3_len);\r
657\r
658 return offs1024;\r
659}\r
660\r
661\r