[libpicofe.git] / gp2x / soc_pollux.c

/*
 * (C) Gražvydas "notaz" Ignotas, 2009-2010
 *
 * This work is licensed under the terms of any of these licenses
 * (at your option):
 *  - GNU GPL, version 2 or later.
 *  - GNU LGPL, version 2.1 or later.
 *  - MAME license.
 * See the COPYING file in the top-level directory.
 *
 * <random_info=mem_map>
 * 00000000-029fffff linux (42MB)
 * 02a00000-02dfffff fb (4MB, 153600B really used)
 * 02e00000-02ffffff sound dma (2MB)
 * 03000000-03ffffff MPEGDEC (?, 16MB)
 * </random_info>
 */

#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <math.h>
#include <sys/types.h>
#include <sys/stat.h>
#include <fcntl.h>
#include <sys/mman.h>
#include <unistd.h>
#include <sys/ioctl.h>
#include <linux/fb.h>

#include "soc.h"
#include "plat_gp2x.h"
#include "../emu.h"
#include "../plat.h"
#include "../arm_utils.h"
#include "pollux_set.h"

static volatile unsigned short *memregs;
static volatile unsigned int   *memregl;
static int memdev = -1;
static int battdev = -1;

extern void *gp2x_screens[4];

#define fb_buf_count 4
static unsigned int fb_paddr[fb_buf_count];
static int fb_work_buf;
static int fbdev = -1;

static char cpuclk_was_changed = 0;
static unsigned short memtimex_old[2];
static unsigned int pllsetreg0_old;
static unsigned int timer_drift; // count per real second
static int last_pal_setting = 0;


/* misc */
static void pollux_set_fromenv(const char *env_var)
{
	const char *set_string;
	set_string = getenv(env_var);
	if (set_string)
		pollux_set(memregs, set_string);
	else
		printf("env var %s not defined.\n", env_var);
}

/* video stuff */
static void pollux_video_flip(int buf_count)
{
	memregl[0x406C>>2] = fb_paddr[fb_work_buf];
	memregl[0x4058>>2] |= 0x10;
	fb_work_buf++;
	if (fb_work_buf >= buf_count)
		fb_work_buf = 0;
	g_screen_ptr = gp2x_screens[fb_work_buf];
}

static void gp2x_video_flip_(void)
{
	pollux_video_flip(fb_buf_count);
}

/* doulblebuffered flip */
static void gp2x_video_flip2_(void)
{
	pollux_video_flip(2);
}

static void gp2x_video_changemode_ll_(int bpp)
{
	static int prev_bpp = 0;
	int code = 0, bytes = 2;
	int rot_cmd[2] = { 0, 0 };
	unsigned int r;
	char buff[32];
	int ret;

	if (bpp == prev_bpp)
		return;
	prev_bpp = bpp;

	printf("changemode: %dbpp rot=%d\n", abs(bpp), bpp < 0);

	/* negative bpp means rotated mode */
	rot_cmd[0] = (bpp < 0) ? 6 : 5;
	ret = ioctl(fbdev, _IOW('D', 90, int[2]), rot_cmd);
	if (ret < 0)
		perror("rot ioctl failed");
	memregl[0x4004>>2] = (bpp < 0) ? 0x013f00ef : 0x00ef013f;
	memregl[0x4000>>2] |= 1 << 3;

	/* the above ioctl resets LCD timings, so set them here */
	snprintf(buff, sizeof(buff), "POLLUX_LCD_TIMINGS_%s", last_pal_setting ? "PAL" : "NTSC");
	pollux_set_fromenv(buff);

	switch (abs(bpp))
	{
		case 8:
			code = 0x443a;
			bytes = 1;
			break;

		case 15:
		case 16:
			code = 0x4432;
			bytes = 2;
			break;

		default:
			printf("unhandled bpp request: %d\n", abs(bpp));
			return;
	}

	memregl[0x405c>>2] = bytes;
	memregl[0x4060>>2] = bytes * (bpp < 0 ? 240 : 320);

	r = memregl[0x4058>>2];
	r = (r & 0xffff) | (code << 16) | 0x10;
	memregl[0x4058>>2] = r;
}

static void gp2x_video_setpalette_(int *pal, int len)
{
	/* pollux palette is 16bpp only.. */
	int i;
	for (i = 0; i < len; i++)
	{
		int c = pal[i];
		c = ((c >> 8) & 0xf800) | ((c >> 5) & 0x07c0) | ((c >> 3) & 0x001f);
		memregl[0x4070>>2] = (i << 24) | c;
	}
}

static void gp2x_video_RGB_setscaling_(int ln_offs, int W, int H)
{
	/* maybe a job for 3d hardware? */
}

static void gp2x_video_wait_vsync_(void)
{
	while (!(memregl[0x308c>>2] & (1 << 10)))
		spend_cycles(128);
	memregl[0x308c>>2] |= 1 << 10;
}

/* CPU clock */
static void gp2x_set_cpuclk_(unsigned int mhz)
{
	char buff[24];
	snprintf(buff, sizeof(buff), "cpuclk=%u", mhz);
	pollux_set(memregs, buff);

	cpuclk_was_changed = 1;
}

/* RAM timings */
static void set_ram_timings_(void)
{
	pollux_set_fromenv("POLLUX_RAM_TIMINGS");
}

static void unset_ram_timings_(void)
{
	int i;

	memregs[0x14802>>1] = memtimex_old[0];
	memregs[0x14804>>1] = memtimex_old[1] | 0x8000;

	for (i = 0; i < 0x100000; i++)
		if (!(memregs[0x14804>>1] & 0x8000))
			break;

	printf("RAM timings reset to startup values.\n");
}

/* LCD refresh */
static void set_lcd_custom_rate_(int is_pal)
{
	/* just remember PAL/NTSC. We always set timings in _changemode_ll() */
	last_pal_setting = is_pal;
}

static void unset_lcd_custom_rate_(void)
{
}

static void set_lcd_gamma_(int g100, int A_SNs_curve)
{
	/* hm, the LCD possibly can do it (but not POLLUX) */
}

static int gp2x_read_battery_(void)
{
	unsigned short magic_val = 0;

	if (battdev < 0)
		return -1;
	if (read(battdev, &magic_val, sizeof(magic_val)) != sizeof(magic_val))
		return -1;
	switch (magic_val) {
	default:
	case 1:	return 100;
	case 2: return 66;
	case 3: return 40;
	case 4: return 0;
	}
}

#define TIMER_BASE3 0x1980
#define TIMER_REG(x) memregl[(TIMER_BASE3 + x) >> 2]

static unsigned int gp2x_get_ticks_us_(void)
{
	TIMER_REG(0x08) = 0x4b;  /* run timer, latch value */
	return TIMER_REG(0);
}

static unsigned int gp2x_get_ticks_ms_(void)
{
	/* approximate /= 1000 */
	unsigned long long v64;
	v64 = (unsigned long long)gp2x_get_ticks_us_() * 4294968;
	return v64 >> 32;
}

static void timer_cleanup(void)
{
	TIMER_REG(0x40) = 0x0c;	/* be sure clocks are on */
	TIMER_REG(0x08) = 0x23;	/* stop the timer, clear irq in case it's pending */
	TIMER_REG(0x00) = 0;	/* clear counter */
	TIMER_REG(0x40) = 0;	/* clocks off */
	TIMER_REG(0x44) = 0;	/* dividers back to default */
}

/* note: both PLLs are programmed the same way,
 * the databook incorrectly states that PLL1 differs */
static int decode_pll(unsigned int reg)
{
	long long v;
	int p, m, s;

	p = (reg >> 18) & 0x3f;
	m = (reg >> 8) & 0x3ff;
	s = reg & 0xff;

	if (p == 0)
		p = 1;

	v = 27000000; // master clock
	v = v * m / (p << s);
	return v;
}

int pollux_get_real_snd_rate(int req_rate)
{
	int clk0_src, clk1_src, rate, div;

	clk0_src = (memregl[0xdbc4>>2] >> 1) & 7;
	clk1_src = (memregl[0xdbc8>>2] >> 1) & 7;
	if (clk0_src > 1 || clk1_src != 7) {
		fprintf(stderr, "get_real_snd_rate: bad clk sources: %d %d\n", clk0_src, clk1_src);
		return req_rate;
	}

	rate = decode_pll(clk0_src ? memregl[0xf008>>2] : memregl[0xf004>>2]);

	// apply divisors
	div = ((memregl[0xdbc4>>2] >> 4) & 0x1f) + 1;
	rate /= div;
	div = ((memregl[0xdbc8>>2] >> 4) & 0x1f) + 1;
	rate /= div;
	rate /= 64;

	//printf("rate %d\n", rate);
	rate -= rate * timer_drift / 1000000;
	printf("adjusted rate: %d\n", rate);

	if (rate < 8000-1000 || rate > 44100+1000) {
		fprintf(stderr, "get_real_snd_rate: got bad rate: %d\n", rate);
		return req_rate;
	}

	return rate;
}

void pollux_init(void)
{
	struct fb_fix_screeninfo fbfix;
	int i, ret, rate, timer_div;

	memdev = open("/dev/mem", O_RDWR);
	if (memdev == -1) {
		perror("open(/dev/mem) failed");
		exit(1);
	}

	memregs	= mmap(0, 0x20000, PROT_READ|PROT_WRITE, MAP_SHARED, memdev, 0xc0000000);
	if (memregs == MAP_FAILED) {
		perror("mmap(memregs) failed");
		exit(1);
	}
	memregl = (volatile void *)memregs;

	fbdev = open("/dev/fb0", O_RDWR);
	if (fbdev < 0) {
		perror("can't open fbdev");
		exit(1);
	}

	ret = ioctl(fbdev, FBIOGET_FSCREENINFO, &fbfix);
	if (ret == -1) {
		perror("ioctl(fbdev) failed");
		exit(1);
	}

	printf("framebuffer: \"%s\" @ %08lx\n", fbfix.id, fbfix.smem_start);
	fb_paddr[0] = fbfix.smem_start;

	gp2x_screens[0] = mmap(0, 320*240*2*fb_buf_count, PROT_READ|PROT_WRITE,
			MAP_SHARED, memdev, fb_paddr[0]);
	if (gp2x_screens[0] == MAP_FAILED)
	{
		perror("mmap(gp2x_screens) failed");
		exit(1);
	}
	memset(gp2x_screens[0], 0, 320*240*2*fb_buf_count);

	printf("  %p -> %08x\n", gp2x_screens[0], fb_paddr[0]);
	for (i = 1; i < fb_buf_count; i++)
	{
		fb_paddr[i] = fb_paddr[i-1] + 320*240*2;
		gp2x_screens[i] = (char *)gp2x_screens[i-1] + 320*240*2;
		printf("  %p -> %08x\n", gp2x_screens[i], fb_paddr[i]);
	}
	fb_work_buf = 0;
	g_screen_ptr = gp2x_screens[0];

	battdev = open("/dev/pollux_batt", O_RDONLY);
	if (battdev < 0)
		perror("Warning: could't open pollux_batt");

	/* find what PLL1 runs at, for the timer */
	rate = decode_pll(memregl[0xf008>>2]);
	printf("PLL1 @ %dHz\n", rate);

	/* setup timer */
	timer_div = (rate + 500000) / 1000000;
	if (1 <= timer_div && timer_div <= 256) {
		timer_drift = (rate - (timer_div * 1000000)) / timer_div;

		if (TIMER_REG(0x08) & 8) {
			fprintf(stderr, "warning: timer in use, overriding!\n");
			timer_cleanup();
		}

		TIMER_REG(0x44) = ((timer_div - 1) << 4) | 2; /* using PLL1, divide by it's rate */
		TIMER_REG(0x40) = 0x0c;  /* clocks on */
		TIMER_REG(0x08) = 0x6b;  /* run timer, clear irq, latch value */

		gp2x_get_ticks_ms = gp2x_get_ticks_ms_;
		gp2x_get_ticks_us = gp2x_get_ticks_us_;
	}
	else {
		fprintf(stderr, "warning: could not make use of timer\n");

		// those functions are actually not good at all on Wiz kernel
		gp2x_get_ticks_ms = plat_get_ticks_ms_good;
		gp2x_get_ticks_us = plat_get_ticks_us_good;
	}

	pllsetreg0_old = memregl[0xf004>>2];
	memtimex_old[0] = memregs[0x14802>>1];
	memtimex_old[1] = memregs[0x14804>>1];

	gp2x_video_flip = gp2x_video_flip_;
	gp2x_video_flip2 = gp2x_video_flip2_;
	gp2x_video_changemode_ll = gp2x_video_changemode_ll_;
	gp2x_video_setpalette = gp2x_video_setpalette_;
	gp2x_video_RGB_setscaling = gp2x_video_RGB_setscaling_;
	gp2x_video_wait_vsync = gp2x_video_wait_vsync_;

	/* some firmwares have sys clk on PLL0, we can't adjust CPU clock
	 * by reprogramming the PLL0 then, as it overclocks system bus */
	if ((memregl[0xf000>>2] & 0x03000030) == 0x01000000)
		gp2x_set_cpuclk = gp2x_set_cpuclk_;
	else {
		fprintf(stderr, "unexpected PLL config (%08x), overclocking disabled\n",
			memregl[0xf000>>2]);
		gp2x_set_cpuclk = NULL;
	}

	set_lcd_custom_rate = set_lcd_custom_rate_;
	unset_lcd_custom_rate = unset_lcd_custom_rate_;
	set_lcd_gamma = set_lcd_gamma_;

	set_ram_timings = set_ram_timings_;
	unset_ram_timings = unset_ram_timings_;
	gp2x_read_battery = gp2x_read_battery_;
}

void pollux_finish(void)
{
	/* switch to default fb mem, turn portrait off */
	memregl[0x406C>>2] = fb_paddr[0];
	memregl[0x4058>>2] |= 0x10;
	close(fbdev);

	gp2x_video_changemode_ll_(16);
	unset_ram_timings_();
	if (cpuclk_was_changed) {
		memregl[0xf004>>2] = pllsetreg0_old;
		memregl[0xf07c>>2] |= 0x8000;
	}
	timer_cleanup();

	munmap((void *)memregs, 0x20000);
	close(memdev);
	if (battdev >= 0)
		close(battdev);
}
Commit	Line	Data
f27b1cea	1	/*
f89d8471	2	* (C) Gražvydas "notaz" Ignotas, 2009-2010
	3	*
	4	* This work is licensed under the terms of any of these licenses
	5	* (at your option):
	6	* - GNU GPL, version 2 or later.
	7	* - GNU LGPL, version 2.1 or later.
	8	* - MAME license.
	9	* See the COPYING file in the top-level directory.
	10	*
f27b1cea	11	* <random_info=mem_map>
	12	* 00000000-029fffff linux (42MB)
	13	* 02a00000-02dfffff fb (4MB, 153600B really used)
	14	* 02e00000-02ffffff sound dma (2MB)
	15	* 03000000-03ffffff MPEGDEC (?, 16MB)
	16	* </random_info>
	17	*/
f89d8471	18
fa8d1331	19	#include <stdio.h>
	20	#include <stdlib.h>
	21	#include <string.h>
	22	#include <math.h>
	23	#include <sys/types.h>
	24	#include <sys/stat.h>
	25	#include <fcntl.h>
	26	#include <sys/mman.h>
	27	#include <unistd.h>
	28	#include <sys/ioctl.h>
	29	#include <linux/fb.h>
	30
	31	#include "soc.h"
	32	#include "plat_gp2x.h"
a86e9a3e	33	#include "../emu.h"
	34	#include "../plat.h"
	35	#include "../arm_utils.h"
fa8d1331	36	#include "pollux_set.h"
	37
	38	static volatile unsigned short *memregs;
b6072c17	39	static volatile unsigned int *memregl;
fa8d1331	40	static int memdev = -1;
053bef76	41	static int battdev = -1;
fa8d1331	42
	43	extern void *gp2x_screens[4];
	44
	45	#define fb_buf_count 4
	46	static unsigned int fb_paddr[fb_buf_count];
	47	static int fb_work_buf;
	48	static int fbdev = -1;
	49
71769e27	50	static char cpuclk_was_changed = 0;
71769e27	51	static unsigned short memtimex_old[2];
f679add7	52	static unsigned int pllsetreg0_old;
f679add7	53	static unsigned int timer_drift; // count per real second
b7911801	54	static int last_pal_setting = 0;
71769e27	55
fa8d1331	56
f71361b5	57	/* misc */
	58	static void pollux_set_fromenv(const char *env_var)
	59	{
	60	const char *set_string;
	61	set_string = getenv(env_var);
	62	if (set_string)
	63	pollux_set(memregs, set_string);
	64	else
	65	printf("env var %s not defined.\n", env_var);
	66	}
	67
fa8d1331	68	/* video stuff */
	69	static void pollux_video_flip(int buf_count)
	70	{
	71	memregl[0x406C>>2] = fb_paddr[fb_work_buf];
	72	memregl[0x4058>>2] \|= 0x10;
	73	fb_work_buf++;
	74	if (fb_work_buf >= buf_count)
	75	fb_work_buf = 0;
	76	g_screen_ptr = gp2x_screens[fb_work_buf];
	77	}
	78
	79	static void gp2x_video_flip_(void)
	80	{
	81	pollux_video_flip(fb_buf_count);
	82	}
	83
	84	/* doulblebuffered flip */
	85	static void gp2x_video_flip2_(void)
	86	{
	87	pollux_video_flip(2);
	88	}
	89
	90	static void gp2x_video_changemode_ll_(int bpp)
	91	{
b7911801	92	static int prev_bpp = 0;
fa8d1331	93	int code = 0, bytes = 2;
b7911801	94	int rot_cmd[2] = { 0, 0 };
fa8d1331	95	unsigned int r;
f71361b5	96	char buff[32];
b7911801	97	int ret;
	98
	99	if (bpp == prev_bpp)
	100	return;
	101	prev_bpp = bpp;
	102
	103	printf("changemode: %dbpp rot=%d\n", abs(bpp), bpp < 0);
	104
	105	/* negative bpp means rotated mode */
	106	rot_cmd[0] = (bpp < 0) ? 6 : 5;
	107	ret = ioctl(fbdev, _IOW('D', 90, int[2]), rot_cmd);
	108	if (ret < 0)
	109	perror("rot ioctl failed");
	110	memregl[0x4004>>2] = (bpp < 0) ? 0x013f00ef : 0x00ef013f;
	111	memregl[0x4000>>2] \|= 1 << 3;
	112
	113	/* the above ioctl resets LCD timings, so set them here */
f71361b5	114	snprintf(buff, sizeof(buff), "POLLUX_LCD_TIMINGS_%s", last_pal_setting ? "PAL" : "NTSC");
f71361b5	115	pollux_set_fromenv(buff);
b7911801	116
b7911801	117	switch (abs(bpp))
fa8d1331	118	{
	119	case 8:
	120	code = 0x443a;
	121	bytes = 1;
	122	break;
	123
	124	case 15:
	125	case 16:
	126	code = 0x4432;
	127	bytes = 2;
	128	break;
	129
	130	default:
b7911801	131	printf("unhandled bpp request: %d\n", abs(bpp));
fa8d1331	132	return;
	133	}
	134
	135	memregl[0x405c>>2] = bytes;
b7911801	136	memregl[0x4060>>2] = bytes * (bpp < 0 ? 240 : 320);
fa8d1331	137
	138	r = memregl[0x4058>>2];
	139	r = (r & 0xffff) \| (code << 16) \| 0x10;
	140	memregl[0x4058>>2] = r;
	141	}
	142
	143	static void gp2x_video_setpalette_(int *pal, int len)
	144	{
	145	/* pollux palette is 16bpp only.. */
	146	int i;
	147	for (i = 0; i < len; i++)
	148	{
	149	int c = pal[i];
	150	c = ((c >> 8) & 0xf800) \| ((c >> 5) & 0x07c0) \| ((c >> 3) & 0x001f);
	151	memregl[0x4070>>2] = (i << 24) \| c;
	152	}
	153	}
	154
	155	static void gp2x_video_RGB_setscaling_(int ln_offs, int W, int H)
	156	{
	157	/* maybe a job for 3d hardware? */
	158	}
	159
	160	static void gp2x_video_wait_vsync_(void)
	161	{
38163dd7	162	while (!(memregl[0x308c>>2] & (1 << 10)))
fa8d1331	163	spend_cycles(128);
	164	memregl[0x308c>>2] \|= 1 << 10;
	165	}
	166
	167	/* CPU clock */
	168	static void gp2x_set_cpuclk_(unsigned int mhz)
	169	{
	170	char buff[24];
	171	snprintf(buff, sizeof(buff), "cpuclk=%u", mhz);
	172	pollux_set(memregs, buff);
71769e27	173
71769e27	174	cpuclk_was_changed = 1;
fa8d1331	175	}
fa8d1331	176
fa8d1331	177	/* RAM timings */
fa8d1331	178	static void set_ram_timings_(void)
	179	{
	180	pollux_set_fromenv("POLLUX_RAM_TIMINGS");
	181	}
	182
	183	static void unset_ram_timings_(void)
	184	{
	185	int i;
	186
71769e27	187	memregs[0x14802>>1] = memtimex_old[0];
71769e27	188	memregs[0x14804>>1] = memtimex_old[1] \| 0x8000;
fa8d1331	189
	190	for (i = 0; i < 0x100000; i++)
	191	if (!(memregs[0x14804>>1] & 0x8000))
	192	break;
	193
	194	printf("RAM timings reset to startup values.\n");
	195	}
	196
	197	/* LCD refresh */
	198	static void set_lcd_custom_rate_(int is_pal)
	199	{
f71361b5	200	/* just remember PAL/NTSC. We always set timings in _changemode_ll() */
b7911801	201	last_pal_setting = is_pal;
fa8d1331	202	}
	203
	204	static void unset_lcd_custom_rate_(void)
	205	{
	206	}
	207
	208	static void set_lcd_gamma_(int g100, int A_SNs_curve)
	209	{
	210	/* hm, the LCD possibly can do it (but not POLLUX) */
	211	}
d572cbad	212
053bef76	213	static int gp2x_read_battery_(void)
	214	{
	215	unsigned short magic_val = 0;
	216
	217	if (battdev < 0)
	218	return -1;
	219	if (read(battdev, &magic_val, sizeof(magic_val)) != sizeof(magic_val))
	220	return -1;
	221	switch (magic_val) {
	222	default:
	223	case 1: return 100;
	224	case 2: return 66;
	225	case 3: return 40;
	226	case 4: return 0;
	227	}
	228	}
	229
b5bfb864	230	#define TIMER_BASE3 0x1980
	231	#define TIMER_REG(x) memregl[(TIMER_BASE3 + x) >> 2]
	232
f679add7	233	static unsigned int gp2x_get_ticks_us_(void)
b5bfb864	234	{
	235	TIMER_REG(0x08) = 0x4b; /* run timer, latch value */
	236	return TIMER_REG(0);
	237	}
	238
f679add7	239	static unsigned int gp2x_get_ticks_ms_(void)
b5bfb864	240	{
8af2da72	241	/* approximate /= 1000 */
b5bfb864	242	unsigned long long v64;
8af2da72	243	v64 = (unsigned long long)gp2x_get_ticks_us_() * 4294968;
8af2da72	244	return v64 >> 32;
b5bfb864	245	}
	246
	247	static void timer_cleanup(void)
	248	{
	249	TIMER_REG(0x40) = 0x0c; /* be sure clocks are on */
	250	TIMER_REG(0x08) = 0x23; /* stop the timer, clear irq in case it's pending */
	251	TIMER_REG(0x00) = 0; /* clear counter */
	252	TIMER_REG(0x40) = 0; /* clocks off */
	253	TIMER_REG(0x44) = 0; /* dividers back to default */
	254	}
	255
b6072c17	256	/* note: both PLLs are programmed the same way,
	257	* the databook incorrectly states that PLL1 differs */
	258	static int decode_pll(unsigned int reg)
	259	{
	260	long long v;
	261	int p, m, s;
	262
	263	p = (reg >> 18) & 0x3f;
	264	m = (reg >> 8) & 0x3ff;
	265	s = reg & 0xff;
	266
	267	if (p == 0)
	268	p = 1;
	269
	270	v = 27000000; // master clock
	271	v = v * m / (p << s);
	272	return v;
	273	}
	274
f679add7	275	int pollux_get_real_snd_rate(int req_rate)
	276	{
	277	int clk0_src, clk1_src, rate, div;
	278
	279	clk0_src = (memregl[0xdbc4>>2] >> 1) & 7;
	280	clk1_src = (memregl[0xdbc8>>2] >> 1) & 7;
	281	if (clk0_src > 1 \|\| clk1_src != 7) {
	282	fprintf(stderr, "get_real_snd_rate: bad clk sources: %d %d\n", clk0_src, clk1_src);
	283	return req_rate;
	284	}
	285
	286	rate = decode_pll(clk0_src ? memregl[0xf008>>2] : memregl[0xf004>>2]);
	287
	288	// apply divisors
	289	div = ((memregl[0xdbc4>>2] >> 4) & 0x1f) + 1;
	290	rate /= div;
	291	div = ((memregl[0xdbc8>>2] >> 4) & 0x1f) + 1;
	292	rate /= div;
	293	rate /= 64;
	294
	295	//printf("rate %d\n", rate);
	296	rate -= rate * timer_drift / 1000000;
	297	printf("adjusted rate: %d\n", rate);
	298
	299	if (rate < 8000-1000 \|\| rate > 44100+1000) {
	300	fprintf(stderr, "get_real_snd_rate: got bad rate: %d\n", rate);
	301	return req_rate;
	302	}
	303
	304	return rate;
	305	}
	306
d572cbad	307	void pollux_init(void)
d572cbad	308	{
fa8d1331	309	struct fb_fix_screeninfo fbfix;
f679add7	310	int i, ret, rate, timer_div;
fa8d1331	311
	312	memdev = open("/dev/mem", O_RDWR);
	313	if (memdev == -1) {
	314	perror("open(/dev/mem) failed");
	315	exit(1);
	316	}
	317
	318	memregs = mmap(0, 0x20000, PROT_READ\|PROT_WRITE, MAP_SHARED, memdev, 0xc0000000);
	319	if (memregs == MAP_FAILED) {
	320	perror("mmap(memregs) failed");
	321	exit(1);
	322	}
	323	memregl = (volatile void *)memregs;
	324
	325	fbdev = open("/dev/fb0", O_RDWR);
	326	if (fbdev < 0) {
	327	perror("can't open fbdev");
	328	exit(1);
	329	}
	330
	331	ret = ioctl(fbdev, FBIOGET_FSCREENINFO, &fbfix);
	332	if (ret == -1) {
	333	perror("ioctl(fbdev) failed");
	334	exit(1);
	335	}
	336
	337	printf("framebuffer: \"%s\" @ %08lx\n", fbfix.id, fbfix.smem_start);
	338	fb_paddr[0] = fbfix.smem_start;
	339
	340	gp2x_screens[0] = mmap(0, 3202402*fb_buf_count, PROT_READ\|PROT_WRITE,
	341	MAP_SHARED, memdev, fb_paddr[0]);
	342	if (gp2x_screens[0] == MAP_FAILED)
	343	{
	344	perror("mmap(gp2x_screens) failed");
	345	exit(1);
	346	}
	347	memset(gp2x_screens[0], 0, 3202402*fb_buf_count);
	348
	349	printf(" %p -> %08x\n", gp2x_screens[0], fb_paddr[0]);
	350	for (i = 1; i < fb_buf_count; i++)
	351	{
	352	fb_paddr[i] = fb_paddr[i-1] + 3202402;
	353	gp2x_screens[i] = (char )gp2x_screens[i-1] + 320240*2;
	354	printf(" %p -> %08x\n", gp2x_screens[i], fb_paddr[i]);
	355	}
	356	fb_work_buf = 0;
	357	g_screen_ptr = gp2x_screens[0];
	358
053bef76	359	battdev = open("/dev/pollux_batt", O_RDONLY);
	360	if (battdev < 0)
	361	perror("Warning: could't open pollux_batt");
	362
b6072c17	363	/* find what PLL1 runs at, for the timer */
	364	rate = decode_pll(memregl[0xf008>>2]);
	365	printf("PLL1 @ %dHz\n", rate);
b6072c17	366
b5bfb864	367	/* setup timer */
f679add7	368	timer_div = (rate + 500000) / 1000000;
	369	if (1 <= timer_div && timer_div <= 256) {
	370	timer_drift = (rate - (timer_div * 1000000)) / timer_div;
	371
b6072c17	372	if (TIMER_REG(0x08) & 8) {
	373	fprintf(stderr, "warning: timer in use, overriding!\n");
	374	timer_cleanup();
	375	}
	376
f679add7	377	TIMER_REG(0x44) = ((timer_div - 1) << 4) \| 2; /* using PLL1, divide by it's rate */
b6072c17	378	TIMER_REG(0x40) = 0x0c; /* clocks on */
	379	TIMER_REG(0x08) = 0x6b; /* run timer, clear irq, latch value */
	380
	381	gp2x_get_ticks_ms = gp2x_get_ticks_ms_;
	382	gp2x_get_ticks_us = gp2x_get_ticks_us_;
	383	}
	384	else {
	385	fprintf(stderr, "warning: could not make use of timer\n");
b5bfb864	386
b6072c17	387	// those functions are actually not good at all on Wiz kernel
	388	gp2x_get_ticks_ms = plat_get_ticks_ms_good;
	389	gp2x_get_ticks_us = plat_get_ticks_us_good;
	390	}
b5bfb864	391
f679add7	392	pllsetreg0_old = memregl[0xf004>>2];
71769e27	393	memtimex_old[0] = memregs[0x14802>>1];
71769e27	394	memtimex_old[1] = memregs[0x14804>>1];
fa8d1331	395
	396	gp2x_video_flip = gp2x_video_flip_;
	397	gp2x_video_flip2 = gp2x_video_flip2_;
	398	gp2x_video_changemode_ll = gp2x_video_changemode_ll_;
	399	gp2x_video_setpalette = gp2x_video_setpalette_;
	400	gp2x_video_RGB_setscaling = gp2x_video_RGB_setscaling_;
	401	gp2x_video_wait_vsync = gp2x_video_wait_vsync_;
	402
b6072c17	403	/* some firmwares have sys clk on PLL0, we can't adjust CPU clock
	404	* by reprogramming the PLL0 then, as it overclocks system bus */
	405	if ((memregl[0xf000>>2] & 0x03000030) == 0x01000000)
	406	gp2x_set_cpuclk = gp2x_set_cpuclk_;
	407	else {
	408	fprintf(stderr, "unexpected PLL config (%08x), overclocking disabled\n",
	409	memregl[0xf000>>2]);
	410	gp2x_set_cpuclk = NULL;
	411	}
fa8d1331	412
	413	set_lcd_custom_rate = set_lcd_custom_rate_;
	414	unset_lcd_custom_rate = unset_lcd_custom_rate_;
	415	set_lcd_gamma = set_lcd_gamma_;
	416
	417	set_ram_timings = set_ram_timings_;
	418	unset_ram_timings = unset_ram_timings_;
053bef76	419	gp2x_read_battery = gp2x_read_battery_;
d572cbad	420	}
	421
	422	void pollux_finish(void)
	423	{
fa8d1331	424	/* switch to default fb mem, turn portrait off */
	425	memregl[0x406C>>2] = fb_paddr[0];
	426	memregl[0x4058>>2] \|= 0x10;
fa8d1331	427	close(fbdev);
fa8d1331	428
71769e27	429	gp2x_video_changemode_ll_(16);
	430	unset_ram_timings_();
	431	if (cpuclk_was_changed) {
f679add7	432	memregl[0xf004>>2] = pllsetreg0_old;
71769e27	433	memregl[0xf07c>>2] \|= 0x8000;
71769e27	434	}
902972d1	435	timer_cleanup();
71769e27	436
fa8d1331	437	munmap((void *)memregs, 0x20000);
fa8d1331	438	close(memdev);
053bef76	439	if (battdev >= 0)
053bef76	440	close(battdev);
d572cbad	441	}
d572cbad	442