more 32x tests
[megadrive.git] / testpico / asmtools.S
CommitLineData
ffd4b35c 1# Assemble with gas
2# --register-prefix-optional --bitwise-or
3
4.macro ldarg arg, stacksz, reg
5 move.l (4 + \arg * 4 + \stacksz)(%sp), \reg
6.endm
7
6c839579 8.macro ldargw arg, stacksz, reg
9 move.w (4 + \arg * 4 + 2 + \stacksz)(%sp), \reg
10.endm
11
ffd4b35c 12.global burn10 /* u16 val */
13burn10:
14 ldarg 0, 0, d0
15 subq.l #1, d0
160:
17 dbra d0, 0b
18 rts
19
a385208c 20.global write16_x16 /* u32 a, u16 count, u16 d */
21write16_x16:
22 ldarg 0, 0, a0
23 ldarg 2, 0, d0
24 move.w d0, d1
25 swap d0
26 move.w d1, d0
27 ldarg 1, 0, d1
28 subq.l #1, d1
290:
30 move.l d0, (a0)
31 move.l d0, (a0)
32 move.l d0, (a0)
33 move.l d0, (a0)
34 move.l d0, (a0)
35 move.l d0, (a0)
36 move.l d0, (a0)
37 move.l d0, (a0)
38 dbra d1, 0b
39 rts
40
41# read single phase from controller
42# d0 - result
43# destroys d1,d2
44.global get_input
45get_input:
46 move.b #0x40,(0xa10003)
47 moveq.l #0,d0
48 nop
49 nop
50 move.b (0xa10003),d1
51 move.b #0x00,(0xa10003)
52 andi.w #0x3f,d1 /* 00CB RLDU */
53 nop
54 move.b (0xa10003),d0
55 lsl.b #2,d0
56 andi.w #0xc0,d0 /* SA00 0000 */
57 or.b d1,d0
58 eor.b #0xff,d0
59.if 0
60 swap d7
61 move.w d7,d1
62 eor.w d0,d1 /* changed btns */
63 move.w d0,d7 /* old val */
64 swap d7
65 and.w d0,d1 /* what changed now */
66.endif
67 rts
68
6c839579 69.global write_and_read1 /* u32 a, u16 d, void *dst */
70write_and_read1:
71 ldarg 0, 0, a0
72 ldargw 1, 0, d0
cc7e5122 73#ifndef PICO
6c839579 74 move.w d0, (a0)
cc7e5122 75#else
76 movea.l a0, a1
77 subq.l #1, a1
78 move.w d0, 1(a1)
79#endif
6c839579 80 move.l (a0), d0
81 move.l (a0), d1
cc7e5122 82
83 ldarg 2, 0, a1
6c839579 84 move.l d0, (a1)+
85 move.l d1, (a1)+
86 rts
87
88.global move_sr /* u16 sr */
89move_sr:
90 ldargw 0, 0, d0
91 move.w d0, sr
92 rts
93
94.global move_sr_and_read /* u16 sr, u32 a */
95move_sr_and_read:
96 ldargw 0, 0, d0
97 ldarg 1, 0, a0
98 move.w d0, sr
99 move.w (a0), d0
100 rts
101
102.global memcpy_ /* void *dst, const void *src, u16 size */
103memcpy_:
104 ldarg 0, 0, a0
105 ldarg 1, 0, a1
106 ldargw 2, 0, d0
107 subq.w #1, d0
1080:
109 move.b (a1)+, (a0)+ /* not in a hurry */
110 dbra d0, 0b
111 rts
112
113.global memset_ /* void *dst, int d, u16 size */
114memset_:
115 ldarg 0, 0, a0
116 ldargw 1, 0, d1
117 ldargw 2, 0, d0
118 subq.w #1, d0
1190:
120 move.b d1, (a0)+ /* not in a hurry */
121 dbra d0, 0b
122 rts
123
124# tests
125
cc7e5122 126.global test_vcnt_vb
127test_vcnt_vb:
a385208c 128 movem.l d2-d7/a2, -(sp)
129 movea.l #0xc00007, a0
130 movea.l #0xc00008, a1
131 movea.l #0xff0000, a2
132 moveq.l #0, d4 /* d4 = count */
133 moveq.l #0, d5 /* d5 = vcnt_expect */
134 /* d6 = old */
135 move.l #1<<(3+16), d7 /* d7 = SR_VB */
1360:
137 btst #3, (a0)
138 beq 0b /* not blanking */
1390:
140 btst #3, (a0)
141 bne 0b /* blanking */
142
143 addq.l #1, a0
1440:
145 tst.b (a0)
146 bne 0b /* not line 0 */
147
148 subq.l #2, a0
149 move.l (a0), d6
150 move.l d6, (a2)+ /* d0 = old */
151###
1520:
153 move.b (a1), d2 /* 8 d2 = vcnt */
154 cmp.b (a1), d2 /* 8 reread for corruption */
155 bne 0b /* 10 on changing vcounter? */
156 cmp.b d2, d5 /* 4 vcnt == vcnt_expect? */
157 beq 0b /* 10 */
158 move.l (a0), d0 /* 12 */
159 tst.b d2 /* 4 */
160 beq 3f
1611:
162 addq.l #1, d4 /* count++ */
163 addq.l #1, d5
164 cmp.b d2, d5
165 bne 2f /* vcnt == vcnt_expect + 1 */
166 move.l d0, d1
167 eor.l d6, d1
168 and.l d7, d1 /* (old ^ val) & vb */
169 bne 2f
170 move.l d0, d6 /* old = val */
171 bra 0b
172
1732: /* vcnt jump or vb change */
174 move.l d6, (a2)+ /* *ram++ = old */
175 move.l d0, (a2)+ /* *ram++ = val */
176 move.b d2, d5 /* vcnt_expect = vcnt */
177 move.l d0, d6 /* old = val */
178 bra 0b
179
1803: /* vcnt == 0 */
181 move.l d0, d1
182 and.l d7, d1
183 bne 1b /* still in VB */
184
185 move.l d0, (a2)+ /* *ram++ = val */
186 move.l d4, (a2)+ /* *ram++ = count */
187
188 movem.l (sp)+, d2-d7/a2
9d39a80e 189 rts
a385208c 190
6c839579 191.global test_hint
192test_hint:
193 move.w d0, -(sp) /* 8 */
194 move.w (0xc00008).l, d0 /* 16 */
195 addq.w #1, (0xf000).w /* 16 */
196 tst.w (0xf002).w /* 12 */
197 bne 0f /* 10 */
198 move.w d0, (0xf002).w /* 12 */
1990:
200 move.w d0, (0xf004).w /* 12 */
201 move.w (sp)+, d0 /* 8 */
202 rte /* 20 114 */
203.global test_hint_end
204test_hint_end:
205
206.global test_vint
207test_vint:
208 move.w d0, -(sp) /* 8 */
209 move.w (0xc00008).l, d0 /* 16 */
210 addq.w #1, (0xf008).w /* 16 */
211 tst.w (0xf00a).w /* 12 */
212 bne 0f /* 10 */
213 move.w d0, (0xf00a).w /* 12 */
2140:
215 move.w d0, (0xf00c).w /* 12 */
216 move.w (sp)+, d0 /* 8 */
217 rte /* 20 114 */
218.global test_vint_end
219test_vint_end:
220
9d39a80e 221.global x32x_enable
222x32x_enable:
223 movea.l #0xa15100, a0
71b41fdd 224 movea.l #0xa15122, a1
225 move.w #1, (a0) /* ADEN */
226# wait for min(20_sh2_cycles, pll_setup_time)
227# pll time is unclear, icd_mars.prg mentions 10ms which sounds
228# way too much. Hope 40 68k cycles is enough
229 move.w #40/10, d0
2300:
231 dbra d0, 0b
9d39a80e 232 move.w #3, (a0) /* ADEN, nRES */
2330:
71b41fdd 234 move.w #0xffff, d0 /* waste some cycles */
9d39a80e 235 tst.w (a1)
71b41fdd 236 beq 0b /* master BIOS busy */
237
2380: /* for slave, use a limit, as it */
239 tst.w 4(a1) /* won't respond on master error. */
240 dbne d0, 0b /* slave BIOS busy */
241
9d39a80e 242 or.w #1, 6(a0) /* RV */
243 rts
244.global x32x_enable_end
245x32x_enable_end:
246
06d7984c 247.global test_32x_b_c0
248test_32x_b_c0:
249 ldarg 0, 0, a1
250 ldargw 1, 0, d0
251 jsr (0xc0).l /* move.b d0, (a1); RV=0 */
252 bset #0, (0xa15107).l
253 rts
254.global test_32x_b_c0_end
255test_32x_b_c0_end:
256
cc7e5122 257# some nastyness from Fatal Rewind
258.global test_h_v_2
259test_h_v_2:
260 move.w #0x2000, sr
261 move.w #0x8014, (0xFFC00004).l
262 move.w #0x8164, (0xFFC00004).l
263 move.w #1, d0
2640:
265 dbra d0, 0b
266 move.w #0x2700, sr
267 rts
268
269.global test_v_h_2
270test_v_h_2:
271 move.w #0x2000, sr
272 movea.l #0xc00004, a0
273 move.w #0x8164, (a0)
274 move.w #0x8144, (a0)
275 move.w #480/2/10-1, d0
2760:
277 dbra d0, 0b
278 move.w #0x8164, (0xFFC00004).l
279 move.w #0x8014, (0xFFC00004).l
280 move.w #0x2700, sr
281 rts
282
283.global test_f_vint
284test_f_vint:
285 move.w (a1), d0
286 rte
287.global test_f_vint_end
288test_f_vint_end:
289
290.global test_f
291test_f:
292 movea.l #0xc00005, a0
293 movea.l #0xc00004, a1
294 move.w #0x2000, sr
2950:
296 btst #3, (a0)
297 bne 0b
2980:
299 btst #3, (a0)
300 beq 0b
301 movem.l d2-d7/a2, -(sp)
302 move.l (a1), d1
303 move.l (a1), d2
304 move.l (a1), d3
305 move.l (a1), d4
306 move.l (a1), d5
307 move.l (a1), d6
308 move.w #0x2700, sr
309 movea.l #0xff0000, a0
310 move.b d0, (a0)+
311 move.b #0, (a0)+
312.macro test_lb_s sr, dr
313 swap \sr
314 move.b \sr, (\dr)+
315 swap \sr
316 move.b \sr, (\dr)+
317.endm
318 test_lb_s d1, a0
319 test_lb_s d2, a0
320 test_lb_s d3, a0
321 test_lb_s d4, a0
322 test_lb_s d5, a0
323 movem.l (sp)+, d2-d7/a2
9d39a80e 324 rts
cc7e5122 325
326.global test_hb
327test_hb:
328 movem.l d2-d7, -(sp)
329 movea.l #0xc00004, a0
330 movea.l #0xc00008, a1
331 moveq.l #1, d0
3320:
333 cmp.b (a1), d0
334 beq 0b
3350:
336 cmp.b (a1), d0
337 bne 0b
338 move.l (a0), d0
339 move.l (a0), d1
340 move.l (a0), d2
341 movea.l #0xff0000, a1
342 movea.l #0xff0000, a1
343 nop
344 nop
345 move.l (a0), d3
346 move.l (a0), d4
347 move.l (a0), d5
348 move.l (a0), d6
349 move.l (a0), d7
350 test_lb_s d0, a1
351 test_lb_s d1, a1
352 test_lb_s d2, a1
353 test_lb_s d3, a1
354 test_lb_s d4, a1
355 test_lb_s d5, a1
356 test_lb_s d6, a1
357 test_lb_s d7, a1
358 movem.l (sp)+, d2-d7
9d39a80e 359 rts
6c839579 360
ffd4b35c 361# vim:filetype=asmM68k:ts=4:sw=4:expandtab