32x mostly works
[megadrive.git] / testpico / asmtools.S
CommitLineData
ffd4b35c 1# Assemble with gas
2# --register-prefix-optional --bitwise-or
3
4.macro ldarg arg, stacksz, reg
5 move.l (4 + \arg * 4 + \stacksz)(%sp), \reg
6.endm
7
6c839579 8.macro ldargw arg, stacksz, reg
9 move.w (4 + \arg * 4 + 2 + \stacksz)(%sp), \reg
10.endm
11
ffd4b35c 12.global burn10 /* u16 val */
13burn10:
14 ldarg 0, 0, d0
15 subq.l #1, d0
160:
17 dbra d0, 0b
18 rts
19
a385208c 20.global write16_x16 /* u32 a, u16 count, u16 d */
21write16_x16:
22 ldarg 0, 0, a0
23 ldarg 2, 0, d0
24 move.w d0, d1
25 swap d0
26 move.w d1, d0
27 ldarg 1, 0, d1
28 subq.l #1, d1
290:
30 move.l d0, (a0)
31 move.l d0, (a0)
32 move.l d0, (a0)
33 move.l d0, (a0)
34 move.l d0, (a0)
35 move.l d0, (a0)
36 move.l d0, (a0)
37 move.l d0, (a0)
38 dbra d1, 0b
39 rts
40
41# read single phase from controller
42# d0 - result
43# destroys d1,d2
44.global get_input
45get_input:
46 move.b #0x40,(0xa10003)
47 moveq.l #0,d0
48 nop
49 nop
50 move.b (0xa10003),d1
51 move.b #0x00,(0xa10003)
52 andi.w #0x3f,d1 /* 00CB RLDU */
53 nop
54 move.b (0xa10003),d0
55 lsl.b #2,d0
56 andi.w #0xc0,d0 /* SA00 0000 */
57 or.b d1,d0
58 eor.b #0xff,d0
59.if 0
60 swap d7
61 move.w d7,d1
62 eor.w d0,d1 /* changed btns */
63 move.w d0,d7 /* old val */
64 swap d7
65 and.w d0,d1 /* what changed now */
66.endif
67 rts
68
6c839579 69.global write_and_read1 /* u32 a, u16 d, void *dst */
70write_and_read1:
71 ldarg 0, 0, a0
72 ldargw 1, 0, d0
cc7e5122 73#ifndef PICO
6c839579 74 move.w d0, (a0)
cc7e5122 75#else
76 movea.l a0, a1
77 subq.l #1, a1
78 move.w d0, 1(a1)
79#endif
6c839579 80 move.l (a0), d0
81 move.l (a0), d1
cc7e5122 82
83 ldarg 2, 0, a1
6c839579 84 move.l d0, (a1)+
85 move.l d1, (a1)+
86 rts
87
88.global move_sr /* u16 sr */
89move_sr:
90 ldargw 0, 0, d0
91 move.w d0, sr
92 rts
93
94.global move_sr_and_read /* u16 sr, u32 a */
95move_sr_and_read:
96 ldargw 0, 0, d0
97 ldarg 1, 0, a0
98 move.w d0, sr
99 move.w (a0), d0
100 rts
101
102.global memcpy_ /* void *dst, const void *src, u16 size */
103memcpy_:
104 ldarg 0, 0, a0
105 ldarg 1, 0, a1
106 ldargw 2, 0, d0
107 subq.w #1, d0
1080:
109 move.b (a1)+, (a0)+ /* not in a hurry */
110 dbra d0, 0b
111 rts
112
113.global memset_ /* void *dst, int d, u16 size */
114memset_:
115 ldarg 0, 0, a0
116 ldargw 1, 0, d1
117 ldargw 2, 0, d0
118 subq.w #1, d0
1190:
120 move.b d1, (a0)+ /* not in a hurry */
121 dbra d0, 0b
122 rts
123
124# tests
125
cc7e5122 126.global test_vcnt_vb
127test_vcnt_vb:
a385208c 128 movem.l d2-d7/a2, -(sp)
129 movea.l #0xc00007, a0
130 movea.l #0xc00008, a1
131 movea.l #0xff0000, a2
132 moveq.l #0, d4 /* d4 = count */
133 moveq.l #0, d5 /* d5 = vcnt_expect */
134 /* d6 = old */
135 move.l #1<<(3+16), d7 /* d7 = SR_VB */
1360:
137 btst #3, (a0)
138 beq 0b /* not blanking */
1390:
140 btst #3, (a0)
141 bne 0b /* blanking */
142
143 addq.l #1, a0
1440:
145 tst.b (a0)
146 bne 0b /* not line 0 */
147
148 subq.l #2, a0
149 move.l (a0), d6
150 move.l d6, (a2)+ /* d0 = old */
151###
1520:
153 move.b (a1), d2 /* 8 d2 = vcnt */
154 cmp.b (a1), d2 /* 8 reread for corruption */
155 bne 0b /* 10 on changing vcounter? */
156 cmp.b d2, d5 /* 4 vcnt == vcnt_expect? */
157 beq 0b /* 10 */
158 move.l (a0), d0 /* 12 */
159 tst.b d2 /* 4 */
160 beq 3f
1611:
162 addq.l #1, d4 /* count++ */
163 addq.l #1, d5
164 cmp.b d2, d5
165 bne 2f /* vcnt == vcnt_expect + 1 */
166 move.l d0, d1
167 eor.l d6, d1
168 and.l d7, d1 /* (old ^ val) & vb */
169 bne 2f
170 move.l d0, d6 /* old = val */
171 bra 0b
172
1732: /* vcnt jump or vb change */
174 move.l d6, (a2)+ /* *ram++ = old */
175 move.l d0, (a2)+ /* *ram++ = val */
176 move.b d2, d5 /* vcnt_expect = vcnt */
177 move.l d0, d6 /* old = val */
178 bra 0b
179
1803: /* vcnt == 0 */
181 move.l d0, d1
182 and.l d7, d1
183 bne 1b /* still in VB */
184
185 move.l d0, (a2)+ /* *ram++ = val */
186 move.l d4, (a2)+ /* *ram++ = count */
187
188 movem.l (sp)+, d2-d7/a2
9d39a80e 189 rts
a385208c 190
6c839579 191.global test_hint
192test_hint:
193 move.w d0, -(sp) /* 8 */
194 move.w (0xc00008).l, d0 /* 16 */
195 addq.w #1, (0xf000).w /* 16 */
196 tst.w (0xf002).w /* 12 */
197 bne 0f /* 10 */
198 move.w d0, (0xf002).w /* 12 */
1990:
200 move.w d0, (0xf004).w /* 12 */
201 move.w (sp)+, d0 /* 8 */
202 rte /* 20 114 */
203.global test_hint_end
204test_hint_end:
205
206.global test_vint
207test_vint:
208 move.w d0, -(sp) /* 8 */
209 move.w (0xc00008).l, d0 /* 16 */
210 addq.w #1, (0xf008).w /* 16 */
211 tst.w (0xf00a).w /* 12 */
212 bne 0f /* 10 */
213 move.w d0, (0xf00a).w /* 12 */
2140:
215 move.w d0, (0xf00c).w /* 12 */
216 move.w (sp)+, d0 /* 8 */
217 rte /* 20 114 */
218.global test_vint_end
219test_vint_end:
220
9d39a80e 221.global x32x_enable
222x32x_enable:
223 movea.l #0xa15100, a0
71b41fdd 224 movea.l #0xa15122, a1
225 move.w #1, (a0) /* ADEN */
226# wait for min(20_sh2_cycles, pll_setup_time)
227# pll time is unclear, icd_mars.prg mentions 10ms which sounds
228# way too much. Hope 40 68k cycles is enough
229 move.w #40/10, d0
2300:
231 dbra d0, 0b
9d39a80e 232 move.w #3, (a0) /* ADEN, nRES */
2330:
71b41fdd 234 move.w #0xffff, d0 /* waste some cycles */
9d39a80e 235 tst.w (a1)
71b41fdd 236 beq 0b /* master BIOS busy */
237
2380: /* for slave, use a limit, as it */
239 tst.w 4(a1) /* won't respond on master error. */
240 dbne d0, 0b /* slave BIOS busy */
241
9d39a80e 242 or.w #1, 6(a0) /* RV */
243 rts
244.global x32x_enable_end
245x32x_enable_end:
246
cc7e5122 247# some nastyness from Fatal Rewind
248.global test_h_v_2
249test_h_v_2:
250 move.w #0x2000, sr
251 move.w #0x8014, (0xFFC00004).l
252 move.w #0x8164, (0xFFC00004).l
253 move.w #1, d0
2540:
255 dbra d0, 0b
256 move.w #0x2700, sr
257 rts
258
259.global test_v_h_2
260test_v_h_2:
261 move.w #0x2000, sr
262 movea.l #0xc00004, a0
263 move.w #0x8164, (a0)
264 move.w #0x8144, (a0)
265 move.w #480/2/10-1, d0
2660:
267 dbra d0, 0b
268 move.w #0x8164, (0xFFC00004).l
269 move.w #0x8014, (0xFFC00004).l
270 move.w #0x2700, sr
271 rts
272
273.global test_f_vint
274test_f_vint:
275 move.w (a1), d0
276 rte
277.global test_f_vint_end
278test_f_vint_end:
279
280.global test_f
281test_f:
282 movea.l #0xc00005, a0
283 movea.l #0xc00004, a1
284 move.w #0x2000, sr
2850:
286 btst #3, (a0)
287 bne 0b
2880:
289 btst #3, (a0)
290 beq 0b
291 movem.l d2-d7/a2, -(sp)
292 move.l (a1), d1
293 move.l (a1), d2
294 move.l (a1), d3
295 move.l (a1), d4
296 move.l (a1), d5
297 move.l (a1), d6
298 move.w #0x2700, sr
299 movea.l #0xff0000, a0
300 move.b d0, (a0)+
301 move.b #0, (a0)+
302.macro test_lb_s sr, dr
303 swap \sr
304 move.b \sr, (\dr)+
305 swap \sr
306 move.b \sr, (\dr)+
307.endm
308 test_lb_s d1, a0
309 test_lb_s d2, a0
310 test_lb_s d3, a0
311 test_lb_s d4, a0
312 test_lb_s d5, a0
313 movem.l (sp)+, d2-d7/a2
9d39a80e 314 rts
cc7e5122 315
316.global test_hb
317test_hb:
318 movem.l d2-d7, -(sp)
319 movea.l #0xc00004, a0
320 movea.l #0xc00008, a1
321 moveq.l #1, d0
3220:
323 cmp.b (a1), d0
324 beq 0b
3250:
326 cmp.b (a1), d0
327 bne 0b
328 move.l (a0), d0
329 move.l (a0), d1
330 move.l (a0), d2
331 movea.l #0xff0000, a1
332 movea.l #0xff0000, a1
333 nop
334 nop
335 move.l (a0), d3
336 move.l (a0), d4
337 move.l (a0), d5
338 move.l (a0), d6
339 move.l (a0), d7
340 test_lb_s d0, a1
341 test_lb_s d1, a1
342 test_lb_s d2, a1
343 test_lb_s d3, a1
344 test_lb_s d4, a1
345 test_lb_s d5, a1
346 test_lb_s d6, a1
347 test_lb_s d7, a1
348 movem.l (sp)+, d2-d7
9d39a80e 349 rts
6c839579 350
ffd4b35c 351# vim:filetype=asmM68k:ts=4:sw=4:expandtab