40fca85b |
1 | diff --git a/Makefile b/Makefile |
2 | index 0db94f7..e4fe560 100644 |
3 | --- a/Makefile |
4 | +++ b/Makefile |
5 | @@ -26,6 +26,7 @@ endif |
6 | else # NO_CONFIG_MAK |
7 | config.mak: |
8 | endif |
9 | +CFLAGS += -UICACHE_EMULATION |
10 | |
11 | -include Makefile.local |
12 | |
a151a8d8 |
13 | diff --git a/libpcsxcore/new_dynarec/emu_if.c b/libpcsxcore/new_dynarec/emu_if.c |
40fca85b |
14 | index 2df259b..2a15e6e 100644 |
a151a8d8 |
15 | --- a/libpcsxcore/new_dynarec/emu_if.c |
16 | +++ b/libpcsxcore/new_dynarec/emu_if.c |
17 | @@ -417,13 +417,17 @@ static void ari64_shutdown() |
18 | { |
19 | new_dynarec_cleanup(); |
20 | new_dyna_pcsx_mem_shutdown(); |
21 | + (void)ari64_execute; |
22 | } |
23 | |
24 | +extern void intExecuteT(); |
25 | +extern void intExecuteBlockT(); |
26 | + |
27 | R3000Acpu psxRec = { |
28 | ari64_init, |
29 | ari64_reset, |
30 | - ari64_execute, |
31 | - ari64_execute_until, |
32 | + intExecuteT, |
33 | + intExecuteBlockT, |
34 | ari64_clear, |
35 | #ifdef ICACHE_EMULATION |
36 | ari64_notify, |
37 | @@ -489,7 +493,7 @@ static u32 memcheck_read(u32 a) |
38 | return *(u32 *)(psxM + (a & 0x1ffffc)); |
39 | } |
40 | |
41 | -#if 0 |
42 | +#if 1 |
43 | void do_insn_trace(void) |
44 | { |
45 | static psxRegisters oldregs; |
46 | diff --git a/libpcsxcore/psxhw.c b/libpcsxcore/psxhw.c |
47 | index dbcb989..0716f5e 100644 |
48 | --- a/libpcsxcore/psxhw.c |
49 | +++ b/libpcsxcore/psxhw.c |
50 | @@ -373,13 +373,14 @@ void psxHwWrite8(u32 add, u8 value) { |
51 | case 0x1f801803: cdrWrite3(value); break; |
52 | |
53 | default: |
54 | + if (add < 0x1f802000) |
55 | psxHu8(add) = value; |
56 | #ifdef PSXHW_LOG |
57 | PSXHW_LOG("*Unknown 8bit write at address %x value %x\n", add, value); |
58 | #endif |
59 | return; |
60 | } |
61 | - psxHu8(add) = value; |
62 | + //psxHu8(add) = value; |
63 | #ifdef PSXHW_LOG |
64 | PSXHW_LOG("*Known 8bit write at address %x value %x\n", add, value); |
65 | #endif |
66 | @@ -504,6 +505,7 @@ void psxHwWrite16(u32 add, u16 value) { |
67 | return; |
68 | } |
69 | |
70 | + if (add < 0x1f802000) |
71 | psxHu16ref(add) = SWAPu16(value); |
72 | #ifdef PSXHW_LOG |
73 | PSXHW_LOG("*Unknown 16bit write at address %x value %x\n", add, value); |
74 | @@ -699,9 +701,9 @@ void psxHwWrite32(u32 add, u32 value) { |
75 | return; |
76 | |
77 | case 0x1f801820: |
78 | - mdecWrite0(value); break; |
79 | + mdecWrite0(value); return; |
80 | case 0x1f801824: |
81 | - mdecWrite1(value); break; |
82 | + mdecWrite1(value); return; |
83 | |
84 | case 0x1f801100: |
85 | #ifdef PSXHW_LOG |
86 | @@ -759,6 +761,7 @@ void psxHwWrite32(u32 add, u32 value) { |
87 | return; |
88 | } |
89 | |
90 | + if (add < 0x1f802000) |
91 | psxHu32ref(add) = SWAPu32(value); |
92 | #ifdef PSXHW_LOG |
93 | PSXHW_LOG("*Unknown 32bit write at address %x value %x\n", add, value); |
94 | diff --git a/libpcsxcore/psxinterpreter.c b/libpcsxcore/psxinterpreter.c |
40fca85b |
95 | index 61c60ed..0fa5283 100644 |
a151a8d8 |
96 | --- a/libpcsxcore/psxinterpreter.c |
97 | +++ b/libpcsxcore/psxinterpreter.c |
40fca85b |
98 | @@ -511,8 +511,9 @@ static void doBranch(u32 tar) { |
a151a8d8 |
99 | debugI(); |
100 | |
101 | psxRegs.pc += 4; |
102 | - psxRegs.cycle += BIAS; |
103 | |
104 | + (void)tmp; |
105 | +#if 0 |
106 | // check for load delay |
107 | tmp = psxRegs.code >> 26; |
108 | switch (tmp) { |
40fca85b |
109 | @@ -546,13 +547,15 @@ static void doBranch(u32 tar) { |
a151a8d8 |
110 | } |
111 | break; |
112 | } |
113 | - |
114 | +#endif |
115 | psxBSC[psxRegs.code >> 26](); |
116 | |
117 | branch = 0; |
118 | psxRegs.pc = branchPC; |
119 | |
120 | psxBranchTest(); |
121 | + |
122 | + psxRegs.cycle += BIAS; |
123 | } |
124 | |
125 | /********************************************************* |
40fca85b |
126 | @@ -635,12 +638,13 @@ void psxMULTU() { |
a151a8d8 |
127 | psxRegs.GPR.n.hi = (u32)((res >> 32) & 0xffffffff); |
128 | } |
129 | |
130 | +#define doBranchNotTaken() do { psxRegs.cycle -= BIAS; execI(); psxBranchTest(); psxRegs.cycle += BIAS; } while(0) |
131 | /********************************************************* |
132 | * Register branch logic * |
133 | * Format: OP rs, offset * |
134 | *********************************************************/ |
135 | -#define RepZBranchi32(op) if(_i32(_rRs_) op 0) doBranch(_BranchTarget_); |
136 | -#define RepZBranchLinki32(op) { _SetLink(31); if(_i32(_rRs_) op 0) { doBranch(_BranchTarget_); } } |
137 | +#define RepZBranchi32(op) if(_i32(_rRs_) op 0) doBranch(_BranchTarget_); else doBranchNotTaken(); |
138 | +#define RepZBranchLinki32(op) { _SetLink(31); if(_i32(_rRs_) op 0) { doBranch(_BranchTarget_); } else doBranchNotTaken(); } |
139 | |
140 | void psxBGEZ() { RepZBranchi32(>=) } // Branch if Rs >= 0 |
141 | void psxBGEZAL() { RepZBranchLinki32(>=) } // Branch if Rs >= 0 and link |
40fca85b |
142 | @@ -710,7 +714,7 @@ void psxRFE() { |
a151a8d8 |
143 | * Register branch logic * |
144 | * Format: OP rs, rt, offset * |
145 | *********************************************************/ |
146 | -#define RepBranchi32(op) if(_i32(_rRs_) op _i32(_rRt_)) doBranch(_BranchTarget_); |
147 | +#define RepBranchi32(op) if(_i32(_rRs_) op _i32(_rRt_)) doBranch(_BranchTarget_); else doBranchNotTaken(); |
148 | |
149 | void psxBEQ() { RepBranchi32(==) } // Branch if Rs == Rt |
150 | void psxBNE() { RepBranchi32(!=) } // Branch if Rs != Rt |
40fca85b |
151 | @@ -894,6 +898,9 @@ void MTC0(int reg, u32 val) { |
a151a8d8 |
152 | case 12: // Status |
153 | psxRegs.CP0.r[12] = val; |
154 | psxTestSWInts(); |
155 | +#ifndef __arm__ |
156 | + psxBranchTest(); |
157 | +#endif |
158 | break; |
159 | |
160 | case 13: // Cause |
40fca85b |
161 | @@ -1056,6 +1063,23 @@ void intExecuteBlock() { |
a151a8d8 |
162 | while (!branch2) execI(); |
163 | } |
164 | |
165 | +extern void do_insn_trace(void); |
166 | + |
167 | +void intExecuteT() { |
168 | + for (;;) { |
169 | + do_insn_trace(); |
170 | + execI(); |
171 | + } |
172 | +} |
173 | + |
174 | +void intExecuteBlockT() { |
175 | + branch2 = 0; |
176 | + while (!branch2) { |
177 | + do_insn_trace(); |
178 | + execI(); |
179 | + } |
180 | +} |
181 | + |
182 | static void intClear(u32 Addr, u32 Size) { |
183 | } |
184 | |
185 | diff --git a/libpcsxcore/psxmem.c b/libpcsxcore/psxmem.c |
186 | index c09965d..135a5d0 100644 |
187 | --- a/libpcsxcore/psxmem.c |
188 | +++ b/libpcsxcore/psxmem.c |
189 | @@ -219,11 +219,13 @@ void psxMemShutdown() { |
190 | } |
191 | |
192 | static int writeok = 1; |
193 | +u32 last_io_addr; |
194 | |
195 | u8 psxMemRead8(u32 mem) { |
196 | char *p; |
197 | u32 t; |
198 | |
199 | + last_io_addr = mem; |
200 | t = mem >> 16; |
201 | if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) { |
202 | if ((mem & 0xffff) < 0x400) |
203 | @@ -249,6 +251,7 @@ u16 psxMemRead16(u32 mem) { |
204 | char *p; |
205 | u32 t; |
206 | |
207 | + last_io_addr = mem; |
208 | t = mem >> 16; |
209 | if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) { |
210 | if ((mem & 0xffff) < 0x400) |
211 | @@ -274,6 +277,7 @@ u32 psxMemRead32(u32 mem) { |
212 | char *p; |
213 | u32 t; |
214 | |
215 | + last_io_addr = mem; |
216 | t = mem >> 16; |
217 | if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) { |
218 | if ((mem & 0xffff) < 0x400) |
219 | @@ -299,6 +303,7 @@ void psxMemWrite8(u32 mem, u8 value) { |
220 | char *p; |
221 | u32 t; |
222 | |
223 | + last_io_addr = mem; |
224 | t = mem >> 16; |
225 | if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) { |
226 | if ((mem & 0xffff) < 0x400) |
227 | @@ -326,6 +331,7 @@ void psxMemWrite16(u32 mem, u16 value) { |
228 | char *p; |
229 | u32 t; |
230 | |
231 | + last_io_addr = mem; |
232 | t = mem >> 16; |
233 | if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) { |
234 | if ((mem & 0xffff) < 0x400) |
235 | @@ -353,6 +359,7 @@ void psxMemWrite32(u32 mem, u32 value) { |
236 | char *p; |
237 | u32 t; |
238 | |
239 | + last_io_addr = mem; |
240 | // if ((mem&0x1fffff) == 0x71E18 || value == 0x48088800) SysPrintf("t2fix!!\n"); |
241 | t = mem >> 16; |
242 | if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) { |