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drc: get rid of RAM_FIXED, revive ROREG
[pcsx_rearmed.git] / libpcsxcore / new_dynarec / patches / trace_intr
CommitLineData
a151a8d8 1diff --git a/libpcsxcore/new_dynarec/emu_if.c b/libpcsxcore/new_dynarec/emu_if.c
37387d8b 2index 8c96504..1648b8f 100644
a151a8d8 3--- a/libpcsxcore/new_dynarec/emu_if.c
4+++ b/libpcsxcore/new_dynarec/emu_if.c
37387d8b 5@@ -424,13 +424,17 @@ static void ari64_shutdown()
a151a8d8 6 {
7 new_dynarec_cleanup();
8 new_dyna_pcsx_mem_shutdown();
9+ (void)ari64_execute;
10 }
11
12+extern void intExecuteT();
13+extern void intExecuteBlockT();
14+
15 R3000Acpu psxRec = {
16 ari64_init,
17 ari64_reset,
18- ari64_execute,
19- ari64_execute_until,
20+ intExecuteT,
21+ intExecuteBlockT,
22 ari64_clear,
a151a8d8 23 ari64_notify,
37387d8b 24 ari64_apply_config,
25@@ -499,7 +503,7 @@ static u32 memcheck_read(u32 a)
a151a8d8 26 return *(u32 *)(psxM + (a & 0x1ffffc));
27 }
28
29-#if 0
30+#if 1
31 void do_insn_trace(void)
32 {
33 static psxRegisters oldregs;
34diff --git a/libpcsxcore/psxhw.c b/libpcsxcore/psxhw.c
35index dbcb989..0716f5e 100644
36--- a/libpcsxcore/psxhw.c
37+++ b/libpcsxcore/psxhw.c
38@@ -373,13 +373,14 @@ void psxHwWrite8(u32 add, u8 value) {
39 case 0x1f801803: cdrWrite3(value); break;
40
41 default:
42+ if (add < 0x1f802000)
43 psxHu8(add) = value;
44 #ifdef PSXHW_LOG
45 PSXHW_LOG("*Unknown 8bit write at address %x value %x\n", add, value);
46 #endif
47 return;
48 }
49- psxHu8(add) = value;
50+ //psxHu8(add) = value;
51 #ifdef PSXHW_LOG
52 PSXHW_LOG("*Known 8bit write at address %x value %x\n", add, value);
53 #endif
54@@ -504,6 +505,7 @@ void psxHwWrite16(u32 add, u16 value) {
55 return;
56 }
57
58+ if (add < 0x1f802000)
59 psxHu16ref(add) = SWAPu16(value);
60 #ifdef PSXHW_LOG
61 PSXHW_LOG("*Unknown 16bit write at address %x value %x\n", add, value);
62@@ -699,9 +701,9 @@ void psxHwWrite32(u32 add, u32 value) {
63 return;
64
65 case 0x1f801820:
66- mdecWrite0(value); break;
67+ mdecWrite0(value); return;
68 case 0x1f801824:
69- mdecWrite1(value); break;
70+ mdecWrite1(value); return;
71
72 case 0x1f801100:
73 #ifdef PSXHW_LOG
74@@ -759,6 +761,7 @@ void psxHwWrite32(u32 add, u32 value) {
75 return;
76 }
77
78+ if (add < 0x1f802000)
79 psxHu32ref(add) = SWAPu32(value);
80 #ifdef PSXHW_LOG
81 PSXHW_LOG("*Unknown 32bit write at address %x value %x\n", add, value);
82diff --git a/libpcsxcore/psxinterpreter.c b/libpcsxcore/psxinterpreter.c
37387d8b 83index f7898e9..176a0f7 100644
a151a8d8 84--- a/libpcsxcore/psxinterpreter.c
85+++ b/libpcsxcore/psxinterpreter.c
37387d8b 86@@ -464,8 +464,9 @@ static void doBranch(u32 tar) {
a151a8d8 87 debugI();
88
89 psxRegs.pc += 4;
90- psxRegs.cycle += BIAS;
91
92+ (void)tmp;
93+#if 0
94 // check for load delay
95 tmp = psxRegs.code >> 26;
96 switch (tmp) {
37387d8b 97@@ -499,13 +500,15 @@ static void doBranch(u32 tar) {
a151a8d8 98 }
99 break;
100 }
101-
102+#endif
103 psxBSC[psxRegs.code >> 26]();
104
105 branch = 0;
106 psxRegs.pc = branchPC;
107
108 psxBranchTest();
109+
110+ psxRegs.cycle += BIAS;
111 }
112
113 /*********************************************************
37387d8b 114@@ -615,12 +618,13 @@ void psxMULTU_stall() {
115 psxMULTU();
a151a8d8 116 }
117
118+#define doBranchNotTaken() do { psxRegs.cycle -= BIAS; execI(); psxBranchTest(); psxRegs.cycle += BIAS; } while(0)
119 /*********************************************************
120 * Register branch logic *
121 * Format: OP rs, offset *
122 *********************************************************/
123-#define RepZBranchi32(op) if(_i32(_rRs_) op 0) doBranch(_BranchTarget_);
124-#define RepZBranchLinki32(op) { _SetLink(31); if(_i32(_rRs_) op 0) { doBranch(_BranchTarget_); } }
125+#define RepZBranchi32(op) if(_i32(_rRs_) op 0) doBranch(_BranchTarget_); else doBranchNotTaken();
126+#define RepZBranchLinki32(op) { _SetLink(31); if(_i32(_rRs_) op 0) { doBranch(_BranchTarget_); } else doBranchNotTaken(); }
127
128 void psxBGEZ() { RepZBranchi32(>=) } // Branch if Rs >= 0
129 void psxBGEZAL() { RepZBranchLinki32(>=) } // Branch if Rs >= 0 and link
37387d8b 130@@ -702,7 +706,7 @@ void psxRFE() {
a151a8d8 131 * Register branch logic *
132 * Format: OP rs, rt, offset *
133 *********************************************************/
134-#define RepBranchi32(op) if(_i32(_rRs_) op _i32(_rRt_)) doBranch(_BranchTarget_);
135+#define RepBranchi32(op) if(_i32(_rRs_) op _i32(_rRt_)) doBranch(_BranchTarget_); else doBranchNotTaken();
136
137 void psxBEQ() { RepBranchi32(==) } // Branch if Rs == Rt
138 void psxBNE() { RepBranchi32(!=) } // Branch if Rs != Rt
37387d8b 139@@ -886,6 +890,9 @@ void MTC0(int reg, u32 val) {
a151a8d8 140 case 12: // Status
141 psxRegs.CP0.r[12] = val;
142 psxTestSWInts();
143+#ifndef __arm__
144+ psxBranchTest();
145+#endif
146 break;
147
148 case 13: // Cause
37387d8b 149@@ -1027,6 +1034,23 @@ void intExecuteBlock() {
a151a8d8 150 while (!branch2) execI();
151 }
152
153+extern void do_insn_trace(void);
154+
155+void intExecuteT() {
156+ for (;;) {
157+ do_insn_trace();
158+ execI();
159+ }
160+}
161+
162+void intExecuteBlockT() {
163+ branch2 = 0;
164+ while (!branch2) {
165+ do_insn_trace();
166+ execI();
167+ }
168+}
169+
170 static void intClear(u32 Addr, u32 Size) {
171 }
172
173diff --git a/libpcsxcore/psxmem.c b/libpcsxcore/psxmem.c
37387d8b 174index 04aeec2..1242653 100644
a151a8d8 175--- a/libpcsxcore/psxmem.c
176+++ b/libpcsxcore/psxmem.c
37387d8b 177@@ -217,11 +217,13 @@ void psxMemShutdown() {
a151a8d8 178 }
179
180 static int writeok = 1;
181+u32 last_io_addr;
182
183 u8 psxMemRead8(u32 mem) {
184 char *p;
185 u32 t;
186
187+ last_io_addr = mem;
188 t = mem >> 16;
189 if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
190 if ((mem & 0xffff) < 0x400)
37387d8b 191@@ -247,6 +249,7 @@ u16 psxMemRead16(u32 mem) {
a151a8d8 192 char *p;
193 u32 t;
194
195+ last_io_addr = mem;
196 t = mem >> 16;
197 if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
198 if ((mem & 0xffff) < 0x400)
37387d8b 199@@ -272,6 +275,7 @@ u32 psxMemRead32(u32 mem) {
a151a8d8 200 char *p;
201 u32 t;
202
203+ last_io_addr = mem;
204 t = mem >> 16;
205 if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
206 if ((mem & 0xffff) < 0x400)
37387d8b 207@@ -297,6 +301,7 @@ void psxMemWrite8(u32 mem, u8 value) {
a151a8d8 208 char *p;
209 u32 t;
210
211+ last_io_addr = mem;
212 t = mem >> 16;
213 if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
214 if ((mem & 0xffff) < 0x400)
37387d8b 215@@ -324,6 +329,7 @@ void psxMemWrite16(u32 mem, u16 value) {
a151a8d8 216 char *p;
217 u32 t;
218
219+ last_io_addr = mem;
220 t = mem >> 16;
221 if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
222 if ((mem & 0xffff) < 0x400)
37387d8b 223@@ -351,6 +357,7 @@ void psxMemWrite32(u32 mem, u32 value) {
a151a8d8 224 char *p;
225 u32 t;
226
227+ last_io_addr = mem;
228 // if ((mem&0x1fffff) == 0x71E18 || value == 0x48088800) SysPrintf("t2fix!!\n");
229 t = mem >> 16;
230 if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
ARM optimized PCSX fork