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ef79bbde P |
1 | /*************************************************************************** |
2 | * Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team * | |
3 | * * | |
4 | * This program is free software; you can redistribute it and/or modify * | |
5 | * it under the terms of the GNU General Public License as published by * | |
6 | * the Free Software Foundation; either version 2 of the License, or * | |
7 | * (at your option) any later version. * | |
8 | * * | |
9 | * This program is distributed in the hope that it will be useful, * | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of * | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * | |
12 | * GNU General Public License for more details. * | |
13 | * * | |
14 | * You should have received a copy of the GNU General Public License * | |
15 | * along with this program; if not, write to the * | |
16 | * Free Software Foundation, Inc., * | |
17 | * 51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA. * | |
18 | ***************************************************************************/ | |
19 | ||
20 | /* | |
21 | * R3000A CPU functions. | |
22 | */ | |
23 | ||
24 | #include "r3000a.h" | |
25 | #include "cdrom.h" | |
26 | #include "mdec.h" | |
27 | #include "gte.h" | |
61ad2a61 | 28 | #include "psxinterpreter.h" |
ef79bbde P |
29 | |
30 | R3000Acpu *psxCpu = NULL; | |
41e82ad4 | 31 | #ifdef DRC_DISABLE |
ef79bbde | 32 | psxRegisters psxRegs; |
41e82ad4 | 33 | #endif |
ef79bbde P |
34 | |
35 | int psxInit() { | |
7a8d521f | 36 | SysPrintf(_("Running PCSX Version %s (%s).\n"), PCSX_VERSION, __DATE__); |
ef79bbde | 37 | |
41e82ad4 | 38 | #ifndef DRC_DISABLE |
ef79bbde P |
39 | if (Config.Cpu == CPU_INTERPRETER) { |
40 | psxCpu = &psxInt; | |
41 | } else psxCpu = &psxRec; | |
42 | #else | |
61ad2a61 | 43 | Config.Cpu = CPU_INTERPRETER; |
ef79bbde P |
44 | psxCpu = &psxInt; |
45 | #endif | |
46 | ||
47 | Log = 0; | |
48 | ||
49 | if (psxMemInit() == -1) return -1; | |
50 | ||
51 | return psxCpu->Init(); | |
52 | } | |
53 | ||
54 | void psxReset() { | |
ef79bbde P |
55 | psxMemReset(); |
56 | ||
57 | memset(&psxRegs, 0, sizeof(psxRegs)); | |
58 | ||
59 | psxRegs.pc = 0xbfc00000; // Start in bootstrap | |
60 | ||
61 | psxRegs.CP0.r[12] = 0x10900000; // COP0 enabled | BEV = 1 | TS = 1 | |
62 | psxRegs.CP0.r[15] = 0x00000002; // PRevID = Revision ID, same as R3000A | |
63 | ||
d5aeda23 | 64 | psxCpu->ApplyConfig(); |
c24732c0 | 65 | psxCpu->Reset(); |
66 | ||
ef79bbde P |
67 | psxHwReset(); |
68 | psxBiosInit(); | |
69 | ||
70 | if (!Config.HLE) | |
71 | psxExecuteBios(); | |
72 | ||
73 | #ifdef EMU_LOG | |
74 | EMU_LOG("*BIOS END*\n"); | |
75 | #endif | |
76 | Log = 0; | |
77 | } | |
78 | ||
79 | void psxShutdown() { | |
ef79bbde P |
80 | psxBiosShutdown(); |
81 | ||
82 | psxCpu->Shutdown(); | |
7a8d521f | 83 | |
84 | psxMemShutdown(); | |
ef79bbde P |
85 | } |
86 | ||
6d75addf | 87 | // cp0 is passed separately for lightrec to be less messy |
88 | void psxException(u32 code, u32 bd, psxCP0Regs *cp0) { | |
4cc373dd | 89 | psxRegs.code = PSXMu32(psxRegs.pc); |
943a507a | 90 | |
91 | if (!Config.HLE && ((((psxRegs.code) >> 24) & 0xfe) == 0x4a)) { | |
665e364a | 92 | // "hokuto no ken" / "Crash Bandicot 2" ... |
93 | // BIOS does not allow to return to GTE instructions | |
94 | // (just skips it, supposedly because it's scheduled already) | |
62656449 | 95 | // so we execute it here |
6d75addf | 96 | psxCP2Regs *cp2 = (void *)(cp0 + 1); |
97 | psxCP2[psxRegs.code & 0x3f](cp2); | |
665e364a | 98 | } |
99 | ||
ef79bbde | 100 | // Set the Cause |
6d75addf | 101 | cp0->n.Cause = (cp0->n.Cause & 0x300) | code; |
ef79bbde P |
102 | |
103 | // Set the EPC & PC | |
104 | if (bd) { | |
105 | #ifdef PSXCPU_LOG | |
106 | PSXCPU_LOG("bd set!!!\n"); | |
107 | #endif | |
6d75addf | 108 | cp0->n.Cause |= 0x80000000; |
109 | cp0->n.EPC = (psxRegs.pc - 4); | |
ef79bbde | 110 | } else |
6d75addf | 111 | cp0->n.EPC = (psxRegs.pc); |
ef79bbde | 112 | |
6d75addf | 113 | if (cp0->n.Status & 0x400000) |
ef79bbde P |
114 | psxRegs.pc = 0xbfc00180; |
115 | else | |
116 | psxRegs.pc = 0x80000080; | |
117 | ||
118 | // Set the Status | |
6d75addf | 119 | cp0->n.Status = (cp0->n.Status & ~0x3f) | ((cp0->n.Status & 0x0f) << 2); |
ef79bbde | 120 | |
ef79bbde P |
121 | if (Config.HLE) psxBiosException(); |
122 | } | |
123 | ||
124 | void psxBranchTest() { | |
125 | if ((psxRegs.cycle - psxNextsCounter) >= psxNextCounter) | |
126 | psxRcntUpdate(); | |
127 | ||
128 | if (psxRegs.interrupt) { | |
d014a471 | 129 | if ((psxRegs.interrupt & (1 << PSXINT_SIO))) { // sio |
d28b54b1 | 130 | if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_SIO].sCycle) >= psxRegs.intCycle[PSXINT_SIO].cycle) { |
131 | psxRegs.interrupt &= ~(1 << PSXINT_SIO); | |
ef79bbde P |
132 | sioInterrupt(); |
133 | } | |
134 | } | |
d28b54b1 | 135 | if (psxRegs.interrupt & (1 << PSXINT_CDR)) { // cdr |
136 | if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDR].sCycle) >= psxRegs.intCycle[PSXINT_CDR].cycle) { | |
137 | psxRegs.interrupt &= ~(1 << PSXINT_CDR); | |
ef79bbde P |
138 | cdrInterrupt(); |
139 | } | |
140 | } | |
d28b54b1 | 141 | if (psxRegs.interrupt & (1 << PSXINT_CDREAD)) { // cdr read |
142 | if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDREAD].sCycle) >= psxRegs.intCycle[PSXINT_CDREAD].cycle) { | |
143 | psxRegs.interrupt &= ~(1 << PSXINT_CDREAD); | |
480e570b | 144 | cdrPlayReadInterrupt(); |
ef79bbde P |
145 | } |
146 | } | |
d28b54b1 | 147 | if (psxRegs.interrupt & (1 << PSXINT_GPUDMA)) { // gpu dma |
148 | if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_GPUDMA].sCycle) >= psxRegs.intCycle[PSXINT_GPUDMA].cycle) { | |
149 | psxRegs.interrupt &= ~(1 << PSXINT_GPUDMA); | |
ef79bbde P |
150 | gpuInterrupt(); |
151 | } | |
152 | } | |
d28b54b1 | 153 | if (psxRegs.interrupt & (1 << PSXINT_MDECOUTDMA)) { // mdec out dma |
154 | if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_MDECOUTDMA].sCycle) >= psxRegs.intCycle[PSXINT_MDECOUTDMA].cycle) { | |
155 | psxRegs.interrupt &= ~(1 << PSXINT_MDECOUTDMA); | |
ef79bbde P |
156 | mdec1Interrupt(); |
157 | } | |
158 | } | |
d28b54b1 | 159 | if (psxRegs.interrupt & (1 << PSXINT_SPUDMA)) { // spu dma |
160 | if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_SPUDMA].sCycle) >= psxRegs.intCycle[PSXINT_SPUDMA].cycle) { | |
161 | psxRegs.interrupt &= ~(1 << PSXINT_SPUDMA); | |
ef79bbde P |
162 | spuInterrupt(); |
163 | } | |
164 | } | |
528ad661 | 165 | if (psxRegs.interrupt & (1 << PSXINT_MDECINDMA)) { // mdec in |
166 | if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_MDECINDMA].sCycle) >= psxRegs.intCycle[PSXINT_MDECINDMA].cycle) { | |
167 | psxRegs.interrupt &= ~(1 << PSXINT_MDECINDMA); | |
168 | mdec0Interrupt(); | |
169 | } | |
170 | } | |
57a757ce | 171 | if (psxRegs.interrupt & (1 << PSXINT_GPUOTCDMA)) { // gpu otc |
172 | if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_GPUOTCDMA].sCycle) >= psxRegs.intCycle[PSXINT_GPUOTCDMA].cycle) { | |
173 | psxRegs.interrupt &= ~(1 << PSXINT_GPUOTCDMA); | |
174 | gpuotcInterrupt(); | |
175 | } | |
176 | } | |
9f8b032d | 177 | if (psxRegs.interrupt & (1 << PSXINT_CDRDMA)) { // cdrom |
178 | if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDRDMA].sCycle) >= psxRegs.intCycle[PSXINT_CDRDMA].cycle) { | |
179 | psxRegs.interrupt &= ~(1 << PSXINT_CDRDMA); | |
180 | cdrDmaInterrupt(); | |
181 | } | |
182 | } | |
183 | if (psxRegs.interrupt & (1 << PSXINT_CDRLID)) { // cdr lid states | |
184 | if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDRLID].sCycle) >= psxRegs.intCycle[PSXINT_CDRLID].cycle) { | |
185 | psxRegs.interrupt &= ~(1 << PSXINT_CDRLID); | |
186 | cdrLidSeekInterrupt(); | |
187 | } | |
188 | } | |
2b30c129 | 189 | if (psxRegs.interrupt & (1 << PSXINT_SPU_UPDATE)) { // scheduled spu update |
190 | if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_SPU_UPDATE].sCycle) >= psxRegs.intCycle[PSXINT_SPU_UPDATE].cycle) { | |
191 | psxRegs.interrupt &= ~(1 << PSXINT_SPU_UPDATE); | |
192 | spuUpdate(); | |
193 | } | |
194 | } | |
ef79bbde P |
195 | } |
196 | ||
197 | if (psxHu32(0x1070) & psxHu32(0x1074)) { | |
198 | if ((psxRegs.CP0.n.Status & 0x401) == 0x401) { | |
199 | #ifdef PSXCPU_LOG | |
200 | PSXCPU_LOG("Interrupt: %x %x\n", psxHu32(0x1070), psxHu32(0x1074)); | |
201 | #endif | |
202 | // SysPrintf("Interrupt (%x): %x %x\n", psxRegs.cycle, psxHu32(0x1070), psxHu32(0x1074)); | |
6d75addf | 203 | psxException(0x400, 0, &psxRegs.CP0); |
ef79bbde P |
204 | } |
205 | } | |
206 | } | |
207 | ||
208 | void psxJumpTest() { | |
209 | if (!Config.HLE && Config.PsxOut) { | |
210 | u32 call = psxRegs.GPR.n.t1 & 0xff; | |
211 | switch (psxRegs.pc & 0x1fffff) { | |
212 | case 0xa0: | |
213 | #ifdef PSXBIOS_LOG | |
214 | if (call != 0x28 && call != 0xe) { | |
215 | PSXBIOS_LOG("Bios call a0: %s (%x) %x,%x,%x,%x\n", biosA0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3); } | |
216 | #endif | |
217 | if (biosA0[call]) | |
218 | biosA0[call](); | |
219 | break; | |
220 | case 0xb0: | |
221 | #ifdef PSXBIOS_LOG | |
222 | if (call != 0x17 && call != 0xb) { | |
223 | PSXBIOS_LOG("Bios call b0: %s (%x) %x,%x,%x,%x\n", biosB0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3); } | |
224 | #endif | |
225 | if (biosB0[call]) | |
226 | biosB0[call](); | |
227 | break; | |
228 | case 0xc0: | |
229 | #ifdef PSXBIOS_LOG | |
230 | PSXBIOS_LOG("Bios call c0: %s (%x) %x,%x,%x,%x\n", biosC0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3); | |
231 | #endif | |
232 | if (biosC0[call]) | |
233 | biosC0[call](); | |
234 | break; | |
235 | } | |
236 | } | |
237 | } | |
238 | ||
239 | void psxExecuteBios() { | |
240 | while (psxRegs.pc != 0x80030000) | |
241 | psxCpu->ExecuteBlock(); | |
242 | } | |
243 |