2 * (C) GraÅžvydas "notaz" Ignotas, 2011
4 * This work is licensed under the terms of any of these licenses
6 * - GNU GPL, version 2 or later.
7 * - GNU LGPL, version 2.1 or later.
8 * See the COPYING file in the top-level directory.
23 @ XXX: gteMAC calc shouldn't be saturating, but it is here
25 @ approximate gteMAC|123 flags
26 @ in: rr 123 as gteMAC|123
28 .macro do_mac_flags rr1 rr2 rr3
30 orrvs lr, #(1<<31)|(1<<27)
32 orrvs lr, #(1<<31)|(1<<26)
34 orrvs lr, #(1<<31)|(1<<25)
35 cmn \rr1, #1 @ same as adds ...
43 @ approximate 3x gteMACn flags
44 @ in: rr 123 as 3 instances gteMACn, *flags
46 .macro do_mac_flags3x rr1 rr2 rr3 nflags pflags
51 cmn \rr1, #1 @ adds ...
57 @ get gteIR|123 flags from gteMAC|123
58 @ in: rr 123 as gteMAC|123
60 .macro do_irs_flags rr1 rr2 rr3
64 orrne lr, #(1<<31)|(1<<24) @ IR1/limB1
68 orrne lr, #(1<<23) @ IR2/limB2
70 orrne lr, #(1<<22) @ IR3/limB3
75 * RTPS/RTPT register map:
77 * q | d | c code / phase 1 phase 2 scratch
78 * 0 0 gteR1* [s16] gteMAC3 = gteMAC3 \ v=0 *
79 * 1 gteR2* gteIR1-3 = gteIR1-3 / *
80 * 1 2 gteR3* gteMAC3 = gteMAC3 \ v=1
81 * 3 * gteIR1-3 = gteIR1-3 /
82 * 2 4 gteTRX<<12 [s64] gteOFX [s64] gteMAC3 \ v=2
83 * 5 gteTRY<<12 gteOFY [s64] gteIR1-3 /
84 * 3 6 gteTRZ<<12 gteDQA [s64] min gteMAC|12 v=012
85 * 7 0 gteDQB [s64] max gteMAC|12
86 * 4 8 VXYZ(v) / gteMAC1,2 [s32] min gteIR|123
87 * 9 * / gteMAC3 max gteIR|123
88 * 5 10 gteIR1-3 [s16] gteIR1-3 v=2 quotients 12
90 * 6 12 gteH (adj. for cmp)
91 * 13 gteH (float for div)
97 @ load gteR*, gteTR* and gteH (see map above), clear q15
102 vldmia r3, {d0-d2} @ gteR* [16*9]
104 add r3, r0, #4*(32+5)
105 vldmia r3, {d4-d5} @ gteTR*
106 vext.16 d2, d1, d2, #2 @ xxx3 -> x321
107 vext.16 d1, d0, d1, #3 @ xx32 -> x321
108 add r3, r0, #4*(32+26)
109 vld1.32 d11[0], [r3] @ gteH
110 vshll.s32 q3, d5, #12 @ gteTRZ
111 vshll.s32 q2, d4, #12 @ gteTR|XY
112 vmovl.s16 q6, d11 @ gteH
115 @ do RTP* gteMAC* calculation
116 @ in: gteR*, gteTR* as in map, d8 - VXYZ, r12 - 0
117 @ out: d8,d9 - gteMAC|123, d10 - gteIR|123
122 vmull.s16 q10, d2, d8
126 vadd.s64 d16, d17 @ d16=d0.16[2]*d8.16[2], as
127 vadd.s64 d18, d19 @ d8[3]==0, so won't affect
128 vadd.s64 d20, d21 @ QC
132 vqshrn.s64 d8, q8, #12 @ gteMAC1
133 vqshrn.s64 d18, q9, #12 @ gteMAC2
134 vqshrn.s64 d9, q10, #12 @ gteMAC3
135 vsli.u64 d8, d18, #32 @ gteMAC|12
137 vqmovn.s32 d10, q4 @ gteIR|123; losing 2 cycles?
140 .global gteRTPS_neon @ r0=CP2 (d,c),
144 @ fmrx r4, fpscr @ vmrs? at least 40 cycle hit
145 movw r1, #:lower16:scratch
146 movt r1, #:upper16:scratch
149 vldmia r0, {d8} @ VXYZ(0)
152 @ rtpx_mac @ slower here, faster in RTPT?
153 vmov.16 d8[3], r12 @ kill unused upper vector
156 vmull.s16 q10, d2, d8
157 vpadd.s32 d16, d16, d17
158 vpadd.s32 d17, d18, d19
159 vpadd.s32 d18, d20, d21
161 vpadal.s32 q3, q9 @ d6, d18 is slow?
162 vqshrn.s64 d8, q2, #12 @ gteMAC|12
163 vqshrn.s64 d9, q3, #12 @ gteMAC3
167 vst1.32 d9[0], [r3] @ wb gteMAC|123
168 vqmovn.s32 d10, q4 @ gteIR|123
170 add r3, r0, #4*17 @ gteSZ*
171 vldmia r3, {q7} @ d14,d15 gteSZ|123x
172 vmov.i32 d28, #0xffff @ 0xffff[32]
173 vmax.s32 d11, d9, d31
174 vshr.s32 d16, d12, #1 @ | gteH/2 (adjust for cmp)
176 vmin.u32 d11, d28 @ saturate to 0..0xffff limD/fSZ3
177 vmovl.s16 q9, d10 @ || expand gteIR|123
178 vshl.u32 d13, d12, #16 @ | preparing gteH
183 vsli.u64 d15, d11, #32 @ new gteSZ|0123 in q7
184 vclt.u32 d16, d16, d11 @ gteH/2 < fSZ3?
186 add r3, r0, #4*(32+24)
187 vld1.32 d4, [r3] @ || gteOF|XY
188 add r3, r0, #4*(32+27)
189 vld1.32 d6, [r3] @ || gteDQ|AB
192 vmovl.s32 q2, d4 @ || gteOF|XY [64]
193 vmax.u32 d11, d26 @ make divisor 1 if not
194 vmovl.s32 q3, d6 @ || gteDQ|AB [64]
195 add r3, r0, #4*16 @ | gteSZ*
196 vstmia r3, {q7} @ | d14,d15 gteSZ|123x
198 vcvt.f32.u32 d13, d13 @ gteH (float for div)
199 vcvt.f32.u32 d11, d11 @ divisor
201 @ divide.. it's not worth messing with reciprocals here
202 @ just for 1 value, let's just use VFP divider here
203 vdiv.f32 s22, s26, s22
205 vcvt.u32.f32 d11, d11 @ quotient
207 @ while NEON's busy we calculate some flags on ARM
210 ldmia r3, {r4-r6} @ gteMAC|123
212 vst1.32 d11, [r1, :64] @ wb quotient for flags (pre-limE)
215 do_mac_flags r4, r5, r6
217 vshr.u32 d11, #15 @ quotient (limE)
219 do_irs_flags r4, r5, r6
221 vmlal.s32 q2, d18, d11[0]@ gteOF|XY + gteIR|12 * quotient
223 vld1.32 d16, [r3] @ || load fS|XY12, new 01
224 vqmovn.s64 d18, q2 @ saturate to 32
225 vmull.s32 q10, d6, d11[0]@ | d20 = gteDQA * quotient
226 vqshl.s32 d19, d18, #5 @ 11bit precision
228 ldr r4, [r1] @ quotient
231 orrne lr, #(1<<18) @ fSZ (limD)
233 vst1.32 d18, [r1, :64] @ writeback fS|XY2 before limG
235 vshr.s32 d18, d19, #16+5@ can't vqshrn because of insn
236 vadd.s64 d20, d7 @ | gteDQB + gteDQA * quotient
237 vmovn.s32 d18, q9 @ fS|XY2 [s16]
239 vqmovn.s64 d20, q10 @ | gteMAC0
241 vst1.32 d16, [r3]! @ writeback fS|XY01
242 vst1.32 d18[0], [r3] @ ...2
244 vshr.s32 d21, d20, #12
245 vst1.32 d20[0], [r3] @ gteMAC0
249 orrne lr, #(1<<17) @ limE
252 vmov.i32 d22, #0x1000
255 vst1.16 d21[0], [r3] @ gteIR0
257 ldmia r1, {r4,r5} @ fS|XY2 before limG, after 11bit sat
258 add r2, r4, #0x400<<16
259 add r3, r5, #0x400<<16
261 orrne lr, #(1<<14) @ limG1
264 orrne lr, #(1<<13) @ limG2
268 orrvs lr, #(1<<16) @ F
274 ldr r4, [r0, #4*24] @ gteMAC0
278 orrvs lr, #(1<<16) @ F
281 orrvs lr, #(1<<15) @ F
284 orrhi lr, #(1<<12) @ limH
286 str lr, [r0, #4*(32+31)] @ gteFLAG
289 .size gteRTPS_neon, .-gteRTPS_neon
293 .global gteRTPT_neon @ r0=CP2 (d,c),
297 movw r1, #:lower16:scratch
298 movt r1, #:upper16:scratch
303 vmov.i32 d22, #0x7fffffff
304 vmov.i32 d23, #0x80000000
308 vldmia r2!, {d8} @ VXYZ(v)
309 vmov.16 d8[3], r12 @ kill unused upper vector
312 vmin.s32 d22, d8 @ min gteMAC|12
313 vmax.s32 d23, d8 @ max gteMAC|12
315 vst1.32 {d9,d10}, [r1, :128]!
318 vst1.32 {d22,d23}, [r1, :128]! @ min/max gteMAC|12, for flags
322 vldmia r1, {d0-d3} @ note: d4,d5 is for gteOF|XY
324 vmov d20, d0 @ gteMAC3 v=0
325 vmin.s16 d24, d1, d3 @ | find min IR
326 vshr.s32 d22, d12, #1 @ || gteH/2 (adjust for cmp)
327 vmax.s16 d25, d1, d3 @ | .. also max, for flag gen
328 vsli.u64 d20, d2, #32 @ gteMAC3 v=1
329 vmov d21, d9 @ ... v=2
331 vmov.i32 q14, #0xffff @ 0xffff[32]
334 vdup.32 q11, d22[0] @ gteH/2
335 vmin.u32 q10, q14 @ saturate to 0..0xffff limD/fSZ(v)
336 vmin.s16 d24, d10 @ | find min/max IR
337 vmax.s16 d25, d10 @ |
339 add r3, r0, #4*19 @ ||
340 vld1.32 d14[0], [r3] @ || gteSZ3
342 vclt.u32 q11, q11, q10 @ gteH/2 < fSZ(v)?
344 vst1.32 d20, [r3]! @ | writeback fSZ(v)
346 vst1.32 d21[0], [r3] @ |
347 vmax.u32 q10, q11, q13 @ make divisor 1 if not
349 vstmia r3, {q12} @ min/max IR for flags
350 vcvt.f32.u32 q10, q10
351 vshl.u32 d13, d12, #16 @ | preparing gteH
353 @ while NEON's busy we calculate some flags on ARM
356 ldmia r2, {r4-r7} @ min/max gteMAC|12
358 orrvs lr, #(1<<31)|(1<<27)
360 orrvs lr, #(1<<31)|(1<<26)
365 ldr r4, [r1, #0] @ gteMAC3 v=0
366 ldr r5, [r1, #8*2] @ ... v=1
367 ldr r6, [r1, #8*4] @ ... v=2
369 add r3, r0, #4*(32+24)
370 vld1.32 d4, [r3] @ || gteOF|XY
371 add r3, r0, #4*(32+27)
372 vld1.32 d6, [r3] @ || gteDQ|AB
376 vrecpe.f32 q11, q10 @ inv
377 vmovl.s32 q2, d4 @ || gteOF|XY [64]
378 vmovl.s32 q3, d6 @ || gteDQ|AB [64]
379 vrecps.f32 q12, q10, q11 @ step
380 vcvt.f32.u32 d13, d13 @ | gteH (float for div)
381 vmul.f32 q11, q12, q11 @ better inv
383 vst1.32 d14[0], [r3] @ gteSZ0 = gteSZ3
384 vdup.32 q13, d13[0] @ |
385 @ vrecps.f32 q12, q10, q11 @ step
386 @ vmul.f32 q11, q12, q11 @ better inv
387 vmul.f32 q10, q13, q11 @ result
389 vmovl.s32 q2, d4 @ || gteOF|XY [64]
390 vmovl.s32 q3, d6 @ || gteDQ|AB [64]
391 vcvt.f32.u32 d13, d13 @ | gteH (float for div)
392 vdup.32 q13, d13[0] @ |
394 vst1.32 d14[0], [r3] @ gteSZ0 = gteSZ3
397 vmov q0, q10 @ to test against C code
405 do_mac_flags3x r4, r5, r6, (1<<31)|(1<<25), (1<<27) @ MAC3
409 ldmia r4, {r7,r8,r10,r11} @ min/max IR
413 orrne lr, #(1<<18) @ fSZ (limD)
415 @ vadd.f32 q10, q @ adjust for vcvt rounding mode
417 vmovl.s16 q9, d1 @ expand gteIR|12 v=0
418 vmovl.s16 q10, d3 @ expand gteIR|12 v=1
420 vstmia r6, {q8} @ wb quotients for flags (pre-limE)
422 vmovl.s16 q11, d10 @ expand gteIR|12 v=2
423 vshr.u32 q8, #15 @ quotients (limE)
426 vdup.32 d26, d17[0] @ quotient (dup)
428 @ flags for minIR012 (r7,r8), maxIR012 (r10,r11)
433 orrvs lr, #(1<<23) @ IR2/limB2
434 rsbs r2, r4, r7, lsl #16
435 cmnvc r4, r10, lsl #16
436 orrvs lr, #(1<<31)|(1<<24) @ IR1/limB1
437 rsbs r2, r4, r8, lsl #16
438 cmnvc r4, r11, lsl #16
439 orrvs lr, #(1<<22) @ IR3/limB3
441 vmull.s32 q9, d18, d24 @ gteIR|12 * quotient v=0
442 vmull.s32 q10, d20, d25 @ ... v=1
443 vmull.s32 q11, d22, d26 @ ... v=2
444 vadd.s64 q9, q2 @ gteOF|XY + gteIR|12 * quotient
445 vadd.s64 q10, q2 @ ... v=1
446 vadd.s64 q11, q2 @ ... v=2
447 vqmovn.s64 d18, q9 @ saturate to 32 v=0
448 vqmovn.s64 d19, q10 @ ... v=1
449 vqmovn.s64 d20, q11 @ ... v=2
450 vmin.s32 d14, d18, d19 @ || find min/max fS|XY(v) [32]
451 vmax.s32 d15, d18, d19 @ || for flags
454 vqshl.s32 q11, q9, #5 @ 11bit precision, v=0,1
455 vqshl.s32 d24, d20, #5 @ ... v=2
456 vmull.s32 q13, d6, d17 @ | gteDQA * quotient v=2
457 vpmin.s32 d16, d14, d31 @ || also find min/max in pair
458 vpmax.s32 d17, d15, d31 @ ||
459 vshr.s32 q11, #16+5 @ can't vqshrn because of insn
460 vshr.s32 d24, #16+5 @ encoding doesn't allow 21 :(
461 vsli.u64 d16, d17, #32 @ || pack in-pair min/max
462 vadd.s64 d26, d7 @ | gteDQB + gteDQA * quotient
463 vmovn.s32 d12, q11 @ fS|XY(v) [s16] v=0,1
464 vmovn.s32 d13, q12 @ 3
465 vstmia r1, {d14-d16} @ || other cacheline than quotients
467 vst1.32 d12, [r3]! @ writeback fS|XY v=0,1
470 vqmovn.s64 d26, q13 @ | gteMAC0
471 vmovl.u16 q5, d10 @ expand gteIR|123 v=2
473 vmov.i32 d13, #0x1000
474 vshr.s32 d12, d26, #12
477 vst1.32 d26[0], [r3]! @ gteMAC0
479 vst1.32 d8, [r3]! @ gteMAC123 (last iteration)
482 vmin.s32 d12, d13 @ | gteIR0
484 ldmia r6, {r4-r6} @ quotients
490 vst1.32 d12[0], [r3]! @ gteIR0
491 vst1.32 d10, [r3]! @ gteIR12
492 vst1.32 d11[0], [r3] @ ..3
495 orrne lr, #(1<<31) @ limE
496 orrne lr, #(1<<17) @ limE
498 add r2, r4, #0x400<<16 @ min fSX
499 add r3, r6, #0x400<<16 @ max fSX
502 orrne lr, #(1<<31) @ limG1
504 add r2, r5, #0x400<<16 @ min fSY
505 add r3, r7, #0x400<<16 @ max fSY
508 orrne lr, #(1<<31) @ limG2
511 orrvs lr, #(1<<16) @ F (31 already done by above)
514 ldr r4, [r0, #4*24] @ gteMAC0
519 orrvs lr, #(1<<31) @ F
522 orrvs lr, #(1<<31) @ F
524 orrhi lr, #(1<<12) @ limH
526 str lr, [r0, #4*(32+31)] @ gteFLAG
529 .size gteRTPT_neon, .-gteRTPT_neon
533 .global gteMVMVA_neon @ r0=CP2 (d,c), op
539 ubfx r2, r1, #15, #2 @ v
541 vmov.i32 q0, #0 @ d0,d1
542 vmov.i32 q1, #0 @ d2,d3
543 vmov.i32 q2, #0 @ d4,d5
546 addne r3, r0, r2, lsl #3
549 pkhbteq r4, r3, r4, lsl #16
552 vmov.32 d8[1], r5 @ VXYZ(v)
553 ubfx r3, r1, #17, #2 @ mx
554 ubfx r2, r1, #13, #2 @ cv
556 beq 0f @ very rare case
557 add r3, r12, r3, lsl #5
558 vldmia r3, {d0-d2} @ MXxy/gteR* [16*9]
561 add r3, r12, r2, lsl #5
564 vldmia r3, {d4-d5} @ CVx/gteTR*
568 vext.16 d2, d1, d2, #2 @ xxx3 -> x321
569 vext.16 d1, d0, d1, #3 @ xx32 -> x321
570 vshll.s32 q3, d5, #12 @ gteTRZ/CV3
571 vshll.s32 q2, d4, #12 @ gteTR|XY/CV12
575 vmull.s16 q10, d2, d8
576 vpadd.s32 d16, d16, d17
577 vpadd.s32 d17, d18, d19
578 vpadd.s32 d18, d20, d21
586 vqmovn.s64 d8, q2 @ gteMAC|12
587 vqmovn.s64 d9, q3 @ gteMAC3
591 vqmovn.s32 d10, q4 @ gteIR|123
593 vst1.32 d9[0], [r3] @ wb gteMAC|123
598 vmovl.s16 q9, d10 @ expand gteIR|123
607 moveq r2, #0x8000 @ adj
608 moveq r12, #16 @ shift
611 ldmia r3, {r3-r5} @ gteMAC|123
613 do_mac_flags r3, r4, r5
619 orrne lr, #(1<<31)|(1<<24) @ IR1/limB1
622 orrne lr, #(1<<23) @ IR2/limB2
624 orrne lr, #(1<<22) @ IR3/limB3
625 str lr, [r0, #4*(32+31)] @ gteFLAG
628 .size gteMVMVA_neon, .-gteMVMVA_neon
632 @ vim:filetype=armasm