1 /* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
2 * Mupen64plus/PCSX - assem_arm.c *
3 * Copyright (C) 2009-2011 Ari64 *
4 * Copyright (C) 2010-2011 GraÅžvydas "notaz" Ignotas *
6 * This program is free software; you can redistribute it and/or modify *
7 * it under the terms of the GNU General Public License as published by *
8 * the Free Software Foundation; either version 2 of the License, or *
9 * (at your option) any later version. *
11 * This program is distributed in the hope that it will be useful, *
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
14 * GNU General Public License for more details. *
16 * You should have received a copy of the GNU General Public License *
17 * along with this program; if not, write to the *
18 * Free Software Foundation, Inc., *
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. *
20 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
27 #include "../gte_arm.h"
28 #include "../gte_neon.h"
31 #include "arm_features.h"
34 char translation_cache[1 << TARGET_SIZE_2] __attribute__((aligned(4096)));
37 extern int cycle_count;
38 extern int last_count;
40 extern int pending_exception;
41 extern int branch_target;
42 extern uint64_t readmem_dword;
44 extern precomp_instr fake_pc;
46 extern void *dynarec_local;
47 extern u_int memory_map[1048576];
48 extern u_int mini_ht[32][2];
49 extern u_int rounding_modes[4];
51 void indirect_jump_indexed();
64 void jump_vaddr_r10();
65 void jump_vaddr_r12();
67 const u_int jump_vaddr_reg[16] = {
85 void invalidate_addr_r0();
86 void invalidate_addr_r1();
87 void invalidate_addr_r2();
88 void invalidate_addr_r3();
89 void invalidate_addr_r4();
90 void invalidate_addr_r5();
91 void invalidate_addr_r6();
92 void invalidate_addr_r7();
93 void invalidate_addr_r8();
94 void invalidate_addr_r9();
95 void invalidate_addr_r10();
96 void invalidate_addr_r12();
98 const u_int invalidate_addr_reg[16] = {
99 (int)invalidate_addr_r0,
100 (int)invalidate_addr_r1,
101 (int)invalidate_addr_r2,
102 (int)invalidate_addr_r3,
103 (int)invalidate_addr_r4,
104 (int)invalidate_addr_r5,
105 (int)invalidate_addr_r6,
106 (int)invalidate_addr_r7,
107 (int)invalidate_addr_r8,
108 (int)invalidate_addr_r9,
109 (int)invalidate_addr_r10,
111 (int)invalidate_addr_r12,
118 unsigned int needs_clear_cache[1<<(TARGET_SIZE_2-17)];
122 void set_jump_target(int addr,u_int target)
124 u_char *ptr=(u_char *)addr;
125 u_int *ptr2=(u_int *)ptr;
127 assert((target-(u_int)ptr2-8)<1024);
129 assert((target&3)==0);
130 *ptr2=(*ptr2&0xFFFFF000)|((target-(u_int)ptr2-8)>>2)|0xF00;
131 //printf("target=%x addr=%x insn=%x\n",target,addr,*ptr2);
133 else if(ptr[3]==0x72) {
134 // generated by emit_jno_unlikely
135 if((target-(u_int)ptr2-8)<1024) {
137 assert((target&3)==0);
138 *ptr2=(*ptr2&0xFFFFF000)|((target-(u_int)ptr2-8)>>2)|0xF00;
140 else if((target-(u_int)ptr2-8)<4096&&!((target-(u_int)ptr2-8)&15)) {
142 assert((target&3)==0);
143 *ptr2=(*ptr2&0xFFFFF000)|((target-(u_int)ptr2-8)>>4)|0xE00;
145 else *ptr2=(0x7A000000)|(((target-(u_int)ptr2-8)<<6)>>8);
148 assert((ptr[3]&0x0e)==0xa);
149 *ptr2=(*ptr2&0xFF000000)|(((target-(u_int)ptr2-8)<<6)>>8);
153 // This optionally copies the instruction from the target of the branch into
154 // the space before the branch. Works, but the difference in speed is
155 // usually insignificant.
156 void set_jump_target_fillslot(int addr,u_int target,int copy)
158 u_char *ptr=(u_char *)addr;
159 u_int *ptr2=(u_int *)ptr;
160 assert(!copy||ptr2[-1]==0xe28dd000);
163 assert((target-(u_int)ptr2-8)<4096);
164 *ptr2=(*ptr2&0xFFFFF000)|(target-(u_int)ptr2-8);
167 assert((ptr[3]&0x0e)==0xa);
168 u_int target_insn=*(u_int *)target;
169 if((target_insn&0x0e100000)==0) { // ALU, no immediate, no flags
172 if((target_insn&0x0c100000)==0x04100000) { // Load
175 if(target_insn&0x08000000) {
179 ptr2[-1]=target_insn;
182 *ptr2=(*ptr2&0xFF000000)|(((target-(u_int)ptr2-8)<<6)>>8);
187 add_literal(int addr,int val)
189 assert(literalcount<sizeof(literals)/sizeof(literals[0]));
190 literals[literalcount][0]=addr;
191 literals[literalcount][1]=val;
195 void *kill_pointer(void *stub)
197 int *ptr=(int *)(stub+4);
198 assert((*ptr&0x0ff00000)==0x05900000);
199 u_int offset=*ptr&0xfff;
200 int **l_ptr=(void *)ptr+offset+8;
202 set_jump_target((int)i_ptr,(int)stub);
206 // find where external branch is liked to using addr of it's stub:
207 // get address that insn one after stub loads (dyna_linker arg1),
208 // treat it as a pointer to branch insn,
209 // return addr where that branch jumps to
210 int get_pointer(void *stub)
212 //printf("get_pointer(%x)\n",(int)stub);
213 int *ptr=(int *)(stub+4);
214 assert((*ptr&0x0fff0000)==0x059f0000);
215 u_int offset=*ptr&0xfff;
216 int **l_ptr=(void *)ptr+offset+8;
218 assert((*i_ptr&0x0f000000)==0x0a000000);
219 return (int)i_ptr+((*i_ptr<<8)>>6)+8;
222 // Find the "clean" entry point from a "dirty" entry point
223 // by skipping past the call to verify_code
224 u_int get_clean_addr(int addr)
226 int *ptr=(int *)addr;
232 if((*ptr&0xFF000000)!=0xeb000000) ptr++;
233 assert((*ptr&0xFF000000)==0xeb000000); // bl instruction
235 if((*ptr&0xFF000000)==0xea000000) {
236 return (int)ptr+((*ptr<<8)>>6)+8; // follow jump
241 int verify_dirty(int addr)
243 u_int *ptr=(u_int *)addr;
245 // get from literal pool
246 assert((*ptr&0xFFFF0000)==0xe59f0000);
247 u_int offset=*ptr&0xfff;
248 u_int *l_ptr=(void *)ptr+offset+8;
249 u_int source=l_ptr[0];
255 assert((*ptr&0xFFF00000)==0xe3000000);
256 u_int source=(ptr[0]&0xFFF)+((ptr[0]>>4)&0xF000)+((ptr[2]<<16)&0xFFF0000)+((ptr[2]<<12)&0xF0000000);
257 u_int copy=(ptr[1]&0xFFF)+((ptr[1]>>4)&0xF000)+((ptr[3]<<16)&0xFFF0000)+((ptr[3]<<12)&0xF0000000);
258 u_int len=(ptr[4]&0xFFF)+((ptr[4]>>4)&0xF000);
261 if((*ptr&0xFF000000)!=0xeb000000) ptr++;
262 assert((*ptr&0xFF000000)==0xeb000000); // bl instruction
264 u_int verifier=(int)ptr+((signed int)(*ptr<<8)>>6)+8; // get target of bl
265 if(verifier==(u_int)verify_code_vm||verifier==(u_int)verify_code_ds) {
266 unsigned int page=source>>12;
267 unsigned int map_value=memory_map[page];
268 if(map_value>=0x80000000) return 0;
269 while(page<((source+len-1)>>12)) {
270 if((memory_map[++page]<<2)!=(map_value<<2)) return 0;
272 source = source+(map_value<<2);
275 //printf("verify_dirty: %x %x %x\n",source,copy,len);
276 return !memcmp((void *)source,(void *)copy,len);
279 // This doesn't necessarily find all clean entry points, just
280 // guarantees that it's not dirty
281 int isclean(int addr)
284 int *ptr=((u_int *)addr)+4;
286 int *ptr=((u_int *)addr)+6;
288 if((*ptr&0xFF000000)!=0xeb000000) ptr++;
289 if((*ptr&0xFF000000)!=0xeb000000) return 1; // bl instruction
290 if((int)ptr+((*ptr<<8)>>6)+8==(int)verify_code) return 0;
291 if((int)ptr+((*ptr<<8)>>6)+8==(int)verify_code_vm) return 0;
292 if((int)ptr+((*ptr<<8)>>6)+8==(int)verify_code_ds) return 0;
296 // get source that block at addr was compiled from (host pointers)
297 void get_bounds(int addr,u_int *start,u_int *end)
299 u_int *ptr=(u_int *)addr;
301 // get from literal pool
302 assert((*ptr&0xFFFF0000)==0xe59f0000);
303 u_int offset=*ptr&0xfff;
304 u_int *l_ptr=(void *)ptr+offset+8;
305 u_int source=l_ptr[0];
306 //u_int copy=l_ptr[1];
311 assert((*ptr&0xFFF00000)==0xe3000000);
312 u_int source=(ptr[0]&0xFFF)+((ptr[0]>>4)&0xF000)+((ptr[2]<<16)&0xFFF0000)+((ptr[2]<<12)&0xF0000000);
313 //u_int copy=(ptr[1]&0xFFF)+((ptr[1]>>4)&0xF000)+((ptr[3]<<16)&0xFFF0000)+((ptr[3]<<12)&0xF0000000);
314 u_int len=(ptr[4]&0xFFF)+((ptr[4]>>4)&0xF000);
317 if((*ptr&0xFF000000)!=0xeb000000) ptr++;
318 assert((*ptr&0xFF000000)==0xeb000000); // bl instruction
320 u_int verifier=(int)ptr+((signed int)(*ptr<<8)>>6)+8; // get target of bl
321 if(verifier==(u_int)verify_code_vm||verifier==(u_int)verify_code_ds) {
322 if(memory_map[source>>12]>=0x80000000) source = 0;
323 else source = source+(memory_map[source>>12]<<2);
330 /* Register allocation */
332 // Note: registers are allocated clean (unmodified state)
333 // if you intend to modify the register, you must call dirty_reg().
334 void alloc_reg(struct regstat *cur,int i,signed char reg)
337 int preferred_reg = (reg&7);
338 if(reg==CCREG) preferred_reg=HOST_CCREG;
339 if(reg==PTEMP||reg==FTEMP) preferred_reg=12;
341 // Don't allocate unused registers
342 if((cur->u>>reg)&1) return;
344 // see if it's already allocated
345 for(hr=0;hr<HOST_REGS;hr++)
347 if(cur->regmap[hr]==reg) return;
350 // Keep the same mapping if the register was already allocated in a loop
351 preferred_reg = loop_reg(i,reg,preferred_reg);
353 // Try to allocate the preferred register
354 if(cur->regmap[preferred_reg]==-1) {
355 cur->regmap[preferred_reg]=reg;
356 cur->dirty&=~(1<<preferred_reg);
357 cur->isconst&=~(1<<preferred_reg);
360 r=cur->regmap[preferred_reg];
361 if(r<64&&((cur->u>>r)&1)) {
362 cur->regmap[preferred_reg]=reg;
363 cur->dirty&=~(1<<preferred_reg);
364 cur->isconst&=~(1<<preferred_reg);
367 if(r>=64&&((cur->uu>>(r&63))&1)) {
368 cur->regmap[preferred_reg]=reg;
369 cur->dirty&=~(1<<preferred_reg);
370 cur->isconst&=~(1<<preferred_reg);
374 // Clear any unneeded registers
375 // We try to keep the mapping consistent, if possible, because it
376 // makes branches easier (especially loops). So we try to allocate
377 // first (see above) before removing old mappings. If this is not
378 // possible then go ahead and clear out the registers that are no
380 for(hr=0;hr<HOST_REGS;hr++)
385 if((cur->u>>r)&1) {cur->regmap[hr]=-1;break;}
389 if((cur->uu>>(r&63))&1) {cur->regmap[hr]=-1;break;}
393 // Try to allocate any available register, but prefer
394 // registers that have not been used recently.
396 for(hr=0;hr<HOST_REGS;hr++) {
397 if(hr!=EXCLUDE_REG&&cur->regmap[hr]==-1) {
398 if(regs[i-1].regmap[hr]!=rs1[i-1]&®s[i-1].regmap[hr]!=rs2[i-1]&®s[i-1].regmap[hr]!=rt1[i-1]&®s[i-1].regmap[hr]!=rt2[i-1]) {
400 cur->dirty&=~(1<<hr);
401 cur->isconst&=~(1<<hr);
407 // Try to allocate any available register
408 for(hr=0;hr<HOST_REGS;hr++) {
409 if(hr!=EXCLUDE_REG&&cur->regmap[hr]==-1) {
411 cur->dirty&=~(1<<hr);
412 cur->isconst&=~(1<<hr);
417 // Ok, now we have to evict someone
418 // Pick a register we hopefully won't need soon
419 u_char hsn[MAXREG+1];
420 memset(hsn,10,sizeof(hsn));
422 lsn(hsn,i,&preferred_reg);
423 //printf("eax=%d ecx=%d edx=%d ebx=%d ebp=%d esi=%d edi=%d\n",cur->regmap[0],cur->regmap[1],cur->regmap[2],cur->regmap[3],cur->regmap[5],cur->regmap[6],cur->regmap[7]);
424 //printf("hsn(%x): %d %d %d %d %d %d %d\n",start+i*4,hsn[cur->regmap[0]&63],hsn[cur->regmap[1]&63],hsn[cur->regmap[2]&63],hsn[cur->regmap[3]&63],hsn[cur->regmap[5]&63],hsn[cur->regmap[6]&63],hsn[cur->regmap[7]&63]);
426 // Don't evict the cycle count at entry points, otherwise the entry
427 // stub will have to write it.
428 if(bt[i]&&hsn[CCREG]>2) hsn[CCREG]=2;
429 if(i>1&&hsn[CCREG]>2&&(itype[i-2]==RJUMP||itype[i-2]==UJUMP||itype[i-2]==CJUMP||itype[i-2]==SJUMP||itype[i-2]==FJUMP)) hsn[CCREG]=2;
432 // Alloc preferred register if available
433 if(hsn[r=cur->regmap[preferred_reg]&63]==j) {
434 for(hr=0;hr<HOST_REGS;hr++) {
435 // Evict both parts of a 64-bit register
436 if((cur->regmap[hr]&63)==r) {
438 cur->dirty&=~(1<<hr);
439 cur->isconst&=~(1<<hr);
442 cur->regmap[preferred_reg]=reg;
445 for(r=1;r<=MAXREG;r++)
447 if(hsn[r]==j&&r!=rs1[i-1]&&r!=rs2[i-1]&&r!=rt1[i-1]&&r!=rt2[i-1]) {
448 for(hr=0;hr<HOST_REGS;hr++) {
449 if(hr!=HOST_CCREG||j<hsn[CCREG]) {
450 if(cur->regmap[hr]==r+64) {
452 cur->dirty&=~(1<<hr);
453 cur->isconst&=~(1<<hr);
458 for(hr=0;hr<HOST_REGS;hr++) {
459 if(hr!=HOST_CCREG||j<hsn[CCREG]) {
460 if(cur->regmap[hr]==r) {
462 cur->dirty&=~(1<<hr);
463 cur->isconst&=~(1<<hr);
474 for(r=1;r<=MAXREG;r++)
477 for(hr=0;hr<HOST_REGS;hr++) {
478 if(cur->regmap[hr]==r+64) {
480 cur->dirty&=~(1<<hr);
481 cur->isconst&=~(1<<hr);
485 for(hr=0;hr<HOST_REGS;hr++) {
486 if(cur->regmap[hr]==r) {
488 cur->dirty&=~(1<<hr);
489 cur->isconst&=~(1<<hr);
496 SysPrintf("This shouldn't happen (alloc_reg)");exit(1);
499 void alloc_reg64(struct regstat *cur,int i,signed char reg)
501 int preferred_reg = 8+(reg&1);
504 // allocate the lower 32 bits
505 alloc_reg(cur,i,reg);
507 // Don't allocate unused registers
508 if((cur->uu>>reg)&1) return;
510 // see if the upper half is already allocated
511 for(hr=0;hr<HOST_REGS;hr++)
513 if(cur->regmap[hr]==reg+64) return;
516 // Keep the same mapping if the register was already allocated in a loop
517 preferred_reg = loop_reg(i,reg,preferred_reg);
519 // Try to allocate the preferred register
520 if(cur->regmap[preferred_reg]==-1) {
521 cur->regmap[preferred_reg]=reg|64;
522 cur->dirty&=~(1<<preferred_reg);
523 cur->isconst&=~(1<<preferred_reg);
526 r=cur->regmap[preferred_reg];
527 if(r<64&&((cur->u>>r)&1)) {
528 cur->regmap[preferred_reg]=reg|64;
529 cur->dirty&=~(1<<preferred_reg);
530 cur->isconst&=~(1<<preferred_reg);
533 if(r>=64&&((cur->uu>>(r&63))&1)) {
534 cur->regmap[preferred_reg]=reg|64;
535 cur->dirty&=~(1<<preferred_reg);
536 cur->isconst&=~(1<<preferred_reg);
540 // Clear any unneeded registers
541 // We try to keep the mapping consistent, if possible, because it
542 // makes branches easier (especially loops). So we try to allocate
543 // first (see above) before removing old mappings. If this is not
544 // possible then go ahead and clear out the registers that are no
546 for(hr=HOST_REGS-1;hr>=0;hr--)
551 if((cur->u>>r)&1) {cur->regmap[hr]=-1;break;}
555 if((cur->uu>>(r&63))&1) {cur->regmap[hr]=-1;break;}
559 // Try to allocate any available register, but prefer
560 // registers that have not been used recently.
562 for(hr=0;hr<HOST_REGS;hr++) {
563 if(hr!=EXCLUDE_REG&&cur->regmap[hr]==-1) {
564 if(regs[i-1].regmap[hr]!=rs1[i-1]&®s[i-1].regmap[hr]!=rs2[i-1]&®s[i-1].regmap[hr]!=rt1[i-1]&®s[i-1].regmap[hr]!=rt2[i-1]) {
565 cur->regmap[hr]=reg|64;
566 cur->dirty&=~(1<<hr);
567 cur->isconst&=~(1<<hr);
573 // Try to allocate any available register
574 for(hr=0;hr<HOST_REGS;hr++) {
575 if(hr!=EXCLUDE_REG&&cur->regmap[hr]==-1) {
576 cur->regmap[hr]=reg|64;
577 cur->dirty&=~(1<<hr);
578 cur->isconst&=~(1<<hr);
583 // Ok, now we have to evict someone
584 // Pick a register we hopefully won't need soon
585 u_char hsn[MAXREG+1];
586 memset(hsn,10,sizeof(hsn));
588 lsn(hsn,i,&preferred_reg);
589 //printf("eax=%d ecx=%d edx=%d ebx=%d ebp=%d esi=%d edi=%d\n",cur->regmap[0],cur->regmap[1],cur->regmap[2],cur->regmap[3],cur->regmap[5],cur->regmap[6],cur->regmap[7]);
590 //printf("hsn(%x): %d %d %d %d %d %d %d\n",start+i*4,hsn[cur->regmap[0]&63],hsn[cur->regmap[1]&63],hsn[cur->regmap[2]&63],hsn[cur->regmap[3]&63],hsn[cur->regmap[5]&63],hsn[cur->regmap[6]&63],hsn[cur->regmap[7]&63]);
592 // Don't evict the cycle count at entry points, otherwise the entry
593 // stub will have to write it.
594 if(bt[i]&&hsn[CCREG]>2) hsn[CCREG]=2;
595 if(i>1&&hsn[CCREG]>2&&(itype[i-2]==RJUMP||itype[i-2]==UJUMP||itype[i-2]==CJUMP||itype[i-2]==SJUMP||itype[i-2]==FJUMP)) hsn[CCREG]=2;
598 // Alloc preferred register if available
599 if(hsn[r=cur->regmap[preferred_reg]&63]==j) {
600 for(hr=0;hr<HOST_REGS;hr++) {
601 // Evict both parts of a 64-bit register
602 if((cur->regmap[hr]&63)==r) {
604 cur->dirty&=~(1<<hr);
605 cur->isconst&=~(1<<hr);
608 cur->regmap[preferred_reg]=reg|64;
611 for(r=1;r<=MAXREG;r++)
613 if(hsn[r]==j&&r!=rs1[i-1]&&r!=rs2[i-1]&&r!=rt1[i-1]&&r!=rt2[i-1]) {
614 for(hr=0;hr<HOST_REGS;hr++) {
615 if(hr!=HOST_CCREG||j<hsn[CCREG]) {
616 if(cur->regmap[hr]==r+64) {
617 cur->regmap[hr]=reg|64;
618 cur->dirty&=~(1<<hr);
619 cur->isconst&=~(1<<hr);
624 for(hr=0;hr<HOST_REGS;hr++) {
625 if(hr!=HOST_CCREG||j<hsn[CCREG]) {
626 if(cur->regmap[hr]==r) {
627 cur->regmap[hr]=reg|64;
628 cur->dirty&=~(1<<hr);
629 cur->isconst&=~(1<<hr);
640 for(r=1;r<=MAXREG;r++)
643 for(hr=0;hr<HOST_REGS;hr++) {
644 if(cur->regmap[hr]==r+64) {
645 cur->regmap[hr]=reg|64;
646 cur->dirty&=~(1<<hr);
647 cur->isconst&=~(1<<hr);
651 for(hr=0;hr<HOST_REGS;hr++) {
652 if(cur->regmap[hr]==r) {
653 cur->regmap[hr]=reg|64;
654 cur->dirty&=~(1<<hr);
655 cur->isconst&=~(1<<hr);
662 SysPrintf("This shouldn't happen");exit(1);
665 // Allocate a temporary register. This is done without regard to
666 // dirty status or whether the register we request is on the unneeded list
667 // Note: This will only allocate one register, even if called multiple times
668 void alloc_reg_temp(struct regstat *cur,int i,signed char reg)
671 int preferred_reg = -1;
673 // see if it's already allocated
674 for(hr=0;hr<HOST_REGS;hr++)
676 if(hr!=EXCLUDE_REG&&cur->regmap[hr]==reg) return;
679 // Try to allocate any available register
680 for(hr=HOST_REGS-1;hr>=0;hr--) {
681 if(hr!=EXCLUDE_REG&&cur->regmap[hr]==-1) {
683 cur->dirty&=~(1<<hr);
684 cur->isconst&=~(1<<hr);
689 // Find an unneeded register
690 for(hr=HOST_REGS-1;hr>=0;hr--)
696 if(i==0||((unneeded_reg[i-1]>>r)&1)) {
698 cur->dirty&=~(1<<hr);
699 cur->isconst&=~(1<<hr);
706 if((cur->uu>>(r&63))&1) {
707 if(i==0||((unneeded_reg_upper[i-1]>>(r&63))&1)) {
709 cur->dirty&=~(1<<hr);
710 cur->isconst&=~(1<<hr);
718 // Ok, now we have to evict someone
719 // Pick a register we hopefully won't need soon
720 // TODO: we might want to follow unconditional jumps here
721 // TODO: get rid of dupe code and make this into a function
722 u_char hsn[MAXREG+1];
723 memset(hsn,10,sizeof(hsn));
725 lsn(hsn,i,&preferred_reg);
726 //printf("hsn: %d %d %d %d %d %d %d\n",hsn[cur->regmap[0]&63],hsn[cur->regmap[1]&63],hsn[cur->regmap[2]&63],hsn[cur->regmap[3]&63],hsn[cur->regmap[5]&63],hsn[cur->regmap[6]&63],hsn[cur->regmap[7]&63]);
728 // Don't evict the cycle count at entry points, otherwise the entry
729 // stub will have to write it.
730 if(bt[i]&&hsn[CCREG]>2) hsn[CCREG]=2;
731 if(i>1&&hsn[CCREG]>2&&(itype[i-2]==RJUMP||itype[i-2]==UJUMP||itype[i-2]==CJUMP||itype[i-2]==SJUMP||itype[i-2]==FJUMP)) hsn[CCREG]=2;
734 for(r=1;r<=MAXREG;r++)
736 if(hsn[r]==j&&r!=rs1[i-1]&&r!=rs2[i-1]&&r!=rt1[i-1]&&r!=rt2[i-1]) {
737 for(hr=0;hr<HOST_REGS;hr++) {
738 if(hr!=HOST_CCREG||hsn[CCREG]>2) {
739 if(cur->regmap[hr]==r+64) {
741 cur->dirty&=~(1<<hr);
742 cur->isconst&=~(1<<hr);
747 for(hr=0;hr<HOST_REGS;hr++) {
748 if(hr!=HOST_CCREG||hsn[CCREG]>2) {
749 if(cur->regmap[hr]==r) {
751 cur->dirty&=~(1<<hr);
752 cur->isconst&=~(1<<hr);
763 for(r=1;r<=MAXREG;r++)
766 for(hr=0;hr<HOST_REGS;hr++) {
767 if(cur->regmap[hr]==r+64) {
769 cur->dirty&=~(1<<hr);
770 cur->isconst&=~(1<<hr);
774 for(hr=0;hr<HOST_REGS;hr++) {
775 if(cur->regmap[hr]==r) {
777 cur->dirty&=~(1<<hr);
778 cur->isconst&=~(1<<hr);
785 SysPrintf("This shouldn't happen");exit(1);
787 // Allocate a specific ARM register.
788 void alloc_arm_reg(struct regstat *cur,int i,signed char reg,char hr)
793 // see if it's already allocated (and dealloc it)
794 for(n=0;n<HOST_REGS;n++)
796 if(n!=EXCLUDE_REG&&cur->regmap[n]==reg) {
797 dirty=(cur->dirty>>n)&1;
803 cur->dirty&=~(1<<hr);
804 cur->dirty|=dirty<<hr;
805 cur->isconst&=~(1<<hr);
808 // Alloc cycle count into dedicated register
809 alloc_cc(struct regstat *cur,int i)
811 alloc_arm_reg(cur,i,CCREG,HOST_CCREG);
819 char regname[16][4] = {
837 void output_byte(u_char byte)
841 void output_modrm(u_char mod,u_char rm,u_char ext)
846 u_char byte=(mod<<6)|(ext<<3)|rm;
849 void output_sib(u_char scale,u_char index,u_char base)
854 u_char byte=(scale<<6)|(index<<3)|base;
857 void output_w32(u_int word)
859 *((u_int *)out)=word;
862 u_int rd_rn_rm(u_int rd, u_int rn, u_int rm)
867 return((rn<<16)|(rd<<12)|rm);
869 u_int rd_rn_imm_shift(u_int rd, u_int rn, u_int imm, u_int shift)
874 assert((shift&1)==0);
875 return((rn<<16)|(rd<<12)|(((32-shift)&30)<<7)|imm);
877 u_int genimm(u_int imm,u_int *encoded)
885 *encoded=((i&30)<<7)|imm;
888 imm=(imm>>2)|(imm<<30);i-=2;
892 void genimm_checked(u_int imm,u_int *encoded)
894 u_int ret=genimm(imm,encoded);
897 u_int genjmp(u_int addr)
899 int offset=addr-(int)out-8;
900 if(offset<-33554432||offset>=33554432) {
902 SysPrintf("genjmp: out of range: %08x\n", offset);
907 return ((u_int)offset>>2)&0xffffff;
910 void emit_mov(int rs,int rt)
912 assem_debug("mov %s,%s\n",regname[rt],regname[rs]);
913 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs));
916 void emit_movs(int rs,int rt)
918 assem_debug("movs %s,%s\n",regname[rt],regname[rs]);
919 output_w32(0xe1b00000|rd_rn_rm(rt,0,rs));
922 void emit_add(int rs1,int rs2,int rt)
924 assem_debug("add %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
925 output_w32(0xe0800000|rd_rn_rm(rt,rs1,rs2));
928 void emit_adds(int rs1,int rs2,int rt)
930 assem_debug("adds %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
931 output_w32(0xe0900000|rd_rn_rm(rt,rs1,rs2));
934 void emit_adcs(int rs1,int rs2,int rt)
936 assem_debug("adcs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
937 output_w32(0xe0b00000|rd_rn_rm(rt,rs1,rs2));
940 void emit_sbc(int rs1,int rs2,int rt)
942 assem_debug("sbc %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
943 output_w32(0xe0c00000|rd_rn_rm(rt,rs1,rs2));
946 void emit_sbcs(int rs1,int rs2,int rt)
948 assem_debug("sbcs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
949 output_w32(0xe0d00000|rd_rn_rm(rt,rs1,rs2));
952 void emit_neg(int rs, int rt)
954 assem_debug("rsb %s,%s,#0\n",regname[rt],regname[rs]);
955 output_w32(0xe2600000|rd_rn_rm(rt,rs,0));
958 void emit_negs(int rs, int rt)
960 assem_debug("rsbs %s,%s,#0\n",regname[rt],regname[rs]);
961 output_w32(0xe2700000|rd_rn_rm(rt,rs,0));
964 void emit_sub(int rs1,int rs2,int rt)
966 assem_debug("sub %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
967 output_w32(0xe0400000|rd_rn_rm(rt,rs1,rs2));
970 void emit_subs(int rs1,int rs2,int rt)
972 assem_debug("subs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
973 output_w32(0xe0500000|rd_rn_rm(rt,rs1,rs2));
976 void emit_zeroreg(int rt)
978 assem_debug("mov %s,#0\n",regname[rt]);
979 output_w32(0xe3a00000|rd_rn_rm(rt,0,0));
982 void emit_loadlp(u_int imm,u_int rt)
984 add_literal((int)out,imm);
985 assem_debug("ldr %s,pc+? [=%x]\n",regname[rt],imm);
986 output_w32(0xe5900000|rd_rn_rm(rt,15,0));
988 void emit_movw(u_int imm,u_int rt)
991 assem_debug("movw %s,#%d (0x%x)\n",regname[rt],imm,imm);
992 output_w32(0xe3000000|rd_rn_rm(rt,0,0)|(imm&0xfff)|((imm<<4)&0xf0000));
994 void emit_movt(u_int imm,u_int rt)
996 assem_debug("movt %s,#%d (0x%x)\n",regname[rt],imm&0xffff0000,imm&0xffff0000);
997 output_w32(0xe3400000|rd_rn_rm(rt,0,0)|((imm>>16)&0xfff)|((imm>>12)&0xf0000));
999 void emit_movimm(u_int imm,u_int rt)
1002 if(genimm(imm,&armval)) {
1003 assem_debug("mov %s,#%d\n",regname[rt],imm);
1004 output_w32(0xe3a00000|rd_rn_rm(rt,0,0)|armval);
1005 }else if(genimm(~imm,&armval)) {
1006 assem_debug("mvn %s,#%d\n",regname[rt],imm);
1007 output_w32(0xe3e00000|rd_rn_rm(rt,0,0)|armval);
1008 }else if(imm<65536) {
1010 assem_debug("mov %s,#%d\n",regname[rt],imm&0xFF00);
1011 output_w32(0xe3a00000|rd_rn_imm_shift(rt,0,imm>>8,8));
1012 assem_debug("add %s,%s,#%d\n",regname[rt],regname[rt],imm&0xFF);
1013 output_w32(0xe2800000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
1019 emit_loadlp(imm,rt);
1021 emit_movw(imm&0x0000FFFF,rt);
1022 emit_movt(imm&0xFFFF0000,rt);
1026 void emit_pcreladdr(u_int rt)
1028 assem_debug("add %s,pc,#?\n",regname[rt]);
1029 output_w32(0xe2800000|rd_rn_rm(rt,15,0));
1032 void emit_loadreg(int r, int hr)
1036 SysPrintf("64bit load in 32bit mode!\n");
1044 int addr=((int)reg)+((r&63)<<REG_SHIFT)+((r&64)>>4);
1045 if((r&63)==HIREG) addr=(int)&hi+((r&64)>>4);
1046 if((r&63)==LOREG) addr=(int)&lo+((r&64)>>4);
1047 if(r==CCREG) addr=(int)&cycle_count;
1048 if(r==CSREG) addr=(int)&Status;
1049 if(r==FSREG) addr=(int)&FCR31;
1050 if(r==INVCP) addr=(int)&invc_ptr;
1051 u_int offset = addr-(u_int)&dynarec_local;
1052 assert(offset<4096);
1053 assem_debug("ldr %s,fp+%d\n",regname[hr],offset);
1054 output_w32(0xe5900000|rd_rn_rm(hr,FP,0)|offset);
1057 void emit_storereg(int r, int hr)
1061 SysPrintf("64bit store in 32bit mode!\n");
1066 int addr=((int)reg)+((r&63)<<REG_SHIFT)+((r&64)>>4);
1067 if((r&63)==HIREG) addr=(int)&hi+((r&64)>>4);
1068 if((r&63)==LOREG) addr=(int)&lo+((r&64)>>4);
1069 if(r==CCREG) addr=(int)&cycle_count;
1070 if(r==FSREG) addr=(int)&FCR31;
1071 u_int offset = addr-(u_int)&dynarec_local;
1072 assert(offset<4096);
1073 assem_debug("str %s,fp+%d\n",regname[hr],offset);
1074 output_w32(0xe5800000|rd_rn_rm(hr,FP,0)|offset);
1077 void emit_test(int rs, int rt)
1079 assem_debug("tst %s,%s\n",regname[rs],regname[rt]);
1080 output_w32(0xe1100000|rd_rn_rm(0,rs,rt));
1083 void emit_testimm(int rs,int imm)
1086 assem_debug("tst %s,#%d\n",regname[rs],imm);
1087 genimm_checked(imm,&armval);
1088 output_w32(0xe3100000|rd_rn_rm(0,rs,0)|armval);
1091 void emit_testeqimm(int rs,int imm)
1094 assem_debug("tsteq %s,$%d\n",regname[rs],imm);
1095 genimm_checked(imm,&armval);
1096 output_w32(0x03100000|rd_rn_rm(0,rs,0)|armval);
1099 void emit_not(int rs,int rt)
1101 assem_debug("mvn %s,%s\n",regname[rt],regname[rs]);
1102 output_w32(0xe1e00000|rd_rn_rm(rt,0,rs));
1105 void emit_mvnmi(int rs,int rt)
1107 assem_debug("mvnmi %s,%s\n",regname[rt],regname[rs]);
1108 output_w32(0x41e00000|rd_rn_rm(rt,0,rs));
1111 void emit_and(u_int rs1,u_int rs2,u_int rt)
1113 assem_debug("and %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1114 output_w32(0xe0000000|rd_rn_rm(rt,rs1,rs2));
1117 void emit_or(u_int rs1,u_int rs2,u_int rt)
1119 assem_debug("orr %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1120 output_w32(0xe1800000|rd_rn_rm(rt,rs1,rs2));
1122 void emit_or_and_set_flags(int rs1,int rs2,int rt)
1124 assem_debug("orrs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1125 output_w32(0xe1900000|rd_rn_rm(rt,rs1,rs2));
1128 void emit_orrshl_imm(u_int rs,u_int imm,u_int rt)
1133 assem_debug("orr %s,%s,%s,lsl #%d\n",regname[rt],regname[rt],regname[rs],imm);
1134 output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|(imm<<7));
1137 void emit_orrshr_imm(u_int rs,u_int imm,u_int rt)
1142 assem_debug("orr %s,%s,%s,lsr #%d\n",regname[rt],regname[rt],regname[rs],imm);
1143 output_w32(0xe1800020|rd_rn_rm(rt,rt,rs)|(imm<<7));
1146 void emit_xor(u_int rs1,u_int rs2,u_int rt)
1148 assem_debug("eor %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1149 output_w32(0xe0200000|rd_rn_rm(rt,rs1,rs2));
1152 void emit_addimm(u_int rs,int imm,u_int rt)
1158 if(genimm(imm,&armval)) {
1159 assem_debug("add %s,%s,#%d\n",regname[rt],regname[rs],imm);
1160 output_w32(0xe2800000|rd_rn_rm(rt,rs,0)|armval);
1161 }else if(genimm(-imm,&armval)) {
1162 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rs],-imm);
1163 output_w32(0xe2400000|rd_rn_rm(rt,rs,0)|armval);
1166 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rs],(-imm)&0xFF00);
1167 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rt],(-imm)&0xFF);
1168 output_w32(0xe2400000|rd_rn_imm_shift(rt,rs,(-imm)>>8,8));
1169 output_w32(0xe2400000|rd_rn_imm_shift(rt,rt,(-imm)&0xff,0));
1172 assem_debug("add %s,%s,#%d\n",regname[rt],regname[rs],imm&0xFF00);
1173 assem_debug("add %s,%s,#%d\n",regname[rt],regname[rt],imm&0xFF);
1174 output_w32(0xe2800000|rd_rn_imm_shift(rt,rs,imm>>8,8));
1175 output_w32(0xe2800000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
1178 else if(rs!=rt) emit_mov(rs,rt);
1181 void emit_addimm_and_set_flags(int imm,int rt)
1183 assert(imm>-65536&&imm<65536);
1185 if(genimm(imm,&armval)) {
1186 assem_debug("adds %s,%s,#%d\n",regname[rt],regname[rt],imm);
1187 output_w32(0xe2900000|rd_rn_rm(rt,rt,0)|armval);
1188 }else if(genimm(-imm,&armval)) {
1189 assem_debug("subs %s,%s,#%d\n",regname[rt],regname[rt],imm);
1190 output_w32(0xe2500000|rd_rn_rm(rt,rt,0)|armval);
1192 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rt],(-imm)&0xFF00);
1193 assem_debug("subs %s,%s,#%d\n",regname[rt],regname[rt],(-imm)&0xFF);
1194 output_w32(0xe2400000|rd_rn_imm_shift(rt,rt,(-imm)>>8,8));
1195 output_w32(0xe2500000|rd_rn_imm_shift(rt,rt,(-imm)&0xff,0));
1197 assem_debug("add %s,%s,#%d\n",regname[rt],regname[rt],imm&0xFF00);
1198 assem_debug("adds %s,%s,#%d\n",regname[rt],regname[rt],imm&0xFF);
1199 output_w32(0xe2800000|rd_rn_imm_shift(rt,rt,imm>>8,8));
1200 output_w32(0xe2900000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
1203 void emit_addimm_no_flags(u_int imm,u_int rt)
1205 emit_addimm(rt,imm,rt);
1208 void emit_addnop(u_int r)
1211 assem_debug("add %s,%s,#0 (nop)\n",regname[r],regname[r]);
1212 output_w32(0xe2800000|rd_rn_rm(r,r,0));
1215 void emit_adcimm(u_int rs,int imm,u_int rt)
1218 genimm_checked(imm,&armval);
1219 assem_debug("adc %s,%s,#%d\n",regname[rt],regname[rs],imm);
1220 output_w32(0xe2a00000|rd_rn_rm(rt,rs,0)|armval);
1222 /*void emit_sbcimm(int imm,u_int rt)
1225 genimm_checked(imm,&armval);
1226 assem_debug("sbc %s,%s,#%d\n",regname[rt],regname[rt],imm);
1227 output_w32(0xe2c00000|rd_rn_rm(rt,rt,0)|armval);
1229 void emit_sbbimm(int imm,u_int rt)
1231 assem_debug("sbb $%d,%%%s\n",imm,regname[rt]);
1233 if(imm<128&&imm>=-128) {
1235 output_modrm(3,rt,3);
1241 output_modrm(3,rt,3);
1245 void emit_rscimm(int rs,int imm,u_int rt)
1249 genimm_checked(imm,&armval);
1250 assem_debug("rsc %s,%s,#%d\n",regname[rt],regname[rs],imm);
1251 output_w32(0xe2e00000|rd_rn_rm(rt,rs,0)|armval);
1254 void emit_addimm64_32(int rsh,int rsl,int imm,int rth,int rtl)
1256 // TODO: if(genimm(imm,&armval)) ...
1258 emit_movimm(imm,HOST_TEMPREG);
1259 emit_adds(HOST_TEMPREG,rsl,rtl);
1260 emit_adcimm(rsh,0,rth);
1263 void emit_sbb(int rs1,int rs2)
1265 assem_debug("sbb %%%s,%%%s\n",regname[rs2],regname[rs1]);
1267 output_modrm(3,rs1,rs2);
1270 void emit_andimm(int rs,int imm,int rt)
1275 }else if(genimm(imm,&armval)) {
1276 assem_debug("and %s,%s,#%d\n",regname[rt],regname[rs],imm);
1277 output_w32(0xe2000000|rd_rn_rm(rt,rs,0)|armval);
1278 }else if(genimm(~imm,&armval)) {
1279 assem_debug("bic %s,%s,#%d\n",regname[rt],regname[rs],imm);
1280 output_w32(0xe3c00000|rd_rn_rm(rt,rs,0)|armval);
1281 }else if(imm==65535) {
1283 assem_debug("bic %s,%s,#FF000000\n",regname[rt],regname[rs]);
1284 output_w32(0xe3c00000|rd_rn_rm(rt,rs,0)|0x4FF);
1285 assem_debug("bic %s,%s,#00FF0000\n",regname[rt],regname[rt]);
1286 output_w32(0xe3c00000|rd_rn_rm(rt,rt,0)|0x8FF);
1288 assem_debug("uxth %s,%s\n",regname[rt],regname[rs]);
1289 output_w32(0xe6ff0070|rd_rn_rm(rt,0,rs));
1292 assert(imm>0&&imm<65535);
1294 assem_debug("mov r14,#%d\n",imm&0xFF00);
1295 output_w32(0xe3a00000|rd_rn_imm_shift(HOST_TEMPREG,0,imm>>8,8));
1296 assem_debug("add r14,r14,#%d\n",imm&0xFF);
1297 output_w32(0xe2800000|rd_rn_imm_shift(HOST_TEMPREG,HOST_TEMPREG,imm&0xff,0));
1299 emit_movw(imm,HOST_TEMPREG);
1301 assem_debug("and %s,%s,r14\n",regname[rt],regname[rs]);
1302 output_w32(0xe0000000|rd_rn_rm(rt,rs,HOST_TEMPREG));
1306 void emit_orimm(int rs,int imm,int rt)
1310 if(rs!=rt) emit_mov(rs,rt);
1311 }else if(genimm(imm,&armval)) {
1312 assem_debug("orr %s,%s,#%d\n",regname[rt],regname[rs],imm);
1313 output_w32(0xe3800000|rd_rn_rm(rt,rs,0)|armval);
1315 assert(imm>0&&imm<65536);
1316 assem_debug("orr %s,%s,#%d\n",regname[rt],regname[rs],imm&0xFF00);
1317 assem_debug("orr %s,%s,#%d\n",regname[rt],regname[rs],imm&0xFF);
1318 output_w32(0xe3800000|rd_rn_imm_shift(rt,rs,imm>>8,8));
1319 output_w32(0xe3800000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
1323 void emit_xorimm(int rs,int imm,int rt)
1327 if(rs!=rt) emit_mov(rs,rt);
1328 }else if(genimm(imm,&armval)) {
1329 assem_debug("eor %s,%s,#%d\n",regname[rt],regname[rs],imm);
1330 output_w32(0xe2200000|rd_rn_rm(rt,rs,0)|armval);
1332 assert(imm>0&&imm<65536);
1333 assem_debug("eor %s,%s,#%d\n",regname[rt],regname[rs],imm&0xFF00);
1334 assem_debug("eor %s,%s,#%d\n",regname[rt],regname[rs],imm&0xFF);
1335 output_w32(0xe2200000|rd_rn_imm_shift(rt,rs,imm>>8,8));
1336 output_w32(0xe2200000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
1340 void emit_shlimm(int rs,u_int imm,int rt)
1345 assem_debug("lsl %s,%s,#%d\n",regname[rt],regname[rs],imm);
1346 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|(imm<<7));
1349 void emit_lsls_imm(int rs,int imm,int rt)
1353 assem_debug("lsls %s,%s,#%d\n",regname[rt],regname[rs],imm);
1354 output_w32(0xe1b00000|rd_rn_rm(rt,0,rs)|(imm<<7));
1357 void emit_lslpls_imm(int rs,int imm,int rt)
1361 assem_debug("lslpls %s,%s,#%d\n",regname[rt],regname[rs],imm);
1362 output_w32(0x51b00000|rd_rn_rm(rt,0,rs)|(imm<<7));
1365 void emit_shrimm(int rs,u_int imm,int rt)
1369 assem_debug("lsr %s,%s,#%d\n",regname[rt],regname[rs],imm);
1370 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x20|(imm<<7));
1373 void emit_sarimm(int rs,u_int imm,int rt)
1377 assem_debug("asr %s,%s,#%d\n",regname[rt],regname[rs],imm);
1378 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x40|(imm<<7));
1381 void emit_rorimm(int rs,u_int imm,int rt)
1385 assem_debug("ror %s,%s,#%d\n",regname[rt],regname[rs],imm);
1386 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x60|(imm<<7));
1389 void emit_shldimm(int rs,int rs2,u_int imm,int rt)
1391 assem_debug("shld %%%s,%%%s,%d\n",regname[rt],regname[rs2],imm);
1395 assem_debug("lsl %s,%s,#%d\n",regname[rt],regname[rs],imm);
1396 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|(imm<<7));
1397 assem_debug("orr %s,%s,%s,lsr #%d\n",regname[rt],regname[rt],regname[rs2],32-imm);
1398 output_w32(0xe1800020|rd_rn_rm(rt,rt,rs2)|((32-imm)<<7));
1401 void emit_shrdimm(int rs,int rs2,u_int imm,int rt)
1403 assem_debug("shrd %%%s,%%%s,%d\n",regname[rt],regname[rs2],imm);
1407 assem_debug("lsr %s,%s,#%d\n",regname[rt],regname[rs],imm);
1408 output_w32(0xe1a00020|rd_rn_rm(rt,0,rs)|(imm<<7));
1409 assem_debug("orr %s,%s,%s,lsl #%d\n",regname[rt],regname[rt],regname[rs2],32-imm);
1410 output_w32(0xe1800000|rd_rn_rm(rt,rt,rs2)|((32-imm)<<7));
1413 void emit_signextend16(int rs,int rt)
1416 emit_shlimm(rs,16,rt);
1417 emit_sarimm(rt,16,rt);
1419 assem_debug("sxth %s,%s\n",regname[rt],regname[rs]);
1420 output_w32(0xe6bf0070|rd_rn_rm(rt,0,rs));
1424 void emit_signextend8(int rs,int rt)
1427 emit_shlimm(rs,24,rt);
1428 emit_sarimm(rt,24,rt);
1430 assem_debug("sxtb %s,%s\n",regname[rt],regname[rs]);
1431 output_w32(0xe6af0070|rd_rn_rm(rt,0,rs));
1435 void emit_shl(u_int rs,u_int shift,u_int rt)
1441 assem_debug("lsl %s,%s,%s\n",regname[rt],regname[rs],regname[shift]);
1442 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x10|(shift<<8));
1444 void emit_shr(u_int rs,u_int shift,u_int rt)
1449 assem_debug("lsr %s,%s,%s\n",regname[rt],regname[rs],regname[shift]);
1450 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x30|(shift<<8));
1452 void emit_sar(u_int rs,u_int shift,u_int rt)
1457 assem_debug("asr %s,%s,%s\n",regname[rt],regname[rs],regname[shift]);
1458 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x50|(shift<<8));
1460 void emit_shlcl(int r)
1462 assem_debug("shl %%%s,%%cl\n",regname[r]);
1465 void emit_shrcl(int r)
1467 assem_debug("shr %%%s,%%cl\n",regname[r]);
1470 void emit_sarcl(int r)
1472 assem_debug("sar %%%s,%%cl\n",regname[r]);
1476 void emit_shldcl(int r1,int r2)
1478 assem_debug("shld %%%s,%%%s,%%cl\n",regname[r1],regname[r2]);
1481 void emit_shrdcl(int r1,int r2)
1483 assem_debug("shrd %%%s,%%%s,%%cl\n",regname[r1],regname[r2]);
1486 void emit_orrshl(u_int rs,u_int shift,u_int rt)
1491 assem_debug("orr %s,%s,%s,lsl %s\n",regname[rt],regname[rt],regname[rs],regname[shift]);
1492 output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|0x10|(shift<<8));
1494 void emit_orrshr(u_int rs,u_int shift,u_int rt)
1499 assem_debug("orr %s,%s,%s,lsr %s\n",regname[rt],regname[rt],regname[rs],regname[shift]);
1500 output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|0x30|(shift<<8));
1503 void emit_cmpimm(int rs,int imm)
1506 if(genimm(imm,&armval)) {
1507 assem_debug("cmp %s,#%d\n",regname[rs],imm);
1508 output_w32(0xe3500000|rd_rn_rm(0,rs,0)|armval);
1509 }else if(genimm(-imm,&armval)) {
1510 assem_debug("cmn %s,#%d\n",regname[rs],imm);
1511 output_w32(0xe3700000|rd_rn_rm(0,rs,0)|armval);
1514 emit_movimm(imm,HOST_TEMPREG);
1515 assem_debug("cmp %s,r14\n",regname[rs]);
1516 output_w32(0xe1500000|rd_rn_rm(0,rs,HOST_TEMPREG));
1519 emit_movimm(-imm,HOST_TEMPREG);
1520 assem_debug("cmn %s,r14\n",regname[rs]);
1521 output_w32(0xe1700000|rd_rn_rm(0,rs,HOST_TEMPREG));
1525 void emit_cmovne(u_int *addr,int rt)
1527 assem_debug("cmovne %x,%%%s",(int)addr,regname[rt]);
1530 void emit_cmovl(u_int *addr,int rt)
1532 assem_debug("cmovl %x,%%%s",(int)addr,regname[rt]);
1535 void emit_cmovs(u_int *addr,int rt)
1537 assem_debug("cmovs %x,%%%s",(int)addr,regname[rt]);
1540 void emit_cmovne_imm(int imm,int rt)
1542 assem_debug("movne %s,#%d\n",regname[rt],imm);
1544 genimm_checked(imm,&armval);
1545 output_w32(0x13a00000|rd_rn_rm(rt,0,0)|armval);
1547 void emit_cmovl_imm(int imm,int rt)
1549 assem_debug("movlt %s,#%d\n",regname[rt],imm);
1551 genimm_checked(imm,&armval);
1552 output_w32(0xb3a00000|rd_rn_rm(rt,0,0)|armval);
1554 void emit_cmovb_imm(int imm,int rt)
1556 assem_debug("movcc %s,#%d\n",regname[rt],imm);
1558 genimm_checked(imm,&armval);
1559 output_w32(0x33a00000|rd_rn_rm(rt,0,0)|armval);
1561 void emit_cmovs_imm(int imm,int rt)
1563 assem_debug("movmi %s,#%d\n",regname[rt],imm);
1565 genimm_checked(imm,&armval);
1566 output_w32(0x43a00000|rd_rn_rm(rt,0,0)|armval);
1568 void emit_cmove_reg(int rs,int rt)
1570 assem_debug("moveq %s,%s\n",regname[rt],regname[rs]);
1571 output_w32(0x01a00000|rd_rn_rm(rt,0,rs));
1573 void emit_cmovne_reg(int rs,int rt)
1575 assem_debug("movne %s,%s\n",regname[rt],regname[rs]);
1576 output_w32(0x11a00000|rd_rn_rm(rt,0,rs));
1578 void emit_cmovl_reg(int rs,int rt)
1580 assem_debug("movlt %s,%s\n",regname[rt],regname[rs]);
1581 output_w32(0xb1a00000|rd_rn_rm(rt,0,rs));
1583 void emit_cmovs_reg(int rs,int rt)
1585 assem_debug("movmi %s,%s\n",regname[rt],regname[rs]);
1586 output_w32(0x41a00000|rd_rn_rm(rt,0,rs));
1589 void emit_slti32(int rs,int imm,int rt)
1591 if(rs!=rt) emit_zeroreg(rt);
1592 emit_cmpimm(rs,imm);
1593 if(rs==rt) emit_movimm(0,rt);
1594 emit_cmovl_imm(1,rt);
1596 void emit_sltiu32(int rs,int imm,int rt)
1598 if(rs!=rt) emit_zeroreg(rt);
1599 emit_cmpimm(rs,imm);
1600 if(rs==rt) emit_movimm(0,rt);
1601 emit_cmovb_imm(1,rt);
1603 void emit_slti64_32(int rsh,int rsl,int imm,int rt)
1606 emit_slti32(rsl,imm,rt);
1610 emit_cmovne_imm(0,rt);
1611 emit_cmovs_imm(1,rt);
1615 emit_cmpimm(rsh,-1);
1616 emit_cmovne_imm(0,rt);
1617 emit_cmovl_imm(1,rt);
1620 void emit_sltiu64_32(int rsh,int rsl,int imm,int rt)
1623 emit_sltiu32(rsl,imm,rt);
1627 emit_cmovne_imm(0,rt);
1631 emit_cmpimm(rsh,-1);
1632 emit_cmovne_imm(1,rt);
1636 void emit_cmp(int rs,int rt)
1638 assem_debug("cmp %s,%s\n",regname[rs],regname[rt]);
1639 output_w32(0xe1500000|rd_rn_rm(0,rs,rt));
1641 void emit_set_gz32(int rs, int rt)
1643 //assem_debug("set_gz32\n");
1646 emit_cmovl_imm(0,rt);
1648 void emit_set_nz32(int rs, int rt)
1650 //assem_debug("set_nz32\n");
1651 if(rs!=rt) emit_movs(rs,rt);
1652 else emit_test(rs,rs);
1653 emit_cmovne_imm(1,rt);
1655 void emit_set_gz64_32(int rsh, int rsl, int rt)
1657 //assem_debug("set_gz64\n");
1658 emit_set_gz32(rsl,rt);
1660 emit_cmovne_imm(1,rt);
1661 emit_cmovs_imm(0,rt);
1663 void emit_set_nz64_32(int rsh, int rsl, int rt)
1665 //assem_debug("set_nz64\n");
1666 emit_or_and_set_flags(rsh,rsl,rt);
1667 emit_cmovne_imm(1,rt);
1669 void emit_set_if_less32(int rs1, int rs2, int rt)
1671 //assem_debug("set if less (%%%s,%%%s),%%%s\n",regname[rs1],regname[rs2],regname[rt]);
1672 if(rs1!=rt&&rs2!=rt) emit_zeroreg(rt);
1674 if(rs1==rt||rs2==rt) emit_movimm(0,rt);
1675 emit_cmovl_imm(1,rt);
1677 void emit_set_if_carry32(int rs1, int rs2, int rt)
1679 //assem_debug("set if carry (%%%s,%%%s),%%%s\n",regname[rs1],regname[rs2],regname[rt]);
1680 if(rs1!=rt&&rs2!=rt) emit_zeroreg(rt);
1682 if(rs1==rt||rs2==rt) emit_movimm(0,rt);
1683 emit_cmovb_imm(1,rt);
1685 void emit_set_if_less64_32(int u1, int l1, int u2, int l2, int rt)
1687 //assem_debug("set if less64 (%%%s,%%%s,%%%s,%%%s),%%%s\n",regname[u1],regname[l1],regname[u2],regname[l2],regname[rt]);
1692 emit_sbcs(u1,u2,HOST_TEMPREG);
1693 emit_cmovl_imm(1,rt);
1695 void emit_set_if_carry64_32(int u1, int l1, int u2, int l2, int rt)
1697 //assem_debug("set if carry64 (%%%s,%%%s,%%%s,%%%s),%%%s\n",regname[u1],regname[l1],regname[u2],regname[l2],regname[rt]);
1702 emit_sbcs(u1,u2,HOST_TEMPREG);
1703 emit_cmovb_imm(1,rt);
1706 void emit_call(int a)
1708 assem_debug("bl %x (%x+%x)\n",a,(int)out,a-(int)out-8);
1709 u_int offset=genjmp(a);
1710 output_w32(0xeb000000|offset);
1712 void emit_jmp(int a)
1714 assem_debug("b %x (%x+%x)\n",a,(int)out,a-(int)out-8);
1715 u_int offset=genjmp(a);
1716 output_w32(0xea000000|offset);
1718 void emit_jne(int a)
1720 assem_debug("bne %x\n",a);
1721 u_int offset=genjmp(a);
1722 output_w32(0x1a000000|offset);
1724 void emit_jeq(int a)
1726 assem_debug("beq %x\n",a);
1727 u_int offset=genjmp(a);
1728 output_w32(0x0a000000|offset);
1732 assem_debug("bmi %x\n",a);
1733 u_int offset=genjmp(a);
1734 output_w32(0x4a000000|offset);
1736 void emit_jns(int a)
1738 assem_debug("bpl %x\n",a);
1739 u_int offset=genjmp(a);
1740 output_w32(0x5a000000|offset);
1744 assem_debug("blt %x\n",a);
1745 u_int offset=genjmp(a);
1746 output_w32(0xba000000|offset);
1748 void emit_jge(int a)
1750 assem_debug("bge %x\n",a);
1751 u_int offset=genjmp(a);
1752 output_w32(0xaa000000|offset);
1754 void emit_jno(int a)
1756 assem_debug("bvc %x\n",a);
1757 u_int offset=genjmp(a);
1758 output_w32(0x7a000000|offset);
1762 assem_debug("bcs %x\n",a);
1763 u_int offset=genjmp(a);
1764 output_w32(0x2a000000|offset);
1766 void emit_jcc(int a)
1768 assem_debug("bcc %x\n",a);
1769 u_int offset=genjmp(a);
1770 output_w32(0x3a000000|offset);
1773 void emit_pushimm(int imm)
1775 assem_debug("push $%x\n",imm);
1780 assem_debug("pusha\n");
1785 assem_debug("popa\n");
1788 void emit_pushreg(u_int r)
1790 assem_debug("push %%%s\n",regname[r]);
1793 void emit_popreg(u_int r)
1795 assem_debug("pop %%%s\n",regname[r]);
1798 void emit_callreg(u_int r)
1801 assem_debug("blx %s\n",regname[r]);
1802 output_w32(0xe12fff30|r);
1804 void emit_jmpreg(u_int r)
1806 assem_debug("mov pc,%s\n",regname[r]);
1807 output_w32(0xe1a00000|rd_rn_rm(15,0,r));
1810 void emit_readword_indexed(int offset, int rs, int rt)
1812 assert(offset>-4096&&offset<4096);
1813 assem_debug("ldr %s,%s+%d\n",regname[rt],regname[rs],offset);
1815 output_w32(0xe5900000|rd_rn_rm(rt,rs,0)|offset);
1817 output_w32(0xe5100000|rd_rn_rm(rt,rs,0)|(-offset));
1820 void emit_readword_dualindexedx4(int rs1, int rs2, int rt)
1822 assem_debug("ldr %s,%s,%s lsl #2\n",regname[rt],regname[rs1],regname[rs2]);
1823 output_w32(0xe7900000|rd_rn_rm(rt,rs1,rs2)|0x100);
1825 void emit_ldrcc_dualindexed(int rs1, int rs2, int rt)
1827 assem_debug("ldrcc %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1828 output_w32(0x37900000|rd_rn_rm(rt,rs1,rs2));
1830 void emit_ldrccb_dualindexed(int rs1, int rs2, int rt)
1832 assem_debug("ldrccb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1833 output_w32(0x37d00000|rd_rn_rm(rt,rs1,rs2));
1835 void emit_ldrccsb_dualindexed(int rs1, int rs2, int rt)
1837 assem_debug("ldrccsb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1838 output_w32(0x319000d0|rd_rn_rm(rt,rs1,rs2));
1840 void emit_ldrcch_dualindexed(int rs1, int rs2, int rt)
1842 assem_debug("ldrcch %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1843 output_w32(0x319000b0|rd_rn_rm(rt,rs1,rs2));
1845 void emit_ldrccsh_dualindexed(int rs1, int rs2, int rt)
1847 assem_debug("ldrccsh %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1848 output_w32(0x319000f0|rd_rn_rm(rt,rs1,rs2));
1850 void emit_readword_indexed_tlb(int addr, int rs, int map, int rt)
1852 if(map<0) emit_readword_indexed(addr, rs, rt);
1855 emit_readword_dualindexedx4(rs, map, rt);
1858 void emit_readdword_indexed_tlb(int addr, int rs, int map, int rh, int rl)
1861 if(rh>=0) emit_readword_indexed(addr, rs, rh);
1862 emit_readword_indexed(addr+4, rs, rl);
1865 if(rh>=0) emit_readword_indexed_tlb(addr, rs, map, rh);
1866 emit_addimm(map,1,map);
1867 emit_readword_indexed_tlb(addr, rs, map, rl);
1870 void emit_movsbl_indexed(int offset, int rs, int rt)
1872 assert(offset>-256&&offset<256);
1873 assem_debug("ldrsb %s,%s+%d\n",regname[rt],regname[rs],offset);
1875 output_w32(0xe1d000d0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1877 output_w32(0xe15000d0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1880 void emit_movsbl_indexed_tlb(int addr, int rs, int map, int rt)
1882 if(map<0) emit_movsbl_indexed(addr, rs, rt);
1885 emit_shlimm(map,2,map);
1886 assem_debug("ldrsb %s,%s+%s\n",regname[rt],regname[rs],regname[map]);
1887 output_w32(0xe19000d0|rd_rn_rm(rt,rs,map));
1889 assert(addr>-256&&addr<256);
1890 assem_debug("add %s,%s,%s,lsl #2\n",regname[rt],regname[rs],regname[map]);
1891 output_w32(0xe0800000|rd_rn_rm(rt,rs,map)|(2<<7));
1892 emit_movsbl_indexed(addr, rt, rt);
1896 void emit_movswl_indexed(int offset, int rs, int rt)
1898 assert(offset>-256&&offset<256);
1899 assem_debug("ldrsh %s,%s+%d\n",regname[rt],regname[rs],offset);
1901 output_w32(0xe1d000f0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1903 output_w32(0xe15000f0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1906 void emit_movzbl_indexed(int offset, int rs, int rt)
1908 assert(offset>-4096&&offset<4096);
1909 assem_debug("ldrb %s,%s+%d\n",regname[rt],regname[rs],offset);
1911 output_w32(0xe5d00000|rd_rn_rm(rt,rs,0)|offset);
1913 output_w32(0xe5500000|rd_rn_rm(rt,rs,0)|(-offset));
1916 void emit_movzbl_dualindexedx4(int rs1, int rs2, int rt)
1918 assem_debug("ldrb %s,%s,%s lsl #2\n",regname[rt],regname[rs1],regname[rs2]);
1919 output_w32(0xe7d00000|rd_rn_rm(rt,rs1,rs2)|0x100);
1921 void emit_movzbl_indexed_tlb(int addr, int rs, int map, int rt)
1923 if(map<0) emit_movzbl_indexed(addr, rs, rt);
1926 emit_movzbl_dualindexedx4(rs, map, rt);
1928 emit_addimm(rs,addr,rt);
1929 emit_movzbl_dualindexedx4(rt, map, rt);
1933 void emit_movzwl_indexed(int offset, int rs, int rt)
1935 assert(offset>-256&&offset<256);
1936 assem_debug("ldrh %s,%s+%d\n",regname[rt],regname[rs],offset);
1938 output_w32(0xe1d000b0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1940 output_w32(0xe15000b0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1943 static void emit_ldrd(int offset, int rs, int rt)
1945 assert(offset>-256&&offset<256);
1946 assem_debug("ldrd %s,%s+%d\n",regname[rt],regname[rs],offset);
1948 output_w32(0xe1c000d0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1950 output_w32(0xe14000d0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1953 void emit_readword(int addr, int rt)
1955 u_int offset = addr-(u_int)&dynarec_local;
1956 assert(offset<4096);
1957 assem_debug("ldr %s,fp+%d\n",regname[rt],offset);
1958 output_w32(0xe5900000|rd_rn_rm(rt,FP,0)|offset);
1960 void emit_movsbl(int addr, int rt)
1962 u_int offset = addr-(u_int)&dynarec_local;
1964 assem_debug("ldrsb %s,fp+%d\n",regname[rt],offset);
1965 output_w32(0xe1d000d0|rd_rn_rm(rt,FP,0)|((offset<<4)&0xf00)|(offset&0xf));
1967 void emit_movswl(int addr, int rt)
1969 u_int offset = addr-(u_int)&dynarec_local;
1971 assem_debug("ldrsh %s,fp+%d\n",regname[rt],offset);
1972 output_w32(0xe1d000f0|rd_rn_rm(rt,FP,0)|((offset<<4)&0xf00)|(offset&0xf));
1974 void emit_movzbl(int addr, int rt)
1976 u_int offset = addr-(u_int)&dynarec_local;
1977 assert(offset<4096);
1978 assem_debug("ldrb %s,fp+%d\n",regname[rt],offset);
1979 output_w32(0xe5d00000|rd_rn_rm(rt,FP,0)|offset);
1981 void emit_movzwl(int addr, int rt)
1983 u_int offset = addr-(u_int)&dynarec_local;
1985 assem_debug("ldrh %s,fp+%d\n",regname[rt],offset);
1986 output_w32(0xe1d000b0|rd_rn_rm(rt,FP,0)|((offset<<4)&0xf00)|(offset&0xf));
1988 void emit_movzwl_reg(int rs, int rt)
1990 assem_debug("movzwl %%%s,%%%s\n",regname[rs]+1,regname[rt]);
1994 void emit_xchg(int rs, int rt)
1996 assem_debug("xchg %%%s,%%%s\n",regname[rs],regname[rt]);
1999 void emit_writeword_indexed(int rt, int offset, int rs)
2001 assert(offset>-4096&&offset<4096);
2002 assem_debug("str %s,%s+%d\n",regname[rt],regname[rs],offset);
2004 output_w32(0xe5800000|rd_rn_rm(rt,rs,0)|offset);
2006 output_w32(0xe5000000|rd_rn_rm(rt,rs,0)|(-offset));
2009 void emit_writeword_dualindexedx4(int rt, int rs1, int rs2)
2011 assem_debug("str %s,%s,%s lsl #2\n",regname[rt],regname[rs1],regname[rs2]);
2012 output_w32(0xe7800000|rd_rn_rm(rt,rs1,rs2)|0x100);
2014 void emit_writeword_indexed_tlb(int rt, int addr, int rs, int map, int temp)
2016 if(map<0) emit_writeword_indexed(rt, addr, rs);
2019 emit_writeword_dualindexedx4(rt, rs, map);
2022 void emit_writedword_indexed_tlb(int rh, int rl, int addr, int rs, int map, int temp)
2025 if(rh>=0) emit_writeword_indexed(rh, addr, rs);
2026 emit_writeword_indexed(rl, addr+4, rs);
2029 if(temp!=rs) emit_addimm(map,1,temp);
2030 emit_writeword_indexed_tlb(rh, addr, rs, map, temp);
2031 if(temp!=rs) emit_writeword_indexed_tlb(rl, addr, rs, temp, temp);
2033 emit_addimm(rs,4,rs);
2034 emit_writeword_indexed_tlb(rl, addr, rs, map, temp);
2038 void emit_writehword_indexed(int rt, int offset, int rs)
2040 assert(offset>-256&&offset<256);
2041 assem_debug("strh %s,%s+%d\n",regname[rt],regname[rs],offset);
2043 output_w32(0xe1c000b0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
2045 output_w32(0xe14000b0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
2048 void emit_writebyte_indexed(int rt, int offset, int rs)
2050 assert(offset>-4096&&offset<4096);
2051 assem_debug("strb %s,%s+%d\n",regname[rt],regname[rs],offset);
2053 output_w32(0xe5c00000|rd_rn_rm(rt,rs,0)|offset);
2055 output_w32(0xe5400000|rd_rn_rm(rt,rs,0)|(-offset));
2058 void emit_writebyte_dualindexedx4(int rt, int rs1, int rs2)
2060 assem_debug("strb %s,%s,%s lsl #2\n",regname[rt],regname[rs1],regname[rs2]);
2061 output_w32(0xe7c00000|rd_rn_rm(rt,rs1,rs2)|0x100);
2063 void emit_writebyte_indexed_tlb(int rt, int addr, int rs, int map, int temp)
2065 if(map<0) emit_writebyte_indexed(rt, addr, rs);
2068 emit_writebyte_dualindexedx4(rt, rs, map);
2070 emit_addimm(rs,addr,temp);
2071 emit_writebyte_dualindexedx4(rt, temp, map);
2075 void emit_strcc_dualindexed(int rs1, int rs2, int rt)
2077 assem_debug("strcc %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
2078 output_w32(0x37800000|rd_rn_rm(rt,rs1,rs2));
2080 void emit_strccb_dualindexed(int rs1, int rs2, int rt)
2082 assem_debug("strccb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
2083 output_w32(0x37c00000|rd_rn_rm(rt,rs1,rs2));
2085 void emit_strcch_dualindexed(int rs1, int rs2, int rt)
2087 assem_debug("strcch %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
2088 output_w32(0x318000b0|rd_rn_rm(rt,rs1,rs2));
2090 void emit_writeword(int rt, int addr)
2092 u_int offset = addr-(u_int)&dynarec_local;
2093 assert(offset<4096);
2094 assem_debug("str %s,fp+%d\n",regname[rt],offset);
2095 output_w32(0xe5800000|rd_rn_rm(rt,FP,0)|offset);
2097 void emit_writehword(int rt, int addr)
2099 u_int offset = addr-(u_int)&dynarec_local;
2101 assem_debug("strh %s,fp+%d\n",regname[rt],offset);
2102 output_w32(0xe1c000b0|rd_rn_rm(rt,FP,0)|((offset<<4)&0xf00)|(offset&0xf));
2104 void emit_writebyte(int rt, int addr)
2106 u_int offset = addr-(u_int)&dynarec_local;
2107 assert(offset<4096);
2108 assem_debug("strb %s,fp+%d\n",regname[rt],offset);
2109 output_w32(0xe5c00000|rd_rn_rm(rt,FP,0)|offset);
2111 void emit_writeword_imm(int imm, int addr)
2113 assem_debug("movl $%x,%x\n",imm,addr);
2116 void emit_writebyte_imm(int imm, int addr)
2118 assem_debug("movb $%x,%x\n",imm,addr);
2122 void emit_mul(int rs)
2124 assem_debug("mul %%%s\n",regname[rs]);
2127 void emit_imul(int rs)
2129 assem_debug("imul %%%s\n",regname[rs]);
2132 void emit_umull(u_int rs1, u_int rs2, u_int hi, u_int lo)
2134 assem_debug("umull %s, %s, %s, %s\n",regname[lo],regname[hi],regname[rs1],regname[rs2]);
2139 output_w32(0xe0800090|(hi<<16)|(lo<<12)|(rs2<<8)|rs1);
2141 void emit_smull(u_int rs1, u_int rs2, u_int hi, u_int lo)
2143 assem_debug("smull %s, %s, %s, %s\n",regname[lo],regname[hi],regname[rs1],regname[rs2]);
2148 output_w32(0xe0c00090|(hi<<16)|(lo<<12)|(rs2<<8)|rs1);
2151 void emit_div(int rs)
2153 assem_debug("div %%%s\n",regname[rs]);
2156 void emit_idiv(int rs)
2158 assem_debug("idiv %%%s\n",regname[rs]);
2163 assem_debug("cdq\n");
2167 void emit_clz(int rs,int rt)
2169 assem_debug("clz %s,%s\n",regname[rt],regname[rs]);
2170 output_w32(0xe16f0f10|rd_rn_rm(rt,0,rs));
2173 void emit_subcs(int rs1,int rs2,int rt)
2175 assem_debug("subcs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
2176 output_w32(0x20400000|rd_rn_rm(rt,rs1,rs2));
2179 void emit_shrcc_imm(int rs,u_int imm,int rt)
2183 assem_debug("lsrcc %s,%s,#%d\n",regname[rt],regname[rs],imm);
2184 output_w32(0x31a00000|rd_rn_rm(rt,0,rs)|0x20|(imm<<7));
2187 void emit_shrne_imm(int rs,u_int imm,int rt)
2191 assem_debug("lsrne %s,%s,#%d\n",regname[rt],regname[rs],imm);
2192 output_w32(0x11a00000|rd_rn_rm(rt,0,rs)|0x20|(imm<<7));
2195 void emit_negmi(int rs, int rt)
2197 assem_debug("rsbmi %s,%s,#0\n",regname[rt],regname[rs]);
2198 output_w32(0x42600000|rd_rn_rm(rt,rs,0));
2201 void emit_negsmi(int rs, int rt)
2203 assem_debug("rsbsmi %s,%s,#0\n",regname[rt],regname[rs]);
2204 output_w32(0x42700000|rd_rn_rm(rt,rs,0));
2207 void emit_orreq(u_int rs1,u_int rs2,u_int rt)
2209 assem_debug("orreq %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
2210 output_w32(0x01800000|rd_rn_rm(rt,rs1,rs2));
2213 void emit_orrne(u_int rs1,u_int rs2,u_int rt)
2215 assem_debug("orrne %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
2216 output_w32(0x11800000|rd_rn_rm(rt,rs1,rs2));
2219 void emit_bic_lsl(u_int rs1,u_int rs2,u_int shift,u_int rt)
2221 assem_debug("bic %s,%s,%s lsl %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
2222 output_w32(0xe1C00000|rd_rn_rm(rt,rs1,rs2)|0x10|(shift<<8));
2225 void emit_biceq_lsl(u_int rs1,u_int rs2,u_int shift,u_int rt)
2227 assem_debug("biceq %s,%s,%s lsl %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
2228 output_w32(0x01C00000|rd_rn_rm(rt,rs1,rs2)|0x10|(shift<<8));
2231 void emit_bicne_lsl(u_int rs1,u_int rs2,u_int shift,u_int rt)
2233 assem_debug("bicne %s,%s,%s lsl %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
2234 output_w32(0x11C00000|rd_rn_rm(rt,rs1,rs2)|0x10|(shift<<8));
2237 void emit_bic_lsr(u_int rs1,u_int rs2,u_int shift,u_int rt)
2239 assem_debug("bic %s,%s,%s lsr %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
2240 output_w32(0xe1C00000|rd_rn_rm(rt,rs1,rs2)|0x30|(shift<<8));
2243 void emit_biceq_lsr(u_int rs1,u_int rs2,u_int shift,u_int rt)
2245 assem_debug("biceq %s,%s,%s lsr %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
2246 output_w32(0x01C00000|rd_rn_rm(rt,rs1,rs2)|0x30|(shift<<8));
2249 void emit_bicne_lsr(u_int rs1,u_int rs2,u_int shift,u_int rt)
2251 assem_debug("bicne %s,%s,%s lsr %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
2252 output_w32(0x11C00000|rd_rn_rm(rt,rs1,rs2)|0x30|(shift<<8));
2255 void emit_teq(int rs, int rt)
2257 assem_debug("teq %s,%s\n",regname[rs],regname[rt]);
2258 output_w32(0xe1300000|rd_rn_rm(0,rs,rt));
2261 void emit_rsbimm(int rs, int imm, int rt)
2264 genimm_checked(imm,&armval);
2265 assem_debug("rsb %s,%s,#%d\n",regname[rt],regname[rs],imm);
2266 output_w32(0xe2600000|rd_rn_rm(rt,rs,0)|armval);
2269 // Load 2 immediates optimizing for small code size
2270 void emit_mov2imm_compact(int imm1,u_int rt1,int imm2,u_int rt2)
2272 emit_movimm(imm1,rt1);
2274 if(genimm(imm2-imm1,&armval)) {
2275 assem_debug("add %s,%s,#%d\n",regname[rt2],regname[rt1],imm2-imm1);
2276 output_w32(0xe2800000|rd_rn_rm(rt2,rt1,0)|armval);
2277 }else if(genimm(imm1-imm2,&armval)) {
2278 assem_debug("sub %s,%s,#%d\n",regname[rt2],regname[rt1],imm1-imm2);
2279 output_w32(0xe2400000|rd_rn_rm(rt2,rt1,0)|armval);
2281 else emit_movimm(imm2,rt2);
2284 // Conditionally select one of two immediates, optimizing for small code size
2285 // This will only be called if HAVE_CMOV_IMM is defined
2286 void emit_cmov2imm_e_ne_compact(int imm1,int imm2,u_int rt)
2289 if(genimm(imm2-imm1,&armval)) {
2290 emit_movimm(imm1,rt);
2291 assem_debug("addne %s,%s,#%d\n",regname[rt],regname[rt],imm2-imm1);
2292 output_w32(0x12800000|rd_rn_rm(rt,rt,0)|armval);
2293 }else if(genimm(imm1-imm2,&armval)) {
2294 emit_movimm(imm1,rt);
2295 assem_debug("subne %s,%s,#%d\n",regname[rt],regname[rt],imm1-imm2);
2296 output_w32(0x12400000|rd_rn_rm(rt,rt,0)|armval);
2300 emit_movimm(imm1,rt);
2301 add_literal((int)out,imm2);
2302 assem_debug("ldrne %s,pc+? [=%x]\n",regname[rt],imm2);
2303 output_w32(0x15900000|rd_rn_rm(rt,15,0));
2305 emit_movw(imm1&0x0000FFFF,rt);
2306 if((imm1&0xFFFF)!=(imm2&0xFFFF)) {
2307 assem_debug("movwne %s,#%d (0x%x)\n",regname[rt],imm2&0xFFFF,imm2&0xFFFF);
2308 output_w32(0x13000000|rd_rn_rm(rt,0,0)|(imm2&0xfff)|((imm2<<4)&0xf0000));
2310 emit_movt(imm1&0xFFFF0000,rt);
2311 if((imm1&0xFFFF0000)!=(imm2&0xFFFF0000)) {
2312 assem_debug("movtne %s,#%d (0x%x)\n",regname[rt],imm2&0xffff0000,imm2&0xffff0000);
2313 output_w32(0x13400000|rd_rn_rm(rt,0,0)|((imm2>>16)&0xfff)|((imm2>>12)&0xf0000));
2319 // special case for checking invalid_code
2320 void emit_cmpmem_indexedsr12_imm(int addr,int r,int imm)
2325 // special case for checking invalid_code
2326 void emit_cmpmem_indexedsr12_reg(int base,int r,int imm)
2328 assert(imm<128&&imm>=0);
2330 assem_debug("ldrb lr,%s,%s lsr #12\n",regname[base],regname[r]);
2331 output_w32(0xe7d00000|rd_rn_rm(HOST_TEMPREG,base,r)|0x620);
2332 emit_cmpimm(HOST_TEMPREG,imm);
2335 // special case for tlb mapping
2336 void emit_addsr12(int rs1,int rs2,int rt)
2338 assem_debug("add %s,%s,%s lsr #12\n",regname[rt],regname[rs1],regname[rs2]);
2339 output_w32(0xe0800620|rd_rn_rm(rt,rs1,rs2));
2342 void emit_callne(int a)
2344 assem_debug("blne %x\n",a);
2345 u_int offset=genjmp(a);
2346 output_w32(0x1b000000|offset);
2349 // Used to preload hash table entries
2350 void emit_prefetch(void *addr)
2352 assem_debug("prefetch %x\n",(int)addr);
2355 output_modrm(0,5,1);
2356 output_w32((int)addr);
2358 void emit_prefetchreg(int r)
2360 assem_debug("pld %s\n",regname[r]);
2361 output_w32(0xf5d0f000|rd_rn_rm(0,r,0));
2364 // Special case for mini_ht
2365 void emit_ldreq_indexed(int rs, u_int offset, int rt)
2367 assert(offset<4096);
2368 assem_debug("ldreq %s,[%s, #%d]\n",regname[rt],regname[rs],offset);
2369 output_w32(0x05900000|rd_rn_rm(rt,rs,0)|offset);
2372 void emit_flds(int r,int sr)
2374 assem_debug("flds s%d,[%s]\n",sr,regname[r]);
2375 output_w32(0xed900a00|((sr&14)<<11)|((sr&1)<<22)|(r<<16));
2378 void emit_vldr(int r,int vr)
2380 assem_debug("vldr d%d,[%s]\n",vr,regname[r]);
2381 output_w32(0xed900b00|(vr<<12)|(r<<16));
2384 void emit_fsts(int sr,int r)
2386 assem_debug("fsts s%d,[%s]\n",sr,regname[r]);
2387 output_w32(0xed800a00|((sr&14)<<11)|((sr&1)<<22)|(r<<16));
2390 void emit_vstr(int vr,int r)
2392 assem_debug("vstr d%d,[%s]\n",vr,regname[r]);
2393 output_w32(0xed800b00|(vr<<12)|(r<<16));
2396 void emit_ftosizs(int s,int d)
2398 assem_debug("ftosizs s%d,s%d\n",d,s);
2399 output_w32(0xeebd0ac0|((d&14)<<11)|((d&1)<<22)|((s&14)>>1)|((s&1)<<5));
2402 void emit_ftosizd(int s,int d)
2404 assem_debug("ftosizd s%d,d%d\n",d,s);
2405 output_w32(0xeebd0bc0|((d&14)<<11)|((d&1)<<22)|(s&7));
2408 void emit_fsitos(int s,int d)
2410 assem_debug("fsitos s%d,s%d\n",d,s);
2411 output_w32(0xeeb80ac0|((d&14)<<11)|((d&1)<<22)|((s&14)>>1)|((s&1)<<5));
2414 void emit_fsitod(int s,int d)
2416 assem_debug("fsitod d%d,s%d\n",d,s);
2417 output_w32(0xeeb80bc0|((d&7)<<12)|((s&14)>>1)|((s&1)<<5));
2420 void emit_fcvtds(int s,int d)
2422 assem_debug("fcvtds d%d,s%d\n",d,s);
2423 output_w32(0xeeb70ac0|((d&7)<<12)|((s&14)>>1)|((s&1)<<5));
2426 void emit_fcvtsd(int s,int d)
2428 assem_debug("fcvtsd s%d,d%d\n",d,s);
2429 output_w32(0xeeb70bc0|((d&14)<<11)|((d&1)<<22)|(s&7));
2432 void emit_fsqrts(int s,int d)
2434 assem_debug("fsqrts d%d,s%d\n",d,s);
2435 output_w32(0xeeb10ac0|((d&14)<<11)|((d&1)<<22)|((s&14)>>1)|((s&1)<<5));
2438 void emit_fsqrtd(int s,int d)
2440 assem_debug("fsqrtd s%d,d%d\n",d,s);
2441 output_w32(0xeeb10bc0|((d&7)<<12)|(s&7));
2444 void emit_fabss(int s,int d)
2446 assem_debug("fabss d%d,s%d\n",d,s);
2447 output_w32(0xeeb00ac0|((d&14)<<11)|((d&1)<<22)|((s&14)>>1)|((s&1)<<5));
2450 void emit_fabsd(int s,int d)
2452 assem_debug("fabsd s%d,d%d\n",d,s);
2453 output_w32(0xeeb00bc0|((d&7)<<12)|(s&7));
2456 void emit_fnegs(int s,int d)
2458 assem_debug("fnegs d%d,s%d\n",d,s);
2459 output_w32(0xeeb10a40|((d&14)<<11)|((d&1)<<22)|((s&14)>>1)|((s&1)<<5));
2462 void emit_fnegd(int s,int d)
2464 assem_debug("fnegd s%d,d%d\n",d,s);
2465 output_w32(0xeeb10b40|((d&7)<<12)|(s&7));
2468 void emit_fadds(int s1,int s2,int d)
2470 assem_debug("fadds s%d,s%d,s%d\n",d,s1,s2);
2471 output_w32(0xee300a00|((d&14)<<11)|((d&1)<<22)|((s1&14)<<15)|((s1&1)<<7)|((s2&14)>>1)|((s2&1)<<5));
2474 void emit_faddd(int s1,int s2,int d)
2476 assem_debug("faddd d%d,d%d,d%d\n",d,s1,s2);
2477 output_w32(0xee300b00|((d&7)<<12)|((s1&7)<<16)|(s2&7));
2480 void emit_fsubs(int s1,int s2,int d)
2482 assem_debug("fsubs s%d,s%d,s%d\n",d,s1,s2);
2483 output_w32(0xee300a40|((d&14)<<11)|((d&1)<<22)|((s1&14)<<15)|((s1&1)<<7)|((s2&14)>>1)|((s2&1)<<5));
2486 void emit_fsubd(int s1,int s2,int d)
2488 assem_debug("fsubd d%d,d%d,d%d\n",d,s1,s2);
2489 output_w32(0xee300b40|((d&7)<<12)|((s1&7)<<16)|(s2&7));
2492 void emit_fmuls(int s1,int s2,int d)
2494 assem_debug("fmuls s%d,s%d,s%d\n",d,s1,s2);
2495 output_w32(0xee200a00|((d&14)<<11)|((d&1)<<22)|((s1&14)<<15)|((s1&1)<<7)|((s2&14)>>1)|((s2&1)<<5));
2498 void emit_fmuld(int s1,int s2,int d)
2500 assem_debug("fmuld d%d,d%d,d%d\n",d,s1,s2);
2501 output_w32(0xee200b00|((d&7)<<12)|((s1&7)<<16)|(s2&7));
2504 void emit_fdivs(int s1,int s2,int d)
2506 assem_debug("fdivs s%d,s%d,s%d\n",d,s1,s2);
2507 output_w32(0xee800a00|((d&14)<<11)|((d&1)<<22)|((s1&14)<<15)|((s1&1)<<7)|((s2&14)>>1)|((s2&1)<<5));
2510 void emit_fdivd(int s1,int s2,int d)
2512 assem_debug("fdivd d%d,d%d,d%d\n",d,s1,s2);
2513 output_w32(0xee800b00|((d&7)<<12)|((s1&7)<<16)|(s2&7));
2516 void emit_fcmps(int x,int y)
2518 assem_debug("fcmps s14, s15\n");
2519 output_w32(0xeeb47a67);
2522 void emit_fcmpd(int x,int y)
2524 assem_debug("fcmpd d6, d7\n");
2525 output_w32(0xeeb46b47);
2530 assem_debug("fmstat\n");
2531 output_w32(0xeef1fa10);
2534 void emit_bicne_imm(int rs,int imm,int rt)
2537 genimm_checked(imm,&armval);
2538 assem_debug("bicne %s,%s,#%d\n",regname[rt],regname[rs],imm);
2539 output_w32(0x13c00000|rd_rn_rm(rt,rs,0)|armval);
2542 void emit_biccs_imm(int rs,int imm,int rt)
2545 genimm_checked(imm,&armval);
2546 assem_debug("biccs %s,%s,#%d\n",regname[rt],regname[rs],imm);
2547 output_w32(0x23c00000|rd_rn_rm(rt,rs,0)|armval);
2550 void emit_bicvc_imm(int rs,int imm,int rt)
2553 genimm_checked(imm,&armval);
2554 assem_debug("bicvc %s,%s,#%d\n",regname[rt],regname[rs],imm);
2555 output_w32(0x73c00000|rd_rn_rm(rt,rs,0)|armval);
2558 void emit_bichi_imm(int rs,int imm,int rt)
2561 genimm_checked(imm,&armval);
2562 assem_debug("bichi %s,%s,#%d\n",regname[rt],regname[rs],imm);
2563 output_w32(0x83c00000|rd_rn_rm(rt,rs,0)|armval);
2566 void emit_orrvs_imm(int rs,int imm,int rt)
2569 genimm_checked(imm,&armval);
2570 assem_debug("orrvs %s,%s,#%d\n",regname[rt],regname[rs],imm);
2571 output_w32(0x63800000|rd_rn_rm(rt,rs,0)|armval);
2574 void emit_orrne_imm(int rs,int imm,int rt)
2577 genimm_checked(imm,&armval);
2578 assem_debug("orrne %s,%s,#%d\n",regname[rt],regname[rs],imm);
2579 output_w32(0x13800000|rd_rn_rm(rt,rs,0)|armval);
2582 void emit_andne_imm(int rs,int imm,int rt)
2585 genimm_checked(imm,&armval);
2586 assem_debug("andne %s,%s,#%d\n",regname[rt],regname[rs],imm);
2587 output_w32(0x12000000|rd_rn_rm(rt,rs,0)|armval);
2590 void emit_addpl_imm(int rs,int imm,int rt)
2593 genimm_checked(imm,&armval);
2594 assem_debug("addpl %s,%s,#%d\n",regname[rt],regname[rs],imm);
2595 output_w32(0x52800000|rd_rn_rm(rt,rs,0)|armval);
2598 void emit_jno_unlikely(int a)
2601 assem_debug("addvc pc,pc,#? (%x)\n",/*a-(int)out-8,*/a);
2602 output_w32(0x72800000|rd_rn_rm(15,15,0));
2605 static void save_regs_all(u_int reglist)
2608 if(!reglist) return;
2609 assem_debug("stmia fp,{");
2612 assem_debug("r%d,",i);
2614 output_w32(0xe88b0000|reglist);
2616 static void restore_regs_all(u_int reglist)
2619 if(!reglist) return;
2620 assem_debug("ldmia fp,{");
2623 assem_debug("r%d,",i);
2625 output_w32(0xe89b0000|reglist);
2627 // Save registers before function call
2628 static void save_regs(u_int reglist)
2630 reglist&=0x100f; // only save the caller-save registers, r0-r3, r12
2631 save_regs_all(reglist);
2633 // Restore registers after function call
2634 static void restore_regs(u_int reglist)
2636 reglist&=0x100f; // only restore the caller-save registers, r0-r3, r12
2637 restore_regs_all(reglist);
2640 // Write back consts using r14 so we don't disturb the other registers
2641 void wb_consts(signed char i_regmap[],uint64_t i_is32,u_int i_dirty,int i)
2644 for(hr=0;hr<HOST_REGS;hr++) {
2645 if(hr!=EXCLUDE_REG&&i_regmap[hr]>=0&&((i_dirty>>hr)&1)) {
2646 if(((regs[i].isconst>>hr)&1)&&i_regmap[hr]>0) {
2647 if(i_regmap[hr]<64 || !((i_is32>>(i_regmap[hr]&63))&1) ) {
2648 int value=constmap[i][hr];
2650 emit_zeroreg(HOST_TEMPREG);
2653 emit_movimm(value,HOST_TEMPREG);
2655 emit_storereg(i_regmap[hr],HOST_TEMPREG);
2657 if((i_is32>>i_regmap[hr])&1) {
2658 if(value!=-1&&value!=0) emit_sarimm(HOST_TEMPREG,31,HOST_TEMPREG);
2659 emit_storereg(i_regmap[hr]|64,HOST_TEMPREG);
2668 /* Stubs/epilogue */
2670 void literal_pool(int n)
2672 if(!literalcount) return;
2674 if((int)out-literals[0][0]<4096-n) return;
2678 for(i=0;i<literalcount;i++)
2680 u_int l_addr=(u_int)out;
2683 if(literals[j][1]==literals[i][1]) {
2684 //printf("dup %08x\n",literals[i][1]);
2685 l_addr=literals[j][0];
2689 ptr=(u_int *)literals[i][0];
2690 u_int offset=l_addr-(u_int)ptr-8;
2691 assert(offset<4096);
2692 assert(!(offset&3));
2694 if(l_addr==(u_int)out) {
2695 literals[i][0]=l_addr; // remember for dupes
2696 output_w32(literals[i][1]);
2702 void literal_pool_jumpover(int n)
2704 if(!literalcount) return;
2706 if((int)out-literals[0][0]<4096-n) return;
2711 set_jump_target(jaddr,(int)out);
2714 emit_extjump2(u_int addr, int target, int linker)
2716 u_char *ptr=(u_char *)addr;
2717 assert((ptr[3]&0x0e)==0xa);
2718 emit_loadlp(target,0);
2719 emit_loadlp(addr,1);
2720 assert(addr>=BASE_ADDR&&addr<(BASE_ADDR+(1<<TARGET_SIZE_2)));
2721 //assert((target>=0x80000000&&target<0x80800000)||(target>0xA4000000&&target<0xA4001000));
2723 #ifdef DEBUG_CYCLE_COUNT
2724 emit_readword((int)&last_count,ECX);
2725 emit_add(HOST_CCREG,ECX,HOST_CCREG);
2726 emit_readword((int)&next_interupt,ECX);
2727 emit_writeword(HOST_CCREG,(int)&Count);
2728 emit_sub(HOST_CCREG,ECX,HOST_CCREG);
2729 emit_writeword(ECX,(int)&last_count);
2735 emit_extjump(int addr, int target)
2737 emit_extjump2(addr, target, (int)dyna_linker);
2739 emit_extjump_ds(int addr, int target)
2741 emit_extjump2(addr, target, (int)dyna_linker_ds);
2744 // put rt_val into rt, potentially making use of rs with value rs_val
2745 static void emit_movimm_from(u_int rs_val,int rs,u_int rt_val,int rt)
2749 if(genimm(rt_val,&armval)) {
2750 assem_debug("mov %s,#%d\n",regname[rt],rt_val);
2751 output_w32(0xe3a00000|rd_rn_rm(rt,0,0)|armval);
2754 if(genimm(~rt_val,&armval)) {
2755 assem_debug("mvn %s,#%d\n",regname[rt],rt_val);
2756 output_w32(0xe3e00000|rd_rn_rm(rt,0,0)|armval);
2760 if(genimm(diff,&armval)) {
2761 assem_debug("add %s,%s,#%d\n",regname[rt],regname[rs],diff);
2762 output_w32(0xe2800000|rd_rn_rm(rt,rs,0)|armval);
2764 }else if(genimm(-diff,&armval)) {
2765 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rs],-diff);
2766 output_w32(0xe2400000|rd_rn_rm(rt,rs,0)|armval);
2769 emit_movimm(rt_val,rt);
2772 // return 1 if above function can do it's job cheaply
2773 static int is_similar_value(u_int v1,u_int v2)
2777 if(v1==v2) return 1;
2779 for(xs=diff;xs!=0&&(xs&3)==0;xs>>=2)
2781 if(xs<0x100) return 1;
2782 for(xs=-diff;xs!=0&&(xs&3)==0;xs>>=2)
2784 if(xs<0x100) return 1;
2789 static void pass_args(int a0, int a1)
2793 emit_mov(a0,2); emit_mov(a1,1); emit_mov(2,0);
2795 else if(a0!=0&&a1==0) {
2797 if (a0>=0) emit_mov(a0,0);
2800 if(a0>=0&&a0!=0) emit_mov(a0,0);
2801 if(a1>=0&&a1!=1) emit_mov(a1,1);
2805 static void mov_loadtype_adj(int type,int rs,int rt)
2808 case LOADB_STUB: emit_signextend8(rs,rt); break;
2809 case LOADBU_STUB: emit_andimm(rs,0xff,rt); break;
2810 case LOADH_STUB: emit_signextend16(rs,rt); break;
2811 case LOADHU_STUB: emit_andimm(rs,0xffff,rt); break;
2812 case LOADW_STUB: if(rs!=rt) emit_mov(rs,rt); break;
2818 #include "pcsxmem.h"
2819 #include "pcsxmem_inline.c"
2824 assem_debug("do_readstub %x\n",start+stubs[n][3]*4);
2826 set_jump_target(stubs[n][1],(int)out);
2827 int type=stubs[n][0];
2830 struct regstat *i_regs=(struct regstat *)stubs[n][5];
2831 u_int reglist=stubs[n][7];
2832 signed char *i_regmap=i_regs->regmap;
2833 int addr=get_reg(i_regmap,AGEN1+(i&1));
2836 if(itype[i]==C1LS||itype[i]==C2LS||itype[i]==LOADLR) {
2837 rth=get_reg(i_regmap,FTEMP|64);
2838 rt=get_reg(i_regmap,FTEMP);
2840 rth=get_reg(i_regmap,rt1[i]|64);
2841 rt=get_reg(i_regmap,rt1[i]);
2845 int r,temp=-1,temp2=HOST_TEMPREG,regs_saved=0,restore_jump=0;
2847 for(r=0;r<=12;r++) {
2848 if(((1<<r)&0x13ff)&&((1<<r)®list)==0) {
2852 if(rt>=0&&rt1[i]!=0)
2859 if((regs_saved||(reglist&2)==0)&&temp!=1&&rs!=1)
2861 emit_readword((int)&mem_rtab,temp);
2862 emit_shrimm(rs,12,temp2);
2863 emit_readword_dualindexedx4(temp,temp2,temp2);
2864 emit_lsls_imm(temp2,1,temp2);
2865 if(itype[i]==C1LS||itype[i]==C2LS||(rt>=0&&rt1[i]!=0)) {
2867 case LOADB_STUB: emit_ldrccsb_dualindexed(temp2,rs,rt); break;
2868 case LOADBU_STUB: emit_ldrccb_dualindexed(temp2,rs,rt); break;
2869 case LOADH_STUB: emit_ldrccsh_dualindexed(temp2,rs,rt); break;
2870 case LOADHU_STUB: emit_ldrcch_dualindexed(temp2,rs,rt); break;
2871 case LOADW_STUB: emit_ldrcc_dualindexed(temp2,rs,rt); break;
2875 restore_jump=(int)out;
2876 emit_jcc(0); // jump to reg restore
2879 emit_jcc(stubs[n][2]); // return address
2884 if(type==LOADB_STUB||type==LOADBU_STUB)
2885 handler=(int)jump_handler_read8;
2886 if(type==LOADH_STUB||type==LOADHU_STUB)
2887 handler=(int)jump_handler_read16;
2888 if(type==LOADW_STUB)
2889 handler=(int)jump_handler_read32;
2891 pass_args(rs,temp2);
2892 int cc=get_reg(i_regmap,CCREG);
2894 emit_loadreg(CCREG,2);
2895 emit_addimm(cc<0?2:cc,CLOCK_ADJUST((int)stubs[n][6]+1),2);
2897 if(itype[i]==C1LS||itype[i]==C2LS||(rt>=0&&rt1[i]!=0)) {
2898 mov_loadtype_adj(type,0,rt);
2901 set_jump_target(restore_jump,(int)out);
2902 restore_regs(reglist);
2903 emit_jmp(stubs[n][2]); // return address
2906 if(addr<0&&itype[i]!=C1LS&&itype[i]!=C2LS&&itype[i]!=LOADLR) addr=get_reg(i_regmap,-1);
2909 if(type==LOADB_STUB||type==LOADBU_STUB)
2910 ftable=(int)readmemb;
2911 if(type==LOADH_STUB||type==LOADHU_STUB)
2912 ftable=(int)readmemh;
2913 if(type==LOADW_STUB)
2914 ftable=(int)readmem;
2916 if(type==LOADD_STUB)
2917 ftable=(int)readmemd;
2920 emit_writeword(rs,(int)&address);
2924 ds=i_regs!=®s[i];
2925 int real_rs=(itype[i]==LOADLR)?-1:get_reg(i_regmap,rs1[i]);
2926 u_int cmask=ds?-1:(0x100f|~i_regs->wasconst);
2927 if(!ds) load_all_consts(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty&~(1<<addr)&(real_rs<0?-1:~(1<<real_rs))&0x100f,i);
2928 wb_dirtys(i_regs->regmap_entry,i_regs->was32,i_regs->wasdirty&cmask&~(1<<addr)&(real_rs<0?-1:~(1<<real_rs)));
2929 if(!ds) wb_consts(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty&~(1<<addr)&(real_rs<0?-1:~(1<<real_rs))&~0x100f,i);
2931 emit_shrimm(rs,16,1);
2932 int cc=get_reg(i_regmap,CCREG);
2934 emit_loadreg(CCREG,2);
2936 emit_movimm(ftable,0);
2937 emit_addimm(cc<0?2:cc,2*stubs[n][6]+2,2);
2939 emit_movimm(start+stubs[n][3]*4+(((regs[i].was32>>rs1[i])&1)<<1)+ds,3);
2941 //emit_readword((int)&last_count,temp);
2942 //emit_add(cc,temp,cc);
2943 //emit_writeword(cc,(int)&Count);
2945 emit_call((int)&indirect_jump_indexed);
2947 //emit_readword_dualindexedx4(rs,HOST_TEMPREG,15);
2949 // We really shouldn't need to update the count here,
2950 // but not doing so causes random crashes...
2951 emit_readword((int)&Count,HOST_TEMPREG);
2952 emit_readword((int)&next_interupt,2);
2953 emit_addimm(HOST_TEMPREG,-2*stubs[n][6]-2,HOST_TEMPREG);
2954 emit_writeword(2,(int)&last_count);
2955 emit_sub(HOST_TEMPREG,2,cc<0?HOST_TEMPREG:cc);
2957 emit_storereg(CCREG,HOST_TEMPREG);
2961 restore_regs(reglist);
2962 //if((cc=get_reg(regmap,CCREG))>=0) {
2963 // emit_loadreg(CCREG,cc);
2965 if(itype[i]==C1LS||itype[i]==C2LS||(rt>=0&&rt1[i]!=0)) {
2967 if(type==LOADB_STUB)
2968 emit_movsbl((int)&readmem_dword,rt);
2969 if(type==LOADBU_STUB)
2970 emit_movzbl((int)&readmem_dword,rt);
2971 if(type==LOADH_STUB)
2972 emit_movswl((int)&readmem_dword,rt);
2973 if(type==LOADHU_STUB)
2974 emit_movzwl((int)&readmem_dword,rt);
2975 if(type==LOADW_STUB)
2976 emit_readword((int)&readmem_dword,rt);
2977 if(type==LOADD_STUB) {
2978 emit_readword((int)&readmem_dword,rt);
2979 if(rth>=0) emit_readword(((int)&readmem_dword)+4,rth);
2982 emit_jmp(stubs[n][2]); // return address
2987 // return memhandler, or get directly accessable address and return 0
2988 u_int get_direct_memhandler(void *table,u_int addr,int type,u_int *addr_host)
2991 l1=((u_int *)table)[addr>>12];
2992 if((l1&(1<<31))==0) {
2999 if(type==LOADB_STUB||type==LOADBU_STUB||type==STOREB_STUB)
3000 l2=((u_int *)l1)[0x1000/4 + 0x1000/2 + (addr&0xfff)];
3001 else if(type==LOADH_STUB||type==LOADHU_STUB||type==STOREH_STUB)
3002 l2=((u_int *)l1)[0x1000/4 + (addr&0xfff)/2];
3004 l2=((u_int *)l1)[(addr&0xfff)/4];
3005 if((l2&(1<<31))==0) {
3007 *addr_host=v+(addr&0xfff);
3015 inline_readstub(int type, int i, u_int addr, signed char regmap[], int target, int adj, u_int reglist)
3017 int rs=get_reg(regmap,target);
3018 int rth=get_reg(regmap,target|64);
3019 int rt=get_reg(regmap,target);
3020 if(rs<0) rs=get_reg(regmap,-1);
3023 u_int handler,host_addr=0,is_dynamic,far_call=0;
3024 int cc=get_reg(regmap,CCREG);
3025 if(pcsx_direct_read(type,addr,CLOCK_ADJUST(adj+1),cc,target?rs:-1,rt))
3027 handler=get_direct_memhandler(mem_rtab,addr,type,&host_addr);
3032 emit_movimm_from(addr,rs,host_addr,rs);
3034 case LOADB_STUB: emit_movsbl_indexed(0,rs,rt); break;
3035 case LOADBU_STUB: emit_movzbl_indexed(0,rs,rt); break;
3036 case LOADH_STUB: emit_movswl_indexed(0,rs,rt); break;
3037 case LOADHU_STUB: emit_movzwl_indexed(0,rs,rt); break;
3038 case LOADW_STUB: emit_readword_indexed(0,rs,rt); break;
3043 is_dynamic=pcsxmem_is_handler_dynamic(addr);
3045 if(type==LOADB_STUB||type==LOADBU_STUB)
3046 handler=(int)jump_handler_read8;
3047 if(type==LOADH_STUB||type==LOADHU_STUB)
3048 handler=(int)jump_handler_read16;
3049 if(type==LOADW_STUB)
3050 handler=(int)jump_handler_read32;
3053 // call a memhandler
3054 if(rt>=0&&rt1[i]!=0)
3058 emit_movimm(addr,0);
3061 int offset=(int)handler-(int)out-8;
3062 if(offset<-33554432||offset>=33554432) {
3063 // unreachable memhandler, a plugin func perhaps
3064 emit_movimm(handler,12);
3068 emit_loadreg(CCREG,2);
3070 emit_movimm(((u_int *)mem_rtab)[addr>>12]<<1,1);
3071 emit_addimm(cc<0?2:cc,CLOCK_ADJUST(adj+1),2);
3074 emit_readword((int)&last_count,3);
3075 emit_addimm(cc<0?2:cc,CLOCK_ADJUST(adj+1),2);
3077 emit_writeword(2,(int)&Count);
3085 if(rt>=0&&rt1[i]!=0) {
3087 case LOADB_STUB: emit_signextend8(0,rt); break;
3088 case LOADBU_STUB: emit_andimm(0,0xff,rt); break;
3089 case LOADH_STUB: emit_signextend16(0,rt); break;
3090 case LOADHU_STUB: emit_andimm(0,0xffff,rt); break;
3091 case LOADW_STUB: if(rt!=0) emit_mov(0,rt); break;
3095 restore_regs(reglist);
3098 if(type==LOADB_STUB||type==LOADBU_STUB)
3099 ftable=(int)readmemb;
3100 if(type==LOADH_STUB||type==LOADHU_STUB)
3101 ftable=(int)readmemh;
3102 if(type==LOADW_STUB)
3103 ftable=(int)readmem;
3105 if(type==LOADD_STUB)
3106 ftable=(int)readmemd;
3110 emit_movimm(addr,rs);
3111 emit_writeword(rs,(int)&address);
3115 if((signed int)addr>=(signed int)0xC0000000) {
3116 // Theoretically we can have a pagefault here, if the TLB has never
3117 // been enabled and the address is outside the range 80000000..BFFFFFFF
3118 // Write out the registers so the pagefault can be handled. This is
3119 // a very rare case and likely represents a bug.
3120 int ds=regmap!=regs[i].regmap;
3121 if(!ds) load_all_consts(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty,i);
3122 if(!ds) wb_dirtys(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty);
3123 else wb_dirtys(branch_regs[i-1].regmap_entry,branch_regs[i-1].was32,branch_regs[i-1].wasdirty);
3126 //emit_shrimm(rs,16,1);
3127 int cc=get_reg(regmap,CCREG);
3129 emit_loadreg(CCREG,2);
3131 //emit_movimm(ftable,0);
3132 emit_movimm(((u_int *)ftable)[addr>>16],0);
3133 //emit_readword((int)&last_count,12);
3134 emit_addimm(cc<0?2:cc,CLOCK_ADJUST(adj+1),2);
3136 if((signed int)addr>=(signed int)0xC0000000) {
3137 // Pagefault address
3138 int ds=regmap!=regs[i].regmap;
3139 emit_movimm(start+i*4+(((regs[i].was32>>rs1[i])&1)<<1)+ds,3);
3143 //emit_writeword(2,(int)&Count);
3144 //emit_call(((u_int *)ftable)[addr>>16]);
3145 emit_call((int)&indirect_jump);
3147 // We really shouldn't need to update the count here,
3148 // but not doing so causes random crashes...
3149 emit_readword((int)&Count,HOST_TEMPREG);
3150 emit_readword((int)&next_interupt,2);
3151 emit_addimm(HOST_TEMPREG,-CLOCK_ADJUST(adj+1),HOST_TEMPREG);
3152 emit_writeword(2,(int)&last_count);
3153 emit_sub(HOST_TEMPREG,2,cc<0?HOST_TEMPREG:cc);
3155 emit_storereg(CCREG,HOST_TEMPREG);
3159 restore_regs(reglist);
3161 if(type==LOADB_STUB)
3162 emit_movsbl((int)&readmem_dword,rt);
3163 if(type==LOADBU_STUB)
3164 emit_movzbl((int)&readmem_dword,rt);
3165 if(type==LOADH_STUB)
3166 emit_movswl((int)&readmem_dword,rt);
3167 if(type==LOADHU_STUB)
3168 emit_movzwl((int)&readmem_dword,rt);
3169 if(type==LOADW_STUB)
3170 emit_readword((int)&readmem_dword,rt);
3171 if(type==LOADD_STUB) {
3172 emit_readword((int)&readmem_dword,rt);
3173 if(rth>=0) emit_readword(((int)&readmem_dword)+4,rth);
3181 assem_debug("do_writestub %x\n",start+stubs[n][3]*4);
3183 set_jump_target(stubs[n][1],(int)out);
3184 int type=stubs[n][0];
3187 struct regstat *i_regs=(struct regstat *)stubs[n][5];
3188 u_int reglist=stubs[n][7];
3189 signed char *i_regmap=i_regs->regmap;
3190 int addr=get_reg(i_regmap,AGEN1+(i&1));
3193 if(itype[i]==C1LS||itype[i]==C2LS) {
3194 rth=get_reg(i_regmap,FTEMP|64);
3195 rt=get_reg(i_regmap,r=FTEMP);
3197 rth=get_reg(i_regmap,rs2[i]|64);
3198 rt=get_reg(i_regmap,r=rs2[i]);
3203 int rtmp,temp=-1,temp2=HOST_TEMPREG,regs_saved=0,restore_jump=0,ra;
3204 int reglist2=reglist|(1<<rs)|(1<<rt);
3205 for(rtmp=0;rtmp<=12;rtmp++) {
3206 if(((1<<rtmp)&0x13ff)&&((1<<rtmp)®list2)==0) {
3213 for(rtmp=0;rtmp<=3;rtmp++)
3214 if(rtmp!=rs&&rtmp!=rt)
3217 if((regs_saved||(reglist2&8)==0)&&temp!=3&&rs!=3&&rt!=3)
3219 emit_readword((int)&mem_wtab,temp);
3220 emit_shrimm(rs,12,temp2);
3221 emit_readword_dualindexedx4(temp,temp2,temp2);
3222 emit_lsls_imm(temp2,1,temp2);
3224 case STOREB_STUB: emit_strccb_dualindexed(temp2,rs,rt); break;
3225 case STOREH_STUB: emit_strcch_dualindexed(temp2,rs,rt); break;
3226 case STOREW_STUB: emit_strcc_dualindexed(temp2,rs,rt); break;
3230 restore_jump=(int)out;
3231 emit_jcc(0); // jump to reg restore
3234 emit_jcc(stubs[n][2]); // return address (invcode check)
3240 case STOREB_STUB: handler=(int)jump_handler_write8; break;
3241 case STOREH_STUB: handler=(int)jump_handler_write16; break;
3242 case STOREW_STUB: handler=(int)jump_handler_write32; break;
3248 int cc=get_reg(i_regmap,CCREG);
3250 emit_loadreg(CCREG,2);
3251 emit_addimm(cc<0?2:cc,CLOCK_ADJUST((int)stubs[n][6]+1),2);
3252 // returns new cycle_count
3254 emit_addimm(0,-CLOCK_ADJUST((int)stubs[n][6]+1),cc<0?2:cc);
3256 emit_storereg(CCREG,2);
3258 set_jump_target(restore_jump,(int)out);
3259 restore_regs(reglist);
3263 if(addr<0) addr=get_reg(i_regmap,-1);
3266 if(type==STOREB_STUB)
3267 ftable=(int)writememb;
3268 if(type==STOREH_STUB)
3269 ftable=(int)writememh;
3270 if(type==STOREW_STUB)
3271 ftable=(int)writemem;
3273 if(type==STORED_STUB)
3274 ftable=(int)writememd;
3277 emit_writeword(rs,(int)&address);
3278 //emit_shrimm(rs,16,rs);
3279 //emit_movmem_indexedx4(ftable,rs,rs);
3280 if(type==STOREB_STUB)
3281 emit_writebyte(rt,(int)&byte);
3282 if(type==STOREH_STUB)
3283 emit_writehword(rt,(int)&hword);
3284 if(type==STOREW_STUB)
3285 emit_writeword(rt,(int)&word);
3286 if(type==STORED_STUB) {
3288 emit_writeword(rt,(int)&dword);
3289 emit_writeword(r?rth:rt,(int)&dword+4);
3291 SysPrintf("STORED_STUB\n");
3297 ds=i_regs!=®s[i];
3298 int real_rs=get_reg(i_regmap,rs1[i]);
3299 u_int cmask=ds?-1:(0x100f|~i_regs->wasconst);
3300 if(!ds) load_all_consts(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty&~(1<<addr)&(real_rs<0?-1:~(1<<real_rs))&0x100f,i);
3301 wb_dirtys(i_regs->regmap_entry,i_regs->was32,i_regs->wasdirty&cmask&~(1<<addr)&(real_rs<0?-1:~(1<<real_rs)));
3302 if(!ds) wb_consts(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty&~(1<<addr)&(real_rs<0?-1:~(1<<real_rs))&~0x100f,i);
3304 emit_shrimm(rs,16,1);
3305 int cc=get_reg(i_regmap,CCREG);
3307 emit_loadreg(CCREG,2);
3309 emit_movimm(ftable,0);
3310 emit_addimm(cc<0?2:cc,2*stubs[n][6]+2,2);
3312 emit_movimm(start+stubs[n][3]*4+(((regs[i].was32>>rs1[i])&1)<<1)+ds,3);
3314 //emit_readword((int)&last_count,temp);
3315 //emit_addimm(cc,2*stubs[n][5]+2,cc);
3316 //emit_add(cc,temp,cc);
3317 //emit_writeword(cc,(int)&Count);
3318 emit_call((int)&indirect_jump_indexed);
3320 emit_readword((int)&Count,HOST_TEMPREG);
3321 emit_readword((int)&next_interupt,2);
3322 emit_addimm(HOST_TEMPREG,-2*stubs[n][6]-2,HOST_TEMPREG);
3323 emit_writeword(2,(int)&last_count);
3324 emit_sub(HOST_TEMPREG,2,cc<0?HOST_TEMPREG:cc);
3326 emit_storereg(CCREG,HOST_TEMPREG);
3329 restore_regs(reglist);
3330 //if((cc=get_reg(regmap,CCREG))>=0) {
3331 // emit_loadreg(CCREG,cc);
3333 emit_jmp(stubs[n][2]); // return address
3337 inline_writestub(int type, int i, u_int addr, signed char regmap[], int target, int adj, u_int reglist)
3339 int rs=get_reg(regmap,-1);
3340 int rth=get_reg(regmap,target|64);
3341 int rt=get_reg(regmap,target);
3345 u_int handler,host_addr=0;
3346 handler=get_direct_memhandler(mem_wtab,addr,type,&host_addr);
3349 emit_movimm_from(addr,rs,host_addr,rs);
3351 case STOREB_STUB: emit_writebyte_indexed(rt,0,rs); break;
3352 case STOREH_STUB: emit_writehword_indexed(rt,0,rs); break;
3353 case STOREW_STUB: emit_writeword_indexed(rt,0,rs); break;
3359 // call a memhandler
3362 int cc=get_reg(regmap,CCREG);
3364 emit_loadreg(CCREG,2);
3365 emit_addimm(cc<0?2:cc,CLOCK_ADJUST(adj+1),2);
3366 emit_movimm(handler,3);
3367 // returns new cycle_count
3368 emit_call((int)jump_handler_write_h);
3369 emit_addimm(0,-CLOCK_ADJUST(adj+1),cc<0?2:cc);
3371 emit_storereg(CCREG,2);
3372 restore_regs(reglist);
3375 if(type==STOREB_STUB)
3376 ftable=(int)writememb;
3377 if(type==STOREH_STUB)
3378 ftable=(int)writememh;
3379 if(type==STOREW_STUB)
3380 ftable=(int)writemem;
3382 if(type==STORED_STUB)
3383 ftable=(int)writememd;
3386 emit_writeword(rs,(int)&address);
3387 //emit_shrimm(rs,16,rs);
3388 //emit_movmem_indexedx4(ftable,rs,rs);
3389 if(type==STOREB_STUB)
3390 emit_writebyte(rt,(int)&byte);
3391 if(type==STOREH_STUB)
3392 emit_writehword(rt,(int)&hword);
3393 if(type==STOREW_STUB)
3394 emit_writeword(rt,(int)&word);
3395 if(type==STORED_STUB) {
3397 emit_writeword(rt,(int)&dword);
3398 emit_writeword(target?rth:rt,(int)&dword+4);
3400 SysPrintf("STORED_STUB\n");
3406 // rearmed note: load_all_consts prevents BIOS boot, some bug?
3407 if((signed int)addr>=(signed int)0xC0000000) {
3408 // Theoretically we can have a pagefault here, if the TLB has never
3409 // been enabled and the address is outside the range 80000000..BFFFFFFF
3410 // Write out the registers so the pagefault can be handled. This is
3411 // a very rare case and likely represents a bug.
3412 int ds=regmap!=regs[i].regmap;
3413 if(!ds) load_all_consts(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty,i);
3414 if(!ds) wb_dirtys(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty);
3415 else wb_dirtys(branch_regs[i-1].regmap_entry,branch_regs[i-1].was32,branch_regs[i-1].wasdirty);
3418 //emit_shrimm(rs,16,1);
3419 int cc=get_reg(regmap,CCREG);
3421 emit_loadreg(CCREG,2);
3423 //emit_movimm(ftable,0);
3424 emit_movimm(((u_int *)ftable)[addr>>16],0);
3425 //emit_readword((int)&last_count,12);
3426 emit_addimm(cc<0?2:cc,CLOCK_ADJUST(adj+1),2);
3428 if((signed int)addr>=(signed int)0xC0000000) {
3429 // Pagefault address
3430 int ds=regmap!=regs[i].regmap;
3431 emit_movimm(start+i*4+(((regs[i].was32>>rs1[i])&1)<<1)+ds,3);
3435 //emit_writeword(2,(int)&Count);
3436 //emit_call(((u_int *)ftable)[addr>>16]);
3437 emit_call((int)&indirect_jump);
3438 emit_readword((int)&Count,HOST_TEMPREG);
3439 emit_readword((int)&next_interupt,2);
3440 emit_addimm(HOST_TEMPREG,-CLOCK_ADJUST(adj+1),HOST_TEMPREG);
3441 emit_writeword(2,(int)&last_count);
3442 emit_sub(HOST_TEMPREG,2,cc<0?HOST_TEMPREG:cc);
3444 emit_storereg(CCREG,HOST_TEMPREG);
3447 restore_regs(reglist);
3451 do_unalignedwritestub(int n)
3453 assem_debug("do_unalignedwritestub %x\n",start+stubs[n][3]*4);
3455 set_jump_target(stubs[n][1],(int)out);
3458 struct regstat *i_regs=(struct regstat *)stubs[n][4];
3459 int addr=stubs[n][5];
3460 u_int reglist=stubs[n][7];
3461 signed char *i_regmap=i_regs->regmap;
3462 int temp2=get_reg(i_regmap,FTEMP);
3465 rt=get_reg(i_regmap,rs2[i]);
3468 assert(opcode[i]==0x2a||opcode[i]==0x2e); // SWL/SWR only implemented
3470 reglist&=~(1<<temp2);
3473 // don't bother with it and call write handler
3476 int cc=get_reg(i_regmap,CCREG);
3478 emit_loadreg(CCREG,2);
3479 emit_addimm(cc<0?2:cc,CLOCK_ADJUST((int)stubs[n][6]+1),2);
3480 emit_call((int)(opcode[i]==0x2a?jump_handle_swl:jump_handle_swr));
3481 emit_addimm(0,-CLOCK_ADJUST((int)stubs[n][6]+1),cc<0?2:cc);
3483 emit_storereg(CCREG,2);
3484 restore_regs(reglist);
3485 emit_jmp(stubs[n][2]); // return address
3487 emit_andimm(addr,0xfffffffc,temp2);
3488 emit_writeword(temp2,(int)&address);
3492 ds=i_regs!=®s[i];
3493 real_rs=get_reg(i_regmap,rs1[i]);
3494 u_int cmask=ds?-1:(0x100f|~i_regs->wasconst);
3495 if(!ds) load_all_consts(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty&~(1<<addr)&(real_rs<0?-1:~(1<<real_rs))&0x100f,i);
3496 wb_dirtys(i_regs->regmap_entry,i_regs->was32,i_regs->wasdirty&cmask&~(1<<addr)&(real_rs<0?-1:~(1<<real_rs)));
3497 if(!ds) wb_consts(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty&~(1<<addr)&(real_rs<0?-1:~(1<<real_rs))&~0x100f,i);
3499 emit_shrimm(addr,16,1);
3500 int cc=get_reg(i_regmap,CCREG);
3502 emit_loadreg(CCREG,2);
3504 emit_movimm((u_int)readmem,0);
3505 emit_addimm(cc<0?2:cc,2*stubs[n][6]+2,2);
3507 // pagefault address
3508 emit_movimm(start+stubs[n][3]*4+(((regs[i].was32>>rs1[i])&1)<<1)+ds,3);
3510 emit_call((int)&indirect_jump_indexed);
3511 restore_regs(reglist);
3513 emit_readword((int)&readmem_dword,temp2);
3514 int temp=addr; //hmh
3515 emit_shlimm(addr,3,temp);
3516 emit_andimm(temp,24,temp);
3517 #ifdef BIG_ENDIAN_MIPS
3518 if (opcode[i]==0x2e) // SWR
3520 if (opcode[i]==0x2a) // SWL
3522 emit_xorimm(temp,24,temp);
3523 emit_movimm(-1,HOST_TEMPREG);
3524 if (opcode[i]==0x2a) { // SWL
3525 emit_bic_lsr(temp2,HOST_TEMPREG,temp,temp2);
3526 emit_orrshr(rt,temp,temp2);
3528 emit_bic_lsl(temp2,HOST_TEMPREG,temp,temp2);
3529 emit_orrshl(rt,temp,temp2);
3531 emit_readword((int)&address,addr);
3532 emit_writeword(temp2,(int)&word);
3533 //save_regs(reglist); // don't need to, no state changes
3534 emit_shrimm(addr,16,1);
3535 emit_movimm((u_int)writemem,0);
3536 //emit_call((int)&indirect_jump_indexed);
3538 emit_readword_dualindexedx4(0,1,15);
3539 emit_readword((int)&Count,HOST_TEMPREG);
3540 emit_readword((int)&next_interupt,2);
3541 emit_addimm(HOST_TEMPREG,-2*stubs[n][6]-2,HOST_TEMPREG);
3542 emit_writeword(2,(int)&last_count);
3543 emit_sub(HOST_TEMPREG,2,cc<0?HOST_TEMPREG:cc);
3545 emit_storereg(CCREG,HOST_TEMPREG);
3547 restore_regs(reglist);
3548 emit_jmp(stubs[n][2]); // return address
3552 void printregs(int edi,int esi,int ebp,int esp,int b,int d,int c,int a)
3554 printf("regs: %x %x %x %x %x %x %x (%x)\n",a,b,c,d,ebp,esi,edi,(&edi)[-1]);
3560 u_int reglist=stubs[n][3];
3561 set_jump_target(stubs[n][1],(int)out);
3563 if(stubs[n][4]!=0) emit_mov(stubs[n][4],0);
3564 emit_call((int)&invalidate_addr);
3565 restore_regs(reglist);
3566 emit_jmp(stubs[n][2]); // return address