1 /* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
2 * Mupen64plus/PCSX - assem_arm.c *
3 * Copyright (C) 2009-2011 Ari64 *
4 * Copyright (C) 2010-2021 GraÅžvydas "notaz" Ignotas *
6 * This program is free software; you can redistribute it and/or modify *
7 * it under the terms of the GNU General Public License as published by *
8 * the Free Software Foundation; either version 2 of the License, or *
9 * (at your option) any later version. *
11 * This program is distributed in the hope that it will be useful, *
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
14 * GNU General Public License for more details. *
16 * You should have received a copy of the GNU General Public License *
17 * along with this program; if not, write to the *
18 * Free Software Foundation, Inc., *
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. *
20 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
25 #include "../gte_arm.h"
26 #include "../gte_neon.h"
28 #include "arm_features.h"
31 #define CALLER_SAVE_REGS 0x100f
33 #define CALLER_SAVE_REGS 0x120f
36 #define unused __attribute__((unused))
39 #pragma GCC diagnostic ignored "-Wunused-function"
40 #pragma GCC diagnostic ignored "-Wunused-variable"
41 #pragma GCC diagnostic ignored "-Wunused-but-set-variable"
44 void indirect_jump_indexed();
57 void jump_vaddr_r10();
58 void jump_vaddr_r12();
60 void * const jump_vaddr_reg[16] = {
79 void invalidate_addr_r0();
80 void invalidate_addr_r1();
81 void invalidate_addr_r2();
82 void invalidate_addr_r3();
83 void invalidate_addr_r4();
84 void invalidate_addr_r5();
85 void invalidate_addr_r6();
86 void invalidate_addr_r7();
87 void invalidate_addr_r8();
88 void invalidate_addr_r9();
89 void invalidate_addr_r10();
90 void invalidate_addr_r12();
92 const u_int invalidate_addr_reg[16] = {
93 (int)invalidate_addr_r0,
94 (int)invalidate_addr_r1,
95 (int)invalidate_addr_r2,
96 (int)invalidate_addr_r3,
97 (int)invalidate_addr_r4,
98 (int)invalidate_addr_r5,
99 (int)invalidate_addr_r6,
100 (int)invalidate_addr_r7,
101 (int)invalidate_addr_r8,
102 (int)invalidate_addr_r9,
103 (int)invalidate_addr_r10,
105 (int)invalidate_addr_r12,
110 static u_int needs_clear_cache[1<<(TARGET_SIZE_2-17)];
114 static void set_jump_target(void *addr, void *target_)
116 u_int target = (u_int)target_;
118 u_int *ptr2=(u_int *)ptr;
120 assert((target-(u_int)ptr2-8)<1024);
121 assert(((uintptr_t)addr&3)==0);
122 assert((target&3)==0);
123 *ptr2=(*ptr2&0xFFFFF000)|((target-(u_int)ptr2-8)>>2)|0xF00;
124 //printf("target=%x addr=%p insn=%x\n",target,addr,*ptr2);
126 else if(ptr[3]==0x72) {
127 // generated by emit_jno_unlikely
128 if((target-(u_int)ptr2-8)<1024) {
129 assert(((uintptr_t)addr&3)==0);
130 assert((target&3)==0);
131 *ptr2=(*ptr2&0xFFFFF000)|((target-(u_int)ptr2-8)>>2)|0xF00;
133 else if((target-(u_int)ptr2-8)<4096&&!((target-(u_int)ptr2-8)&15)) {
134 assert(((uintptr_t)addr&3)==0);
135 assert((target&3)==0);
136 *ptr2=(*ptr2&0xFFFFF000)|((target-(u_int)ptr2-8)>>4)|0xE00;
138 else *ptr2=(0x7A000000)|(((target-(u_int)ptr2-8)<<6)>>8);
141 assert((ptr[3]&0x0e)==0xa);
142 *ptr2=(*ptr2&0xFF000000)|(((target-(u_int)ptr2-8)<<6)>>8);
146 // This optionally copies the instruction from the target of the branch into
147 // the space before the branch. Works, but the difference in speed is
148 // usually insignificant.
150 static void set_jump_target_fillslot(int addr,u_int target,int copy)
152 u_char *ptr=(u_char *)addr;
153 u_int *ptr2=(u_int *)ptr;
154 assert(!copy||ptr2[-1]==0xe28dd000);
157 assert((target-(u_int)ptr2-8)<4096);
158 *ptr2=(*ptr2&0xFFFFF000)|(target-(u_int)ptr2-8);
161 assert((ptr[3]&0x0e)==0xa);
162 u_int target_insn=*(u_int *)target;
163 if((target_insn&0x0e100000)==0) { // ALU, no immediate, no flags
166 if((target_insn&0x0c100000)==0x04100000) { // Load
169 if(target_insn&0x08000000) {
173 ptr2[-1]=target_insn;
176 *ptr2=(*ptr2&0xFF000000)|(((target-(u_int)ptr2-8)<<6)>>8);
182 static void add_literal(int addr,int val)
184 assert(literalcount<sizeof(literals)/sizeof(literals[0]));
185 literals[literalcount][0]=addr;
186 literals[literalcount][1]=val;
190 // from a pointer to external jump stub (which was produced by emit_extjump2)
191 // find where the jumping insn is
192 static void *find_extjump_insn(void *stub)
194 int *ptr=(int *)(stub+4);
195 assert((*ptr&0x0fff0000)==0x059f0000); // ldr rx, [pc, #ofs]
196 u_int offset=*ptr&0xfff;
197 void **l_ptr=(void *)ptr+offset+8;
201 // find where external branch is liked to using addr of it's stub:
202 // get address that insn one after stub loads (dyna_linker arg1),
203 // treat it as a pointer to branch insn,
204 // return addr where that branch jumps to
205 static void *get_pointer(void *stub)
207 //printf("get_pointer(%x)\n",(int)stub);
208 int *i_ptr=find_extjump_insn(stub);
209 assert((*i_ptr&0x0f000000)==0x0a000000);
210 return (u_char *)i_ptr+((*i_ptr<<8)>>6)+8;
213 // Find the "clean" entry point from a "dirty" entry point
214 // by skipping past the call to verify_code
215 static void *get_clean_addr(void *addr)
217 signed int *ptr = addr;
223 if((*ptr&0xFF000000)!=0xeb000000) ptr++;
224 assert((*ptr&0xFF000000)==0xeb000000); // bl instruction
226 if((*ptr&0xFF000000)==0xea000000) {
227 return (char *)ptr+((*ptr<<8)>>6)+8; // follow jump
232 static int verify_dirty(const u_int *ptr)
236 // get from literal pool
237 assert((*ptr&0xFFFF0000)==0xe59f0000);
239 u_int source=*(u_int*)((void *)ptr+offset+8);
241 assert((*ptr&0xFFFF0000)==0xe59f0000);
243 u_int copy=*(u_int*)((void *)ptr+offset+8);
245 assert((*ptr&0xFFFF0000)==0xe59f0000);
247 u_int len=*(u_int*)((void *)ptr+offset+8);
252 assert((*ptr&0xFFF00000)==0xe3000000);
253 u_int source=(ptr[0]&0xFFF)+((ptr[0]>>4)&0xF000)+((ptr[2]<<16)&0xFFF0000)+((ptr[2]<<12)&0xF0000000);
254 u_int copy=(ptr[1]&0xFFF)+((ptr[1]>>4)&0xF000)+((ptr[3]<<16)&0xFFF0000)+((ptr[3]<<12)&0xF0000000);
255 u_int len=(ptr[4]&0xFFF)+((ptr[4]>>4)&0xF000);
258 if((*ptr&0xFF000000)!=0xeb000000) ptr++;
259 assert((*ptr&0xFF000000)==0xeb000000); // bl instruction
260 //printf("verify_dirty: %x %x %x\n",source,copy,len);
261 return !memcmp((void *)source,(void *)copy,len);
264 // This doesn't necessarily find all clean entry points, just
265 // guarantees that it's not dirty
266 static int isclean(void *addr)
269 u_int *ptr=((u_int *)addr)+4;
271 u_int *ptr=((u_int *)addr)+6;
273 if((*ptr&0xFF000000)!=0xeb000000) ptr++;
274 if((*ptr&0xFF000000)!=0xeb000000) return 1; // bl instruction
275 if((int)ptr+((*ptr<<8)>>6)+8==(int)verify_code) return 0;
276 if((int)ptr+((*ptr<<8)>>6)+8==(int)verify_code_ds) return 0;
280 // get source that block at addr was compiled from (host pointers)
281 static void get_bounds(void *addr, u_char **start, u_char **end)
286 // get from literal pool
287 assert((*ptr&0xFFFF0000)==0xe59f0000);
289 u_int source=*(u_int*)((void *)ptr+offset+8);
291 //assert((*ptr&0xFFFF0000)==0xe59f0000);
293 //u_int copy=*(u_int*)((void *)ptr+offset+8);
295 assert((*ptr&0xFFFF0000)==0xe59f0000);
297 u_int len=*(u_int*)((void *)ptr+offset+8);
302 assert((*ptr&0xFFF00000)==0xe3000000);
303 u_int source=(ptr[0]&0xFFF)+((ptr[0]>>4)&0xF000)+((ptr[2]<<16)&0xFFF0000)+((ptr[2]<<12)&0xF0000000);
304 //u_int copy=(ptr[1]&0xFFF)+((ptr[1]>>4)&0xF000)+((ptr[3]<<16)&0xFFF0000)+((ptr[3]<<12)&0xF0000000);
305 u_int len=(ptr[4]&0xFFF)+((ptr[4]>>4)&0xF000);
308 if((*ptr&0xFF000000)!=0xeb000000) ptr++;
309 assert((*ptr&0xFF000000)==0xeb000000); // bl instruction
310 *start=(u_char *)source;
311 *end=(u_char *)source+len;
314 // Allocate a specific ARM register.
315 static void alloc_arm_reg(struct regstat *cur,int i,signed char reg,int hr)
320 // see if it's already allocated (and dealloc it)
321 for(n=0;n<HOST_REGS;n++)
323 if(n!=EXCLUDE_REG&&cur->regmap[n]==reg) {
324 dirty=(cur->dirty>>n)&1;
330 cur->dirty&=~(1<<hr);
331 cur->dirty|=dirty<<hr;
332 cur->isconst&=~(1<<hr);
335 // Alloc cycle count into dedicated register
336 static void alloc_cc(struct regstat *cur,int i)
338 alloc_arm_reg(cur,i,CCREG,HOST_CCREG);
343 static unused char regname[16][4] = {
361 static void output_w32(u_int word)
363 *((u_int *)out)=word;
367 static u_int rd_rn_rm(u_int rd, u_int rn, u_int rm)
372 return((rn<<16)|(rd<<12)|rm);
375 static u_int rd_rn_imm_shift(u_int rd, u_int rn, u_int imm, u_int shift)
380 assert((shift&1)==0);
381 return((rn<<16)|(rd<<12)|(((32-shift)&30)<<7)|imm);
384 static u_int genimm(u_int imm,u_int *encoded)
392 *encoded=((i&30)<<7)|imm;
395 imm=(imm>>2)|(imm<<30);i-=2;
400 static void genimm_checked(u_int imm,u_int *encoded)
402 u_int ret=genimm(imm,encoded);
407 static u_int genjmp(u_int addr)
409 if (addr < 3) return 0; // a branch that will be patched later
410 int offset = addr-(int)out-8;
411 if (offset < -33554432 || offset >= 33554432) {
412 SysPrintf("genjmp: out of range: %08x\n", offset);
416 return ((u_int)offset>>2)&0xffffff;
419 static unused void emit_breakpoint(void)
421 assem_debug("bkpt #0\n");
422 //output_w32(0xe1200070);
423 output_w32(0xe7f001f0);
426 static void emit_mov(int rs,int rt)
428 assem_debug("mov %s,%s\n",regname[rt],regname[rs]);
429 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs));
432 static void emit_movs(int rs,int rt)
434 assem_debug("movs %s,%s\n",regname[rt],regname[rs]);
435 output_w32(0xe1b00000|rd_rn_rm(rt,0,rs));
438 static void emit_add(int rs1,int rs2,int rt)
440 assem_debug("add %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
441 output_w32(0xe0800000|rd_rn_rm(rt,rs1,rs2));
444 static void emit_adcs(int rs1,int rs2,int rt)
446 assem_debug("adcs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
447 output_w32(0xe0b00000|rd_rn_rm(rt,rs1,rs2));
450 static void emit_neg(int rs, int rt)
452 assem_debug("rsb %s,%s,#0\n",regname[rt],regname[rs]);
453 output_w32(0xe2600000|rd_rn_rm(rt,rs,0));
456 static void emit_sub(int rs1,int rs2,int rt)
458 assem_debug("sub %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
459 output_w32(0xe0400000|rd_rn_rm(rt,rs1,rs2));
462 static void emit_zeroreg(int rt)
464 assem_debug("mov %s,#0\n",regname[rt]);
465 output_w32(0xe3a00000|rd_rn_rm(rt,0,0));
468 static void emit_loadlp(u_int imm,u_int rt)
470 add_literal((int)out,imm);
471 assem_debug("ldr %s,pc+? [=%x]\n",regname[rt],imm);
472 output_w32(0xe5900000|rd_rn_rm(rt,15,0));
475 static void emit_movw(u_int imm,u_int rt)
478 assem_debug("movw %s,#%d (0x%x)\n",regname[rt],imm,imm);
479 output_w32(0xe3000000|rd_rn_rm(rt,0,0)|(imm&0xfff)|((imm<<4)&0xf0000));
482 static void emit_movt(u_int imm,u_int rt)
484 assem_debug("movt %s,#%d (0x%x)\n",regname[rt],imm&0xffff0000,imm&0xffff0000);
485 output_w32(0xe3400000|rd_rn_rm(rt,0,0)|((imm>>16)&0xfff)|((imm>>12)&0xf0000));
488 static void emit_movimm(u_int imm,u_int rt)
491 if(genimm(imm,&armval)) {
492 assem_debug("mov %s,#%d\n",regname[rt],imm);
493 output_w32(0xe3a00000|rd_rn_rm(rt,0,0)|armval);
494 }else if(genimm(~imm,&armval)) {
495 assem_debug("mvn %s,#%d\n",regname[rt],imm);
496 output_w32(0xe3e00000|rd_rn_rm(rt,0,0)|armval);
497 }else if(imm<65536) {
499 assem_debug("mov %s,#%d\n",regname[rt],imm&0xFF00);
500 output_w32(0xe3a00000|rd_rn_imm_shift(rt,0,imm>>8,8));
501 assem_debug("add %s,%s,#%d\n",regname[rt],regname[rt],imm&0xFF);
502 output_w32(0xe2800000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
510 emit_movw(imm&0x0000FFFF,rt);
511 emit_movt(imm&0xFFFF0000,rt);
516 static void emit_pcreladdr(u_int rt)
518 assem_debug("add %s,pc,#?\n",regname[rt]);
519 output_w32(0xe2800000|rd_rn_rm(rt,15,0));
522 static void emit_loadreg(int r, int hr)
525 SysPrintf("64bit load in 32bit mode!\n");
532 int addr = (int)&psxRegs.GPR.r[r];
534 //case HIREG: addr = &hi; break;
535 //case LOREG: addr = &lo; break;
536 case CCREG: addr = (int)&cycle_count; break;
537 case CSREG: addr = (int)&Status; break;
538 case INVCP: addr = (int)&invc_ptr; break;
539 default: assert(r < 34); break;
541 u_int offset = addr-(u_int)&dynarec_local;
543 assem_debug("ldr %s,fp+%d\n",regname[hr],offset);
544 output_w32(0xe5900000|rd_rn_rm(hr,FP,0)|offset);
548 static void emit_storereg(int r, int hr)
551 SysPrintf("64bit store in 32bit mode!\n");
555 int addr = (int)&psxRegs.GPR.r[r];
557 //case HIREG: addr = &hi; break;
558 //case LOREG: addr = &lo; break;
559 case CCREG: addr = (int)&cycle_count; break;
560 default: assert(r < 34); break;
562 u_int offset = addr-(u_int)&dynarec_local;
564 assem_debug("str %s,fp+%d\n",regname[hr],offset);
565 output_w32(0xe5800000|rd_rn_rm(hr,FP,0)|offset);
568 static void emit_test(int rs, int rt)
570 assem_debug("tst %s,%s\n",regname[rs],regname[rt]);
571 output_w32(0xe1100000|rd_rn_rm(0,rs,rt));
574 static void emit_testimm(int rs,int imm)
577 assem_debug("tst %s,#%d\n",regname[rs],imm);
578 genimm_checked(imm,&armval);
579 output_w32(0xe3100000|rd_rn_rm(0,rs,0)|armval);
582 static void emit_testeqimm(int rs,int imm)
585 assem_debug("tsteq %s,$%d\n",regname[rs],imm);
586 genimm_checked(imm,&armval);
587 output_w32(0x03100000|rd_rn_rm(0,rs,0)|armval);
590 static void emit_not(int rs,int rt)
592 assem_debug("mvn %s,%s\n",regname[rt],regname[rs]);
593 output_w32(0xe1e00000|rd_rn_rm(rt,0,rs));
596 static void emit_and(u_int rs1,u_int rs2,u_int rt)
598 assem_debug("and %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
599 output_w32(0xe0000000|rd_rn_rm(rt,rs1,rs2));
602 static void emit_or(u_int rs1,u_int rs2,u_int rt)
604 assem_debug("orr %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
605 output_w32(0xe1800000|rd_rn_rm(rt,rs1,rs2));
608 static void emit_orrshl_imm(u_int rs,u_int imm,u_int rt)
613 assem_debug("orr %s,%s,%s,lsl #%d\n",regname[rt],regname[rt],regname[rs],imm);
614 output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|(imm<<7));
617 static void emit_orrshr_imm(u_int rs,u_int imm,u_int rt)
622 assem_debug("orr %s,%s,%s,lsr #%d\n",regname[rt],regname[rt],regname[rs],imm);
623 output_w32(0xe1800020|rd_rn_rm(rt,rt,rs)|(imm<<7));
626 static void emit_xor(u_int rs1,u_int rs2,u_int rt)
628 assem_debug("eor %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
629 output_w32(0xe0200000|rd_rn_rm(rt,rs1,rs2));
632 static void emit_xorsar_imm(u_int rs1,u_int rs2,u_int imm,u_int rt)
634 assem_debug("eor %s,%s,%s,asr #%d\n",regname[rt],regname[rs1],regname[rs2],imm);
635 output_w32(0xe0200040|rd_rn_rm(rt,rs1,rs2)|(imm<<7));
638 static void emit_addimm(u_int rs,int imm,u_int rt)
644 if(genimm(imm,&armval)) {
645 assem_debug("add %s,%s,#%d\n",regname[rt],regname[rs],imm);
646 output_w32(0xe2800000|rd_rn_rm(rt,rs,0)|armval);
647 }else if(genimm(-imm,&armval)) {
648 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rs],-imm);
649 output_w32(0xe2400000|rd_rn_rm(rt,rs,0)|armval);
651 }else if(rt!=rs&&(u_int)imm<65536) {
652 emit_movw(imm&0x0000ffff,rt);
654 }else if(rt!=rs&&(u_int)-imm<65536) {
655 emit_movw(-imm&0x0000ffff,rt);
658 }else if((u_int)-imm<65536) {
659 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rs],(-imm)&0xFF00);
660 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rt],(-imm)&0xFF);
661 output_w32(0xe2400000|rd_rn_imm_shift(rt,rs,(-imm)>>8,8));
662 output_w32(0xe2400000|rd_rn_imm_shift(rt,rt,(-imm)&0xff,0));
665 int shift = (ffs(imm) - 1) & ~1;
666 int imm8 = imm & (0xff << shift);
667 genimm_checked(imm8,&armval);
668 assem_debug("add %s,%s,#0x%x\n",regname[rt],regname[rs],imm8);
669 output_w32(0xe2800000|rd_rn_rm(rt,rs,0)|armval);
676 else if(rs!=rt) emit_mov(rs,rt);
679 static void emit_addimm_and_set_flags(int imm,int rt)
681 assert(imm>-65536&&imm<65536);
683 if(genimm(imm,&armval)) {
684 assem_debug("adds %s,%s,#%d\n",regname[rt],regname[rt],imm);
685 output_w32(0xe2900000|rd_rn_rm(rt,rt,0)|armval);
686 }else if(genimm(-imm,&armval)) {
687 assem_debug("subs %s,%s,#%d\n",regname[rt],regname[rt],imm);
688 output_w32(0xe2500000|rd_rn_rm(rt,rt,0)|armval);
690 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rt],(-imm)&0xFF00);
691 assem_debug("subs %s,%s,#%d\n",regname[rt],regname[rt],(-imm)&0xFF);
692 output_w32(0xe2400000|rd_rn_imm_shift(rt,rt,(-imm)>>8,8));
693 output_w32(0xe2500000|rd_rn_imm_shift(rt,rt,(-imm)&0xff,0));
695 assem_debug("add %s,%s,#%d\n",regname[rt],regname[rt],imm&0xFF00);
696 assem_debug("adds %s,%s,#%d\n",regname[rt],regname[rt],imm&0xFF);
697 output_w32(0xe2800000|rd_rn_imm_shift(rt,rt,imm>>8,8));
698 output_w32(0xe2900000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
702 static void emit_addimm_no_flags(u_int imm,u_int rt)
704 emit_addimm(rt,imm,rt);
707 static void emit_addnop(u_int r)
710 assem_debug("add %s,%s,#0 (nop)\n",regname[r],regname[r]);
711 output_w32(0xe2800000|rd_rn_rm(r,r,0));
714 static void emit_andimm(int rs,int imm,int rt)
719 }else if(genimm(imm,&armval)) {
720 assem_debug("and %s,%s,#%d\n",regname[rt],regname[rs],imm);
721 output_w32(0xe2000000|rd_rn_rm(rt,rs,0)|armval);
722 }else if(genimm(~imm,&armval)) {
723 assem_debug("bic %s,%s,#%d\n",regname[rt],regname[rs],imm);
724 output_w32(0xe3c00000|rd_rn_rm(rt,rs,0)|armval);
725 }else if(imm==65535) {
727 assem_debug("bic %s,%s,#FF000000\n",regname[rt],regname[rs]);
728 output_w32(0xe3c00000|rd_rn_rm(rt,rs,0)|0x4FF);
729 assem_debug("bic %s,%s,#00FF0000\n",regname[rt],regname[rt]);
730 output_w32(0xe3c00000|rd_rn_rm(rt,rt,0)|0x8FF);
732 assem_debug("uxth %s,%s\n",regname[rt],regname[rs]);
733 output_w32(0xe6ff0070|rd_rn_rm(rt,0,rs));
736 assert(imm>0&&imm<65535);
738 assem_debug("mov r14,#%d\n",imm&0xFF00);
739 output_w32(0xe3a00000|rd_rn_imm_shift(HOST_TEMPREG,0,imm>>8,8));
740 assem_debug("add r14,r14,#%d\n",imm&0xFF);
741 output_w32(0xe2800000|rd_rn_imm_shift(HOST_TEMPREG,HOST_TEMPREG,imm&0xff,0));
743 emit_movw(imm,HOST_TEMPREG);
745 assem_debug("and %s,%s,r14\n",regname[rt],regname[rs]);
746 output_w32(0xe0000000|rd_rn_rm(rt,rs,HOST_TEMPREG));
750 static void emit_orimm(int rs,int imm,int rt)
754 if(rs!=rt) emit_mov(rs,rt);
755 }else if(genimm(imm,&armval)) {
756 assem_debug("orr %s,%s,#%d\n",regname[rt],regname[rs],imm);
757 output_w32(0xe3800000|rd_rn_rm(rt,rs,0)|armval);
759 assert(imm>0&&imm<65536);
760 assem_debug("orr %s,%s,#%d\n",regname[rt],regname[rs],imm&0xFF00);
761 assem_debug("orr %s,%s,#%d\n",regname[rt],regname[rs],imm&0xFF);
762 output_w32(0xe3800000|rd_rn_imm_shift(rt,rs,imm>>8,8));
763 output_w32(0xe3800000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
767 static void emit_xorimm(int rs,int imm,int rt)
771 if(rs!=rt) emit_mov(rs,rt);
772 }else if(genimm(imm,&armval)) {
773 assem_debug("eor %s,%s,#%d\n",regname[rt],regname[rs],imm);
774 output_w32(0xe2200000|rd_rn_rm(rt,rs,0)|armval);
776 assert(imm>0&&imm<65536);
777 assem_debug("eor %s,%s,#%d\n",regname[rt],regname[rs],imm&0xFF00);
778 assem_debug("eor %s,%s,#%d\n",regname[rt],regname[rs],imm&0xFF);
779 output_w32(0xe2200000|rd_rn_imm_shift(rt,rs,imm>>8,8));
780 output_w32(0xe2200000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
784 static void emit_shlimm(int rs,u_int imm,int rt)
789 assem_debug("lsl %s,%s,#%d\n",regname[rt],regname[rs],imm);
790 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|(imm<<7));
793 static void emit_lsls_imm(int rs,int imm,int rt)
797 assem_debug("lsls %s,%s,#%d\n",regname[rt],regname[rs],imm);
798 output_w32(0xe1b00000|rd_rn_rm(rt,0,rs)|(imm<<7));
801 static unused void emit_lslpls_imm(int rs,int imm,int rt)
805 assem_debug("lslpls %s,%s,#%d\n",regname[rt],regname[rs],imm);
806 output_w32(0x51b00000|rd_rn_rm(rt,0,rs)|(imm<<7));
809 static void emit_shrimm(int rs,u_int imm,int rt)
813 assem_debug("lsr %s,%s,#%d\n",regname[rt],regname[rs],imm);
814 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x20|(imm<<7));
817 static void emit_sarimm(int rs,u_int imm,int rt)
821 assem_debug("asr %s,%s,#%d\n",regname[rt],regname[rs],imm);
822 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x40|(imm<<7));
825 static void emit_rorimm(int rs,u_int imm,int rt)
829 assem_debug("ror %s,%s,#%d\n",regname[rt],regname[rs],imm);
830 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x60|(imm<<7));
833 static void emit_signextend16(int rs,int rt)
836 emit_shlimm(rs,16,rt);
837 emit_sarimm(rt,16,rt);
839 assem_debug("sxth %s,%s\n",regname[rt],regname[rs]);
840 output_w32(0xe6bf0070|rd_rn_rm(rt,0,rs));
844 static void emit_signextend8(int rs,int rt)
847 emit_shlimm(rs,24,rt);
848 emit_sarimm(rt,24,rt);
850 assem_debug("sxtb %s,%s\n",regname[rt],regname[rs]);
851 output_w32(0xe6af0070|rd_rn_rm(rt,0,rs));
855 static void emit_shl(u_int rs,u_int shift,u_int rt)
861 assem_debug("lsl %s,%s,%s\n",regname[rt],regname[rs],regname[shift]);
862 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x10|(shift<<8));
865 static void emit_shr(u_int rs,u_int shift,u_int rt)
870 assem_debug("lsr %s,%s,%s\n",regname[rt],regname[rs],regname[shift]);
871 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x30|(shift<<8));
874 static void emit_sar(u_int rs,u_int shift,u_int rt)
879 assem_debug("asr %s,%s,%s\n",regname[rt],regname[rs],regname[shift]);
880 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x50|(shift<<8));
883 static unused void emit_orrshl(u_int rs,u_int shift,u_int rt)
888 assem_debug("orr %s,%s,%s,lsl %s\n",regname[rt],regname[rt],regname[rs],regname[shift]);
889 output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|0x10|(shift<<8));
892 static unused void emit_orrshr(u_int rs,u_int shift,u_int rt)
897 assem_debug("orr %s,%s,%s,lsr %s\n",regname[rt],regname[rt],regname[rs],regname[shift]);
898 output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|0x30|(shift<<8));
901 static void emit_cmpimm(int rs,int imm)
904 if(genimm(imm,&armval)) {
905 assem_debug("cmp %s,#%d\n",regname[rs],imm);
906 output_w32(0xe3500000|rd_rn_rm(0,rs,0)|armval);
907 }else if(genimm(-imm,&armval)) {
908 assem_debug("cmn %s,#%d\n",regname[rs],imm);
909 output_w32(0xe3700000|rd_rn_rm(0,rs,0)|armval);
912 emit_movimm(imm,HOST_TEMPREG);
913 assem_debug("cmp %s,r14\n",regname[rs]);
914 output_w32(0xe1500000|rd_rn_rm(0,rs,HOST_TEMPREG));
917 emit_movimm(-imm,HOST_TEMPREG);
918 assem_debug("cmn %s,r14\n",regname[rs]);
919 output_w32(0xe1700000|rd_rn_rm(0,rs,HOST_TEMPREG));
923 static void emit_cmovne_imm(int imm,int rt)
925 assem_debug("movne %s,#%d\n",regname[rt],imm);
927 genimm_checked(imm,&armval);
928 output_w32(0x13a00000|rd_rn_rm(rt,0,0)|armval);
931 static void emit_cmovl_imm(int imm,int rt)
933 assem_debug("movlt %s,#%d\n",regname[rt],imm);
935 genimm_checked(imm,&armval);
936 output_w32(0xb3a00000|rd_rn_rm(rt,0,0)|armval);
939 static void emit_cmovb_imm(int imm,int rt)
941 assem_debug("movcc %s,#%d\n",regname[rt],imm);
943 genimm_checked(imm,&armval);
944 output_w32(0x33a00000|rd_rn_rm(rt,0,0)|armval);
947 static void emit_cmovae_imm(int imm,int rt)
949 assem_debug("movcs %s,#%d\n",regname[rt],imm);
951 genimm_checked(imm,&armval);
952 output_w32(0x23a00000|rd_rn_rm(rt,0,0)|armval);
955 static void emit_cmovne_reg(int rs,int rt)
957 assem_debug("movne %s,%s\n",regname[rt],regname[rs]);
958 output_w32(0x11a00000|rd_rn_rm(rt,0,rs));
961 static void emit_cmovl_reg(int rs,int rt)
963 assem_debug("movlt %s,%s\n",regname[rt],regname[rs]);
964 output_w32(0xb1a00000|rd_rn_rm(rt,0,rs));
967 static void emit_cmovs_reg(int rs,int rt)
969 assem_debug("movmi %s,%s\n",regname[rt],regname[rs]);
970 output_w32(0x41a00000|rd_rn_rm(rt,0,rs));
973 static void emit_slti32(int rs,int imm,int rt)
975 if(rs!=rt) emit_zeroreg(rt);
977 if(rs==rt) emit_movimm(0,rt);
978 emit_cmovl_imm(1,rt);
981 static void emit_sltiu32(int rs,int imm,int rt)
983 if(rs!=rt) emit_zeroreg(rt);
985 if(rs==rt) emit_movimm(0,rt);
986 emit_cmovb_imm(1,rt);
989 static void emit_cmp(int rs,int rt)
991 assem_debug("cmp %s,%s\n",regname[rs],regname[rt]);
992 output_w32(0xe1500000|rd_rn_rm(0,rs,rt));
995 static void emit_set_gz32(int rs, int rt)
997 //assem_debug("set_gz32\n");
1000 emit_cmovl_imm(0,rt);
1003 static void emit_set_nz32(int rs, int rt)
1005 //assem_debug("set_nz32\n");
1006 if(rs!=rt) emit_movs(rs,rt);
1007 else emit_test(rs,rs);
1008 emit_cmovne_imm(1,rt);
1011 static void emit_set_if_less32(int rs1, int rs2, int rt)
1013 //assem_debug("set if less (%%%s,%%%s),%%%s\n",regname[rs1],regname[rs2],regname[rt]);
1014 if(rs1!=rt&&rs2!=rt) emit_zeroreg(rt);
1016 if(rs1==rt||rs2==rt) emit_movimm(0,rt);
1017 emit_cmovl_imm(1,rt);
1020 static void emit_set_if_carry32(int rs1, int rs2, int rt)
1022 //assem_debug("set if carry (%%%s,%%%s),%%%s\n",regname[rs1],regname[rs2],regname[rt]);
1023 if(rs1!=rt&&rs2!=rt) emit_zeroreg(rt);
1025 if(rs1==rt||rs2==rt) emit_movimm(0,rt);
1026 emit_cmovb_imm(1,rt);
1029 static int can_jump_or_call(const void *a)
1031 intptr_t offset = (u_char *)a - out - 8;
1032 return (-33554432 <= offset && offset < 33554432);
1035 static void emit_call(const void *a_)
1038 assem_debug("bl %x (%x+%x)%s\n",a,(int)out,a-(int)out-8,func_name(a_));
1039 u_int offset=genjmp(a);
1040 output_w32(0xeb000000|offset);
1043 static void emit_jmp(const void *a_)
1046 assem_debug("b %x (%x+%x)%s\n",a,(int)out,a-(int)out-8,func_name(a_));
1047 u_int offset=genjmp(a);
1048 output_w32(0xea000000|offset);
1051 static void emit_jne(const void *a_)
1054 assem_debug("bne %x\n",a);
1055 u_int offset=genjmp(a);
1056 output_w32(0x1a000000|offset);
1059 static void emit_jeq(const void *a_)
1062 assem_debug("beq %x\n",a);
1063 u_int offset=genjmp(a);
1064 output_w32(0x0a000000|offset);
1067 static void emit_js(const void *a_)
1070 assem_debug("bmi %x\n",a);
1071 u_int offset=genjmp(a);
1072 output_w32(0x4a000000|offset);
1075 static void emit_jns(const void *a_)
1078 assem_debug("bpl %x\n",a);
1079 u_int offset=genjmp(a);
1080 output_w32(0x5a000000|offset);
1083 static void emit_jl(const void *a_)
1086 assem_debug("blt %x\n",a);
1087 u_int offset=genjmp(a);
1088 output_w32(0xba000000|offset);
1091 static void emit_jge(const void *a_)
1094 assem_debug("bge %x\n",a);
1095 u_int offset=genjmp(a);
1096 output_w32(0xaa000000|offset);
1099 static void emit_jno(const void *a_)
1102 assem_debug("bvc %x\n",a);
1103 u_int offset=genjmp(a);
1104 output_w32(0x7a000000|offset);
1107 static void emit_jc(const void *a_)
1110 assem_debug("bcs %x\n",a);
1111 u_int offset=genjmp(a);
1112 output_w32(0x2a000000|offset);
1115 static void emit_jcc(const void *a_)
1118 assem_debug("bcc %x\n",a);
1119 u_int offset=genjmp(a);
1120 output_w32(0x3a000000|offset);
1123 static unused void emit_callreg(u_int r)
1126 assem_debug("blx %s\n",regname[r]);
1127 output_w32(0xe12fff30|r);
1130 static void emit_jmpreg(u_int r)
1132 assem_debug("mov pc,%s\n",regname[r]);
1133 output_w32(0xe1a00000|rd_rn_rm(15,0,r));
1136 static void emit_ret(void)
1141 static void emit_readword_indexed(int offset, int rs, int rt)
1143 assert(offset>-4096&&offset<4096);
1144 assem_debug("ldr %s,%s+%d\n",regname[rt],regname[rs],offset);
1146 output_w32(0xe5900000|rd_rn_rm(rt,rs,0)|offset);
1148 output_w32(0xe5100000|rd_rn_rm(rt,rs,0)|(-offset));
1152 static void emit_readword_dualindexedx4(int rs1, int rs2, int rt)
1154 assem_debug("ldr %s,%s,%s lsl #2\n",regname[rt],regname[rs1],regname[rs2]);
1155 output_w32(0xe7900000|rd_rn_rm(rt,rs1,rs2)|0x100);
1158 static void emit_ldrcc_dualindexed(int rs1, int rs2, int rt)
1160 assem_debug("ldrcc %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1161 output_w32(0x37900000|rd_rn_rm(rt,rs1,rs2));
1164 static void emit_ldrccb_dualindexed(int rs1, int rs2, int rt)
1166 assem_debug("ldrccb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1167 output_w32(0x37d00000|rd_rn_rm(rt,rs1,rs2));
1170 static void emit_ldrccsb_dualindexed(int rs1, int rs2, int rt)
1172 assem_debug("ldrccsb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1173 output_w32(0x319000d0|rd_rn_rm(rt,rs1,rs2));
1176 static void emit_ldrcch_dualindexed(int rs1, int rs2, int rt)
1178 assem_debug("ldrcch %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1179 output_w32(0x319000b0|rd_rn_rm(rt,rs1,rs2));
1182 static void emit_ldrccsh_dualindexed(int rs1, int rs2, int rt)
1184 assem_debug("ldrccsh %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1185 output_w32(0x319000f0|rd_rn_rm(rt,rs1,rs2));
1188 static void emit_movsbl_indexed(int offset, int rs, int rt)
1190 assert(offset>-256&&offset<256);
1191 assem_debug("ldrsb %s,%s+%d\n",regname[rt],regname[rs],offset);
1193 output_w32(0xe1d000d0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1195 output_w32(0xe15000d0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1199 static void emit_movswl_indexed(int offset, int rs, int rt)
1201 assert(offset>-256&&offset<256);
1202 assem_debug("ldrsh %s,%s+%d\n",regname[rt],regname[rs],offset);
1204 output_w32(0xe1d000f0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1206 output_w32(0xe15000f0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1210 static void emit_movzbl_indexed(int offset, int rs, int rt)
1212 assert(offset>-4096&&offset<4096);
1213 assem_debug("ldrb %s,%s+%d\n",regname[rt],regname[rs],offset);
1215 output_w32(0xe5d00000|rd_rn_rm(rt,rs,0)|offset);
1217 output_w32(0xe5500000|rd_rn_rm(rt,rs,0)|(-offset));
1221 static void emit_movzwl_indexed(int offset, int rs, int rt)
1223 assert(offset>-256&&offset<256);
1224 assem_debug("ldrh %s,%s+%d\n",regname[rt],regname[rs],offset);
1226 output_w32(0xe1d000b0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1228 output_w32(0xe15000b0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1232 static void emit_ldrd(int offset, int rs, int rt)
1234 assert(offset>-256&&offset<256);
1235 assem_debug("ldrd %s,%s+%d\n",regname[rt],regname[rs],offset);
1237 output_w32(0xe1c000d0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1239 output_w32(0xe14000d0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1243 static void emit_readword(void *addr, int rt)
1245 uintptr_t offset = (u_char *)addr - (u_char *)&dynarec_local;
1246 assert(offset<4096);
1247 assem_debug("ldr %s,fp+%d\n",regname[rt],offset);
1248 output_w32(0xe5900000|rd_rn_rm(rt,FP,0)|offset);
1251 static void emit_writeword_indexed(int rt, int offset, int rs)
1253 assert(offset>-4096&&offset<4096);
1254 assem_debug("str %s,%s+%d\n",regname[rt],regname[rs],offset);
1256 output_w32(0xe5800000|rd_rn_rm(rt,rs,0)|offset);
1258 output_w32(0xe5000000|rd_rn_rm(rt,rs,0)|(-offset));
1262 static void emit_writehword_indexed(int rt, int offset, int rs)
1264 assert(offset>-256&&offset<256);
1265 assem_debug("strh %s,%s+%d\n",regname[rt],regname[rs],offset);
1267 output_w32(0xe1c000b0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1269 output_w32(0xe14000b0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1273 static void emit_writebyte_indexed(int rt, int offset, int rs)
1275 assert(offset>-4096&&offset<4096);
1276 assem_debug("strb %s,%s+%d\n",regname[rt],regname[rs],offset);
1278 output_w32(0xe5c00000|rd_rn_rm(rt,rs,0)|offset);
1280 output_w32(0xe5400000|rd_rn_rm(rt,rs,0)|(-offset));
1284 static void emit_strcc_dualindexed(int rs1, int rs2, int rt)
1286 assem_debug("strcc %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1287 output_w32(0x37800000|rd_rn_rm(rt,rs1,rs2));
1290 static void emit_strccb_dualindexed(int rs1, int rs2, int rt)
1292 assem_debug("strccb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1293 output_w32(0x37c00000|rd_rn_rm(rt,rs1,rs2));
1296 static void emit_strcch_dualindexed(int rs1, int rs2, int rt)
1298 assem_debug("strcch %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1299 output_w32(0x318000b0|rd_rn_rm(rt,rs1,rs2));
1302 static void emit_writeword(int rt, void *addr)
1304 uintptr_t offset = (u_char *)addr - (u_char *)&dynarec_local;
1305 assert(offset<4096);
1306 assem_debug("str %s,fp+%d\n",regname[rt],offset);
1307 output_w32(0xe5800000|rd_rn_rm(rt,FP,0)|offset);
1310 static void emit_umull(u_int rs1, u_int rs2, u_int hi, u_int lo)
1312 assem_debug("umull %s, %s, %s, %s\n",regname[lo],regname[hi],regname[rs1],regname[rs2]);
1317 output_w32(0xe0800090|(hi<<16)|(lo<<12)|(rs2<<8)|rs1);
1320 static void emit_smull(u_int rs1, u_int rs2, u_int hi, u_int lo)
1322 assem_debug("smull %s, %s, %s, %s\n",regname[lo],regname[hi],regname[rs1],regname[rs2]);
1327 output_w32(0xe0c00090|(hi<<16)|(lo<<12)|(rs2<<8)|rs1);
1330 static void emit_clz(int rs,int rt)
1332 assem_debug("clz %s,%s\n",regname[rt],regname[rs]);
1333 output_w32(0xe16f0f10|rd_rn_rm(rt,0,rs));
1336 static void emit_subcs(int rs1,int rs2,int rt)
1338 assem_debug("subcs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1339 output_w32(0x20400000|rd_rn_rm(rt,rs1,rs2));
1342 static void emit_shrcc_imm(int rs,u_int imm,int rt)
1346 assem_debug("lsrcc %s,%s,#%d\n",regname[rt],regname[rs],imm);
1347 output_w32(0x31a00000|rd_rn_rm(rt,0,rs)|0x20|(imm<<7));
1350 static void emit_shrne_imm(int rs,u_int imm,int rt)
1354 assem_debug("lsrne %s,%s,#%d\n",regname[rt],regname[rs],imm);
1355 output_w32(0x11a00000|rd_rn_rm(rt,0,rs)|0x20|(imm<<7));
1358 static void emit_negmi(int rs, int rt)
1360 assem_debug("rsbmi %s,%s,#0\n",regname[rt],regname[rs]);
1361 output_w32(0x42600000|rd_rn_rm(rt,rs,0));
1364 static void emit_negsmi(int rs, int rt)
1366 assem_debug("rsbsmi %s,%s,#0\n",regname[rt],regname[rs]);
1367 output_w32(0x42700000|rd_rn_rm(rt,rs,0));
1370 static void emit_bic_lsl(u_int rs1,u_int rs2,u_int shift,u_int rt)
1372 assem_debug("bic %s,%s,%s lsl %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
1373 output_w32(0xe1C00000|rd_rn_rm(rt,rs1,rs2)|0x10|(shift<<8));
1376 static void emit_bic_lsr(u_int rs1,u_int rs2,u_int shift,u_int rt)
1378 assem_debug("bic %s,%s,%s lsr %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
1379 output_w32(0xe1C00000|rd_rn_rm(rt,rs1,rs2)|0x30|(shift<<8));
1382 static void emit_teq(int rs, int rt)
1384 assem_debug("teq %s,%s\n",regname[rs],regname[rt]);
1385 output_w32(0xe1300000|rd_rn_rm(0,rs,rt));
1388 static unused void emit_rsbimm(int rs, int imm, int rt)
1391 genimm_checked(imm,&armval);
1392 assem_debug("rsb %s,%s,#%d\n",regname[rt],regname[rs],imm);
1393 output_w32(0xe2600000|rd_rn_rm(rt,rs,0)|armval);
1396 // Conditionally select one of two immediates, optimizing for small code size
1397 // This will only be called if HAVE_CMOV_IMM is defined
1398 static void emit_cmov2imm_e_ne_compact(int imm1,int imm2,u_int rt)
1401 if(genimm(imm2-imm1,&armval)) {
1402 emit_movimm(imm1,rt);
1403 assem_debug("addne %s,%s,#%d\n",regname[rt],regname[rt],imm2-imm1);
1404 output_w32(0x12800000|rd_rn_rm(rt,rt,0)|armval);
1405 }else if(genimm(imm1-imm2,&armval)) {
1406 emit_movimm(imm1,rt);
1407 assem_debug("subne %s,%s,#%d\n",regname[rt],regname[rt],imm1-imm2);
1408 output_w32(0x12400000|rd_rn_rm(rt,rt,0)|armval);
1412 emit_movimm(imm1,rt);
1413 add_literal((int)out,imm2);
1414 assem_debug("ldrne %s,pc+? [=%x]\n",regname[rt],imm2);
1415 output_w32(0x15900000|rd_rn_rm(rt,15,0));
1417 emit_movw(imm1&0x0000FFFF,rt);
1418 if((imm1&0xFFFF)!=(imm2&0xFFFF)) {
1419 assem_debug("movwne %s,#%d (0x%x)\n",regname[rt],imm2&0xFFFF,imm2&0xFFFF);
1420 output_w32(0x13000000|rd_rn_rm(rt,0,0)|(imm2&0xfff)|((imm2<<4)&0xf0000));
1422 emit_movt(imm1&0xFFFF0000,rt);
1423 if((imm1&0xFFFF0000)!=(imm2&0xFFFF0000)) {
1424 assem_debug("movtne %s,#%d (0x%x)\n",regname[rt],imm2&0xffff0000,imm2&0xffff0000);
1425 output_w32(0x13400000|rd_rn_rm(rt,0,0)|((imm2>>16)&0xfff)|((imm2>>12)&0xf0000));
1431 // special case for checking invalid_code
1432 static void emit_cmpmem_indexedsr12_reg(int base,int r,int imm)
1434 assert(imm<128&&imm>=0);
1436 assem_debug("ldrb lr,%s,%s lsr #12\n",regname[base],regname[r]);
1437 output_w32(0xe7d00000|rd_rn_rm(HOST_TEMPREG,base,r)|0x620);
1438 emit_cmpimm(HOST_TEMPREG,imm);
1441 static void emit_callne(int a)
1443 assem_debug("blne %x\n",a);
1444 u_int offset=genjmp(a);
1445 output_w32(0x1b000000|offset);
1448 // Used to preload hash table entries
1449 static unused void emit_prefetchreg(int r)
1451 assem_debug("pld %s\n",regname[r]);
1452 output_w32(0xf5d0f000|rd_rn_rm(0,r,0));
1455 // Special case for mini_ht
1456 static void emit_ldreq_indexed(int rs, u_int offset, int rt)
1458 assert(offset<4096);
1459 assem_debug("ldreq %s,[%s, #%d]\n",regname[rt],regname[rs],offset);
1460 output_w32(0x05900000|rd_rn_rm(rt,rs,0)|offset);
1463 static void emit_orrne_imm(int rs,int imm,int rt)
1466 genimm_checked(imm,&armval);
1467 assem_debug("orrne %s,%s,#%d\n",regname[rt],regname[rs],imm);
1468 output_w32(0x13800000|rd_rn_rm(rt,rs,0)|armval);
1471 static void emit_andne_imm(int rs,int imm,int rt)
1474 genimm_checked(imm,&armval);
1475 assem_debug("andne %s,%s,#%d\n",regname[rt],regname[rs],imm);
1476 output_w32(0x12000000|rd_rn_rm(rt,rs,0)|armval);
1479 static unused void emit_addpl_imm(int rs,int imm,int rt)
1482 genimm_checked(imm,&armval);
1483 assem_debug("addpl %s,%s,#%d\n",regname[rt],regname[rs],imm);
1484 output_w32(0x52800000|rd_rn_rm(rt,rs,0)|armval);
1487 static void emit_jno_unlikely(int a)
1490 assem_debug("addvc pc,pc,#? (%x)\n",/*a-(int)out-8,*/a);
1491 output_w32(0x72800000|rd_rn_rm(15,15,0));
1494 static void save_regs_all(u_int reglist)
1497 if(!reglist) return;
1498 assem_debug("stmia fp,{");
1501 assem_debug("r%d,",i);
1503 output_w32(0xe88b0000|reglist);
1506 static void restore_regs_all(u_int reglist)
1509 if(!reglist) return;
1510 assem_debug("ldmia fp,{");
1513 assem_debug("r%d,",i);
1515 output_w32(0xe89b0000|reglist);
1518 // Save registers before function call
1519 static void save_regs(u_int reglist)
1521 reglist&=CALLER_SAVE_REGS; // only save the caller-save registers, r0-r3, r12
1522 save_regs_all(reglist);
1525 // Restore registers after function call
1526 static void restore_regs(u_int reglist)
1528 reglist&=CALLER_SAVE_REGS;
1529 restore_regs_all(reglist);
1532 /* Stubs/epilogue */
1534 static void literal_pool(int n)
1536 if(!literalcount) return;
1538 if((int)out-literals[0][0]<4096-n) return;
1542 for(i=0;i<literalcount;i++)
1544 u_int l_addr=(u_int)out;
1547 if(literals[j][1]==literals[i][1]) {
1548 //printf("dup %08x\n",literals[i][1]);
1549 l_addr=literals[j][0];
1553 ptr=(u_int *)literals[i][0];
1554 u_int offset=l_addr-(u_int)ptr-8;
1555 assert(offset<4096);
1556 assert(!(offset&3));
1558 if(l_addr==(u_int)out) {
1559 literals[i][0]=l_addr; // remember for dupes
1560 output_w32(literals[i][1]);
1566 static void literal_pool_jumpover(int n)
1568 if(!literalcount) return;
1570 if((int)out-literals[0][0]<4096-n) return;
1575 set_jump_target(jaddr, out);
1578 // parsed by get_pointer, find_extjump_insn
1579 static void emit_extjump2(u_char *addr, u_int target, void *linker)
1581 u_char *ptr=(u_char *)addr;
1582 assert((ptr[3]&0x0e)==0xa);
1585 emit_loadlp(target,0);
1586 emit_loadlp((u_int)addr,1);
1587 assert(addr>=ndrc->translation_cache&&addr<(ndrc->translation_cache+(1<<TARGET_SIZE_2)));
1588 //assert((target>=0x80000000&&target<0x80800000)||(target>0xA4000000&&target<0xA4001000));
1590 #ifdef DEBUG_CYCLE_COUNT
1591 emit_readword(&last_count,ECX);
1592 emit_add(HOST_CCREG,ECX,HOST_CCREG);
1593 emit_readword(&next_interupt,ECX);
1594 emit_writeword(HOST_CCREG,&Count);
1595 emit_sub(HOST_CCREG,ECX,HOST_CCREG);
1596 emit_writeword(ECX,&last_count);
1599 emit_far_jump(linker);
1602 static void check_extjump2(void *src)
1605 assert((ptr[1] & 0x0fff0000) == 0x059f0000); // ldr rx, [pc, #ofs]
1609 // put rt_val into rt, potentially making use of rs with value rs_val
1610 static void emit_movimm_from(u_int rs_val,int rs,u_int rt_val,int rt)
1614 if(genimm(rt_val,&armval)) {
1615 assem_debug("mov %s,#%d\n",regname[rt],rt_val);
1616 output_w32(0xe3a00000|rd_rn_rm(rt,0,0)|armval);
1619 if(genimm(~rt_val,&armval)) {
1620 assem_debug("mvn %s,#%d\n",regname[rt],rt_val);
1621 output_w32(0xe3e00000|rd_rn_rm(rt,0,0)|armval);
1625 if(genimm(diff,&armval)) {
1626 assem_debug("add %s,%s,#%d\n",regname[rt],regname[rs],diff);
1627 output_w32(0xe2800000|rd_rn_rm(rt,rs,0)|armval);
1629 }else if(genimm(-diff,&armval)) {
1630 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rs],-diff);
1631 output_w32(0xe2400000|rd_rn_rm(rt,rs,0)|armval);
1634 emit_movimm(rt_val,rt);
1637 // return 1 if above function can do it's job cheaply
1638 static int is_similar_value(u_int v1,u_int v2)
1642 if(v1==v2) return 1;
1644 for(xs=diff;xs!=0&&(xs&3)==0;xs>>=2)
1646 if(xs<0x100) return 1;
1647 for(xs=-diff;xs!=0&&(xs&3)==0;xs>>=2)
1649 if(xs<0x100) return 1;
1653 static void mov_loadtype_adj(enum stub_type type,int rs,int rt)
1656 case LOADB_STUB: emit_signextend8(rs,rt); break;
1657 case LOADBU_STUB: emit_andimm(rs,0xff,rt); break;
1658 case LOADH_STUB: emit_signextend16(rs,rt); break;
1659 case LOADHU_STUB: emit_andimm(rs,0xffff,rt); break;
1660 case LOADW_STUB: if(rs!=rt) emit_mov(rs,rt); break;
1665 #include "pcsxmem.h"
1666 #include "pcsxmem_inline.c"
1668 static void do_readstub(int n)
1670 assem_debug("do_readstub %x\n",start+stubs[n].a*4);
1672 set_jump_target(stubs[n].addr, out);
1673 enum stub_type type=stubs[n].type;
1676 const struct regstat *i_regs=(struct regstat *)stubs[n].c;
1677 u_int reglist=stubs[n].e;
1678 const signed char *i_regmap=i_regs->regmap;
1680 if(itype[i]==C1LS||itype[i]==C2LS||itype[i]==LOADLR) {
1681 rt=get_reg(i_regmap,FTEMP);
1683 rt=get_reg(i_regmap,rt1[i]);
1686 int r,temp=-1,temp2=HOST_TEMPREG,regs_saved=0;
1687 void *restore_jump = NULL;
1689 for(r=0;r<=12;r++) {
1690 if(((1<<r)&0x13ff)&&((1<<r)®list)==0) {
1694 if(rt>=0&&rt1[i]!=0)
1701 if((regs_saved||(reglist&2)==0)&&temp!=1&&rs!=1)
1703 emit_readword(&mem_rtab,temp);
1704 emit_shrimm(rs,12,temp2);
1705 emit_readword_dualindexedx4(temp,temp2,temp2);
1706 emit_lsls_imm(temp2,1,temp2);
1707 if(itype[i]==C1LS||itype[i]==C2LS||(rt>=0&&rt1[i]!=0)) {
1709 case LOADB_STUB: emit_ldrccsb_dualindexed(temp2,rs,rt); break;
1710 case LOADBU_STUB: emit_ldrccb_dualindexed(temp2,rs,rt); break;
1711 case LOADH_STUB: emit_ldrccsh_dualindexed(temp2,rs,rt); break;
1712 case LOADHU_STUB: emit_ldrcch_dualindexed(temp2,rs,rt); break;
1713 case LOADW_STUB: emit_ldrcc_dualindexed(temp2,rs,rt); break;
1719 emit_jcc(0); // jump to reg restore
1722 emit_jcc(stubs[n].retaddr); // return address
1727 if(type==LOADB_STUB||type==LOADBU_STUB)
1728 handler=jump_handler_read8;
1729 if(type==LOADH_STUB||type==LOADHU_STUB)
1730 handler=jump_handler_read16;
1731 if(type==LOADW_STUB)
1732 handler=jump_handler_read32;
1734 pass_args(rs,temp2);
1735 int cc=get_reg(i_regmap,CCREG);
1737 emit_loadreg(CCREG,2);
1738 emit_addimm(cc<0?2:cc,CLOCK_ADJUST((int)stubs[n].d),2);
1739 emit_far_call(handler);
1740 if(itype[i]==C1LS||itype[i]==C2LS||(rt>=0&&rt1[i]!=0)) {
1741 mov_loadtype_adj(type,0,rt);
1744 set_jump_target(restore_jump, out);
1745 restore_regs(reglist);
1746 emit_jmp(stubs[n].retaddr); // return address
1749 static void inline_readstub(enum stub_type type, int i, u_int addr,
1750 const signed char regmap[], int target, int adj, u_int reglist)
1752 int rs=get_reg(regmap,target);
1753 int rt=get_reg(regmap,target);
1754 if(rs<0) rs=get_reg(regmap,-1);
1757 uintptr_t host_addr = 0;
1759 int cc=get_reg(regmap,CCREG);
1760 if(pcsx_direct_read(type,addr,CLOCK_ADJUST(adj),cc,target?rs:-1,rt))
1762 handler = get_direct_memhandler(mem_rtab, addr, type, &host_addr);
1763 if (handler == NULL) {
1767 emit_movimm_from(addr,rs,host_addr,rs);
1769 case LOADB_STUB: emit_movsbl_indexed(0,rs,rt); break;
1770 case LOADBU_STUB: emit_movzbl_indexed(0,rs,rt); break;
1771 case LOADH_STUB: emit_movswl_indexed(0,rs,rt); break;
1772 case LOADHU_STUB: emit_movzwl_indexed(0,rs,rt); break;
1773 case LOADW_STUB: emit_readword_indexed(0,rs,rt); break;
1778 is_dynamic=pcsxmem_is_handler_dynamic(addr);
1780 if(type==LOADB_STUB||type==LOADBU_STUB)
1781 handler=jump_handler_read8;
1782 if(type==LOADH_STUB||type==LOADHU_STUB)
1783 handler=jump_handler_read16;
1784 if(type==LOADW_STUB)
1785 handler=jump_handler_read32;
1788 // call a memhandler
1789 if(rt>=0&&rt1[i]!=0)
1793 emit_movimm(addr,0);
1797 emit_loadreg(CCREG,2);
1799 emit_movimm(((u_int *)mem_rtab)[addr>>12]<<1,1);
1800 emit_addimm(cc<0?2:cc,CLOCK_ADJUST(adj),2);
1803 emit_readword(&last_count,3);
1804 emit_addimm(cc<0?2:cc,CLOCK_ADJUST(adj),2);
1806 emit_writeword(2,&Count);
1809 emit_far_call(handler);
1811 if(rt>=0&&rt1[i]!=0) {
1813 case LOADB_STUB: emit_signextend8(0,rt); break;
1814 case LOADBU_STUB: emit_andimm(0,0xff,rt); break;
1815 case LOADH_STUB: emit_signextend16(0,rt); break;
1816 case LOADHU_STUB: emit_andimm(0,0xffff,rt); break;
1817 case LOADW_STUB: if(rt!=0) emit_mov(0,rt); break;
1821 restore_regs(reglist);
1824 static void do_writestub(int n)
1826 assem_debug("do_writestub %x\n",start+stubs[n].a*4);
1828 set_jump_target(stubs[n].addr, out);
1829 enum stub_type type=stubs[n].type;
1832 const struct regstat *i_regs=(struct regstat *)stubs[n].c;
1833 u_int reglist=stubs[n].e;
1834 const signed char *i_regmap=i_regs->regmap;
1836 if(itype[i]==C1LS||itype[i]==C2LS) {
1837 rt=get_reg(i_regmap,r=FTEMP);
1839 rt=get_reg(i_regmap,r=rs2[i]);
1843 int rtmp,temp=-1,temp2=HOST_TEMPREG,regs_saved=0;
1844 void *restore_jump = NULL;
1845 int reglist2=reglist|(1<<rs)|(1<<rt);
1846 for(rtmp=0;rtmp<=12;rtmp++) {
1847 if(((1<<rtmp)&0x13ff)&&((1<<rtmp)®list2)==0) {
1854 for(rtmp=0;rtmp<=3;rtmp++)
1855 if(rtmp!=rs&&rtmp!=rt)
1858 if((regs_saved||(reglist2&8)==0)&&temp!=3&&rs!=3&&rt!=3)
1860 emit_readword(&mem_wtab,temp);
1861 emit_shrimm(rs,12,temp2);
1862 emit_readword_dualindexedx4(temp,temp2,temp2);
1863 emit_lsls_imm(temp2,1,temp2);
1865 case STOREB_STUB: emit_strccb_dualindexed(temp2,rs,rt); break;
1866 case STOREH_STUB: emit_strcch_dualindexed(temp2,rs,rt); break;
1867 case STOREW_STUB: emit_strcc_dualindexed(temp2,rs,rt); break;
1872 emit_jcc(0); // jump to reg restore
1875 emit_jcc(stubs[n].retaddr); // return address (invcode check)
1881 case STOREB_STUB: handler=jump_handler_write8; break;
1882 case STOREH_STUB: handler=jump_handler_write16; break;
1883 case STOREW_STUB: handler=jump_handler_write32; break;
1890 int cc=get_reg(i_regmap,CCREG);
1892 emit_loadreg(CCREG,2);
1893 emit_addimm(cc<0?2:cc,CLOCK_ADJUST((int)stubs[n].d),2);
1894 // returns new cycle_count
1895 emit_far_call(handler);
1896 emit_addimm(0,-CLOCK_ADJUST((int)stubs[n].d),cc<0?2:cc);
1898 emit_storereg(CCREG,2);
1900 set_jump_target(restore_jump, out);
1901 restore_regs(reglist);
1902 emit_jmp(stubs[n].retaddr);
1905 static void inline_writestub(enum stub_type type, int i, u_int addr,
1906 const signed char regmap[], int target, int adj, u_int reglist)
1908 int rs=get_reg(regmap,-1);
1909 int rt=get_reg(regmap,target);
1912 uintptr_t host_addr = 0;
1913 void *handler = get_direct_memhandler(mem_wtab, addr, type, &host_addr);
1914 if (handler == NULL) {
1916 emit_movimm_from(addr,rs,host_addr,rs);
1918 case STOREB_STUB: emit_writebyte_indexed(rt,0,rs); break;
1919 case STOREH_STUB: emit_writehword_indexed(rt,0,rs); break;
1920 case STOREW_STUB: emit_writeword_indexed(rt,0,rs); break;
1926 // call a memhandler
1929 int cc=get_reg(regmap,CCREG);
1931 emit_loadreg(CCREG,2);
1932 emit_addimm(cc<0?2:cc,CLOCK_ADJUST(adj),2);
1933 emit_movimm((u_int)handler,3);
1934 // returns new cycle_count
1935 emit_far_call(jump_handler_write_h);
1936 emit_addimm(0,-CLOCK_ADJUST(adj),cc<0?2:cc);
1938 emit_storereg(CCREG,2);
1939 restore_regs(reglist);
1942 // this output is parsed by verify_dirty, get_bounds, isclean, get_clean_addr
1943 static void do_dirty_stub_emit_args(u_int arg0)
1946 emit_loadlp((int)source, 1);
1947 emit_loadlp((int)copy, 2);
1948 emit_loadlp(slen*4, 3);
1950 emit_movw(((u_int)source)&0x0000FFFF, 1);
1951 emit_movw(((u_int)copy)&0x0000FFFF, 2);
1952 emit_movt(((u_int)source)&0xFFFF0000, 1);
1953 emit_movt(((u_int)copy)&0xFFFF0000, 2);
1954 emit_movw(slen*4, 3);
1956 emit_movimm(arg0, 0);
1959 static void *do_dirty_stub(int i)
1961 assem_debug("do_dirty_stub %x\n",start+i*4);
1962 do_dirty_stub_emit_args(start + i*4);
1963 emit_far_call(verify_code);
1967 entry = instr_addr[i];
1968 emit_jmp(instr_addr[i]);
1972 static void do_dirty_stub_ds()
1974 do_dirty_stub_emit_args(start + 1);
1975 emit_far_call(verify_code_ds);
1980 static void c2op_prologue(u_int op, int i, const struct regstat *i_regs, u_int reglist)
1982 save_regs_all(reglist);
1983 cop2_call_stall_check(op, i, i_regs, 0);
1986 emit_far_call(pcnt_gte_start);
1988 emit_addimm(FP, (u_char *)&psxRegs.CP2D.r[0] - (u_char *)&dynarec_local, 0); // cop2 regs
1991 static void c2op_epilogue(u_int op,u_int reglist)
1995 emit_far_call(pcnt_gte_end);
1997 restore_regs_all(reglist);
2000 static void c2op_call_MACtoIR(int lm,int need_flags)
2003 emit_far_call(lm?gteMACtoIR_lm1:gteMACtoIR_lm0);
2005 emit_far_call(lm?gteMACtoIR_lm1_nf:gteMACtoIR_lm0_nf);
2008 static void c2op_call_rgb_func(void *func,int lm,int need_ir,int need_flags)
2010 emit_far_call(func);
2011 // func is C code and trashes r0
2012 emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0);
2013 if(need_flags||need_ir)
2014 c2op_call_MACtoIR(lm,need_flags);
2015 emit_far_call(need_flags?gteMACtoRGB:gteMACtoRGB_nf);
2018 static void c2op_assemble(int i, const struct regstat *i_regs)
2020 u_int c2op = source[i] & 0x3f;
2021 u_int reglist_full = get_host_reglist(i_regs->regmap);
2022 u_int reglist = reglist_full & CALLER_SAVE_REGS;
2023 int need_flags, need_ir;
2025 if (gte_handlers[c2op]!=NULL) {
2026 need_flags=!(gte_unneeded[i+1]>>63); // +1 because of how liveness detection works
2027 need_ir=(gte_unneeded[i+1]&0xe00)!=0xe00;
2028 assem_debug("gte op %08x, unneeded %016llx, need_flags %d, need_ir %d\n",
2029 source[i],gte_unneeded[i+1],need_flags,need_ir);
2030 if(HACK_ENABLED(NDHACK_GTE_NO_FLAGS))
2032 int shift = (source[i] >> 19) & 1;
2033 int lm = (source[i] >> 10) & 1;
2038 int v = (source[i] >> 15) & 3;
2039 int cv = (source[i] >> 13) & 3;
2040 int mx = (source[i] >> 17) & 3;
2041 reglist=reglist_full&(CALLER_SAVE_REGS|0xf0); // +{r4-r7}
2042 c2op_prologue(c2op,i,i_regs,reglist);
2043 /* r4,r5 = VXYZ(v) packed; r6 = &MX11(mx); r7 = &CV1(cv) */
2047 emit_movzwl_indexed(9*4,0,4); // gteIR
2048 emit_movzwl_indexed(10*4,0,6);
2049 emit_movzwl_indexed(11*4,0,5);
2050 emit_orrshl_imm(6,16,4);
2053 emit_addimm(0,32*4+mx*8*4,6);
2055 emit_readword(&zeromem_ptr,6);
2057 emit_addimm(0,32*4+(cv*8+5)*4,7);
2059 emit_readword(&zeromem_ptr,7);
2061 emit_movimm(source[i],1); // opcode
2062 emit_far_call(gteMVMVA_part_neon);
2065 emit_far_call(gteMACtoIR_flags_neon);
2069 emit_far_call((int)gteMVMVA_part_cv3sh12_arm);
2071 emit_movimm(shift,1);
2072 emit_far_call((int)(need_flags?gteMVMVA_part_arm:gteMVMVA_part_nf_arm));
2074 if(need_flags||need_ir)
2075 c2op_call_MACtoIR(lm,need_flags);
2077 #else /* if not HAVE_ARMV5 */
2078 c2op_prologue(c2op,i,i_regs,reglist);
2079 emit_movimm(source[i],1); // opcode
2080 emit_writeword(1,&psxRegs.code);
2081 emit_far_call(need_flags?gte_handlers[c2op]:gte_handlers_nf[c2op]);
2086 c2op_prologue(c2op,i,i_regs,reglist);
2087 emit_far_call(shift?gteOP_part_shift:gteOP_part_noshift);
2088 if(need_flags||need_ir) {
2089 emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0);
2090 c2op_call_MACtoIR(lm,need_flags);
2094 c2op_prologue(c2op,i,i_regs,reglist);
2095 c2op_call_rgb_func(shift?gteDPCS_part_shift:gteDPCS_part_noshift,lm,need_ir,need_flags);
2098 c2op_prologue(c2op,i,i_regs,reglist);
2099 c2op_call_rgb_func(shift?gteINTPL_part_shift:gteINTPL_part_noshift,lm,need_ir,need_flags);
2102 c2op_prologue(c2op,i,i_regs,reglist);
2103 emit_far_call(shift?gteSQR_part_shift:gteSQR_part_noshift);
2104 if(need_flags||need_ir) {
2105 emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0);
2106 c2op_call_MACtoIR(lm,need_flags);
2110 c2op_prologue(c2op,i,i_regs,reglist);
2111 c2op_call_rgb_func(gteDCPL_part,lm,need_ir,need_flags);
2114 c2op_prologue(c2op,i,i_regs,reglist);
2115 c2op_call_rgb_func(shift?gteGPF_part_shift:gteGPF_part_noshift,lm,need_ir,need_flags);
2118 c2op_prologue(c2op,i,i_regs,reglist);
2119 c2op_call_rgb_func(shift?gteGPL_part_shift:gteGPL_part_noshift,lm,need_ir,need_flags);
2123 c2op_prologue(c2op,i,i_regs,reglist);
2125 emit_movimm(source[i],1); // opcode
2126 emit_writeword(1,&psxRegs.code);
2128 emit_far_call(need_flags?gte_handlers[c2op]:gte_handlers_nf[c2op]);
2131 c2op_epilogue(c2op,reglist);
2135 static void c2op_ctc2_31_assemble(signed char sl, signed char temp)
2137 //value = value & 0x7ffff000;
2138 //if (value & 0x7f87e000) value |= 0x80000000;
2139 emit_shrimm(sl,12,temp);
2140 emit_shlimm(temp,12,temp);
2141 emit_testimm(temp,0x7f000000);
2142 emit_testeqimm(temp,0x00870000);
2143 emit_testeqimm(temp,0x0000e000);
2144 emit_orrne_imm(temp,0x80000000,temp);
2147 static void do_mfc2_31_one(u_int copr,signed char temp)
2149 emit_readword(®_cop2d[copr],temp);
2150 emit_testimm(temp,0x8000); // do we need this?
2151 emit_andne_imm(temp,0,temp);
2152 emit_cmpimm(temp,0xf80);
2153 emit_andimm(temp,0xf80,temp);
2154 emit_cmovae_imm(0xf80,temp);
2157 static void c2op_mfc2_29_assemble(signed char tl, signed char temp)
2160 host_tempreg_acquire();
2161 temp = HOST_TEMPREG;
2163 do_mfc2_31_one(9,temp);
2164 emit_shrimm(temp,7,tl);
2165 do_mfc2_31_one(10,temp);
2166 emit_orrshr_imm(temp,2,tl);
2167 do_mfc2_31_one(11,temp);
2168 emit_orrshl_imm(temp,3,tl);
2169 emit_writeword(tl,®_cop2d[29]);
2170 if (temp == HOST_TEMPREG)
2171 host_tempreg_release();
2174 static void multdiv_assemble_arm(int i,struct regstat *i_regs)
2181 // case 0x1D: DMULTU
2186 if((opcode2[i]&4)==0) // 32-bit
2188 if(opcode2[i]==0x18) // MULT
2190 signed char m1=get_reg(i_regs->regmap,rs1[i]);
2191 signed char m2=get_reg(i_regs->regmap,rs2[i]);
2192 signed char hi=get_reg(i_regs->regmap,HIREG);
2193 signed char lo=get_reg(i_regs->regmap,LOREG);
2198 emit_smull(m1,m2,hi,lo);
2200 if(opcode2[i]==0x19) // MULTU
2202 signed char m1=get_reg(i_regs->regmap,rs1[i]);
2203 signed char m2=get_reg(i_regs->regmap,rs2[i]);
2204 signed char hi=get_reg(i_regs->regmap,HIREG);
2205 signed char lo=get_reg(i_regs->regmap,LOREG);
2210 emit_umull(m1,m2,hi,lo);
2212 if(opcode2[i]==0x1A) // DIV
2214 signed char d1=get_reg(i_regs->regmap,rs1[i]);
2215 signed char d2=get_reg(i_regs->regmap,rs2[i]);
2218 signed char quotient=get_reg(i_regs->regmap,LOREG);
2219 signed char remainder=get_reg(i_regs->regmap,HIREG);
2220 assert(quotient>=0);
2221 assert(remainder>=0);
2222 emit_movs(d1,remainder);
2223 emit_movimm(0xffffffff,quotient);
2224 emit_negmi(quotient,quotient); // .. quotient and ..
2225 emit_negmi(remainder,remainder); // .. remainder for div0 case (will be negated back after jump)
2226 emit_movs(d2,HOST_TEMPREG);
2227 emit_jeq(out+52); // Division by zero
2228 emit_negsmi(HOST_TEMPREG,HOST_TEMPREG);
2230 emit_clz(HOST_TEMPREG,quotient);
2231 emit_shl(HOST_TEMPREG,quotient,HOST_TEMPREG);
2233 emit_movimm(0,quotient);
2234 emit_addpl_imm(quotient,1,quotient);
2235 emit_lslpls_imm(HOST_TEMPREG,1,HOST_TEMPREG);
2238 emit_orimm(quotient,1<<31,quotient);
2239 emit_shr(quotient,quotient,quotient);
2240 emit_cmp(remainder,HOST_TEMPREG);
2241 emit_subcs(remainder,HOST_TEMPREG,remainder);
2242 emit_adcs(quotient,quotient,quotient);
2243 emit_shrimm(HOST_TEMPREG,1,HOST_TEMPREG);
2244 emit_jcc(out-16); // -4
2246 emit_negmi(quotient,quotient);
2248 emit_negmi(remainder,remainder);
2250 if(opcode2[i]==0x1B) // DIVU
2252 signed char d1=get_reg(i_regs->regmap,rs1[i]); // dividend
2253 signed char d2=get_reg(i_regs->regmap,rs2[i]); // divisor
2256 signed char quotient=get_reg(i_regs->regmap,LOREG);
2257 signed char remainder=get_reg(i_regs->regmap,HIREG);
2258 assert(quotient>=0);
2259 assert(remainder>=0);
2260 emit_mov(d1,remainder);
2261 emit_movimm(0xffffffff,quotient); // div0 case
2263 emit_jeq(out+40); // Division by zero
2265 emit_clz(d2,HOST_TEMPREG);
2266 emit_movimm(1<<31,quotient);
2267 emit_shl(d2,HOST_TEMPREG,d2);
2269 emit_movimm(0,HOST_TEMPREG);
2270 emit_addpl_imm(HOST_TEMPREG,1,HOST_TEMPREG);
2271 emit_lslpls_imm(d2,1,d2);
2273 emit_movimm(1<<31,quotient);
2275 emit_shr(quotient,HOST_TEMPREG,quotient);
2276 emit_cmp(remainder,d2);
2277 emit_subcs(remainder,d2,remainder);
2278 emit_adcs(quotient,quotient,quotient);
2279 emit_shrcc_imm(d2,1,d2);
2280 emit_jcc(out-16); // -4
2288 // Multiply by zero is zero.
2289 // MIPS does not have a divide by zero exception.
2290 // The result is undefined, we return zero.
2291 signed char hr=get_reg(i_regs->regmap,HIREG);
2292 signed char lr=get_reg(i_regs->regmap,LOREG);
2293 if(hr>=0) emit_zeroreg(hr);
2294 if(lr>=0) emit_zeroreg(lr);
2297 #define multdiv_assemble multdiv_assemble_arm
2299 static void do_jump_vaddr(int rs)
2301 emit_far_jump(jump_vaddr_reg[rs]);
2304 static void do_preload_rhash(int r) {
2305 // Don't need this for ARM. On x86, this puts the value 0xf8 into the
2306 // register. On ARM the hash can be done with a single instruction (below)
2309 static void do_preload_rhtbl(int ht) {
2310 emit_addimm(FP,(int)&mini_ht-(int)&dynarec_local,ht);
2313 static void do_rhash(int rs,int rh) {
2314 emit_andimm(rs,0xf8,rh);
2317 static void do_miniht_load(int ht,int rh) {
2318 assem_debug("ldr %s,[%s,%s]!\n",regname[rh],regname[ht],regname[rh]);
2319 output_w32(0xe7b00000|rd_rn_rm(rh,ht,rh));
2322 static void do_miniht_jump(int rs,int rh,int ht) {
2324 emit_ldreq_indexed(ht,4,15);
2325 #ifdef CORTEX_A8_BRANCH_PREDICTION_HACK
2333 static void do_miniht_insert(u_int return_address,int rt,int temp) {
2335 emit_movimm(return_address,rt); // PC into link register
2336 add_to_linker(out,return_address,1);
2337 emit_pcreladdr(temp);
2338 emit_writeword(rt,&mini_ht[(return_address&0xFF)>>3][0]);
2339 emit_writeword(temp,&mini_ht[(return_address&0xFF)>>3][1]);
2341 emit_movw(return_address&0x0000FFFF,rt);
2342 add_to_linker(out,return_address,1);
2343 emit_pcreladdr(temp);
2344 emit_writeword(temp,&mini_ht[(return_address&0xFF)>>3][1]);
2345 emit_movt(return_address&0xFFFF0000,rt);
2346 emit_writeword(rt,&mini_ht[(return_address&0xFF)>>3][0]);
2350 // CPU-architecture-specific initialization
2351 static void arch_init(void)
2353 uintptr_t diff = (u_char *)&ndrc->tramp.f - (u_char *)&ndrc->tramp.ops - 8;
2354 struct tramp_insns *ops = ndrc->tramp.ops;
2356 assert(!(diff & 3));
2357 assert(diff < 0x1000);
2358 start_tcache_write(ops, (u_char *)ops + sizeof(ndrc->tramp.ops));
2359 for (i = 0; i < ARRAY_SIZE(ndrc->tramp.ops); i++)
2360 ops[i].ldrpc = 0xe5900000 | rd_rn_rm(15,15,0) | diff; // ldr pc, [=val]
2361 end_tcache_write(ops, (u_char *)ops + sizeof(ndrc->tramp.ops));
2364 // vim:shiftwidth=2:expandtab