1 /* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
2 * Mupen64plus/PCSX - assem_arm.c *
3 * Copyright (C) 2009-2011 Ari64 *
4 * Copyright (C) 2010-2021 GraÅžvydas "notaz" Ignotas *
6 * This program is free software; you can redistribute it and/or modify *
7 * it under the terms of the GNU General Public License as published by *
8 * the Free Software Foundation; either version 2 of the License, or *
9 * (at your option) any later version. *
11 * This program is distributed in the hope that it will be useful, *
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
14 * GNU General Public License for more details. *
16 * You should have received a copy of the GNU General Public License *
17 * along with this program; if not, write to the *
18 * Free Software Foundation, Inc., *
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. *
20 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
25 #include "../gte_arm.h"
26 #include "../gte_neon.h"
28 #include "arm_features.h"
31 #pragma GCC diagnostic ignored "-Wunused-function"
32 #pragma GCC diagnostic ignored "-Wunused-variable"
33 #pragma GCC diagnostic ignored "-Wunused-but-set-variable"
36 void indirect_jump_indexed();
49 void jump_vaddr_r10();
50 void jump_vaddr_r12();
52 void * const jump_vaddr_reg[16] = {
71 void invalidate_addr_r0();
72 void invalidate_addr_r1();
73 void invalidate_addr_r2();
74 void invalidate_addr_r3();
75 void invalidate_addr_r4();
76 void invalidate_addr_r5();
77 void invalidate_addr_r6();
78 void invalidate_addr_r7();
79 void invalidate_addr_r8();
80 void invalidate_addr_r9();
81 void invalidate_addr_r10();
82 void invalidate_addr_r12();
84 const u_int invalidate_addr_reg[16] = {
85 (int)invalidate_addr_r0,
86 (int)invalidate_addr_r1,
87 (int)invalidate_addr_r2,
88 (int)invalidate_addr_r3,
89 (int)invalidate_addr_r4,
90 (int)invalidate_addr_r5,
91 (int)invalidate_addr_r6,
92 (int)invalidate_addr_r7,
93 (int)invalidate_addr_r8,
94 (int)invalidate_addr_r9,
95 (int)invalidate_addr_r10,
97 (int)invalidate_addr_r12,
104 static void set_jump_target(void *addr, void *target_)
106 u_int target = (u_int)target_;
108 u_int *ptr2=(u_int *)ptr;
110 assert((target-(u_int)ptr2-8)<1024);
111 assert(((uintptr_t)addr&3)==0);
112 assert((target&3)==0);
113 *ptr2=(*ptr2&0xFFFFF000)|((target-(u_int)ptr2-8)>>2)|0xF00;
114 //printf("target=%x addr=%p insn=%x\n",target,addr,*ptr2);
116 else if(ptr[3]==0x72) {
117 // generated by emit_jno_unlikely
118 if((target-(u_int)ptr2-8)<1024) {
119 assert(((uintptr_t)addr&3)==0);
120 assert((target&3)==0);
121 *ptr2=(*ptr2&0xFFFFF000)|((target-(u_int)ptr2-8)>>2)|0xF00;
123 else if((target-(u_int)ptr2-8)<4096&&!((target-(u_int)ptr2-8)&15)) {
124 assert(((uintptr_t)addr&3)==0);
125 assert((target&3)==0);
126 *ptr2=(*ptr2&0xFFFFF000)|((target-(u_int)ptr2-8)>>4)|0xE00;
128 else *ptr2=(0x7A000000)|(((target-(u_int)ptr2-8)<<6)>>8);
131 assert((ptr[3]&0x0e)==0xa);
132 *ptr2=(*ptr2&0xFF000000)|(((target-(u_int)ptr2-8)<<6)>>8);
136 // This optionally copies the instruction from the target of the branch into
137 // the space before the branch. Works, but the difference in speed is
138 // usually insignificant.
140 static void set_jump_target_fillslot(int addr,u_int target,int copy)
142 u_char *ptr=(u_char *)addr;
143 u_int *ptr2=(u_int *)ptr;
144 assert(!copy||ptr2[-1]==0xe28dd000);
147 assert((target-(u_int)ptr2-8)<4096);
148 *ptr2=(*ptr2&0xFFFFF000)|(target-(u_int)ptr2-8);
151 assert((ptr[3]&0x0e)==0xa);
152 u_int target_insn=*(u_int *)target;
153 if((target_insn&0x0e100000)==0) { // ALU, no immediate, no flags
156 if((target_insn&0x0c100000)==0x04100000) { // Load
159 if(target_insn&0x08000000) {
163 ptr2[-1]=target_insn;
166 *ptr2=(*ptr2&0xFF000000)|(((target-(u_int)ptr2-8)<<6)>>8);
172 static void add_literal(int addr,int val)
174 assert(literalcount<sizeof(literals)/sizeof(literals[0]));
175 literals[literalcount][0]=addr;
176 literals[literalcount][1]=val;
180 // from a pointer to external jump stub (which was produced by emit_extjump2)
181 // find where the jumping insn is
182 static void *find_extjump_insn(void *stub)
184 int *ptr=(int *)(stub+4);
185 assert((*ptr&0x0fff0000)==0x059f0000); // ldr rx, [pc, #ofs]
186 u_int offset=*ptr&0xfff;
187 void **l_ptr=(void *)ptr+offset+8;
191 // find where external branch is liked to using addr of it's stub:
192 // get address that insn one after stub loads (dyna_linker arg1),
193 // treat it as a pointer to branch insn,
194 // return addr where that branch jumps to
196 static void *get_pointer(void *stub)
198 //printf("get_pointer(%x)\n",(int)stub);
199 int *i_ptr=find_extjump_insn(stub);
200 assert((*i_ptr&0x0f000000)==0x0a000000); // b
201 return (u_char *)i_ptr+((*i_ptr<<8)>>6)+8;
205 // Allocate a specific ARM register.
206 static void alloc_arm_reg(struct regstat *cur,int i,signed char reg,int hr)
211 // see if it's already allocated (and dealloc it)
212 for(n=0;n<HOST_REGS;n++)
214 if(n!=EXCLUDE_REG&&cur->regmap[n]==reg) {
215 dirty=(cur->dirty>>n)&1;
221 cur->dirty&=~(1<<hr);
222 cur->dirty|=dirty<<hr;
223 cur->isconst&=~(1<<hr);
226 // Alloc cycle count into dedicated register
227 static void alloc_cc(struct regstat *cur,int i)
229 alloc_arm_reg(cur,i,CCREG,HOST_CCREG);
234 static unused char regname[16][4] = {
252 static void output_w32(u_int word)
254 *((u_int *)out)=word;
258 static u_int rd_rn_rm(u_int rd, u_int rn, u_int rm)
263 return((rn<<16)|(rd<<12)|rm);
266 static u_int rd_rn_imm_shift(u_int rd, u_int rn, u_int imm, u_int shift)
271 assert((shift&1)==0);
272 return((rn<<16)|(rd<<12)|(((32-shift)&30)<<7)|imm);
275 static u_int genimm(u_int imm,u_int *encoded)
283 *encoded=((i&30)<<7)|imm;
286 imm=(imm>>2)|(imm<<30);i-=2;
291 static void genimm_checked(u_int imm,u_int *encoded)
293 u_int ret=genimm(imm,encoded);
298 static u_int genjmp(u_int addr)
300 if (addr < 3) return 0; // a branch that will be patched later
301 int offset = addr-(int)out-8;
302 if (offset < -33554432 || offset >= 33554432) {
303 SysPrintf("genjmp: out of range: %08x\n", offset);
307 return ((u_int)offset>>2)&0xffffff;
310 static unused void emit_breakpoint(void)
312 assem_debug("bkpt #0\n");
313 //output_w32(0xe1200070);
314 output_w32(0xe7f001f0);
317 static void emit_mov(int rs,int rt)
319 assem_debug("mov %s,%s\n",regname[rt],regname[rs]);
320 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs));
323 static void emit_movs(int rs,int rt)
325 assem_debug("movs %s,%s\n",regname[rt],regname[rs]);
326 output_w32(0xe1b00000|rd_rn_rm(rt,0,rs));
329 static void emit_add(int rs1,int rs2,int rt)
331 assem_debug("add %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
332 output_w32(0xe0800000|rd_rn_rm(rt,rs1,rs2));
335 static void emit_adds(int rs1,int rs2,int rt)
337 assem_debug("adds %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
338 output_w32(0xe0900000|rd_rn_rm(rt,rs1,rs2));
340 #define emit_adds_ptr emit_adds
342 static void emit_adcs(int rs1,int rs2,int rt)
344 assem_debug("adcs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
345 output_w32(0xe0b00000|rd_rn_rm(rt,rs1,rs2));
348 static void emit_neg(int rs, int rt)
350 assem_debug("rsb %s,%s,#0\n",regname[rt],regname[rs]);
351 output_w32(0xe2600000|rd_rn_rm(rt,rs,0));
354 static void emit_negs(int rs, int rt)
356 assem_debug("rsbs %s,%s,#0\n",regname[rt],regname[rs]);
357 output_w32(0xe2700000|rd_rn_rm(rt,rs,0));
360 static void emit_sub(int rs1,int rs2,int rt)
362 assem_debug("sub %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
363 output_w32(0xe0400000|rd_rn_rm(rt,rs1,rs2));
366 static void emit_subs(int rs1,int rs2,int rt)
368 assem_debug("subs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
369 output_w32(0xe0500000|rd_rn_rm(rt,rs1,rs2));
372 static void emit_zeroreg(int rt)
374 assem_debug("mov %s,#0\n",regname[rt]);
375 output_w32(0xe3a00000|rd_rn_rm(rt,0,0));
378 static void emit_loadlp(u_int imm,u_int rt)
380 add_literal((int)out,imm);
381 assem_debug("ldr %s,pc+? [=%x]\n",regname[rt],imm);
382 output_w32(0xe5900000|rd_rn_rm(rt,15,0));
386 static void emit_movw(u_int imm,u_int rt)
389 assem_debug("movw %s,#%d (0x%x)\n",regname[rt],imm,imm);
390 output_w32(0xe3000000|rd_rn_rm(rt,0,0)|(imm&0xfff)|((imm<<4)&0xf0000));
393 static void emit_movt(u_int imm,u_int rt)
395 assem_debug("movt %s,#%d (0x%x)\n",regname[rt],imm&0xffff0000,imm&0xffff0000);
396 output_w32(0xe3400000|rd_rn_rm(rt,0,0)|((imm>>16)&0xfff)|((imm>>12)&0xf0000));
400 static void emit_movimm(u_int imm,u_int rt)
403 if(genimm(imm,&armval)) {
404 assem_debug("mov %s,#%d\n",regname[rt],imm);
405 output_w32(0xe3a00000|rd_rn_rm(rt,0,0)|armval);
406 }else if(genimm(~imm,&armval)) {
407 assem_debug("mvn %s,#%d\n",regname[rt],imm);
408 output_w32(0xe3e00000|rd_rn_rm(rt,0,0)|armval);
409 }else if(imm<65536) {
411 assem_debug("mov %s,#%d\n",regname[rt],imm&0xFF00);
412 output_w32(0xe3a00000|rd_rn_imm_shift(rt,0,imm>>8,8));
413 assem_debug("add %s,%s,#%d\n",regname[rt],regname[rt],imm&0xFF);
414 output_w32(0xe2800000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
422 emit_movw(imm&0x0000FFFF,rt);
423 emit_movt(imm&0xFFFF0000,rt);
428 static void emit_pcreladdr(u_int rt)
430 assem_debug("add %s,pc,#?\n",regname[rt]);
431 output_w32(0xe2800000|rd_rn_rm(rt,15,0));
434 static void emit_loadreg(int r, int hr)
436 assert(hr != EXCLUDE_REG);
442 //case HIREG: addr = &hi; break;
443 //case LOREG: addr = &lo; break;
444 case CCREG: addr = &cycle_count; break;
445 case INVCP: addr = &invc_ptr; break;
446 case ROREG: addr = &ram_offset; break;
449 addr = &psxRegs.GPR.r[r];
452 u_int offset = (u_char *)addr - (u_char *)&dynarec_local;
454 assem_debug("ldr %s,fp+%d # r%d\n",regname[hr],offset,r);
455 output_w32(0xe5900000|rd_rn_rm(hr,FP,0)|offset);
459 static void emit_storereg(int r, int hr)
461 assert(hr != EXCLUDE_REG);
462 int addr = (int)&psxRegs.GPR.r[r];
464 //case HIREG: addr = &hi; break;
465 //case LOREG: addr = &lo; break;
466 case CCREG: addr = (int)&cycle_count; break;
467 default: assert(r < 34); break;
469 u_int offset = addr-(u_int)&dynarec_local;
471 assem_debug("str %s,fp+%d # r%d\n",regname[hr],offset,r);
472 output_w32(0xe5800000|rd_rn_rm(hr,FP,0)|offset);
475 static void emit_test(int rs, int rt)
477 assem_debug("tst %s,%s\n",regname[rs],regname[rt]);
478 output_w32(0xe1100000|rd_rn_rm(0,rs,rt));
481 static void emit_testimm(int rs,int imm)
484 assem_debug("tst %s,#%d\n",regname[rs],imm);
485 genimm_checked(imm,&armval);
486 output_w32(0xe3100000|rd_rn_rm(0,rs,0)|armval);
489 static void emit_testeqimm(int rs,int imm)
492 assem_debug("tsteq %s,$%d\n",regname[rs],imm);
493 genimm_checked(imm,&armval);
494 output_w32(0x03100000|rd_rn_rm(0,rs,0)|armval);
497 static void emit_not(int rs,int rt)
499 assem_debug("mvn %s,%s\n",regname[rt],regname[rs]);
500 output_w32(0xe1e00000|rd_rn_rm(rt,0,rs));
503 static void emit_mvneq(int rs,int rt)
505 assem_debug("mvneq %s,%s\n",regname[rt],regname[rs]);
506 output_w32(0x01e00000|rd_rn_rm(rt,0,rs));
509 static void emit_and(u_int rs1,u_int rs2,u_int rt)
511 assem_debug("and %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
512 output_w32(0xe0000000|rd_rn_rm(rt,rs1,rs2));
515 static void emit_or(u_int rs1,u_int rs2,u_int rt)
517 assem_debug("orr %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
518 output_w32(0xe1800000|rd_rn_rm(rt,rs1,rs2));
521 static void emit_orrshl_imm(u_int rs,u_int imm,u_int rt)
526 assem_debug("orr %s,%s,%s,lsl #%d\n",regname[rt],regname[rt],regname[rs],imm);
527 output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|(imm<<7));
530 static void emit_orrshr_imm(u_int rs,u_int imm,u_int rt)
535 assem_debug("orr %s,%s,%s,lsr #%d\n",regname[rt],regname[rt],regname[rs],imm);
536 output_w32(0xe1800020|rd_rn_rm(rt,rt,rs)|(imm<<7));
539 static void emit_xor(u_int rs1,u_int rs2,u_int rt)
541 assem_debug("eor %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
542 output_w32(0xe0200000|rd_rn_rm(rt,rs1,rs2));
545 static void emit_xorsar_imm(u_int rs1,u_int rs2,u_int imm,u_int rt)
547 assem_debug("eor %s,%s,%s,asr #%d\n",regname[rt],regname[rs1],regname[rs2],imm);
548 output_w32(0xe0200040|rd_rn_rm(rt,rs1,rs2)|(imm<<7));
551 static void emit_addimm(u_int rs,int imm,u_int rt)
557 if(genimm(imm,&armval)) {
558 assem_debug("add %s,%s,#%d\n",regname[rt],regname[rs],imm);
559 output_w32(0xe2800000|rd_rn_rm(rt,rs,0)|armval);
560 }else if(genimm(-imm,&armval)) {
561 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rs],-imm);
562 output_w32(0xe2400000|rd_rn_rm(rt,rs,0)|armval);
564 }else if(rt!=rs&&(u_int)imm<65536) {
565 emit_movw(imm&0x0000ffff,rt);
567 }else if(rt!=rs&&(u_int)-imm<65536) {
568 emit_movw(-imm&0x0000ffff,rt);
571 }else if((u_int)-imm<65536) {
572 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rs],(-imm)&0xFF00);
573 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rt],(-imm)&0xFF);
574 output_w32(0xe2400000|rd_rn_imm_shift(rt,rs,(-imm)>>8,8));
575 output_w32(0xe2400000|rd_rn_imm_shift(rt,rt,(-imm)&0xff,0));
578 int shift = (ffs(imm) - 1) & ~1;
579 int imm8 = imm & (0xff << shift);
580 genimm_checked(imm8,&armval);
581 assem_debug("add %s,%s,#0x%x\n",regname[rt],regname[rs],imm8);
582 output_w32(0xe2800000|rd_rn_rm(rt,rs,0)|armval);
589 else if(rs!=rt) emit_mov(rs,rt);
592 static void emit_addimm_ptr(u_int rs, uintptr_t imm, u_int rt)
594 emit_addimm(rs, imm, rt);
597 static void emit_addimm_and_set_flags3(u_int rs, int imm, u_int rt)
599 assert(imm>-65536&&imm<65536);
601 if (genimm(imm, &armval)) {
602 assem_debug("adds %s,%s,#%d\n",regname[rt],regname[rs],imm);
603 output_w32(0xe2900000|rd_rn_rm(rt,rs,0)|armval);
604 } else if (genimm(-imm, &armval)) {
605 assem_debug("subs %s,%s,#%d\n",regname[rt],regname[rs],imm);
606 output_w32(0xe2500000|rd_rn_rm(rt,rs,0)|armval);
607 } else if (rs != rt) {
608 emit_movimm(imm, rt);
609 emit_adds(rs, rt, rt);
610 } else if (imm < 0) {
611 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rs],(-imm)&0xFF00);
612 assem_debug("subs %s,%s,#%d\n",regname[rt],regname[rt],(-imm)&0xFF);
613 output_w32(0xe2400000|rd_rn_imm_shift(rt,rs,(-imm)>>8,8));
614 output_w32(0xe2500000|rd_rn_imm_shift(rt,rt,(-imm)&0xff,0));
616 assem_debug("add %s,%s,#%d\n",regname[rt],regname[rs],imm&0xFF00);
617 assem_debug("adds %s,%s,#%d\n",regname[rt],regname[rt],imm&0xFF);
618 output_w32(0xe2800000|rd_rn_imm_shift(rt,rs,imm>>8,8));
619 output_w32(0xe2900000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
623 static void emit_addimm_and_set_flags(int imm, u_int rt)
625 emit_addimm_and_set_flags3(rt, imm, rt);
628 static void emit_addnop(u_int r)
631 assem_debug("add %s,%s,#0 (nop)\n",regname[r],regname[r]);
632 output_w32(0xe2800000|rd_rn_rm(r,r,0));
635 static void emit_andimm(int rs,int imm,int rt)
640 }else if(genimm(imm,&armval)) {
641 assem_debug("and %s,%s,#%d\n",regname[rt],regname[rs],imm);
642 output_w32(0xe2000000|rd_rn_rm(rt,rs,0)|armval);
643 }else if(genimm(~imm,&armval)) {
644 assem_debug("bic %s,%s,#%d\n",regname[rt],regname[rs],imm);
645 output_w32(0xe3c00000|rd_rn_rm(rt,rs,0)|armval);
646 }else if(imm==65535) {
648 assem_debug("bic %s,%s,#FF000000\n",regname[rt],regname[rs]);
649 output_w32(0xe3c00000|rd_rn_rm(rt,rs,0)|0x4FF);
650 assem_debug("bic %s,%s,#00FF0000\n",regname[rt],regname[rt]);
651 output_w32(0xe3c00000|rd_rn_rm(rt,rt,0)|0x8FF);
653 assem_debug("uxth %s,%s\n",regname[rt],regname[rs]);
654 output_w32(0xe6ff0070|rd_rn_rm(rt,0,rs));
657 assert(imm>0&&imm<65535);
659 assem_debug("mov r14,#%d\n",imm&0xFF00);
660 output_w32(0xe3a00000|rd_rn_imm_shift(HOST_TEMPREG,0,imm>>8,8));
661 assem_debug("add r14,r14,#%d\n",imm&0xFF);
662 output_w32(0xe2800000|rd_rn_imm_shift(HOST_TEMPREG,HOST_TEMPREG,imm&0xff,0));
664 emit_movw(imm,HOST_TEMPREG);
666 assem_debug("and %s,%s,r14\n",regname[rt],regname[rs]);
667 output_w32(0xe0000000|rd_rn_rm(rt,rs,HOST_TEMPREG));
671 static void emit_orimm(int rs,int imm,int rt)
675 if(rs!=rt) emit_mov(rs,rt);
676 }else if(genimm(imm,&armval)) {
677 assem_debug("orr %s,%s,#%d\n",regname[rt],regname[rs],imm);
678 output_w32(0xe3800000|rd_rn_rm(rt,rs,0)|armval);
680 assert(imm>0&&imm<65536);
681 assem_debug("orr %s,%s,#%d\n",regname[rt],regname[rs],imm&0xFF00);
682 assem_debug("orr %s,%s,#%d\n",regname[rt],regname[rs],imm&0xFF);
683 output_w32(0xe3800000|rd_rn_imm_shift(rt,rs,imm>>8,8));
684 output_w32(0xe3800000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
688 static void emit_xorimm(int rs,int imm,int rt)
692 if(rs!=rt) emit_mov(rs,rt);
693 }else if(genimm(imm,&armval)) {
694 assem_debug("eor %s,%s,#%d\n",regname[rt],regname[rs],imm);
695 output_w32(0xe2200000|rd_rn_rm(rt,rs,0)|armval);
697 assert(imm>0&&imm<65536);
698 assem_debug("eor %s,%s,#%d\n",regname[rt],regname[rs],imm&0xFF00);
699 assem_debug("eor %s,%s,#%d\n",regname[rt],regname[rs],imm&0xFF);
700 output_w32(0xe2200000|rd_rn_imm_shift(rt,rs,imm>>8,8));
701 output_w32(0xe2200000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
705 static void emit_shlimm(int rs,u_int imm,int rt)
710 assem_debug("lsl %s,%s,#%d\n",regname[rt],regname[rs],imm);
711 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|(imm<<7));
714 static void emit_lsls_imm(int rs,int imm,int rt)
718 assem_debug("lsls %s,%s,#%d\n",regname[rt],regname[rs],imm);
719 output_w32(0xe1b00000|rd_rn_rm(rt,0,rs)|(imm<<7));
722 static unused void emit_lslpls_imm(int rs,int imm,int rt)
726 assem_debug("lslpls %s,%s,#%d\n",regname[rt],regname[rs],imm);
727 output_w32(0x51b00000|rd_rn_rm(rt,0,rs)|(imm<<7));
730 static void emit_shrimm(int rs,u_int imm,int rt)
734 assem_debug("lsr %s,%s,#%d\n",regname[rt],regname[rs],imm);
735 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x20|(imm<<7));
738 static void emit_sarimm(int rs,u_int imm,int rt)
742 assem_debug("asr %s,%s,#%d\n",regname[rt],regname[rs],imm);
743 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x40|(imm<<7));
746 static void emit_rorimm(int rs,u_int imm,int rt)
750 assem_debug("ror %s,%s,#%d\n",regname[rt],regname[rs],imm);
751 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x60|(imm<<7));
754 static void emit_signextend16(int rs,int rt)
757 emit_shlimm(rs,16,rt);
758 emit_sarimm(rt,16,rt);
760 assem_debug("sxth %s,%s\n",regname[rt],regname[rs]);
761 output_w32(0xe6bf0070|rd_rn_rm(rt,0,rs));
765 static void emit_signextend8(int rs,int rt)
768 emit_shlimm(rs,24,rt);
769 emit_sarimm(rt,24,rt);
771 assem_debug("sxtb %s,%s\n",regname[rt],regname[rs]);
772 output_w32(0xe6af0070|rd_rn_rm(rt,0,rs));
776 static void emit_shl(u_int rs,u_int shift,u_int rt)
782 assem_debug("lsl %s,%s,%s\n",regname[rt],regname[rs],regname[shift]);
783 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x10|(shift<<8));
786 static void emit_shr(u_int rs,u_int shift,u_int rt)
791 assem_debug("lsr %s,%s,%s\n",regname[rt],regname[rs],regname[shift]);
792 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x30|(shift<<8));
795 static void emit_sar(u_int rs,u_int shift,u_int rt)
800 assem_debug("asr %s,%s,%s\n",regname[rt],regname[rs],regname[shift]);
801 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x50|(shift<<8));
804 static unused void emit_orrshl(u_int rs,u_int shift,u_int rt)
809 assem_debug("orr %s,%s,%s,lsl %s\n",regname[rt],regname[rt],regname[rs],regname[shift]);
810 output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|0x10|(shift<<8));
813 static unused void emit_orrshr(u_int rs,u_int shift,u_int rt)
818 assem_debug("orr %s,%s,%s,lsr %s\n",regname[rt],regname[rt],regname[rs],regname[shift]);
819 output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|0x30|(shift<<8));
822 static void emit_cmpimm(int rs,int imm)
825 if(genimm(imm,&armval)) {
826 assem_debug("cmp %s,#%d\n",regname[rs],imm);
827 output_w32(0xe3500000|rd_rn_rm(0,rs,0)|armval);
828 }else if(genimm(-imm,&armval)) {
829 assem_debug("cmn %s,#%d\n",regname[rs],imm);
830 output_w32(0xe3700000|rd_rn_rm(0,rs,0)|armval);
833 emit_movimm(imm,HOST_TEMPREG);
834 assem_debug("cmp %s,r14\n",regname[rs]);
835 output_w32(0xe1500000|rd_rn_rm(0,rs,HOST_TEMPREG));
838 emit_movimm(-imm,HOST_TEMPREG);
839 assem_debug("cmn %s,r14\n",regname[rs]);
840 output_w32(0xe1700000|rd_rn_rm(0,rs,HOST_TEMPREG));
844 static void emit_cmovne_imm(int imm,int rt)
846 assem_debug("movne %s,#%d\n",regname[rt],imm);
848 genimm_checked(imm,&armval);
849 output_w32(0x13a00000|rd_rn_rm(rt,0,0)|armval);
852 static void emit_cmovl_imm(int imm,int rt)
854 assem_debug("movlt %s,#%d\n",regname[rt],imm);
856 genimm_checked(imm,&armval);
857 output_w32(0xb3a00000|rd_rn_rm(rt,0,0)|armval);
860 static void emit_cmovb_imm(int imm,int rt)
862 assem_debug("movcc %s,#%d\n",regname[rt],imm);
864 genimm_checked(imm,&armval);
865 output_w32(0x33a00000|rd_rn_rm(rt,0,0)|armval);
868 static void emit_cmovae_imm(int imm,int rt)
870 assem_debug("movcs %s,#%d\n",regname[rt],imm);
872 genimm_checked(imm,&armval);
873 output_w32(0x23a00000|rd_rn_rm(rt,0,0)|armval);
876 static void emit_cmovs_imm(int imm,int rt)
878 assem_debug("movmi %s,#%d\n",regname[rt],imm);
880 genimm_checked(imm,&armval);
881 output_w32(0x43a00000|rd_rn_rm(rt,0,0)|armval);
884 static unused void emit_cmovne_reg(int rs,int rt)
886 assem_debug("movne %s,%s\n",regname[rt],regname[rs]);
887 output_w32(0x11a00000|rd_rn_rm(rt,0,rs));
890 static void emit_cmovl_reg(int rs,int rt)
892 assem_debug("movlt %s,%s\n",regname[rt],regname[rs]);
893 output_w32(0xb1a00000|rd_rn_rm(rt,0,rs));
896 static void emit_cmovb_reg(int rs,int rt)
898 assem_debug("movcc %s,%s\n",regname[rt],regname[rs]);
899 output_w32(0x31a00000|rd_rn_rm(rt,0,rs));
902 static void emit_cmovs_reg(int rs,int rt)
904 assem_debug("movmi %s,%s\n",regname[rt],regname[rs]);
905 output_w32(0x41a00000|rd_rn_rm(rt,0,rs));
908 static void emit_slti32(int rs,int imm,int rt)
910 if(rs!=rt) emit_zeroreg(rt);
912 if(rs==rt) emit_movimm(0,rt);
913 emit_cmovl_imm(1,rt);
916 static void emit_sltiu32(int rs,int imm,int rt)
918 if(rs!=rt) emit_zeroreg(rt);
920 if(rs==rt) emit_movimm(0,rt);
921 emit_cmovb_imm(1,rt);
924 static void emit_cmp(int rs,int rt)
926 assem_debug("cmp %s,%s\n",regname[rs],regname[rt]);
927 output_w32(0xe1500000|rd_rn_rm(0,rs,rt));
930 static void emit_cmpcs(int rs,int rt)
932 assem_debug("cmpcs %s,%s\n",regname[rs],regname[rt]);
933 output_w32(0x21500000|rd_rn_rm(0,rs,rt));
936 static void emit_set_gz32(int rs, int rt)
938 //assem_debug("set_gz32\n");
941 emit_cmovl_imm(0,rt);
944 static void emit_set_nz32(int rs, int rt)
946 //assem_debug("set_nz32\n");
947 if(rs!=rt) emit_movs(rs,rt);
948 else emit_test(rs,rs);
949 emit_cmovne_imm(1,rt);
952 static void emit_set_if_less32(int rs1, int rs2, int rt)
954 //assem_debug("set if less (%%%s,%%%s),%%%s\n",regname[rs1],regname[rs2],regname[rt]);
955 if(rs1!=rt&&rs2!=rt) emit_zeroreg(rt);
957 if(rs1==rt||rs2==rt) emit_movimm(0,rt);
958 emit_cmovl_imm(1,rt);
961 static void emit_set_if_carry32(int rs1, int rs2, int rt)
963 //assem_debug("set if carry (%%%s,%%%s),%%%s\n",regname[rs1],regname[rs2],regname[rt]);
964 if(rs1!=rt&&rs2!=rt) emit_zeroreg(rt);
966 if(rs1==rt||rs2==rt) emit_movimm(0,rt);
967 emit_cmovb_imm(1,rt);
970 static int can_jump_or_call(const void *a)
972 intptr_t offset = (u_char *)a - out - 8;
973 return (-33554432 <= offset && offset < 33554432);
976 static void emit_call(const void *a_)
979 assem_debug("bl %x (%x+%x)%s\n",a,(int)out,a-(int)out-8,func_name(a_));
980 u_int offset=genjmp(a);
981 output_w32(0xeb000000|offset);
984 static void emit_jmp(const void *a_)
987 assem_debug("b %x (%x+%x)%s\n",a,(int)out,a-(int)out-8,func_name(a_));
988 u_int offset=genjmp(a);
989 output_w32(0xea000000|offset);
992 static void emit_jne(const void *a_)
995 assem_debug("bne %x\n",a);
996 u_int offset=genjmp(a);
997 output_w32(0x1a000000|offset);
1000 static void emit_jeq(const void *a_)
1003 assem_debug("beq %x\n",a);
1004 u_int offset=genjmp(a);
1005 output_w32(0x0a000000|offset);
1008 static void emit_js(const void *a_)
1011 assem_debug("bmi %x\n",a);
1012 u_int offset=genjmp(a);
1013 output_w32(0x4a000000|offset);
1016 static void emit_jns(const void *a_)
1019 assem_debug("bpl %x\n",a);
1020 u_int offset=genjmp(a);
1021 output_w32(0x5a000000|offset);
1024 static void emit_jl(const void *a_)
1027 assem_debug("blt %x\n",a);
1028 u_int offset=genjmp(a);
1029 output_w32(0xba000000|offset);
1032 static void emit_jge(const void *a_)
1035 assem_debug("bge %x\n",a);
1036 u_int offset=genjmp(a);
1037 output_w32(0xaa000000|offset);
1040 static void emit_jo(const void *a_)
1043 assem_debug("bvs %x\n",a);
1044 u_int offset=genjmp(a);
1045 output_w32(0x6a000000|offset);
1048 static void emit_jno(const void *a_)
1051 assem_debug("bvc %x\n",a);
1052 u_int offset=genjmp(a);
1053 output_w32(0x7a000000|offset);
1056 static void emit_jc(const void *a_)
1059 assem_debug("bcs %x\n",a);
1060 u_int offset=genjmp(a);
1061 output_w32(0x2a000000|offset);
1064 static void emit_jcc(const void *a_)
1067 assem_debug("bcc %x\n",a);
1068 u_int offset=genjmp(a);
1069 output_w32(0x3a000000|offset);
1072 static void *emit_cbz(int rs, const void *a)
1081 static unused void emit_callreg(u_int r)
1084 assem_debug("blx %s\n",regname[r]);
1085 output_w32(0xe12fff30|r);
1088 static void emit_jmpreg(u_int r)
1090 assem_debug("mov pc,%s\n",regname[r]);
1091 output_w32(0xe1a00000|rd_rn_rm(15,0,r));
1094 static void emit_ret(void)
1099 static void emit_readword_indexed(int offset, int rs, int rt)
1101 assert(offset>-4096&&offset<4096);
1102 assem_debug("ldr %s,%s+%d\n",regname[rt],regname[rs],offset);
1104 output_w32(0xe5900000|rd_rn_rm(rt,rs,0)|offset);
1106 output_w32(0xe5100000|rd_rn_rm(rt,rs,0)|(-offset));
1110 static void emit_readword_dualindexedx4(int rs1, int rs2, int rt)
1112 assem_debug("ldr %s,%s,%s lsl #2\n",regname[rt],regname[rs1],regname[rs2]);
1113 output_w32(0xe7900000|rd_rn_rm(rt,rs1,rs2)|0x100);
1115 #define emit_readptr_dualindexedx_ptrlen emit_readword_dualindexedx4
1117 static void emit_ldr_dualindexed(int rs1, int rs2, int rt)
1119 assem_debug("ldr %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1120 output_w32(0xe7900000|rd_rn_rm(rt,rs1,rs2));
1123 static void emit_ldrcc_dualindexed(int rs1, int rs2, int rt)
1125 assem_debug("ldrcc %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1126 output_w32(0x37900000|rd_rn_rm(rt,rs1,rs2));
1129 static void emit_ldrb_dualindexed(int rs1, int rs2, int rt)
1131 assem_debug("ldrb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1132 output_w32(0xe7d00000|rd_rn_rm(rt,rs1,rs2));
1135 static void emit_ldrccb_dualindexed(int rs1, int rs2, int rt)
1137 assem_debug("ldrccb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1138 output_w32(0x37d00000|rd_rn_rm(rt,rs1,rs2));
1141 static void emit_ldrsb_dualindexed(int rs1, int rs2, int rt)
1143 assem_debug("ldrsb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1144 output_w32(0xe19000d0|rd_rn_rm(rt,rs1,rs2));
1147 static void emit_ldrccsb_dualindexed(int rs1, int rs2, int rt)
1149 assem_debug("ldrccsb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1150 output_w32(0x319000d0|rd_rn_rm(rt,rs1,rs2));
1153 static void emit_ldrh_dualindexed(int rs1, int rs2, int rt)
1155 assem_debug("ldrh %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1156 output_w32(0xe19000b0|rd_rn_rm(rt,rs1,rs2));
1159 static void emit_ldrcch_dualindexed(int rs1, int rs2, int rt)
1161 assem_debug("ldrcch %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1162 output_w32(0x319000b0|rd_rn_rm(rt,rs1,rs2));
1165 static void emit_ldrsh_dualindexed(int rs1, int rs2, int rt)
1167 assem_debug("ldrsh %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1168 output_w32(0xe19000f0|rd_rn_rm(rt,rs1,rs2));
1171 static void emit_ldrccsh_dualindexed(int rs1, int rs2, int rt)
1173 assem_debug("ldrccsh %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1174 output_w32(0x319000f0|rd_rn_rm(rt,rs1,rs2));
1177 static void emit_str_dualindexed(int rs1, int rs2, int rt)
1179 assem_debug("str %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1180 output_w32(0xe7800000|rd_rn_rm(rt,rs1,rs2));
1183 static void emit_strb_dualindexed(int rs1, int rs2, int rt)
1185 assem_debug("strb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1186 output_w32(0xe7c00000|rd_rn_rm(rt,rs1,rs2));
1189 static void emit_strh_dualindexed(int rs1, int rs2, int rt)
1191 assem_debug("strh %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1192 output_w32(0xe18000b0|rd_rn_rm(rt,rs1,rs2));
1195 static void emit_movsbl_indexed(int offset, int rs, int rt)
1197 assert(offset>-256&&offset<256);
1198 assem_debug("ldrsb %s,%s+%d\n",regname[rt],regname[rs],offset);
1200 output_w32(0xe1d000d0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1202 output_w32(0xe15000d0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1206 static void emit_movswl_indexed(int offset, int rs, int rt)
1208 assert(offset>-256&&offset<256);
1209 assem_debug("ldrsh %s,%s+%d\n",regname[rt],regname[rs],offset);
1211 output_w32(0xe1d000f0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1213 output_w32(0xe15000f0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1217 static void emit_movzbl_indexed(int offset, int rs, int rt)
1219 assert(offset>-4096&&offset<4096);
1220 assem_debug("ldrb %s,%s+%d\n",regname[rt],regname[rs],offset);
1222 output_w32(0xe5d00000|rd_rn_rm(rt,rs,0)|offset);
1224 output_w32(0xe5500000|rd_rn_rm(rt,rs,0)|(-offset));
1228 static void emit_movzwl_indexed(int offset, int rs, int rt)
1230 assert(offset>-256&&offset<256);
1231 assem_debug("ldrh %s,%s+%d\n",regname[rt],regname[rs],offset);
1233 output_w32(0xe1d000b0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1235 output_w32(0xe15000b0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1239 static void emit_ldrd(int offset, int rs, int rt)
1241 assert(offset>-256&&offset<256);
1242 assem_debug("ldrd %s,%s+%d\n",regname[rt],regname[rs],offset);
1244 output_w32(0xe1c000d0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1246 output_w32(0xe14000d0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1250 static void emit_readword(void *addr, int rt)
1252 uintptr_t offset = (u_char *)addr - (u_char *)&dynarec_local;
1253 assert(offset<4096);
1254 assem_debug("ldr %s,fp+%#x%s\n", regname[rt], offset, fpofs_name(offset));
1255 output_w32(0xe5900000|rd_rn_rm(rt,FP,0)|offset);
1257 #define emit_readptr emit_readword
1259 static void emit_writeword_indexed(int rt, int offset, int rs)
1261 assert(offset>-4096&&offset<4096);
1262 assem_debug("str %s,%s+%d\n",regname[rt],regname[rs],offset);
1264 output_w32(0xe5800000|rd_rn_rm(rt,rs,0)|offset);
1266 output_w32(0xe5000000|rd_rn_rm(rt,rs,0)|(-offset));
1270 static void emit_writehword_indexed(int rt, int offset, int rs)
1272 assert(offset>-256&&offset<256);
1273 assem_debug("strh %s,%s+%d\n",regname[rt],regname[rs],offset);
1275 output_w32(0xe1c000b0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1277 output_w32(0xe14000b0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1281 static void emit_writebyte_indexed(int rt, int offset, int rs)
1283 assert(offset>-4096&&offset<4096);
1284 assem_debug("strb %s,%s+%d\n",regname[rt],regname[rs],offset);
1286 output_w32(0xe5c00000|rd_rn_rm(rt,rs,0)|offset);
1288 output_w32(0xe5400000|rd_rn_rm(rt,rs,0)|(-offset));
1292 static void emit_strcc_dualindexed(int rs1, int rs2, int rt)
1294 assem_debug("strcc %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1295 output_w32(0x37800000|rd_rn_rm(rt,rs1,rs2));
1298 static void emit_strccb_dualindexed(int rs1, int rs2, int rt)
1300 assem_debug("strccb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1301 output_w32(0x37c00000|rd_rn_rm(rt,rs1,rs2));
1304 static void emit_strcch_dualindexed(int rs1, int rs2, int rt)
1306 assem_debug("strcch %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1307 output_w32(0x318000b0|rd_rn_rm(rt,rs1,rs2));
1310 static void emit_writeword(int rt, void *addr)
1312 uintptr_t offset = (u_char *)addr - (u_char *)&dynarec_local;
1313 assert(offset<4096);
1314 assem_debug("str %s,fp+%#x%s\n", regname[rt], offset, fpofs_name(offset));
1315 output_w32(0xe5800000|rd_rn_rm(rt,FP,0)|offset);
1318 static void emit_umull(u_int rs1, u_int rs2, u_int hi, u_int lo)
1320 assem_debug("umull %s, %s, %s, %s\n",regname[lo],regname[hi],regname[rs1],regname[rs2]);
1325 output_w32(0xe0800090|(hi<<16)|(lo<<12)|(rs2<<8)|rs1);
1328 static void emit_smull(u_int rs1, u_int rs2, u_int hi, u_int lo)
1330 assem_debug("smull %s, %s, %s, %s\n",regname[lo],regname[hi],regname[rs1],regname[rs2]);
1335 output_w32(0xe0c00090|(hi<<16)|(lo<<12)|(rs2<<8)|rs1);
1338 static void emit_clz(int rs,int rt)
1340 assem_debug("clz %s,%s\n",regname[rt],regname[rs]);
1341 output_w32(0xe16f0f10|rd_rn_rm(rt,0,rs));
1344 static void emit_subcs(int rs1,int rs2,int rt)
1346 assem_debug("subcs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1347 output_w32(0x20400000|rd_rn_rm(rt,rs1,rs2));
1350 static void emit_shrcc_imm(int rs,u_int imm,int rt)
1354 assem_debug("lsrcc %s,%s,#%d\n",regname[rt],regname[rs],imm);
1355 output_w32(0x31a00000|rd_rn_rm(rt,0,rs)|0x20|(imm<<7));
1358 static void emit_shrne_imm(int rs,u_int imm,int rt)
1362 assem_debug("lsrne %s,%s,#%d\n",regname[rt],regname[rs],imm);
1363 output_w32(0x11a00000|rd_rn_rm(rt,0,rs)|0x20|(imm<<7));
1366 static void emit_negmi(int rs, int rt)
1368 assem_debug("rsbmi %s,%s,#0\n",regname[rt],regname[rs]);
1369 output_w32(0x42600000|rd_rn_rm(rt,rs,0));
1372 static void emit_negsmi(int rs, int rt)
1374 assem_debug("rsbsmi %s,%s,#0\n",regname[rt],regname[rs]);
1375 output_w32(0x42700000|rd_rn_rm(rt,rs,0));
1378 static void emit_bic_lsl(u_int rs1,u_int rs2,u_int shift,u_int rt)
1380 assem_debug("bic %s,%s,%s lsl %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
1381 output_w32(0xe1C00000|rd_rn_rm(rt,rs1,rs2)|0x10|(shift<<8));
1384 static void emit_bic_lsr(u_int rs1,u_int rs2,u_int shift,u_int rt)
1386 assem_debug("bic %s,%s,%s lsr %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
1387 output_w32(0xe1C00000|rd_rn_rm(rt,rs1,rs2)|0x30|(shift<<8));
1390 static void emit_teq(int rs, int rt)
1392 assem_debug("teq %s,%s\n",regname[rs],regname[rt]);
1393 output_w32(0xe1300000|rd_rn_rm(0,rs,rt));
1396 static unused void emit_rsbimm(int rs, int imm, int rt)
1399 genimm_checked(imm,&armval);
1400 assem_debug("rsb %s,%s,#%d\n",regname[rt],regname[rs],imm);
1401 output_w32(0xe2600000|rd_rn_rm(rt,rs,0)|armval);
1404 // Conditionally select one of two immediates, optimizing for small code size
1405 // This will only be called if HAVE_CMOV_IMM is defined
1406 static void emit_cmov2imm_e_ne_compact(int imm1,int imm2,u_int rt)
1409 if(genimm(imm2-imm1,&armval)) {
1410 emit_movimm(imm1,rt);
1411 assem_debug("addne %s,%s,#%d\n",regname[rt],regname[rt],imm2-imm1);
1412 output_w32(0x12800000|rd_rn_rm(rt,rt,0)|armval);
1413 }else if(genimm(imm1-imm2,&armval)) {
1414 emit_movimm(imm1,rt);
1415 assem_debug("subne %s,%s,#%d\n",regname[rt],regname[rt],imm1-imm2);
1416 output_w32(0x12400000|rd_rn_rm(rt,rt,0)|armval);
1420 emit_movimm(imm1,rt);
1421 add_literal((int)out,imm2);
1422 assem_debug("ldrne %s,pc+? [=%x]\n",regname[rt],imm2);
1423 output_w32(0x15900000|rd_rn_rm(rt,15,0));
1425 emit_movw(imm1&0x0000FFFF,rt);
1426 if((imm1&0xFFFF)!=(imm2&0xFFFF)) {
1427 assem_debug("movwne %s,#%d (0x%x)\n",regname[rt],imm2&0xFFFF,imm2&0xFFFF);
1428 output_w32(0x13000000|rd_rn_rm(rt,0,0)|(imm2&0xfff)|((imm2<<4)&0xf0000));
1430 emit_movt(imm1&0xFFFF0000,rt);
1431 if((imm1&0xFFFF0000)!=(imm2&0xFFFF0000)) {
1432 assem_debug("movtne %s,#%d (0x%x)\n",regname[rt],imm2&0xffff0000,imm2&0xffff0000);
1433 output_w32(0x13400000|rd_rn_rm(rt,0,0)|((imm2>>16)&0xfff)|((imm2>>12)&0xf0000));
1439 // special case for checking invalid_code
1440 static void emit_ldrb_indexedsr12_reg(int base, int r, int rt)
1442 assem_debug("ldrb %s,%s,%s lsr #12\n",regname[rt],regname[base],regname[r]);
1443 output_w32(0xe7d00000|rd_rn_rm(rt,base,r)|0x620);
1446 static void emit_callne(int a)
1448 assem_debug("blne %x\n",a);
1449 u_int offset=genjmp(a);
1450 output_w32(0x1b000000|offset);
1453 // Used to preload hash table entries
1454 static unused void emit_prefetchreg(int r)
1456 assem_debug("pld %s\n",regname[r]);
1457 output_w32(0xf5d0f000|rd_rn_rm(0,r,0));
1460 // Special case for mini_ht
1461 static void emit_ldreq_indexed(int rs, u_int offset, int rt)
1463 assert(offset<4096);
1464 assem_debug("ldreq %s,[%s, #%d]\n",regname[rt],regname[rs],offset);
1465 output_w32(0x05900000|rd_rn_rm(rt,rs,0)|offset);
1468 static void emit_orrne_imm(int rs,int imm,int rt)
1471 genimm_checked(imm,&armval);
1472 assem_debug("orrne %s,%s,#%d\n",regname[rt],regname[rs],imm);
1473 output_w32(0x13800000|rd_rn_rm(rt,rs,0)|armval);
1476 static unused void emit_addpl_imm(int rs,int imm,int rt)
1479 genimm_checked(imm,&armval);
1480 assem_debug("addpl %s,%s,#%d\n",regname[rt],regname[rs],imm);
1481 output_w32(0x52800000|rd_rn_rm(rt,rs,0)|armval);
1484 static void emit_jno_unlikely(int a)
1487 assem_debug("addvc pc,pc,#? (%x)\n",/*a-(int)out-8,*/a);
1488 output_w32(0x72800000|rd_rn_rm(15,15,0));
1491 static void save_regs_all(u_int reglist)
1494 if(!reglist) return;
1495 assem_debug("stmia fp,{");
1498 assem_debug("r%d,",i);
1500 output_w32(0xe88b0000|reglist);
1503 static void restore_regs_all(u_int reglist)
1506 if(!reglist) return;
1507 assem_debug("ldmia fp,{");
1510 assem_debug("r%d,",i);
1512 output_w32(0xe89b0000|reglist);
1515 // Save registers before function call
1516 static void save_regs(u_int reglist)
1518 reglist&=CALLER_SAVE_REGS; // only save the caller-save registers, r0-r3, r12
1519 save_regs_all(reglist);
1522 // Restore registers after function call
1523 static void restore_regs(u_int reglist)
1525 reglist&=CALLER_SAVE_REGS;
1526 restore_regs_all(reglist);
1529 /* Stubs/epilogue */
1531 static void literal_pool(int n)
1533 if(!literalcount) return;
1535 if((int)out-literals[0][0]<4096-n) return;
1539 for(i=0;i<literalcount;i++)
1541 u_int l_addr=(u_int)out;
1544 if(literals[j][1]==literals[i][1]) {
1545 //printf("dup %08x\n",literals[i][1]);
1546 l_addr=literals[j][0];
1550 ptr=(u_int *)literals[i][0];
1551 u_int offset=l_addr-(u_int)ptr-8;
1552 assert(offset<4096);
1553 assert(!(offset&3));
1555 if(l_addr==(u_int)out) {
1556 literals[i][0]=l_addr; // remember for dupes
1557 output_w32(literals[i][1]);
1563 static void literal_pool_jumpover(int n)
1565 if(!literalcount) return;
1567 if((int)out-literals[0][0]<4096-n) return;
1572 set_jump_target(jaddr, out);
1575 // parsed by get_pointer, find_extjump_insn
1576 static void emit_extjump(u_char *addr, u_int target)
1578 u_char *ptr=(u_char *)addr;
1579 assert((ptr[3]&0x0e)==0xa);
1582 emit_loadlp(target,0);
1583 emit_loadlp((u_int)addr,1);
1584 assert(ndrc->translation_cache <= addr &&
1585 addr < ndrc->translation_cache + sizeof(ndrc->translation_cache));
1586 emit_far_jump(dyna_linker);
1589 static void check_extjump2(void *src)
1592 assert((ptr[1] & 0x0fff0000) == 0x059f0000); // ldr rx, [pc, #ofs]
1596 // put rt_val into rt, potentially making use of rs with value rs_val
1597 static void emit_movimm_from(u_int rs_val,int rs,u_int rt_val,int rt)
1601 if(genimm(rt_val,&armval)) {
1602 assem_debug("mov %s,#%d\n",regname[rt],rt_val);
1603 output_w32(0xe3a00000|rd_rn_rm(rt,0,0)|armval);
1606 if(genimm(~rt_val,&armval)) {
1607 assem_debug("mvn %s,#%d\n",regname[rt],rt_val);
1608 output_w32(0xe3e00000|rd_rn_rm(rt,0,0)|armval);
1612 if(genimm(diff,&armval)) {
1613 assem_debug("add %s,%s,#%d\n",regname[rt],regname[rs],diff);
1614 output_w32(0xe2800000|rd_rn_rm(rt,rs,0)|armval);
1616 }else if(genimm(-diff,&armval)) {
1617 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rs],-diff);
1618 output_w32(0xe2400000|rd_rn_rm(rt,rs,0)|armval);
1621 emit_movimm(rt_val,rt);
1624 // return 1 if above function can do it's job cheaply
1625 static int is_similar_value(u_int v1,u_int v2)
1629 if(v1==v2) return 1;
1631 for(xs=diff;xs!=0&&(xs&3)==0;xs>>=2)
1633 if(xs<0x100) return 1;
1634 for(xs=-diff;xs!=0&&(xs&3)==0;xs>>=2)
1636 if(xs<0x100) return 1;
1640 static void mov_loadtype_adj(enum stub_type type,int rs,int rt)
1643 case LOADB_STUB: emit_signextend8(rs,rt); break;
1644 case LOADBU_STUB: emit_andimm(rs,0xff,rt); break;
1645 case LOADH_STUB: emit_signextend16(rs,rt); break;
1646 case LOADHU_STUB: emit_andimm(rs,0xffff,rt); break;
1647 case LOADW_STUB: if(rs!=rt) emit_mov(rs,rt); break;
1652 #include "pcsxmem.h"
1653 #include "pcsxmem_inline.c"
1655 static void do_readstub(int n)
1657 assem_debug("do_readstub %x\n",start+stubs[n].a*4);
1659 set_jump_target(stubs[n].addr, out);
1660 enum stub_type type=stubs[n].type;
1663 const struct regstat *i_regs=(struct regstat *)stubs[n].c;
1664 u_int reglist=stubs[n].e;
1665 const signed char *i_regmap=i_regs->regmap;
1667 if(dops[i].itype==C2LS||dops[i].itype==LOADLR) {
1668 rt=get_reg(i_regmap,FTEMP);
1670 rt=get_reg(i_regmap,dops[i].rt1);
1673 int r,temp=-1,temp2=HOST_TEMPREG,regs_saved=0;
1674 void *restore_jump = NULL;
1676 for(r=0;r<=12;r++) {
1677 if(((1<<r)&0x13ff)&&((1<<r)®list)==0) {
1681 if(rt>=0&&dops[i].rt1!=0)
1688 if((regs_saved||(reglist&2)==0)&&temp!=1&&rs!=1)
1690 emit_readword(&mem_rtab,temp);
1691 emit_shrimm(rs,12,temp2);
1692 emit_readword_dualindexedx4(temp,temp2,temp2);
1693 emit_lsls_imm(temp2,1,temp2);
1694 if(dops[i].itype==C2LS||(rt>=0&&dops[i].rt1!=0)) {
1696 case LOADB_STUB: emit_ldrccsb_dualindexed(temp2,rs,rt); break;
1697 case LOADBU_STUB: emit_ldrccb_dualindexed(temp2,rs,rt); break;
1698 case LOADH_STUB: emit_ldrccsh_dualindexed(temp2,rs,rt); break;
1699 case LOADHU_STUB: emit_ldrcch_dualindexed(temp2,rs,rt); break;
1700 case LOADW_STUB: emit_ldrcc_dualindexed(temp2,rs,rt); break;
1706 emit_jcc(0); // jump to reg restore
1709 emit_jcc(stubs[n].retaddr); // return address
1714 if(type==LOADB_STUB||type==LOADBU_STUB)
1715 handler=jump_handler_read8;
1716 if(type==LOADH_STUB||type==LOADHU_STUB)
1717 handler=jump_handler_read16;
1718 if(type==LOADW_STUB)
1719 handler=jump_handler_read32;
1721 pass_args(rs,temp2);
1722 int cc=get_reg(i_regmap,CCREG);
1724 emit_loadreg(CCREG,2);
1725 emit_addimm(cc<0?2:cc,(int)stubs[n].d,2);
1726 emit_far_call(handler);
1727 if(dops[i].itype==C2LS||(rt>=0&&dops[i].rt1!=0)) {
1728 mov_loadtype_adj(type,0,rt);
1731 set_jump_target(restore_jump, out);
1732 restore_regs(reglist);
1733 emit_jmp(stubs[n].retaddr); // return address
1736 static void inline_readstub(enum stub_type type, int i, u_int addr,
1737 const signed char regmap[], int target, int adj, u_int reglist)
1739 int ra = cinfo[i].addr;
1740 int rt = get_reg(regmap,target);
1743 uintptr_t host_addr = 0;
1745 int cc=get_reg(regmap,CCREG);
1746 if(pcsx_direct_read(type,addr,adj,cc,target?ra:-1,rt))
1748 handler = get_direct_memhandler(mem_rtab, addr, type, &host_addr);
1749 if (handler == NULL) {
1750 if(rt<0||dops[i].rt1==0)
1753 emit_movimm_from(addr,ra,host_addr,ra);
1755 case LOADB_STUB: emit_movsbl_indexed(0,ra,rt); break;
1756 case LOADBU_STUB: emit_movzbl_indexed(0,ra,rt); break;
1757 case LOADH_STUB: emit_movswl_indexed(0,ra,rt); break;
1758 case LOADHU_STUB: emit_movzwl_indexed(0,ra,rt); break;
1759 case LOADW_STUB: emit_readword_indexed(0,ra,rt); break;
1764 is_dynamic=pcsxmem_is_handler_dynamic(addr);
1766 if(type==LOADB_STUB||type==LOADBU_STUB)
1767 handler=jump_handler_read8;
1768 if(type==LOADH_STUB||type==LOADHU_STUB)
1769 handler=jump_handler_read16;
1770 if(type==LOADW_STUB)
1771 handler=jump_handler_read32;
1774 // call a memhandler
1775 if(rt>=0&&dops[i].rt1!=0)
1779 emit_movimm(addr,0);
1783 emit_loadreg(CCREG,2);
1785 emit_movimm(((u_int *)mem_rtab)[addr>>12]<<1,1);
1786 emit_addimm(cc<0?2:cc,adj,2);
1789 emit_readword(&last_count,3);
1790 emit_addimm(cc<0?2:cc,adj,2);
1792 emit_writeword(2,&psxRegs.cycle);
1795 emit_far_call(handler);
1797 if(rt>=0&&dops[i].rt1!=0) {
1799 case LOADB_STUB: emit_signextend8(0,rt); break;
1800 case LOADBU_STUB: emit_andimm(0,0xff,rt); break;
1801 case LOADH_STUB: emit_signextend16(0,rt); break;
1802 case LOADHU_STUB: emit_andimm(0,0xffff,rt); break;
1803 case LOADW_STUB: if(rt!=0) emit_mov(0,rt); break;
1807 restore_regs(reglist);
1810 static void do_writestub(int n)
1812 assem_debug("do_writestub %x\n",start+stubs[n].a*4);
1814 set_jump_target(stubs[n].addr, out);
1815 enum stub_type type=stubs[n].type;
1818 const struct regstat *i_regs=(struct regstat *)stubs[n].c;
1819 u_int reglist=stubs[n].e;
1820 const signed char *i_regmap=i_regs->regmap;
1822 if(dops[i].itype==C2LS) {
1823 rt=get_reg(i_regmap,r=FTEMP);
1825 rt=get_reg(i_regmap,r=dops[i].rs2);
1829 int rtmp,temp=-1,temp2=HOST_TEMPREG,regs_saved=0;
1830 void *restore_jump = NULL;
1831 int reglist2=reglist|(1<<rs)|(1<<rt);
1832 for(rtmp=0;rtmp<=12;rtmp++) {
1833 if(((1<<rtmp)&0x13ff)&&((1<<rtmp)®list2)==0) {
1840 for(rtmp=0;rtmp<=3;rtmp++)
1841 if(rtmp!=rs&&rtmp!=rt)
1844 if((regs_saved||(reglist2&8)==0)&&temp!=3&&rs!=3&&rt!=3)
1846 emit_readword(&mem_wtab,temp);
1847 emit_shrimm(rs,12,temp2);
1848 emit_readword_dualindexedx4(temp,temp2,temp2);
1849 emit_lsls_imm(temp2,1,temp2);
1851 case STOREB_STUB: emit_strccb_dualindexed(temp2,rs,rt); break;
1852 case STOREH_STUB: emit_strcch_dualindexed(temp2,rs,rt); break;
1853 case STOREW_STUB: emit_strcc_dualindexed(temp2,rs,rt); break;
1858 emit_jcc(0); // jump to reg restore
1861 emit_jcc(stubs[n].retaddr); // return address (invcode check)
1867 case STOREB_STUB: handler=jump_handler_write8; break;
1868 case STOREH_STUB: handler=jump_handler_write16; break;
1869 case STOREW_STUB: handler=jump_handler_write32; break;
1876 int cc=get_reg(i_regmap,CCREG);
1878 emit_loadreg(CCREG,2);
1879 emit_addimm(cc<0?2:cc,(int)stubs[n].d,2);
1880 // returns new cycle_count
1881 emit_far_call(handler);
1882 emit_addimm(0,-(int)stubs[n].d,cc<0?2:cc);
1884 emit_storereg(CCREG,2);
1886 set_jump_target(restore_jump, out);
1887 restore_regs(reglist);
1888 emit_jmp(stubs[n].retaddr);
1891 static void inline_writestub(enum stub_type type, int i, u_int addr,
1892 const signed char regmap[], int target, int adj, u_int reglist)
1894 int ra = cinfo[i].addr;
1895 int rt = get_reg(regmap, target);
1898 uintptr_t host_addr = 0;
1899 void *handler = get_direct_memhandler(mem_wtab, addr, type, &host_addr);
1900 if (handler == NULL) {
1902 emit_movimm_from(addr,ra,host_addr,ra);
1904 case STOREB_STUB: emit_writebyte_indexed(rt,0,ra); break;
1905 case STOREH_STUB: emit_writehword_indexed(rt,0,ra); break;
1906 case STOREW_STUB: emit_writeword_indexed(rt,0,ra); break;
1912 // call a memhandler
1915 int cc=get_reg(regmap,CCREG);
1917 emit_loadreg(CCREG,2);
1918 emit_addimm(cc<0?2:cc,adj,2);
1919 emit_movimm((u_int)handler,3);
1920 // returns new cycle_count
1921 emit_far_call(jump_handler_write_h);
1922 emit_addimm(0,-adj,cc<0?2:cc);
1924 emit_storereg(CCREG,2);
1925 restore_regs(reglist);
1930 static void c2op_prologue(u_int op, int i, const struct regstat *i_regs, u_int reglist)
1932 save_regs_all(reglist);
1933 cop2_do_stall_check(op, i, i_regs, 0);
1936 emit_far_call(pcnt_gte_start);
1938 emit_addimm(FP, (u_char *)&psxRegs.CP2D.r[0] - (u_char *)&dynarec_local, 0); // cop2 regs
1941 static void c2op_epilogue(u_int op,u_int reglist)
1945 emit_far_call(pcnt_gte_end);
1947 restore_regs_all(reglist);
1950 static void c2op_call_MACtoIR(int lm,int need_flags)
1953 emit_far_call(lm?gteMACtoIR_lm1:gteMACtoIR_lm0);
1955 emit_far_call(lm?gteMACtoIR_lm1_nf:gteMACtoIR_lm0_nf);
1958 static void c2op_call_rgb_func(void *func,int lm,int need_ir,int need_flags)
1960 emit_far_call(func);
1961 // func is C code and trashes r0
1962 emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0);
1963 if(need_flags||need_ir)
1964 c2op_call_MACtoIR(lm,need_flags);
1965 emit_far_call(need_flags?gteMACtoRGB:gteMACtoRGB_nf);
1968 static void c2op_assemble(int i, const struct regstat *i_regs)
1970 u_int c2op = source[i] & 0x3f;
1971 u_int reglist_full = get_host_reglist(i_regs->regmap);
1972 u_int reglist = reglist_full & CALLER_SAVE_REGS;
1973 int need_flags, need_ir;
1975 if (gte_handlers[c2op]!=NULL) {
1976 need_flags=!(gte_unneeded[i+1]>>63); // +1 because of how liveness detection works
1977 need_ir=(gte_unneeded[i+1]&0xe00)!=0xe00;
1978 assem_debug("gte op %08x, unneeded %016llx, need_flags %d, need_ir %d\n",
1979 source[i],gte_unneeded[i+1],need_flags,need_ir);
1980 if(HACK_ENABLED(NDHACK_GTE_NO_FLAGS))
1982 int shift = (source[i] >> 19) & 1;
1983 int lm = (source[i] >> 10) & 1;
1988 int v = (source[i] >> 15) & 3;
1989 int cv = (source[i] >> 13) & 3;
1990 int mx = (source[i] >> 17) & 3;
1991 reglist=reglist_full&(CALLER_SAVE_REGS|0xf0); // +{r4-r7}
1992 c2op_prologue(c2op,i,i_regs,reglist);
1993 /* r4,r5 = VXYZ(v) packed; r6 = &MX11(mx); r7 = &CV1(cv) */
1997 emit_movzwl_indexed(9*4,0,4); // gteIR
1998 emit_movzwl_indexed(10*4,0,6);
1999 emit_movzwl_indexed(11*4,0,5);
2000 emit_orrshl_imm(6,16,4);
2003 emit_addimm(0,32*4+mx*8*4,6);
2005 emit_readword(&zeromem_ptr,6);
2007 emit_addimm(0,32*4+(cv*8+5)*4,7);
2009 emit_readword(&zeromem_ptr,7);
2011 emit_movimm(source[i],1); // opcode
2012 emit_far_call(gteMVMVA_part_neon);
2015 emit_far_call(gteMACtoIR_flags_neon);
2019 emit_far_call(gteMVMVA_part_cv3sh12_arm);
2021 emit_movimm(shift,1);
2022 emit_far_call(need_flags?gteMVMVA_part_arm:gteMVMVA_part_nf_arm);
2024 if(need_flags||need_ir)
2025 c2op_call_MACtoIR(lm,need_flags);
2027 #else /* if not HAVE_ARMV5 */
2028 c2op_prologue(c2op,i,i_regs,reglist);
2029 emit_movimm(source[i],1); // opcode
2030 emit_writeword(1,&psxRegs.code);
2031 emit_far_call(need_flags?gte_handlers[c2op]:gte_handlers_nf[c2op]);
2036 c2op_prologue(c2op,i,i_regs,reglist);
2037 emit_far_call(shift?gteOP_part_shift:gteOP_part_noshift);
2038 if(need_flags||need_ir) {
2039 emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0);
2040 c2op_call_MACtoIR(lm,need_flags);
2044 c2op_prologue(c2op,i,i_regs,reglist);
2045 c2op_call_rgb_func(shift?gteDPCS_part_shift:gteDPCS_part_noshift,lm,need_ir,need_flags);
2048 c2op_prologue(c2op,i,i_regs,reglist);
2049 c2op_call_rgb_func(shift?gteINTPL_part_shift:gteINTPL_part_noshift,lm,need_ir,need_flags);
2052 c2op_prologue(c2op,i,i_regs,reglist);
2053 emit_far_call(shift?gteSQR_part_shift:gteSQR_part_noshift);
2054 if(need_flags||need_ir) {
2055 emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0);
2056 c2op_call_MACtoIR(lm,need_flags);
2060 c2op_prologue(c2op,i,i_regs,reglist);
2061 c2op_call_rgb_func(gteDCPL_part,lm,need_ir,need_flags);
2064 c2op_prologue(c2op,i,i_regs,reglist);
2065 c2op_call_rgb_func(shift?gteGPF_part_shift:gteGPF_part_noshift,lm,need_ir,need_flags);
2068 c2op_prologue(c2op,i,i_regs,reglist);
2069 c2op_call_rgb_func(shift?gteGPL_part_shift:gteGPL_part_noshift,lm,need_ir,need_flags);
2073 c2op_prologue(c2op,i,i_regs,reglist);
2075 emit_movimm(source[i],1); // opcode
2076 emit_writeword(1,&psxRegs.code);
2078 emit_far_call(need_flags?gte_handlers[c2op]:gte_handlers_nf[c2op]);
2081 c2op_epilogue(c2op,reglist);
2085 static void c2op_ctc2_31_assemble(signed char sl, signed char temp)
2087 //value = value & 0x7ffff000;
2088 //if (value & 0x7f87e000) value |= 0x80000000;
2089 emit_shrimm(sl,12,temp);
2090 emit_shlimm(temp,12,temp);
2091 emit_testimm(temp,0x7f000000);
2092 emit_testeqimm(temp,0x00870000);
2093 emit_testeqimm(temp,0x0000e000);
2094 emit_orrne_imm(temp,0x80000000,temp);
2097 static void do_mfc2_31_one(u_int copr,signed char temp)
2099 emit_readword(®_cop2d[copr],temp);
2100 emit_lsls_imm(temp,16,temp);
2101 emit_cmovs_imm(0,temp);
2102 emit_cmpimm(temp,0xf80<<16);
2103 emit_andimm(temp,0xf80<<16,temp);
2104 emit_cmovae_imm(0xf80<<16,temp);
2107 static void c2op_mfc2_29_assemble(signed char tl, signed char temp)
2110 host_tempreg_acquire();
2111 temp = HOST_TEMPREG;
2113 do_mfc2_31_one(9,temp);
2114 emit_shrimm(temp,7+16,tl);
2115 do_mfc2_31_one(10,temp);
2116 emit_orrshr_imm(temp,2+16,tl);
2117 do_mfc2_31_one(11,temp);
2118 emit_orrshr_imm(temp,-3+16,tl);
2119 emit_writeword(tl,®_cop2d[29]);
2120 if (temp == HOST_TEMPREG)
2121 host_tempreg_release();
2124 static void multdiv_assemble_arm(int i, const struct regstat *i_regs)
2130 if(dops[i].rs1&&dops[i].rs2)
2132 switch (dops[i].opcode2)
2136 signed char m1=get_reg(i_regs->regmap,dops[i].rs1);
2137 signed char m2=get_reg(i_regs->regmap,dops[i].rs2);
2138 signed char hi=get_reg(i_regs->regmap,HIREG);
2139 signed char lo=get_reg(i_regs->regmap,LOREG);
2144 emit_smull(m1,m2,hi,lo);
2149 signed char m1=get_reg(i_regs->regmap,dops[i].rs1);
2150 signed char m2=get_reg(i_regs->regmap,dops[i].rs2);
2151 signed char hi=get_reg(i_regs->regmap,HIREG);
2152 signed char lo=get_reg(i_regs->regmap,LOREG);
2157 emit_umull(m1,m2,hi,lo);
2162 signed char d1=get_reg(i_regs->regmap,dops[i].rs1);
2163 signed char d2=get_reg(i_regs->regmap,dops[i].rs2);
2164 signed char quotient=get_reg(i_regs->regmap,LOREG);
2165 signed char remainder=get_reg(i_regs->regmap,HIREG);
2169 assert(quotient>=0);
2170 assert(remainder>=0);
2171 emit_movs(d1,remainder);
2172 emit_movimm(0xffffffff,quotient);
2173 emit_negmi(quotient,quotient); // .. quotient and ..
2174 emit_negmi(remainder,remainder); // .. remainder for div0 case (will be negated back after jump)
2175 emit_movs(d2,HOST_TEMPREG);
2177 emit_jeq(0); // Division by zero
2178 emit_negsmi(HOST_TEMPREG,HOST_TEMPREG);
2180 emit_clz(HOST_TEMPREG,quotient);
2181 emit_shl(HOST_TEMPREG,quotient,HOST_TEMPREG); // shifted divisor
2183 emit_movimm(0,quotient);
2184 emit_addpl_imm(quotient,1,quotient);
2185 emit_lslpls_imm(HOST_TEMPREG,1,HOST_TEMPREG);
2188 emit_orimm(quotient,1<<31,quotient);
2189 emit_shr(quotient,quotient,quotient);
2190 emit_cmp(remainder,HOST_TEMPREG);
2191 emit_subcs(remainder,HOST_TEMPREG,remainder);
2192 emit_adcs(quotient,quotient,quotient);
2193 emit_shrimm(HOST_TEMPREG,1,HOST_TEMPREG);
2194 emit_jcc(out-16); // -4
2196 emit_negmi(quotient,quotient);
2197 set_jump_target(jaddr_div0, out);
2199 emit_negmi(remainder,remainder);
2204 signed char d1=get_reg(i_regs->regmap,dops[i].rs1); // dividend
2205 signed char d2=get_reg(i_regs->regmap,dops[i].rs2); // divisor
2206 signed char quotient=get_reg(i_regs->regmap,LOREG);
2207 signed char remainder=get_reg(i_regs->regmap,HIREG);
2211 assert(quotient>=0);
2212 assert(remainder>=0);
2213 emit_mov(d1,remainder);
2214 emit_movimm(0xffffffff,quotient); // div0 case
2217 emit_jeq(0); // Division by zero
2219 emit_clz(d2,HOST_TEMPREG);
2220 emit_movimm(1<<31,quotient);
2221 emit_shl(d2,HOST_TEMPREG,d2);
2223 emit_movimm(0,HOST_TEMPREG);
2224 emit_addpl_imm(HOST_TEMPREG,1,HOST_TEMPREG);
2225 emit_lslpls_imm(d2,1,d2);
2227 emit_movimm(1<<31,quotient);
2229 emit_shr(quotient,HOST_TEMPREG,quotient);
2230 emit_cmp(remainder,d2);
2231 emit_subcs(remainder,d2,remainder);
2232 emit_adcs(quotient,quotient,quotient);
2233 emit_shrcc_imm(d2,1,d2);
2234 emit_jcc(out-16); // -4
2235 set_jump_target(jaddr_div0, out);
2242 signed char hr=get_reg(i_regs->regmap,HIREG);
2243 signed char lr=get_reg(i_regs->regmap,LOREG);
2244 if ((dops[i].opcode2==0x1A || dops[i].opcode2==0x1B) && dops[i].rs2==0) // div 0
2247 signed char numerator = get_reg(i_regs->regmap, dops[i].rs1);
2248 assert(numerator >= 0);
2251 emit_movs(numerator, hr);
2253 if (dops[i].opcode2 == 0x1A) { // DIV
2254 emit_movimm(0xffffffff, lr);
2258 emit_movimm(~0, lr);
2262 if (hr >= 0) emit_zeroreg(hr);
2263 if (lr >= 0) emit_movimm(~0,lr);
2266 else if ((dops[i].opcode2==0x1A || dops[i].opcode2==0x1B) && dops[i].rs1==0)
2268 signed char denominator = get_reg(i_regs->regmap, dops[i].rs2);
2269 assert(denominator >= 0);
2270 if (hr >= 0) emit_zeroreg(hr);
2273 emit_test(denominator, denominator);
2279 // Multiply by zero is zero.
2280 if (hr >= 0) emit_zeroreg(hr);
2281 if (lr >= 0) emit_zeroreg(lr);
2285 #define multdiv_assemble multdiv_assemble_arm
2287 static void do_jump_vaddr(int rs)
2289 emit_far_jump(jump_vaddr_reg[rs]);
2292 static void do_preload_rhash(int r) {
2293 // Don't need this for ARM. On x86, this puts the value 0xf8 into the
2294 // register. On ARM the hash can be done with a single instruction (below)
2297 static void do_preload_rhtbl(int ht) {
2298 emit_addimm(FP,(int)&mini_ht-(int)&dynarec_local,ht);
2301 static void do_rhash(int rs,int rh) {
2302 emit_andimm(rs,0xf8,rh);
2305 static void do_miniht_load(int ht,int rh) {
2306 assem_debug("ldr %s,[%s,%s]!\n",regname[rh],regname[ht],regname[rh]);
2307 output_w32(0xe7b00000|rd_rn_rm(rh,ht,rh));
2310 static void do_miniht_jump(int rs,int rh,int ht) {
2312 emit_ldreq_indexed(ht,4,15);
2313 #ifdef CORTEX_A8_BRANCH_PREDICTION_HACK
2321 static void do_miniht_insert(u_int return_address,int rt,int temp) {
2323 emit_movimm(return_address,rt); // PC into link register
2324 add_to_linker(out,return_address,1);
2325 emit_pcreladdr(temp);
2326 emit_writeword(rt,&mini_ht[(return_address&0xFF)>>3][0]);
2327 emit_writeword(temp,&mini_ht[(return_address&0xFF)>>3][1]);
2329 emit_movw(return_address&0x0000FFFF,rt);
2330 add_to_linker(out,return_address,1);
2331 emit_pcreladdr(temp);
2332 emit_writeword(temp,&mini_ht[(return_address&0xFF)>>3][1]);
2333 emit_movt(return_address&0xFFFF0000,rt);
2334 emit_writeword(rt,&mini_ht[(return_address&0xFF)>>3][0]);
2338 // CPU-architecture-specific initialization
2339 static void arch_init(void)
2341 uintptr_t diff = (u_char *)&ndrc->tramp.f - (u_char *)&ndrc->tramp.ops - 8;
2342 struct tramp_insns *ops = ndrc->tramp.ops;
2344 assert(!(diff & 3));
2345 assert(diff < 0x1000);
2346 start_tcache_write(ops, (u_char *)ops + sizeof(ndrc->tramp.ops));
2347 for (i = 0; i < ARRAY_SIZE(ndrc->tramp.ops); i++)
2348 ops[i].ldrpc = 0xe5900000 | rd_rn_rm(15,15,0) | diff; // ldr pc, [=val]
2349 end_tcache_write(ops, (u_char *)ops + sizeof(ndrc->tramp.ops));
2352 // vim:shiftwidth=2:expandtab