dma: some timing hacks
[pcsx_rearmed.git] / libpcsxcore / psxdma.c
1 /***************************************************************************
2  *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
3  *                                                                         *
4  *   This program is free software; you can redistribute it and/or modify  *
5  *   it under the terms of the GNU General Public License as published by  *
6  *   the Free Software Foundation; either version 2 of the License, or     *
7  *   (at your option) any later version.                                   *
8  *                                                                         *
9  *   This program is distributed in the hope that it will be useful,       *
10  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
11  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
12  *   GNU General Public License for more details.                          *
13  *                                                                         *
14  *   You should have received a copy of the GNU General Public License     *
15  *   along with this program; if not, write to the                         *
16  *   Free Software Foundation, Inc.,                                       *
17  *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
18  ***************************************************************************/
19
20 /*
21 * Handles PSX DMA functions.
22 */
23
24 #include "psxdma.h"
25 #include "gpu.h"
26
27 // Dma0/1 in Mdec.c
28 // Dma3   in CdRom.c
29
30 void spuInterrupt() {
31         if (HW_DMA4_CHCR & SWAP32(0x01000000))
32         {
33                 HW_DMA4_CHCR &= SWAP32(~0x01000000);
34                 DMA_INTERRUPT(4);
35         }
36 }
37
38 void psxDma4(u32 madr, u32 bcr, u32 chcr) { // SPU
39         u16 *ptr;
40         u32 words;
41
42         switch (chcr) {
43                 case 0x01000201: //cpu to spu transfer
44 #ifdef PSXDMA_LOG
45                         PSXDMA_LOG("*** DMA4 SPU - mem2spu *** %x addr = %x size = %x\n", chcr, madr, bcr);
46 #endif
47                         ptr = (u16 *)PSXM(madr);
48                         if (ptr == NULL) {
49 #ifdef CPU_LOG
50                                 CPU_LOG("*** DMA4 SPU - mem2spu *** NULL Pointer!!!\n");
51 #endif
52                                 break;
53                         }
54                         words = (bcr >> 16) * (bcr & 0xffff);
55                         SPU_writeDMAMem(ptr, words * 2, psxRegs.cycle);
56                         HW_DMA4_MADR = SWAPu32(madr + words * 4);
57                         SPUDMA_INT(words / 2);
58                         return;
59
60                 case 0x01000200: //spu to cpu transfer
61 #ifdef PSXDMA_LOG
62                         PSXDMA_LOG("*** DMA4 SPU - spu2mem *** %x addr = %x size = %x\n", chcr, madr, bcr);
63 #endif
64                         ptr = (u16 *)PSXM(madr);
65                         if (ptr == NULL) {
66 #ifdef CPU_LOG
67                                 CPU_LOG("*** DMA4 SPU - spu2mem *** NULL Pointer!!!\n");
68 #endif
69                                 break;
70                         }
71                         words = (bcr >> 16) * (bcr & 0xffff);
72                         SPU_readDMAMem(ptr, words * 2, psxRegs.cycle);
73                         psxCpu->Clear(madr, words);
74
75                         HW_DMA4_MADR = SWAPu32(madr + words * 4);
76                         SPUDMA_INT(words / 2);
77                         return;
78
79 #ifdef PSXDMA_LOG
80                 default:
81                         PSXDMA_LOG("*** DMA4 SPU - unknown *** %x addr = %x size = %x\n", chcr, madr, bcr);
82                         break;
83 #endif
84         }
85
86         HW_DMA4_CHCR &= SWAP32(~0x01000000);
87         DMA_INTERRUPT(4);
88 }
89
90 // Taken from PEOPS SOFTGPU
91 static inline boolean CheckForEndlessLoop(u32 laddr, u32 *lUsedAddr) {
92         if (laddr == lUsedAddr[1]) return TRUE;
93         if (laddr == lUsedAddr[2]) return TRUE;
94
95         if (laddr < lUsedAddr[0]) lUsedAddr[1] = laddr;
96         else lUsedAddr[2] = laddr;
97
98         lUsedAddr[0] = laddr;
99
100         return FALSE;
101 }
102
103 static u32 gpuDmaChainSize(u32 addr) {
104         u32 size;
105         u32 DMACommandCounter = 0;
106         u32 lUsedAddr[3];
107
108         lUsedAddr[0] = lUsedAddr[1] = lUsedAddr[2] = 0xffffff;
109
110         // initial linked list ptr (word)
111         size = 1;
112
113         do {
114                 addr &= 0x1ffffc;
115
116                 if (DMACommandCounter++ > 2000000) break;
117                 if (CheckForEndlessLoop(addr, lUsedAddr)) break;
118
119                 // # 32-bit blocks to transfer
120                 size += psxMu8( addr + 3 );
121
122                 // next 32-bit pointer
123                 addr = psxMu32( addr & ~0x3 ) & 0xffffff;
124                 size += 1;
125         } while (addr != 0xffffff);
126
127         return size;
128 }
129
130 void psxDma2(u32 madr, u32 bcr, u32 chcr) { // GPU
131         u32 *ptr;
132         u32 words;
133         u32 size;
134
135         switch (chcr) {
136                 case 0x01000200: // vram2mem
137 #ifdef PSXDMA_LOG
138                         PSXDMA_LOG("*** DMA2 GPU - vram2mem *** %lx addr = %lx size = %lx\n", chcr, madr, bcr);
139 #endif
140                         ptr = (u32 *)PSXM(madr);
141                         if (ptr == NULL) {
142 #ifdef CPU_LOG
143                                 CPU_LOG("*** DMA2 GPU - vram2mem *** NULL Pointer!!!\n");
144 #endif
145                                 break;
146                         }
147                         // BA blocks * BS words (word = 32-bits)
148                         words = (bcr >> 16) * (bcr & 0xffff);
149                         GPU_readDataMem(ptr, words);
150                         psxCpu->Clear(madr, words);
151
152                         HW_DMA2_MADR = SWAPu32(madr + words * 4);
153
154                         // already 32-bit word size ((size * 4) / 4)
155                         GPUDMA_INT(words / 4);
156                         return;
157
158                 case 0x01000201: // mem2vram
159 #ifdef PSXDMA_LOG
160                         PSXDMA_LOG("*** DMA 2 - GPU mem2vram *** %lx addr = %lx size = %lx\n", chcr, madr, bcr);
161 #endif
162                         ptr = (u32 *)PSXM(madr);
163                         if (ptr == NULL) {
164 #ifdef CPU_LOG
165                                 CPU_LOG("*** DMA2 GPU - mem2vram *** NULL Pointer!!!\n");
166 #endif
167                                 break;
168                         }
169                         // BA blocks * BS words (word = 32-bits)
170                         words = (bcr >> 16) * (bcr & 0xffff);
171                         GPU_writeDataMem(ptr, words);
172
173                         HW_DMA2_MADR = SWAPu32(madr + words * 4);
174
175                         // already 32-bit word size ((size * 4) / 4)
176                         GPUDMA_INT(words / 4);
177                         return;
178
179                 case 0x01000401: // dma chain
180 #ifdef PSXDMA_LOG
181                         PSXDMA_LOG("*** DMA 2 - GPU dma chain *** %lx addr = %lx size = %lx\n", chcr, madr, bcr);
182 #endif
183
184                         size = GPU_dmaChain((u32 *)psxM, madr & 0x1fffff);
185                         if ((int)size <= 0)
186                                 size = gpuDmaChainSize(madr);
187                         HW_GPU_STATUS &= ~PSXGPU_nBUSY;
188
189                         // we don't emulate progress, just busy flag and end irq,
190                         // so pretend we're already at the last block
191                         HW_DMA2_MADR = SWAPu32(0xffffff);
192
193                         // Tekken 3 = use 1.0 only (not 1.5x)
194
195                         // Einhander = parse linked list in pieces (todo)
196                         // Final Fantasy 4 = internal vram time (todo)
197                         // Rebel Assault 2 = parse linked list in pieces (todo)
198                         // Vampire Hunter D = allow edits to linked list (todo)
199                         GPUDMA_INT(size);
200                         return;
201
202 #ifdef PSXDMA_LOG
203                 default:
204                         PSXDMA_LOG("*** DMA 2 - GPU unknown *** %lx addr = %lx size = %lx\n", chcr, madr, bcr);
205                         break;
206 #endif
207         }
208
209         HW_DMA2_CHCR &= SWAP32(~0x01000000);
210         DMA_INTERRUPT(2);
211 }
212
213 void gpuInterrupt() {
214         if (HW_DMA2_CHCR & SWAP32(0x01000000))
215         {
216                 HW_DMA2_CHCR &= SWAP32(~0x01000000);
217                 DMA_INTERRUPT(2);
218         }
219         HW_GPU_STATUS |= PSXGPU_nBUSY; // GPU no longer busy
220 }
221
222 void psxDma6(u32 madr, u32 bcr, u32 chcr) {
223         u32 words;
224         u32 *mem = (u32 *)PSXM(madr);
225
226 #ifdef PSXDMA_LOG
227         PSXDMA_LOG("*** DMA6 OT *** %x addr = %x size = %x\n", chcr, madr, bcr);
228 #endif
229
230         if (chcr == 0x11000002) {
231                 if (mem == NULL) {
232 #ifdef CPU_LOG
233                         CPU_LOG("*** DMA6 OT *** NULL Pointer!!!\n");
234 #endif
235                         HW_DMA6_CHCR &= SWAP32(~0x01000000);
236                         DMA_INTERRUPT(6);
237                         return;
238                 }
239
240                 // already 32-bit size
241                 words = bcr;
242
243                 while (bcr--) {
244                         *mem-- = SWAP32((madr - 4) & 0xffffff);
245                         madr -= 4;
246                 }
247                 mem++; *mem = 0xffffff;
248
249                 //GPUOTCDMA_INT(size);
250                 // halted
251                 psxRegs.cycle += words;
252                 GPUOTCDMA_INT(16);
253                 return;
254         }
255 #ifdef PSXDMA_LOG
256         else {
257                 // Unknown option
258                 PSXDMA_LOG("*** DMA6 OT - unknown *** %x addr = %x size = %x\n", chcr, madr, bcr);
259         }
260 #endif
261
262         HW_DMA6_CHCR &= SWAP32(~0x01000000);
263         DMA_INTERRUPT(6);
264 }
265
266 void gpuotcInterrupt()
267 {
268         if (HW_DMA6_CHCR & SWAP32(0x01000000))
269         {
270                 HW_DMA6_CHCR &= SWAP32(~0x01000000);
271                 DMA_INTERRUPT(6);
272         }
273 }