libpcsxcore/r3000a.c

   1 /***************************************************************************
   2  *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
   3  *                                                                         *
   4  *   This program is free software; you can redistribute it and/or modify  *
   5  *   it under the terms of the GNU General Public License as published by  *
   6  *   the Free Software Foundation; either version 2 of the License, or     *
   7  *   (at your option) any later version.                                   *
   8  *                                                                         *
   9  *   This program is distributed in the hope that it will be useful,       *
  10  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  11  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  12  *   GNU General Public License for more details.                          *
  13  *                                                                         *
  14  *   You should have received a copy of the GNU General Public License     *
  15  *   along with this program; if not, write to the                         *
  16  *   Free Software Foundation, Inc.,                                       *
  17  *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
  18  ***************************************************************************/
  19
  20 /*
  21 * R3000A CPU functions.
  22 */
  23
  24 #include "r3000a.h"
  25 #include "cdrom.h"
  26 #include "mdec.h"
  27 #include "gte.h"
  28 #include "psxinterpreter.h"
  29
  30 R3000Acpu *psxCpu = NULL;
  31 #ifdef DRC_DISABLE
  32 psxRegisters psxRegs;
  33 #endif
  34
  35 int psxInit() {
  36         SysPrintf(_("Running PCSX Version %s (%s).\n"), PACKAGE_VERSION, __DATE__);
  37
  38 #ifndef DRC_DISABLE
  39         if (Config.Cpu == CPU_INTERPRETER) {
  40                 psxCpu = &psxInt;
  41         } else psxCpu = &psxRec;
  42 #else
  43         Config.Cpu = CPU_INTERPRETER;
  44         psxCpu = &psxInt;
  45 #endif
  46
  47         Log = 0;
  48
  49         if (psxMemInit() == -1) return -1;
  50
  51         return psxCpu->Init();
  52 }
  53
  54 void psxReset() {
  55         psxMemReset();
  56
  57         memset(&psxRegs, 0, sizeof(psxRegs));
  58
  59         psxRegs.pc = 0xbfc00000; // Start in bootstrap
  60
  61         psxRegs.CP0.r[12] = 0x10900000; // COP0 enabled | BEV = 1 | TS = 1
  62         psxRegs.CP0.r[15] = 0x00000002; // PRevID = Revision ID, same as R3000A
  63
  64         psxCpu->Reset();
  65
  66         psxHwReset();
  67         psxBiosInit();
  68
  69         if (!Config.HLE)
  70                 psxExecuteBios();
  71
  72 #ifdef EMU_LOG
  73         EMU_LOG("*BIOS END*\n");
  74 #endif
  75         Log = 0;
  76 }
  77
  78 void psxShutdown() {
  79         psxMemShutdown();
  80         psxBiosShutdown();
  81
  82         psxCpu->Shutdown();
  83 }
  84
  85 void psxException(u32 code, u32 bd) {
  86         psxRegs.code = fetch(psxRegs.pc);
  87
  88         if (!Config.HLE && ((((psxRegs.code) >> 24) & 0xfe) == 0x4a)) {
  89                 // "hokuto no ken" / "Crash Bandicot 2" ...
  90                 // BIOS does not allow to return to GTE instructions
  91                 // (just skips it, supposedly because it's scheduled already)
  92                 // so we execute it here
  93                 extern void (*psxCP2[64])(void *cp2regs);
  94                 psxCP2[psxRegs.code & 0x3f](&psxRegs.CP2D);
  95         }
  96
  97         // Set the Cause
  98         psxRegs.CP0.n.Cause = (psxRegs.CP0.n.Cause & 0x300) | code;
  99
 100         // Set the EPC & PC
 101         if (bd) {
 102 #ifdef PSXCPU_LOG
 103                 PSXCPU_LOG("bd set!!!\n");
 104 #endif
 105                 psxRegs.CP0.n.Cause |= 0x80000000;
 106                 psxRegs.CP0.n.EPC = (psxRegs.pc - 4);
 107         } else
 108                 psxRegs.CP0.n.EPC = (psxRegs.pc);
 109
 110         if (psxRegs.CP0.n.Status & 0x400000)
 111                 psxRegs.pc = 0xbfc00180;
 112         else
 113                 psxRegs.pc = 0x80000080;
 114
 115         // Set the Status
 116         psxRegs.CP0.n.Status = (psxRegs.CP0.n.Status &~0x3f) |
 117                                                   ((psxRegs.CP0.n.Status & 0xf) << 2);
 118
 119         if (Config.HLE) psxBiosException();
 120 }
 121
 122 void psxBranchTest() {
 123         if ((psxRegs.cycle - psxNextsCounter) >= psxNextCounter)
 124                 psxRcntUpdate();
 125
 126         if (psxRegs.interrupt) {
 127                 if ((psxRegs.interrupt & (1 << PSXINT_SIO)) && !Config.Sio) { // sio
 128                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_SIO].sCycle) >= psxRegs.intCycle[PSXINT_SIO].cycle) {
 129                                 psxRegs.interrupt &= ~(1 << PSXINT_SIO);
 130                                 sioInterrupt();
 131                         }
 132                 }
 133                 if (psxRegs.interrupt & (1 << PSXINT_CDR)) { // cdr
 134                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDR].sCycle) >= psxRegs.intCycle[PSXINT_CDR].cycle) {
 135                                 psxRegs.interrupt &= ~(1 << PSXINT_CDR);
 136                                 cdrInterrupt();
 137                         }
 138                 }
 139                 if (psxRegs.interrupt & (1 << PSXINT_CDREAD)) { // cdr read
 140                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDREAD].sCycle) >= psxRegs.intCycle[PSXINT_CDREAD].cycle) {
 141                                 psxRegs.interrupt &= ~(1 << PSXINT_CDREAD);
 142                                 cdrReadInterrupt();
 143                         }
 144                 }
 145                 if (psxRegs.interrupt & (1 << PSXINT_GPUDMA)) { // gpu dma
 146                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_GPUDMA].sCycle) >= psxRegs.intCycle[PSXINT_GPUDMA].cycle) {
 147                                 psxRegs.interrupt &= ~(1 << PSXINT_GPUDMA);
 148                                 gpuInterrupt();
 149                         }
 150                 }
 151                 if (psxRegs.interrupt & (1 << PSXINT_MDECOUTDMA)) { // mdec out dma
 152                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_MDECOUTDMA].sCycle) >= psxRegs.intCycle[PSXINT_MDECOUTDMA].cycle) {
 153                                 psxRegs.interrupt &= ~(1 << PSXINT_MDECOUTDMA);
 154                                 mdec1Interrupt();
 155                         }
 156                 }
 157                 if (psxRegs.interrupt & (1 << PSXINT_SPUDMA)) { // spu dma
 158                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_SPUDMA].sCycle) >= psxRegs.intCycle[PSXINT_SPUDMA].cycle) {
 159                                 psxRegs.interrupt &= ~(1 << PSXINT_SPUDMA);
 160                                 spuInterrupt();
 161                         }
 162                 }
 163                 if (psxRegs.interrupt & (1 << PSXINT_MDECINDMA)) { // mdec in
 164                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_MDECINDMA].sCycle) >= psxRegs.intCycle[PSXINT_MDECINDMA].cycle) {
 165                                 psxRegs.interrupt &= ~(1 << PSXINT_MDECINDMA);
 166                                 mdec0Interrupt();
 167                         }
 168                 }
 169                 if (psxRegs.interrupt & (1 << PSXINT_GPUOTCDMA)) { // gpu otc
 170                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_GPUOTCDMA].sCycle) >= psxRegs.intCycle[PSXINT_GPUOTCDMA].cycle) {
 171                                 psxRegs.interrupt &= ~(1 << PSXINT_GPUOTCDMA);
 172                                 gpuotcInterrupt();
 173                         }
 174                 }
 175                 if (psxRegs.interrupt & (1 << PSXINT_CDRDMA)) { // cdrom
 176                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDRDMA].sCycle) >= psxRegs.intCycle[PSXINT_CDRDMA].cycle) {
 177                                 psxRegs.interrupt &= ~(1 << PSXINT_CDRDMA);
 178                                 cdrDmaInterrupt();
 179                         }
 180                 }
 181                 if (psxRegs.interrupt & (1 << PSXINT_CDRPLAY)) { // cdr play timing
 182                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDRPLAY].sCycle) >= psxRegs.intCycle[PSXINT_CDRPLAY].cycle) {
 183                                 psxRegs.interrupt &= ~(1 << PSXINT_CDRPLAY);
 184                                 cdrPlayInterrupt();
 185                         }
 186                 }
 187                 if (psxRegs.interrupt & (1 << PSXINT_CDRLID)) { // cdr lid states
 188                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDRLID].sCycle) >= psxRegs.intCycle[PSXINT_CDRLID].cycle) {
 189                                 psxRegs.interrupt &= ~(1 << PSXINT_CDRLID);
 190                                 cdrLidSeekInterrupt();
 191                         }
 192                 }
 193                 if (psxRegs.interrupt & (1 << PSXINT_SPU_UPDATE)) { // scheduled spu update
 194                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_SPU_UPDATE].sCycle) >= psxRegs.intCycle[PSXINT_SPU_UPDATE].cycle) {
 195                                 psxRegs.interrupt &= ~(1 << PSXINT_SPU_UPDATE);
 196                                 spuUpdate();
 197                         }
 198                 }
 199         }
 200
 201         if (psxHu32(0x1070) & psxHu32(0x1074)) {
 202                 if ((psxRegs.CP0.n.Status & 0x401) == 0x401) {
 203 #ifdef PSXCPU_LOG
 204                         PSXCPU_LOG("Interrupt: %x %x\n", psxHu32(0x1070), psxHu32(0x1074));
 205 #endif
 206 //                      SysPrintf("Interrupt (%x): %x %x\n", psxRegs.cycle, psxHu32(0x1070), psxHu32(0x1074));
 207                         psxException(0x400, 0);
 208                 }
 209         }
 210 }
 211
 212 void psxJumpTest() {
 213         if (!Config.HLE && Config.PsxOut) {
 214                 u32 call = psxRegs.GPR.n.t1 & 0xff;
 215                 switch (psxRegs.pc & 0x1fffff) {
 216                         case 0xa0:
 217 #ifdef PSXBIOS_LOG
 218                                 if (call != 0x28 && call != 0xe) {
 219                                         PSXBIOS_LOG("Bios call a0: %s (%x) %x,%x,%x,%x\n", biosA0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3); }
 220 #endif
 221                                 if (biosA0[call])
 222                                         biosA0[call]();
 223                                 break;
 224                         case 0xb0:
 225 #ifdef PSXBIOS_LOG
 226                                 if (call != 0x17 && call != 0xb) {
 227                                         PSXBIOS_LOG("Bios call b0: %s (%x) %x,%x,%x,%x\n", biosB0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3); }
 228 #endif
 229                                 if (biosB0[call])
 230                                         biosB0[call]();
 231                                 break;
 232                         case 0xc0:
 233 #ifdef PSXBIOS_LOG
 234                                 PSXBIOS_LOG("Bios call c0: %s (%x) %x,%x,%x,%x\n", biosC0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3);
 235 #endif
 236                                 if (biosC0[call])
 237                                         biosC0[call]();
 238                                 break;
 239                 }
 240         }
 241 }
 242
 243 void psxExecuteBios() {
 244         while (psxRegs.pc != 0x80030000)
 245                 psxCpu->ExecuteBlock();
 246 }
 247