libpcsxcore/r3000a.c

   1 /***************************************************************************
   2  *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
   3  *                                                                         *
   4  *   This program is free software; you can redistribute it and/or modify  *
   5  *   it under the terms of the GNU General Public License as published by  *
   6  *   the Free Software Foundation; either version 2 of the License, or     *
   7  *   (at your option) any later version.                                   *
   8  *                                                                         *
   9  *   This program is distributed in the hope that it will be useful,       *
  10  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  11  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  12  *   GNU General Public License for more details.                          *
  13  *                                                                         *
  14  *   You should have received a copy of the GNU General Public License     *
  15  *   along with this program; if not, write to the                         *
  16  *   Free Software Foundation, Inc.,                                       *
  17  *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
  18  ***************************************************************************/
  19
  20 /*
  21 * R3000A CPU functions.
  22 */
  23
  24 #include "r3000a.h"
  25 #include "cdrom.h"
  26 #include "mdec.h"
  27 #include "gte.h"
  28
  29 R3000Acpu *psxCpu = NULL;
  30 psxRegisters psxRegs;
  31
  32 int psxInit() {
  33         SysPrintf(_("Running PCSX Version %s (%s).\n"), PACKAGE_VERSION, __DATE__);
  34
  35 #ifdef PSXREC
  36         if (Config.Cpu == CPU_INTERPRETER) {
  37                 psxCpu = &psxInt;
  38         } else psxCpu = &psxRec;
  39 #else
  40         psxCpu = &psxInt;
  41 #endif
  42
  43         Log = 0;
  44
  45         if (psxMemInit() == -1) return -1;
  46
  47         return psxCpu->Init();
  48 }
  49
  50 void psxReset() {
  51         psxMemReset();
  52
  53         memset(&psxRegs, 0, sizeof(psxRegs));
  54
  55         psxRegs.pc = 0xbfc00000; // Start in bootstrap
  56
  57         psxRegs.CP0.r[12] = 0x10900000; // COP0 enabled | BEV = 1 | TS = 1
  58         psxRegs.CP0.r[15] = 0x00000002; // PRevID = Revision ID, same as R3000A
  59
  60         psxCpu->Reset();
  61
  62         psxHwReset();
  63         psxBiosInit();
  64
  65         if (!Config.HLE)
  66                 psxExecuteBios();
  67
  68 #ifdef EMU_LOG
  69         EMU_LOG("*BIOS END*\n");
  70 #endif
  71         Log = 0;
  72 }
  73
  74 void psxShutdown() {
  75         psxMemShutdown();
  76         psxBiosShutdown();
  77
  78         psxCpu->Shutdown();
  79 }
  80
  81 void psxException(u32 code, u32 bd) {
  82         if (!Config.HLE && ((((psxRegs.code = PSXMu32(psxRegs.pc)) >> 24) & 0xfe) == 0x4a)) {
  83                 // "hokuto no ken" / "Crash Bandicot 2" ...
  84                 // BIOS does not allow to return to GTE instructions
  85                 // (just skips it, supposedly because it's scheduled already)
  86                 // so we execute it here
  87                 extern void (*psxCP2[64])(void *cp2regs);
  88                 psxCP2[psxRegs.code & 0x3f](&psxRegs.CP2D);
  89         }
  90
  91         // Set the Cause
  92         psxRegs.CP0.n.Cause = (psxRegs.CP0.n.Cause & 0x300) | code;
  93
  94         // Set the EPC & PC
  95         if (bd) {
  96 #ifdef PSXCPU_LOG
  97                 PSXCPU_LOG("bd set!!!\n");
  98 #endif
  99                 SysPrintf("bd set!!!\n");
 100                 psxRegs.CP0.n.Cause |= 0x80000000;
 101                 psxRegs.CP0.n.EPC = (psxRegs.pc - 4);
 102         } else
 103                 psxRegs.CP0.n.EPC = (psxRegs.pc);
 104
 105         if (psxRegs.CP0.n.Status & 0x400000)
 106                 psxRegs.pc = 0xbfc00180;
 107         else
 108                 psxRegs.pc = 0x80000080;
 109
 110         // Set the Status
 111         psxRegs.CP0.n.Status = (psxRegs.CP0.n.Status &~0x3f) |
 112                                                   ((psxRegs.CP0.n.Status & 0xf) << 2);
 113
 114         if (Config.HLE) psxBiosException();
 115 }
 116
 117 void psxBranchTest() {
 118         if ((psxRegs.cycle - psxNextsCounter) >= psxNextCounter)
 119                 psxRcntUpdate();
 120
 121         if (psxRegs.interrupt) {
 122                 if ((psxRegs.interrupt & (1 << PSXINT_SIO)) && !Config.Sio) { // sio
 123                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_SIO].sCycle) >= psxRegs.intCycle[PSXINT_SIO].cycle) {
 124                                 psxRegs.interrupt &= ~(1 << PSXINT_SIO);
 125                                 sioInterrupt();
 126                         }
 127                 }
 128                 if (psxRegs.interrupt & (1 << PSXINT_CDR)) { // cdr
 129                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDR].sCycle) >= psxRegs.intCycle[PSXINT_CDR].cycle) {
 130                                 psxRegs.interrupt &= ~(1 << PSXINT_CDR);
 131                                 cdrInterrupt();
 132                         }
 133                 }
 134                 if (psxRegs.interrupt & (1 << PSXINT_CDREAD)) { // cdr read
 135                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDREAD].sCycle) >= psxRegs.intCycle[PSXINT_CDREAD].cycle) {
 136                                 psxRegs.interrupt &= ~(1 << PSXINT_CDREAD);
 137                                 cdrReadInterrupt();
 138                         }
 139                 }
 140                 if (psxRegs.interrupt & (1 << PSXINT_GPUDMA)) { // gpu dma
 141                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_GPUDMA].sCycle) >= psxRegs.intCycle[PSXINT_GPUDMA].cycle) {
 142                                 psxRegs.interrupt &= ~(1 << PSXINT_GPUDMA);
 143                                 gpuInterrupt();
 144                         }
 145                 }
 146                 if (psxRegs.interrupt & (1 << PSXINT_MDECOUTDMA)) { // mdec out dma
 147                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_MDECOUTDMA].sCycle) >= psxRegs.intCycle[PSXINT_MDECOUTDMA].cycle) {
 148                                 psxRegs.interrupt &= ~(1 << PSXINT_MDECOUTDMA);
 149                                 mdec1Interrupt();
 150                         }
 151                 }
 152                 if (psxRegs.interrupt & (1 << PSXINT_SPUDMA)) { // spu dma
 153                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_SPUDMA].sCycle) >= psxRegs.intCycle[PSXINT_SPUDMA].cycle) {
 154                                 psxRegs.interrupt &= ~(1 << PSXINT_SPUDMA);
 155                                 spuInterrupt();
 156                         }
 157                 }
 158                 if (psxRegs.interrupt & (1 << PSXINT_MDECINDMA)) { // mdec in
 159                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_MDECINDMA].sCycle) >= psxRegs.intCycle[PSXINT_MDECINDMA].cycle) {
 160                                 psxRegs.interrupt &= ~(1 << PSXINT_MDECINDMA);
 161                                 mdec0Interrupt();
 162                         }
 163                 }
 164                 if (psxRegs.interrupt & (1 << PSXINT_GPUOTCDMA)) { // gpu otc
 165                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_GPUOTCDMA].sCycle) >= psxRegs.intCycle[PSXINT_GPUOTCDMA].cycle) {
 166                                 psxRegs.interrupt &= ~(1 << PSXINT_GPUOTCDMA);
 167                                 gpuotcInterrupt();
 168                         }
 169                 }
 170                 if (psxRegs.interrupt & (1 << PSXINT_CDRDMA)) { // cdrom
 171                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDRDMA].sCycle) >= psxRegs.intCycle[PSXINT_CDRDMA].cycle) {
 172                                 psxRegs.interrupt &= ~(1 << PSXINT_CDRDMA);
 173                                 cdrDmaInterrupt();
 174                         }
 175                 }
 176                 if (psxRegs.interrupt & (1 << PSXINT_CDRPLAY)) { // cdr play timing
 177                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDRPLAY].sCycle) >= psxRegs.intCycle[PSXINT_CDRPLAY].cycle) {
 178                                 psxRegs.interrupt &= ~(1 << PSXINT_CDRPLAY);
 179                                 cdrPlayInterrupt();
 180                         }
 181                 }
 182                 if (psxRegs.interrupt & (1 << PSXINT_CDRLID)) { // cdr lid states
 183                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDRLID].sCycle) >= psxRegs.intCycle[PSXINT_CDRLID].cycle) {
 184                                 psxRegs.interrupt &= ~(1 << PSXINT_CDRLID);
 185                                 cdrLidSeekInterrupt();
 186                         }
 187                 }
 188                 if (psxRegs.interrupt & (1 << PSXINT_SPU_UPDATE)) { // scheduled spu update
 189                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_SPU_UPDATE].sCycle) >= psxRegs.intCycle[PSXINT_SPU_UPDATE].cycle) {
 190                                 psxRegs.interrupt &= ~(1 << PSXINT_SPU_UPDATE);
 191                                 spuUpdate();
 192                         }
 193                 }
 194         }
 195
 196         if (psxHu32(0x1070) & psxHu32(0x1074)) {
 197                 if ((psxRegs.CP0.n.Status & 0x401) == 0x401) {
 198 #ifdef PSXCPU_LOG
 199                         PSXCPU_LOG("Interrupt: %x %x\n", psxHu32(0x1070), psxHu32(0x1074));
 200 #endif
 201 //                      SysPrintf("Interrupt (%x): %x %x\n", psxRegs.cycle, psxHu32(0x1070), psxHu32(0x1074));
 202                         psxException(0x400, 0);
 203                 }
 204         }
 205 }
 206
 207 void psxJumpTest() {
 208         if (!Config.HLE && Config.PsxOut) {
 209                 u32 call = psxRegs.GPR.n.t1 & 0xff;
 210                 switch (psxRegs.pc & 0x1fffff) {
 211                         case 0xa0:
 212 #ifdef PSXBIOS_LOG
 213                                 if (call != 0x28 && call != 0xe) {
 214                                         PSXBIOS_LOG("Bios call a0: %s (%x) %x,%x,%x,%x\n", biosA0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3); }
 215 #endif
 216                                 if (biosA0[call])
 217                                         biosA0[call]();
 218                                 break;
 219                         case 0xb0:
 220 #ifdef PSXBIOS_LOG
 221                                 if (call != 0x17 && call != 0xb) {
 222                                         PSXBIOS_LOG("Bios call b0: %s (%x) %x,%x,%x,%x\n", biosB0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3); }
 223 #endif
 224                                 if (biosB0[call])
 225                                         biosB0[call]();
 226                                 break;
 227                         case 0xc0:
 228 #ifdef PSXBIOS_LOG
 229                                 PSXBIOS_LOG("Bios call c0: %s (%x) %x,%x,%x,%x\n", biosC0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3);
 230 #endif
 231                                 if (biosC0[call])
 232                                         biosC0[call]();
 233                                 break;
 234                 }
 235         }
 236 }
 237
 238 void psxExecuteBios() {
 239         while (psxRegs.pc != 0x80030000)
 240                 psxCpu->ExecuteBlock();
 241 }
 242