libpcsxcore/r3000a.c

   1 /***************************************************************************
   2  *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
   3  *                                                                         *
   4  *   This program is free software; you can redistribute it and/or modify  *
   5  *   it under the terms of the GNU General Public License as published by  *
   6  *   the Free Software Foundation; either version 2 of the License, or     *
   7  *   (at your option) any later version.                                   *
   8  *                                                                         *
   9  *   This program is distributed in the hope that it will be useful,       *
  10  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  11  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  12  *   GNU General Public License for more details.                          *
  13  *                                                                         *
  14  *   You should have received a copy of the GNU General Public License     *
  15  *   along with this program; if not, write to the                         *
  16  *   Free Software Foundation, Inc.,                                       *
  17  *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
  18  ***************************************************************************/
  19
  20 /*
  21 * R3000A CPU functions.
  22 */
  23
  24 #include "r3000a.h"
  25 #include "cdrom.h"
  26 #include "mdec.h"
  27 #include "gte.h"
  28 #include "psxinterpreter.h"
  29 #include "../include/compiler_features.h"
  30
  31 R3000Acpu *psxCpu = NULL;
  32 #ifdef DRC_DISABLE
  33 psxRegisters psxRegs;
  34 #endif
  35
  36 int psxInit() {
  37         SysPrintf(_("Running PCSX Version %s (%s).\n"), PCSX_VERSION, __DATE__);
  38
  39 #ifndef DRC_DISABLE
  40         if (Config.Cpu == CPU_INTERPRETER) {
  41                 psxCpu = &psxInt;
  42         } else psxCpu = &psxRec;
  43 #else
  44         Config.Cpu = CPU_INTERPRETER;
  45         psxCpu = &psxInt;
  46 #endif
  47
  48         Log = 0;
  49
  50         if (psxMemInit() == -1) return -1;
  51
  52         return psxCpu->Init();
  53 }
  54
  55 void psxReset() {
  56         psxMemReset();
  57
  58         memset(&psxRegs, 0, sizeof(psxRegs));
  59
  60         psxRegs.pc = 0xbfc00000; // Start in bootstrap
  61
  62         psxRegs.CP0.r[12] = 0x10600000; // COP0 enabled | BEV = 1 | TS = 1
  63         psxRegs.CP0.r[15] = 0x00000002; // PRevID = Revision ID, same as R3000A
  64         if (Config.HLE)
  65                 psxRegs.CP0.n.Status |= 1u << 30; // COP2 enabled
  66
  67         psxCpu->ApplyConfig();
  68         psxCpu->Reset();
  69
  70         psxHwReset();
  71         psxBiosInit();
  72
  73         BiosLikeGPUSetup(); // a bit of a hack but whatever
  74
  75         if (!Config.HLE) {
  76                 psxExecuteBios();
  77                 if (psxRegs.pc == 0x80030000 && !Config.SlowBoot)
  78                         BiosBootBypass();
  79         }
  80
  81 #ifdef EMU_LOG
  82         EMU_LOG("*BIOS END*\n");
  83 #endif
  84         Log = 0;
  85 }
  86
  87 void psxShutdown() {
  88         psxBiosShutdown();
  89
  90         psxCpu->Shutdown();
  91
  92         psxMemShutdown();
  93 }
  94
  95 // cp0 is passed separately for lightrec to be less messy
  96 void psxException(u32 cause, u32 bd, psxCP0Regs *cp0) {
  97         u32 opcode = intFakeFetch(psxRegs.pc);
  98
  99         if (unlikely(!Config.HLE && ((((opcode) >> 24) & 0xfe) == 0x4a))) {
 100                 // "hokuto no ken" / "Crash Bandicot 2" ...
 101                 // BIOS does not allow to return to GTE instructions
 102                 // (just skips it, supposedly because it's scheduled already)
 103                 // so we execute it here
 104                 psxCP2Regs *cp2 = (void *)(cp0 + 1);
 105                 psxRegs.code = opcode;
 106                 psxCP2[opcode & 0x3f](cp2);
 107         }
 108
 109         // Set the Cause
 110         cp0->n.Cause = (cp0->n.Cause & 0x300) | cause;
 111
 112         // Set the EPC & PC
 113         if (bd) {
 114 #ifdef PSXCPU_LOG
 115                 PSXCPU_LOG("bd set!!!\n");
 116 #endif
 117                 cp0->n.Cause |= 0x80000000;
 118                 cp0->n.EPC = (psxRegs.pc - 4);
 119         } else
 120                 cp0->n.EPC = (psxRegs.pc);
 121
 122         if (cp0->n.Status & 0x400000)
 123                 psxRegs.pc = 0xbfc00180;
 124         else
 125                 psxRegs.pc = 0x80000080;
 126
 127         // Set the Status
 128         cp0->n.Status = (cp0->n.Status & ~0x3f) | ((cp0->n.Status & 0x0f) << 2);
 129
 130         if (Config.HLE) psxBiosException();
 131 }
 132
 133 void psxBranchTest() {
 134         if ((psxRegs.cycle - psxNextsCounter) >= psxNextCounter)
 135                 psxRcntUpdate();
 136
 137         if (psxRegs.interrupt) {
 138                 if ((psxRegs.interrupt & (1 << PSXINT_SIO))) { // sio
 139                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_SIO].sCycle) >= psxRegs.intCycle[PSXINT_SIO].cycle) {
 140                                 psxRegs.interrupt &= ~(1 << PSXINT_SIO);
 141                                 sioInterrupt();
 142                         }
 143                 }
 144                 if (psxRegs.interrupt & (1 << PSXINT_CDR)) { // cdr
 145                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDR].sCycle) >= psxRegs.intCycle[PSXINT_CDR].cycle) {
 146                                 psxRegs.interrupt &= ~(1 << PSXINT_CDR);
 147                                 cdrInterrupt();
 148                         }
 149                 }
 150                 if (psxRegs.interrupt & (1 << PSXINT_CDREAD)) { // cdr read
 151                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDREAD].sCycle) >= psxRegs.intCycle[PSXINT_CDREAD].cycle) {
 152                                 psxRegs.interrupt &= ~(1 << PSXINT_CDREAD);
 153                                 cdrPlayReadInterrupt();
 154                         }
 155                 }
 156                 if (psxRegs.interrupt & (1 << PSXINT_GPUDMA)) { // gpu dma
 157                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_GPUDMA].sCycle) >= psxRegs.intCycle[PSXINT_GPUDMA].cycle) {
 158                                 psxRegs.interrupt &= ~(1 << PSXINT_GPUDMA);
 159                                 gpuInterrupt();
 160                         }
 161                 }
 162                 if (psxRegs.interrupt & (1 << PSXINT_MDECOUTDMA)) { // mdec out dma
 163                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_MDECOUTDMA].sCycle) >= psxRegs.intCycle[PSXINT_MDECOUTDMA].cycle) {
 164                                 psxRegs.interrupt &= ~(1 << PSXINT_MDECOUTDMA);
 165                                 mdec1Interrupt();
 166                         }
 167                 }
 168                 if (psxRegs.interrupt & (1 << PSXINT_SPUDMA)) { // spu dma
 169                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_SPUDMA].sCycle) >= psxRegs.intCycle[PSXINT_SPUDMA].cycle) {
 170                                 psxRegs.interrupt &= ~(1 << PSXINT_SPUDMA);
 171                                 spuInterrupt();
 172                         }
 173                 }
 174                 if (psxRegs.interrupt & (1 << PSXINT_MDECINDMA)) { // mdec in
 175                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_MDECINDMA].sCycle) >= psxRegs.intCycle[PSXINT_MDECINDMA].cycle) {
 176                                 psxRegs.interrupt &= ~(1 << PSXINT_MDECINDMA);
 177                                 mdec0Interrupt();
 178                         }
 179                 }
 180                 if (psxRegs.interrupt & (1 << PSXINT_GPUOTCDMA)) { // gpu otc
 181                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_GPUOTCDMA].sCycle) >= psxRegs.intCycle[PSXINT_GPUOTCDMA].cycle) {
 182                                 psxRegs.interrupt &= ~(1 << PSXINT_GPUOTCDMA);
 183                                 gpuotcInterrupt();
 184                         }
 185                 }
 186                 if (psxRegs.interrupt & (1 << PSXINT_CDRDMA)) { // cdrom
 187                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDRDMA].sCycle) >= psxRegs.intCycle[PSXINT_CDRDMA].cycle) {
 188                                 psxRegs.interrupt &= ~(1 << PSXINT_CDRDMA);
 189                                 cdrDmaInterrupt();
 190                         }
 191                 }
 192                 if (psxRegs.interrupt & (1 << PSXINT_CDRLID)) { // cdr lid states
 193                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDRLID].sCycle) >= psxRegs.intCycle[PSXINT_CDRLID].cycle) {
 194                                 psxRegs.interrupt &= ~(1 << PSXINT_CDRLID);
 195                                 cdrLidSeekInterrupt();
 196                         }
 197                 }
 198                 if (psxRegs.interrupt & (1 << PSXINT_SPU_UPDATE)) { // scheduled spu update
 199                         if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_SPU_UPDATE].sCycle) >= psxRegs.intCycle[PSXINT_SPU_UPDATE].cycle) {
 200                                 psxRegs.interrupt &= ~(1 << PSXINT_SPU_UPDATE);
 201                                 spuUpdate();
 202                         }
 203                 }
 204         }
 205
 206         if (psxHu32(0x1070) & psxHu32(0x1074)) {
 207                 if ((psxRegs.CP0.n.Status & 0x401) == 0x401) {
 208 #ifdef PSXCPU_LOG
 209                         PSXCPU_LOG("Interrupt: %x %x\n", psxHu32(0x1070), psxHu32(0x1074));
 210 #endif
 211 //                      SysPrintf("Interrupt (%x): %x %x\n", psxRegs.cycle, psxHu32(0x1070), psxHu32(0x1074));
 212                         psxException(0x400, 0, &psxRegs.CP0);
 213                 }
 214         }
 215 }
 216
 217 void psxJumpTest() {
 218         if (!Config.HLE && Config.PsxOut) {
 219                 u32 call = psxRegs.GPR.n.t1 & 0xff;
 220                 switch (psxRegs.pc & 0x1fffff) {
 221                         case 0xa0:
 222 #ifdef PSXBIOS_LOG
 223                                 if (call != 0x28 && call != 0xe) {
 224                                         PSXBIOS_LOG("Bios call a0: %s (%x) %x,%x,%x,%x\n", biosA0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3); }
 225 #endif
 226                                 if (biosA0[call])
 227                                         biosA0[call]();
 228                                 break;
 229                         case 0xb0:
 230 #ifdef PSXBIOS_LOG
 231                                 if (call != 0x17 && call != 0xb) {
 232                                         PSXBIOS_LOG("Bios call b0: %s (%x) %x,%x,%x,%x\n", biosB0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3); }
 233 #endif
 234                                 if (biosB0[call])
 235                                         biosB0[call]();
 236                                 break;
 237                         case 0xc0:
 238 #ifdef PSXBIOS_LOG
 239                                 PSXBIOS_LOG("Bios call c0: %s (%x) %x,%x,%x,%x\n", biosC0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3);
 240 #endif
 241                                 if (biosC0[call])
 242                                         biosC0[call]();
 243                                 break;
 244                 }
 245         }
 246 }
 247
 248 void psxExecuteBios() {
 249         int i;
 250         for (i = 0; i < 5000000; i++) {
 251                 psxCpu->ExecuteBlock(EXEC_CALLER_BOOT);
 252                 if ((psxRegs.pc & 0xff800000) == 0x80000000)
 253                         break;
 254         }
 255         if (psxRegs.pc != 0x80030000)
 256                 SysPrintf("non-standard BIOS detected (%d, %08x)\n", i, psxRegs.pc);
 257 }
 258