#include "emu_if.h"
#include "pcsxmem.h"
#include "../psxhle.h"
+#include "../psxinterpreter.h"
#include "../r3000a.h"
#include "../cdrom.h"
#include "../psxdma.h"
[PSXINT_CDRDMA] = cdrDmaInterrupt,
[PSXINT_CDRLID] = cdrLidSeekInterrupt,
[PSXINT_CDRPLAY] = cdrPlayInterrupt,
+ [PSXINT_SPU_UPDATE] = spuUpdate,
[PSXINT_RCNT] = psxRcntUpdate,
};
evprintf("MTC0 %d #%x @%08x %u\n", reg, val, psxRegs.pc, psxRegs.cycle);
MTC0(reg, val);
gen_interupt();
+ if (Cause & Status & 0x0300) // possible sw irq
+ pending_exception = 1;
}
void pcsx_mtc0_ds(u32 reg, u32 val)
MTC0(reg, val);
}
-void new_dyna_save(void)
+void new_dyna_before_save(void)
{
psxRegs.interrupt &= ~(1 << PSXINT_RCNT); // old savestate compat
psxRegs.interrupt |= 1 << PSXINT_RCNT;
}
-void new_dyna_restore(void)
+static void new_dyna_restore(void)
{
int i;
for (i = 0; i < PSXINT_COUNT; i++)
new_dyna_pcsx_mem_load_state();
}
+void new_dyna_freeze(void *f, int mode)
+{
+ const char header_save[8] = "ariblks";
+ uint32_t addrs[1024 * 4];
+ int32_t size = 0;
+ int bytes;
+ char header[8];
+
+ if (mode != 0) { // save
+ size = new_dynarec_save_blocks(addrs, sizeof(addrs));
+ if (size == 0)
+ return;
+
+ SaveFuncs.write(f, header_save, sizeof(header_save));
+ SaveFuncs.write(f, &size, sizeof(size));
+ SaveFuncs.write(f, addrs, size);
+ }
+ else {
+ new_dyna_restore();
+
+ bytes = SaveFuncs.read(f, header, sizeof(header));
+ if (bytes != sizeof(header) || strcmp(header, header_save)) {
+ if (bytes > 0)
+ SaveFuncs.seek(f, -bytes, SEEK_CUR);
+ return;
+ }
+ SaveFuncs.read(f, &size, sizeof(size));
+ if (size <= 0)
+ return;
+ if (size > sizeof(addrs)) {
+ bytes = size - sizeof(addrs);
+ SaveFuncs.seek(f, bytes, SEEK_CUR);
+ size = sizeof(addrs);
+ }
+ bytes = SaveFuncs.read(f, addrs, size);
+ if (bytes != size)
+ return;
+
+ if (psxCpu != &psxInt)
+ new_dynarec_load_blocks(addrs, size);
+ }
+
+ //printf("drc: %d block info entries %s\n", size/8, mode ? "saved" : "loaded");
+}
+
+#ifndef DRC_DISABLE
+
/* GTE stuff */
void *gte_handlers[64];
NULL , NULL , NULL , NULL , NULL , "GPF" , "GPL" , "NCCT", // 38
};
-/* from gte.txt.. not sure if this is any good. */
-const char gte_cycletab[64] = {
- /* 1 2 3 4 5 6 7 8 9 a b c d e f */
- 0, 15, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 6, 0, 0, 0,
- 8, 8, 8, 19, 13, 0, 44, 0, 0, 0, 0, 17, 11, 0, 14, 0,
- 30, 0, 0, 0, 0, 0, 0, 0, 5, 8, 17, 0, 0, 5, 6, 0,
- 23, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 5, 5, 39,
-};
-
#define GCBIT(x) \
(1ll << (32+x))
#define GDBIT(x) \
[GTE_OP] = GCBITS3(0,2,4) | GDBITS3(9,10,11),
[GTE_DPCS] = GCBITS3(21,22,23) | GDBITS4(6,8,21,22),
[GTE_INTPL] = GCBITS3(21,22,23) | GDBITS7(6,8,9,10,11,21,22),
- [GTE_MVMVA] = 0x00ffffff00000000ll | GDBITS6(0,1,2,3,4,5), // XXX: maybe decode further?
- [GTE_NCDS] = 0x00ffff0000000000ll | GDBITS5(0,1,6,21,22),
- [GTE_CDP] = 0x00fff00000000000ll | GDBITS7(6,8,9,10,11,21,22),
+ [GTE_MVMVA] = 0x00ffffff00000000ll | GDBITS9(0,1,2,3,4,5,9,10,11), // XXX: maybe decode further?
+ [GTE_NCDS] = 0x00ffff0000000000ll | GDBITS6(0,1,6,8,21,22),
+ [GTE_CDP] = 0x00ffe00000000000ll | GDBITS7(6,8,9,10,11,21,22),
[GTE_NCDT] = 0x00ffff0000000000ll | GDBITS8(0,1,2,3,4,5,6,8),
- [GTE_NCCS] = 0x00ffff0000000000ll | GDBITS6(0,1,6,8,21,22),
+ [GTE_NCCS] = 0x001fff0000000000ll | GDBITS5(0,1,6,21,22),
[GTE_CC] = 0x001fe00000000000ll | GDBITS6(6,9,10,11,21,22),
- [GTE_NCS] = 0x001fff0000000000ll | GDBITS4(0,1,21,22),
+ [GTE_NCS] = 0x001fff0000000000ll | GDBITS5(0,1,6,21,22),
[GTE_NCT] = 0x001fff0000000000ll | GDBITS7(0,1,2,3,4,5,6),
[GTE_SQR] = GDBITS3(9,10,11),
[GTE_DCPL] = GCBITS3(21,22,23) | GDBITS7(6,8,9,10,11,21,22),
static int ari64_init()
{
+ static u32 scratch_buf[8*8*2] __attribute__((aligned(64)));
extern void (*psxCP2[64])();
extern void psxNULL();
+ extern unsigned char *out;
size_t i;
new_dynarec_init();
if (psxCP2[i] != psxNULL)
gte_handlers[i] = psxCP2[i];
-#if !defined(DRC_DBG)
-#ifdef __arm__
+#if defined(__arm__) && !defined(DRC_DBG)
gte_handlers[0x06] = gteNCLIP_arm;
+#ifdef HAVE_ARMV5
gte_handlers_nf[0x01] = gteRTPS_nf_arm;
gte_handlers_nf[0x30] = gteRTPT_nf_arm;
#endif
#endif
psxH_ptr = psxH;
zeromem_ptr = zero_mem;
+ scratch_buf_ptr = scratch_buf;
+
+ SysPrintf("Mapped (RAM/scrp/ROM/LUTs/TC):\n");
+ SysPrintf("%p/%p/%p/%p/%p\n",
+ psxM, psxH, psxR, mem_rtab, out);
return 0;
}
evprintf("ari64_execute %08x, %u->%u (%d)\n", psxRegs.pc,
psxRegs.cycle, next_interupt, next_interupt - psxRegs.cycle);
- new_dyna_start();
+ new_dyna_start(dynarec_local);
evprintf("ari64_execute end %08x, %u->%u (%d)\n", psxRegs.pc,
psxRegs.cycle, next_interupt, next_interupt - psxRegs.cycle);
{
u32 start, end, main_ram;
- size *= 4; /* PCSX uses DMA units */
+ size *= 4; /* PCSX uses DMA units (words) */
evprintf("ari64_clear %08x %04x\n", addr, size);
invalidate_block(start);
}
+static void ari64_notify(int note, void *data) {
+ /*
+ Should be fixed when ARM dynarec has proper icache emulation.
+ switch (note)
+ {
+ case R3000ACPU_NOTIFY_CACHE_UNISOLATED:
+ break;
+ case R3000ACPU_NOTIFY_CACHE_ISOLATED:
+ Sent from psxDma3().
+ case R3000ACPU_NOTIFY_DMA3_EXE_LOAD:
+ default:
+ break;
+ }
+ */
+}
+
+static void ari64_apply_config()
+{
+ intApplyConfig();
+
+ if (Config.DisableStalls)
+ new_dynarec_hacks |= NDHACK_NO_STALLS;
+ else
+ new_dynarec_hacks &= ~NDHACK_NO_STALLS;
+
+ if (cycle_multiplier != cycle_multiplier_old
+ || new_dynarec_hacks != new_dynarec_hacks_old)
+ {
+ new_dynarec_clear_full();
+ }
+}
+
static void ari64_shutdown()
{
new_dynarec_cleanup();
+ new_dyna_pcsx_mem_shutdown();
}
-extern void intExecute();
-extern void intExecuteT();
-extern void intExecuteBlock();
-extern void intExecuteBlockT();
-#ifndef DRC_DBG
-#define intExecuteT intExecute
-#define intExecuteBlockT intExecuteBlock
-#endif
-
R3000Acpu psxRec = {
ari64_init,
ari64_reset,
-#if defined(__arm__)
ari64_execute,
ari64_execute_until,
-#else
- intExecuteT,
- intExecuteBlockT,
-#endif
ari64_clear,
+ ari64_notify,
+ ari64_apply_config,
ari64_shutdown
};
-// TODO: rm
-#ifndef DRC_DBG
-void do_insn_trace() {}
-void do_insn_cmp() {}
-#endif
+#else // if DRC_DISABLE
-#if defined(__x86_64__) || defined(__i386__)
unsigned int address;
int pending_exception, stop;
unsigned int next_interupt;
int new_dynarec_did_compile;
int cycle_multiplier;
+int cycle_multiplier_override;
+int cycle_multiplier_old;
+int new_dynarec_hacks_pergame;
+int new_dynarec_hacks_old;
int new_dynarec_hacks;
void *psxH_ptr;
void *zeromem_ptr;
u8 zero_mem[0x1000];
+unsigned char *out;
+void *mem_rtab;
+void *scratch_buf_ptr;
void new_dynarec_init() {}
-void new_dyna_start() {}
+void new_dyna_start(void *context) {}
void new_dynarec_cleanup() {}
void new_dynarec_clear_full() {}
void invalidate_all_pages() {}
void new_dyna_pcsx_mem_init(void) {}
void new_dyna_pcsx_mem_reset(void) {}
void new_dyna_pcsx_mem_load_state(void) {}
+void new_dyna_pcsx_mem_shutdown(void) {}
+int new_dynarec_save_blocks(void *save, int size) { return 0; }
+void new_dynarec_load_blocks(const void *save, int size) {}
#endif
#ifdef DRC_DBG
#include <stddef.h>
static FILE *f;
-extern u32 last_io_addr;
+u32 irq_test_cycle;
+u32 handler_cycle;
+u32 last_io_addr;
static void dump_mem(const char *fname, void *mem, size_t size)
{
return *(u32 *)(psxM + (a & 0x1ffffc));
}
+#if 0
void do_insn_trace(void)
{
static psxRegisters oldregs;
- static u32 old_io_addr = (u32)-1;
- static u32 old_io_data = 0xbad0c0de;
static u32 event_cycles_o[PSXINT_COUNT];
u32 *allregs_p = (void *)&psxRegs;
u32 *allregs_o = (void *)&oldregs;
// log event changes
for (i = 0; i < PSXINT_COUNT; i++) {
if (event_cycles[i] != event_cycles_o[i]) {
- byte = 0xfc;
+ byte = 0xf8;
fwrite(&byte, 1, 1, f);
fwrite(&i, 1, 1, f);
fwrite(&event_cycles[i], 1, 4, f);
event_cycles_o[i] = event_cycles[i];
}
}
- // log last io
- if (old_io_addr != last_io_addr) {
- byte = 0xfd;
- fwrite(&byte, 1, 1, f);
- fwrite(&last_io_addr, 1, 4, f);
- old_io_addr = last_io_addr;
+ #define SAVE_IF_CHANGED(code_, name_) { \
+ static u32 old_##name_ = 0xbad0c0de; \
+ if (old_##name_ != name_) { \
+ byte = code_; \
+ fwrite(&byte, 1, 1, f); \
+ fwrite(&name_, 1, 4, f); \
+ old_##name_ = name_; \
+ } \
}
+ SAVE_IF_CHANGED(0xfb, irq_test_cycle);
+ SAVE_IF_CHANGED(0xfc, handler_cycle);
+ SAVE_IF_CHANGED(0xfd, last_io_addr);
io_data = memcheck_read(last_io_addr);
- if (old_io_data != io_data) {
- byte = 0xfe;
- fwrite(&byte, 1, 1, f);
- fwrite(&io_data, 1, 4, f);
- old_io_data = io_data;
- }
+ SAVE_IF_CHANGED(0xfe, io_data);
byte = 0xff;
fwrite(&byte, 1, 1, f);
}
#endif
}
+#endif
static const char *regnames[offsetof(psxRegisters, intCycle) / 4] = {
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
void do_insn_cmp(void)
{
+ extern int last_count;
static psxRegisters rregs;
static u32 mem_addr, mem_val;
+ static u32 irq_test_cycle_intr;
+ static u32 handler_cycle_intr;
u32 *allregs_p = (void *)&psxRegs;
u32 *allregs_e = (void *)&rregs;
static u32 ppc, failcount;
- int i, ret, bad = 0, which_event = -1;
+ int i, ret, bad = 0, fatal = 0, which_event = -1;
u32 ev_cycles = 0;
u8 code;
if (code == 0xff)
break;
switch (code) {
- case 0xfc:
+ case 0xf8:
which_event = 0;
fread(&which_event, 1, 1, f);
fread(&ev_cycles, 1, 4, f);
continue;
+ case 0xfb:
+ fread(&irq_test_cycle_intr, 1, 4, f);
+ continue;
+ case 0xfc:
+ fread(&handler_cycle_intr, 1, 4, f);
+ continue;
case 0xfd:
fread(&mem_addr, 1, 4, f);
continue;
fread(&mem_val, 1, 4, f);
continue;
}
+ assert(code < offsetof(psxRegisters, intCycle) / 4);
fread(&allregs_e[code], 1, 4, f);
}
if (ret <= 0) {
printf("EOF?\n");
- goto end;
+ exit(1);
}
psxRegs.code = rregs.code; // don't care
- psxRegs.cycle = rregs.cycle;
+ psxRegs.cycle += last_count;
+ //psxRegs.cycle = rregs.cycle;
psxRegs.CP0.r[9] = rregs.CP0.r[9]; // Count
//if (psxRegs.cycle == 166172) breakme();
- if (memcmp(&psxRegs, &rregs, offsetof(psxRegisters, intCycle)) == 0 &&
- mem_val == memcheck_read(mem_addr)
- ) {
+ if (which_event >= 0 && event_cycles[which_event] != ev_cycles) {
+ printf("bad ev_cycles #%d: %08x %08x\n", which_event, event_cycles[which_event], ev_cycles);
+ fatal = 1;
+ }
+
+ if (irq_test_cycle > irq_test_cycle_intr) {
+ printf("bad irq_test_cycle: %u %u\n", irq_test_cycle, irq_test_cycle_intr);
+ fatal = 1;
+ }
+
+ if (handler_cycle != handler_cycle_intr) {
+ printf("bad handler_cycle: %u %u\n", handler_cycle, handler_cycle_intr);
+ fatal = 1;
+ }
+
+ if (mem_val != memcheck_read(mem_addr)) {
+ printf("bad mem @%08x: %08x %08x\n", mem_addr, memcheck_read(mem_addr), mem_val);
+ fatal = 1;
+ }
+
+ if (!fatal && !memcmp(&psxRegs, &rregs, offsetof(psxRegisters, intCycle))) {
failcount = 0;
goto ok;
}
if (allregs_p[i] != allregs_e[i]) {
miss_log_add(i, allregs_p[i], allregs_e[i], psxRegs.pc, psxRegs.cycle);
bad++;
+ if (i > 32+2)
+ fatal = 1;
}
}
- if (mem_val != memcheck_read(mem_addr)) {
- printf("bad mem @%08x: %08x %08x\n", mem_addr, memcheck_read(mem_addr), mem_val);
- goto end;
- }
-
- if (which_event >= 0 && event_cycles[which_event] != ev_cycles) {
- printf("bad ev_cycles #%d: %08x %08x\n", which_event, event_cycles[which_event], ev_cycles);
- goto end;
- }
-
- if (psxRegs.pc == rregs.pc && bad < 6 && failcount < 32) {
+ if (!fatal && psxRegs.pc == rregs.pc && bad < 6 && failcount < 32) {
static int last_mcycle;
if (last_mcycle != psxRegs.cycle >> 20) {
printf("%u\n", psxRegs.cycle);
goto ok;
}
-end:
for (i = 0; i < miss_log_len; i++, miss_log_i = (miss_log_i + 1) & miss_log_mask)
printf("bad %5s: %08x %08x, pc=%08x, cycle %u\n",
regnames[miss_log[miss_log_i].reg], miss_log[miss_log_i].val,
dump_mem("/mnt/ntz/dev/pnd/tmp/psxregs.dump", psxH, 0x10000);
exit(1);
ok:
- psxRegs.cycle = rregs.cycle + 2; // sync timing
+ //psxRegs.cycle = rregs.cycle + 2; // sync timing
ppc = psxRegs.pc;
}
notaz.gp2x.de / pcsx_rearmed.git / blobdiff