cdrom: change pause timing again

[pcsx_rearmed.git] / libpcsxcore / psxhw.c

diff --git a/libpcsxcore/psxhw.c b/libpcsxcore/psxhw.c
index 8179d95..b96db97 100644 (file)
--- a/libpcsxcore/psxhw.c
+++ b/libpcsxcore/psxhw.c
@@ -27,8 +27,6 @@
 #include "cdrom.h"
 #include "gpu.h"
 
-static u32 (*psxHwReadGpuSRptr)(void) = psxHwReadGpuSR;
-
 void psxHwReset() {
        memset(psxH, 0, 0x10000);
 
@@ -36,8 +34,6 @@ void psxHwReset() {
        cdrReset();
        psxRcntInit();
        HW_GPU_STATUS = SWAP32(0x10802000);
-       psxHwReadGpuSRptr = Config.hacks.gpu_busy
-               ? psxHwReadGpuSRbusyHack : psxHwReadGpuSR;
 }
 
 void psxHwWriteIstat(u32 value)
@@ -64,22 +60,31 @@ void psxHwWriteImask(u32 value)
                psxRegs.CP0.n.Cause |= 0x400;
 }
 
-#define make_dma_func(n) \
+#define make_dma_func(n, abort_func) \
 void psxHwWriteChcr##n(u32 value) \
 { \
-       if (value & SWAPu32(HW_DMA##n##_CHCR) & 0x01000000) \
-               log_unhandled("dma" #n " %08x -> %08x\n", HW_DMA##n##_CHCR, value); \
+       u32 old = SWAPu32(HW_DMA##n##_CHCR); \
+       if (n == 6) { value &= 0x51000002; value |= 2; } \
+       else        { value &= 0x71770703; } \
+       if (value == old) \
+               return; \
+       if (old & 0x01000000) \
+               log_unhandled("%u dma" #n " %08x -> %08x\n", psxRegs.cycle, old, value); \
        HW_DMA##n##_CHCR = SWAPu32(value); \
-       if (value & 0x01000000 && SWAPu32(HW_DMA_PCR) & (8u << (n * 4))) \
-               psxDma##n(SWAPu32(HW_DMA##n##_MADR), SWAPu32(HW_DMA##n##_BCR), value); \
+       if ((value ^ old) & 0x01000000) { \
+               if (!(value & 0x01000000)) \
+                       abort_func; \
+               else if (SWAPu32(HW_DMA_PCR) & (8u << (n * 4))) \
+                       psxDma##n(SWAPu32(HW_DMA##n##_MADR), SWAPu32(HW_DMA##n##_BCR), value); \
+       } \
 }
 
-make_dma_func(0)
-make_dma_func(1)
-make_dma_func(2)
-make_dma_func(3)
-make_dma_func(4)
-make_dma_func(6)
+make_dma_func(0,)
+make_dma_func(1,)
+make_dma_func(2, psxAbortDma2())
+make_dma_func(3,)
+make_dma_func(4,)
+make_dma_func(6,)
 
 void psxHwWriteDmaIcr32(u32 value)
 {
@@ -121,16 +126,10 @@ u32 psxHwReadGpuSR(void)
        return v;
 }
 
-// a hack due to poor timing of gpu idle bit
-// to get rid of this, GPU draw times, DMAs, cpu timing has to fall within
-// certain timing window or else games like "ToHeart" softlock
-u32 psxHwReadGpuSRbusyHack(void)
+u32 sio1ReadStat16(void)
 {
-       u32 v = psxHwReadGpuSR();
-       static u32 hack;
-       if (!(hack++ & 3))
-               v &= ~PSXGPU_nBUSY;
-       return v;
+       // Armored Core, F1 Link cable misdetection
+       return 0xa0;
 }
 
 u8 psxHwRead8(u32 add) {
@@ -196,7 +195,7 @@ u16 psxHwRead16(u32 add) {
        case 0x1048: hard = sioReadMode16(); break;
        case 0x104a: hard = sioReadCtrl16(); break;
        case 0x104e: hard = sioReadBaud16(); break;
-       case 0x1054: hard = 0x80; break; // Armored Core Link cable misdetection
+       case 0x1054: hard = sio1ReadStat16(); break;
        case 0x1100: hard = psxRcntRcount0(); break;
        case 0x1104: hard = psxRcntRmode(0); break;
        case 0x1108: hard = psxRcntRtarget(0); break;
@@ -254,7 +253,7 @@ u32 psxHwRead32(u32 add) {
        case 0x1124: hard = psxRcntRmode(2); break;
        case 0x1128: hard = psxRcntRtarget(2); break;
        case 0x1810: hard = GPU_readData(); break;
-       case 0x1814: hard = psxHwReadGpuSRptr(); break;
+       case 0x1814: hard = psxHwReadGpuSR(); break;
        case 0x1820: hard = mdecRead0(); break;
        case 0x1824: hard = mdecRead1(); break;