minor adjustment

[picodrive.git] / Pico / Memory.c

// This is part of Pico Library\r
\r
// (c) Copyright 2004 Dave, All rights reserved.\r
// (c) Copyright 2006,2007 notaz, All rights reserved.\r
// Free for non-commercial use.\r
\r
// For commercial use, separate licencing terms must be obtained.\r
\r
\r
#include "PicoInt.h"\r
\r
#include "sound/ym2612.h"\r
#include "sound/sn76496.h"\r
\r
#ifndef UTYPES_DEFINED\r
typedef unsigned char  u8;\r
typedef unsigned short u16;\r
typedef unsigned int   u32;\r
#define UTYPES_DEFINED\r
#endif\r
\r
extern unsigned int lastSSRamWrite; // used by serial SRAM code\r
\r
#ifdef _ASM_MEMORY_C\r
u32  PicoRead8(u32 a);\r
u32  PicoRead16(u32 a);\r
void PicoWrite8(u32 a,u8 d);\r
void PicoWriteRomHW_SSF2(u32 a,u32 d);\r
#endif\r
\r
\r
#ifdef EMU_CORE_DEBUG\r
u32 lastread_a, lastread_d[16]={0,}, lastwrite_cyc_d[16]={0,}, lastwrite_mus_d[16]={0,};\r
int lrp_cyc=0, lrp_mus=0, lwp_cyc=0, lwp_mus=0;\r
extern unsigned int ppop;\r
#endif\r
\r
#ifdef IO_STATS\r
void log_io(unsigned int addr, int bits, int rw);\r
#else\r
#define log_io(...)\r
#endif\r
\r
#if defined(EMU_C68K)\r
static __inline int PicoMemBase(u32 pc)\r
{\r
  int membase=0;\r
\r
  if (pc<Pico.romsize+4)\r
  {\r
    membase=(int)Pico.rom; // Program Counter in Rom\r
  }\r
  else if ((pc&0xe00000)==0xe00000)\r
  {\r
    membase=(int)Pico.ram-(pc&0xff0000); // Program Counter in Ram\r
  }\r
  else\r
  {\r
    // Error - Program Counter is invalid\r
    membase=(int)Pico.rom;\r
  }\r
\r
  return membase;\r
}\r
#endif\r
\r
\r
static u32 PicoCheckPc(u32 pc)\r
{\r
  u32 ret=0;\r
#if defined(EMU_C68K)\r
  pc-=PicoCpuCM68k.membase; // Get real pc\r
//  pc&=0xfffffe;\r
  pc&=~1;\r
  if ((pc<<8) == 0)\r
  {\r
    printf("%i:%03i: game crash detected @ %06x\n", Pico.m.frame_count, Pico.m.scanline, SekPc);\r
    return (int)Pico.rom + Pico.romsize; // common crash condition, can happen if acc timing is off\r
  }\r
\r
  PicoCpuCM68k.membase=PicoMemBase(pc&0x00ffffff);\r
  PicoCpuCM68k.membase-=pc&0xff000000;\r
\r
  ret = PicoCpuCM68k.membase+pc;\r
#endif\r
  return ret;\r
}\r
\r
\r
PICO_INTERNAL int PicoInitPc(u32 pc)\r
{\r
  PicoCheckPc(pc);\r
  return 0;\r
}\r
\r
#ifndef _ASM_MEMORY_C\r
PICO_INTERNAL_ASM void PicoMemReset(void)\r
{\r
}\r
#endif\r
\r
// -----------------------------------------------------------------\r
\r
int PadRead(int i)\r
{\r
  int pad,value,data_reg;\r
  pad=~PicoPad[i]; // Get inverse of pad MXYZ SACB RLDU\r
  data_reg=Pico.ioports[i+1];\r
\r
  // orr the bits, which are set as output\r
  value = data_reg&(Pico.ioports[i+4]|0x80);\r
\r
  if(PicoOpt & 0x20) { // 6 button gamepad enabled\r
    int phase = Pico.m.padTHPhase[i];\r
\r
    if(phase == 2 && !(data_reg&0x40)) { // TH\r
      value|=(pad&0xc0)>>2;              // ?0SA 0000\r
      return value;\r
    } else if(phase == 3) {\r
      if(data_reg&0x40)\r
        value|=(pad&0x30)|((pad>>8)&0xf);  // ?1CB MXYZ\r
      else\r
        value|=((pad&0xc0)>>2)|0x0f;       // ?0SA 1111\r
      return value;\r
    }\r
  }\r
\r
  if(data_reg&0x40) // TH\r
       value|=(pad&0x3f);              // ?1CB RLDU\r
  else value|=((pad&0xc0)>>2)|(pad&3); // ?0SA 00DU\r
\r
  return value; // will mirror later\r
}\r
\r
\r
#ifndef _ASM_MEMORY_C\r
static\r
#endif\r
u32 SRAMRead(u32 a)\r
{\r
  unsigned int sreg = Pico.m.sram_reg;\r
  if (!(sreg & 0x10) && (sreg & 1) && a > 0x200001) { // not yet detected SRAM\r
    elprintf(EL_SRAMIO, "normal sram detected.");\r
    Pico.m.sram_reg|=0x10; // should be normal SRAM\r
  }\r
  if (sreg & 4) // EEPROM read\r
    return SRAMReadEEPROM();\r
  else // if(sreg & 1) // (sreg&5) is one of prerequisites\r
    return *(u8 *)(SRam.data-SRam.start+a);\r
}\r
\r
#ifndef _ASM_MEMORY_C\r
static\r
#endif\r
u32 SRAMRead16(u32 a)\r
{\r
  u32 d;\r
  if (Pico.m.sram_reg & 4) {\r
    d = SRAMReadEEPROM();\r
    d |= d << 8;\r
  } else {\r
    u8 *pm=(u8 *)(SRam.data-SRam.start+a);\r
    d =*pm++ << 8;\r
    d|=*pm++;\r
  }\r
  return d;\r
}\r
\r
static void SRAMWrite(u32 a, u32 d)\r
{\r
  unsigned int sreg = Pico.m.sram_reg;\r
  if(!(sreg & 0x10)) {\r
    // not detected SRAM\r
    if((a&~1)==0x200000) {\r
      elprintf(EL_SRAMIO, "eeprom detected.");\r
      sreg|=4; // this should be a game with EEPROM (like NBA Jam)\r
      SRam.start=0x200000; SRam.end=SRam.start+1;\r
    } else\r
      elprintf(EL_SRAMIO, "normal sram detected.");\r
    sreg|=0x10;\r
    Pico.m.sram_reg=sreg;\r
  }\r
  if(sreg & 4) { // EEPROM write\r
    // this diff must be at most 16 for NBA Jam to work\r
    if(SekCyclesDoneT()-lastSSRamWrite < 16) {\r
      // just update pending state\r
      elprintf(EL_EEPROM, "eeprom: skip because cycles=%i", SekCyclesDoneT()-lastSSRamWrite);\r
      SRAMUpdPending(a, d);\r
    } else {\r
      int old=sreg;\r
      SRAMWriteEEPROM(sreg>>6); // execute pending\r
      SRAMUpdPending(a, d);\r
      if ((old^Pico.m.sram_reg)&0xc0) // update time only if SDA/SCL changed\r
        lastSSRamWrite = SekCyclesDoneT();\r
    }\r
  } else if(!(sreg & 2)) {\r
    u8 *pm=(u8 *)(SRam.data-SRam.start+a);\r
    if(*pm != (u8)d) {\r
      SRam.changed = 1;\r
      *pm=(u8)d;\r
    }\r
  }\r
}\r
\r
// for nonstandard reads\r
#ifndef _ASM_MEMORY_C\r
static\r
#endif\r
u32 OtherRead16End(u32 a, int realsize)\r
{\r
  u32 d=0;\r
\r
  // for games with simple protection devices, discovered by Haze\r
  // some dumb detection is used, but that should be enough to make things work\r
  if ((a>>22) == 1 && Pico.romsize >= 512*1024) {\r
    if      (*(int *)(Pico.rom+0x123e4) == 0x00550c39 && *(int *)(Pico.rom+0x123e8) == 0x00000040) { // Super Bubble Bobble (Unl) [!]\r
      if      (a == 0x400000) { d=0x55<<8; goto end; }\r
      else if (a == 0x400002) { d=0x0f<<8; goto end; }\r
    }\r
    else if (*(int *)(Pico.rom+0x008c4) == 0x66240055 && *(int *)(Pico.rom+0x008c8) == 0x00404df9) { // Smart Mouse (Unl)\r
      if      (a == 0x400000) { d=0x55<<8; goto end; }\r
      else if (a == 0x400002) { d=0x0f<<8; goto end; }\r
      else if (a == 0x400004) { d=0xaa<<8; goto end; }\r
      else if (a == 0x400006) { d=0xf0<<8; goto end; }\r
    }\r
    else if (*(int *)(Pico.rom+0x00404) == 0x00a90600 && *(int *)(Pico.rom+0x00408) == 0x6708b013) { // King of Fighters '98, The (Unl) [!]\r
      if      (a == 0x480000 || a == 0x4800e0 || a == 0x4824a0 || a == 0x488880) { d=0xaa<<8; goto end; }\r
      else if (a == 0x4a8820) { d=0x0a<<8; goto end; }\r
      // there is also a read @ 0x4F8820 which needs 0, but that is returned in default case\r
    }\r
    else if (*(int *)(Pico.rom+0x01b24) == 0x004013f9 && *(int *)(Pico.rom+0x01b28) == 0x00ff0000) { // Mahjong Lover (Unl) [!]\r
      if      (a == 0x400000) { d=0x90<<8; goto end; }\r
      else if (a == 0x401000) { d=0xd3<<8; goto end; } // this one doesn't seem to be needed, the code does 2 comparisons and only then\r
                                                       // checks the result, which is of the above one. Left it just in case.\r
    }\r
    else if (*(int *)(Pico.rom+0x05254) == 0x0c3962d0 && *(int *)(Pico.rom+0x05258) == 0x00400055) { // Elf Wor (Unl)\r
      if      (a == 0x400000) { d=0x55<<8; goto end; }\r
      else if (a == 0x400004) { d=0xc9<<8; goto end; } // this check is done if the above one fails\r
      else if (a == 0x400002) { d=0x0f<<8; goto end; }\r
      else if (a == 0x400006) { d=0x18<<8; goto end; } // similar to above\r
    }\r
    // our default behaviour is to return whatever was last written a 0x400000-0x7fffff range (used by Squirrel King (R) [!])\r
    // Lion King II, The (Unl) [!]  writes @ 400000 and wants to get that val @ 400002 and wites another val\r
    // @ 400004 which is expected @ 400006, so we really remember 2 values here\r
    d = Pico.m.prot_bytes[(a>>2)&1]<<8;\r
  }\r
  else if (a == 0xa13000 && Pico.romsize >= 1024*1024) {\r
    if      (*(int *)(Pico.rom+0xc8af0) == 0x30133013 && *(int *)(Pico.rom+0xc8af4) == 0x000f0240) { // Rockman X3 (Unl) [!]\r
      d=0x0c; goto end;\r
    }\r
    else if (*(int *)(Pico.rom+0x28888) == 0x07fc0000 && *(int *)(Pico.rom+0x2888c) == 0x4eb94e75) { // Bug's Life, A (Unl) [!]\r
      d=0x28; goto end; // does the check from RAM\r
    }\r
    else if (*(int *)(Pico.rom+0xc8778) == 0x30133013 && *(int *)(Pico.rom+0xc877c) == 0x000f0240) { // Super Mario Bros. (Unl) [!]\r
      d=0x0c; goto end; // seems to be the same code as in Rockman X3 (Unl) [!]\r
    }\r
    else if (*(int *)(Pico.rom+0xf20ec) == 0x30143013 && *(int *)(Pico.rom+0xf20f0) == 0x000f0200) { // Super Mario 2 1998 (Unl) [!]\r
      d=0x0a; goto end;\r
    }\r
  }\r
  else if (a == 0xa13002) { // Pocket Monsters (Unl)\r
    d=0x01; goto end;\r
  }\r
  else if (a == 0xa1303E) { // Pocket Monsters (Unl)\r
    d=0x1f; goto end;\r
  }\r
  else if (a == 0x30fe02) {\r
    // Virtua Racing - just for fun\r
    // this seems to be some flag that SVP is ready or something similar\r
    d=1; goto end;\r
  }\r
\r
end:\r
  elprintf(EL_UIO, "strange r%i: [%06x] %04x @%06x", realsize, a&0xffffff, d, SekPc);\r
  return d;\r
}\r
\r
\r
//extern UINT32 mz80GetRegisterValue(void *, UINT32);\r
\r
static void OtherWrite8End(u32 a,u32 d,int realsize)\r
{\r
  // sram\r
  if(a >= SRam.start && a <= SRam.end) {\r
    elprintf(EL_SRAMIO, "sram w8  [%06x] %02x @ %06x", a, d, SekPc);\r
    SRAMWrite(a, d);\r
    return;\r
  }\r
\r
#ifdef _ASM_MEMORY_C\r
  // special ROM hardware (currently only banking and sram reg supported)\r
  if((a&0xfffff1) == 0xA130F1) {\r
    PicoWriteRomHW_SSF2(a, d); // SSF2 or SRAM\r
    return;\r
  }\r
#else\r
  // sram access register\r
  if(a == 0xA130F1) {\r
    elprintf(EL_SRAMIO, "sram reg=%02x", d);\r
    Pico.m.sram_reg &= ~3;\r
    Pico.m.sram_reg |= (u8)(d&3);\r
    return;\r
  }\r
#endif\r
  elprintf(EL_UIO, "strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);\r
\r
  if(a >= 0xA13004 && a < 0xA13040) {\r
    // dumb 12-in-1 or 4-in-1 banking support\r
    int len;\r
    a &= 0x3f; a <<= 16;\r
    len = Pico.romsize - a;\r
    if (len <= 0) return; // invalid/missing bank\r
    if (len > 0x200000) len = 0x200000; // 2 megs\r
    memcpy(Pico.rom, Pico.rom+a, len); // code which does this is in RAM so this is safe.\r
    return;\r
  }\r
\r
  // for games with simple protection devices, discovered by Haze\r
  else if ((a>>22) == 1)\r
    Pico.m.prot_bytes[(a>>2)&1] = (u8)d;\r
}\r
\r
\r
#include "MemoryCmn.c"\r
\r
\r
// -----------------------------------------------------------------\r
//                     Read Rom and read Ram\r
\r
#ifndef _ASM_MEMORY_C\r
PICO_INTERNAL_ASM u32 PicoRead8(u32 a)\r
{\r
  u32 d=0;\r
\r
  if ((a&0xe00000)==0xe00000) { d = *(u8 *)(Pico.ram+((a^1)&0xffff)); goto end; } // Ram\r
\r
  a&=0xffffff;\r
\r
#ifndef EMU_CORE_DEBUG\r
  // sram\r
  if (a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) {\r
    d = SRAMRead(a);\r
    elprintf(EL_SRAMIO, "sram r8 [%06x] %02x @ %06x", a, d, SekPc);\r
    goto end;\r
  }\r
#endif\r
\r
  if (a<Pico.romsize) { d = *(u8 *)(Pico.rom+(a^1)); goto end; } // Rom\r
  log_io(a, 8, 0);\r
  if ((a&0xff4000)==0xa00000) { d=z80Read8(a); goto end; } // Z80 Ram\r
\r
  if ((a&0xe700e0)==0xc00000) // VDP\r
       d=PicoVideoRead(a);\r
  else d=OtherRead16(a&~1, 8);\r
  if ((a&1)==0) d>>=8;\r
\r
end:\r
  elprintf(EL_IO, "r8 : %06x,   %02x @%06x", a&0xffffff, (u8)d, SekPc);\r
#ifdef EMU_CORE_DEBUG\r
  if (a>=Pico.romsize) {\r
    lastread_a = a;\r
    lastread_d[lrp_cyc++&15] = (u8)d;\r
  }\r
#endif\r
  return d;\r
}\r
\r
PICO_INTERNAL_ASM u32 PicoRead16(u32 a)\r
{\r
  u32 d=0;\r
\r
  if ((a&0xe00000)==0xe00000) { d=*(u16 *)(Pico.ram+(a&0xfffe)); goto end; } // Ram\r
\r
  a&=0xfffffe;\r
\r
#ifndef EMU_CORE_DEBUG\r
  // sram\r
  if (a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) {\r
    d = SRAMRead16(a);\r
    elprintf(EL_SRAMIO, "sram r16 [%06x] %04x @ %06x", a, d, SekPc);\r
    goto end;\r
  }\r
#endif\r
\r
  if (a<Pico.romsize) { d = *(u16 *)(Pico.rom+a); goto end; } // Rom\r
  log_io(a, 16, 0);\r
\r
  if ((a&0xe700e0)==0xc00000)\r
       d = PicoVideoRead(a);\r
  else d = OtherRead16(a, 16);\r
\r
end:\r
  elprintf(EL_IO, "r16: %06x, %04x  @%06x", a&0xffffff, d, SekPc);\r
#ifdef EMU_CORE_DEBUG\r
  if (a>=Pico.romsize) {\r
    lastread_a = a;\r
    lastread_d[lrp_cyc++&15] = d;\r
  }\r
#endif\r
  return d;\r
}\r
\r
PICO_INTERNAL_ASM u32 PicoRead32(u32 a)\r
{\r
  u32 d=0;\r
\r
  if ((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); d = (pm[0]<<16)|pm[1]; goto end; } // Ram\r
\r
  a&=0xfffffe;\r
\r
  // sram\r
  if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) {\r
    d = (SRAMRead16(a)<<16)|SRAMRead16(a+2);\r
    elprintf(EL_SRAMIO, "sram r32 [%06x] %08x @ %06x", a, d, SekPc);\r
    goto end;\r
  }\r
\r
  if (a<Pico.romsize) { u16 *pm=(u16 *)(Pico.rom+a); d = (pm[0]<<16)|pm[1]; goto end; } // Rom\r
  log_io(a, 32, 0);\r
\r
  if ((a&0xe700e0)==0xc00000)\r
       d = (PicoVideoRead(a)<<16)|PicoVideoRead(a+2);\r
  else d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);\r
\r
end:\r
  elprintf(EL_IO, "r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r
#ifdef EMU_CORE_DEBUG\r
  if (a>=Pico.romsize) {\r
    lastread_a = a;\r
    lastread_d[lrp_cyc++&15] = d;\r
  }\r
#endif\r
  return d;\r
}\r
#endif\r
\r
// -----------------------------------------------------------------\r
//                            Write Ram\r
\r
#if !defined(_ASM_MEMORY_C) || defined(_ASM_MEMORY_C_AMIPS)\r
PICO_INTERNAL_ASM void PicoWrite8(u32 a,u8 d)\r
{\r
  elprintf(EL_IO, "w8 : %06x,   %02x @%06x", a&0xffffff, d, SekPc);\r
#ifdef EMU_CORE_DEBUG\r
  lastwrite_cyc_d[lwp_cyc++&15] = d;\r
#endif\r
\r
  if ((a&0xe00000)==0xe00000) { *(u8 *)(Pico.ram+((a^1)&0xffff))=d; return; } // Ram\r
  log_io(a, 8, 1);\r
\r
  a&=0xffffff;\r
  OtherWrite8(a,d);\r
}\r
#endif\r
\r
void PicoWrite16(u32 a,u16 d)\r
{\r
  elprintf(EL_IO, "w16: %06x, %04x", a&0xffffff, d);\r
#ifdef EMU_CORE_DEBUG\r
  lastwrite_cyc_d[lwp_cyc++&15] = d;\r
#endif\r
\r
  if ((a&0xe00000)==0xe00000) { *(u16 *)(Pico.ram+(a&0xfffe))=d; return; } // Ram\r
  log_io(a, 16, 1);\r
\r
  a&=0xfffffe;\r
  if ((a&0xe700e0)==0xc00000) { PicoVideoWrite(a,(u16)d); return; } // VDP\r
  OtherWrite16(a,d);\r
}\r
\r
static void PicoWrite32(u32 a,u32 d)\r
{\r
  elprintf(EL_IO, "w32: %06x, %08x", a&0xffffff, d);\r
#ifdef EMU_CORE_DEBUG\r
  lastwrite_cyc_d[lwp_cyc++&15] = d;\r
#endif\r
\r
  if ((a&0xe00000)==0xe00000)\r
  {\r
    // Ram:\r
    u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));\r
    pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
    return;\r
  }\r
  log_io(a, 32, 1);\r
\r
  a&=0xfffffe;\r
  if ((a&0xe700e0)==0xc00000)\r
  {\r
    // VDP:\r
    PicoVideoWrite(a,  (u16)(d>>16));\r
    PicoVideoWrite(a+2,(u16)d);\r
    return;\r
  }\r
\r
  OtherWrite16(a,  (u16)(d>>16));\r
  OtherWrite16(a+2,(u16)d);\r
}\r
\r
\r
// -----------------------------------------------------------------\r
PICO_INTERNAL void PicoMemSetup(void)\r
{\r
  // Setup memory callbacks:\r
#ifdef EMU_C68K\r
  PicoCpuCM68k.checkpc=PicoCheckPc;\r
  PicoCpuCM68k.fetch8 =PicoCpuCM68k.read8 =PicoRead8;\r
  PicoCpuCM68k.fetch16=PicoCpuCM68k.read16=PicoRead16;\r
  PicoCpuCM68k.fetch32=PicoCpuCM68k.read32=PicoRead32;\r
  PicoCpuCM68k.write8 =PicoWrite8;\r
  PicoCpuCM68k.write16=PicoWrite16;\r
  PicoCpuCM68k.write32=PicoWrite32;\r
#endif\r
#ifdef EMU_F68K\r
  PicoCpuFM68k.read_byte =PicoRead8;\r
  PicoCpuFM68k.read_word =PicoRead16;\r
  PicoCpuFM68k.read_long =PicoRead32;\r
  PicoCpuFM68k.write_byte=PicoWrite8;\r
  PicoCpuFM68k.write_word=PicoWrite16;\r
  PicoCpuFM68k.write_long=PicoWrite32;\r
\r
  // setup FAME fetchmap\r
  {\r
    int i;\r
    // by default, point everything to fitst 64k of ROM\r
    for (i = 0; i < M68K_FETCHBANK1; i++)\r
      PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r
    // now real ROM\r
    for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)\r
      PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom;\r
    // .. and RAM\r
    for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)\r
      PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.ram - (i<<(24-FAMEC_FETCHBITS));\r
  }\r
#endif\r
}\r
\r
\r
#ifdef EMU_M68K\r
unsigned int  m68k_read_pcrelative_CD8 (unsigned int a);\r
unsigned int  m68k_read_pcrelative_CD16(unsigned int a);\r
unsigned int  m68k_read_pcrelative_CD32(unsigned int a);\r
\r
// these are allowed to access RAM\r
static unsigned int  m68k_read_8 (unsigned int a, int do_fake)\r
{\r
  a&=0xffffff;\r
  if(a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k)    return *(u8 *)(Pico.rom+(a^1)); // Rom\r
#ifdef EMU_CORE_DEBUG\r
  if(do_fake&&((ppop&0x3f)==0x3a||(ppop&0x3f)==0x3b)) return lastread_d[lrp_mus++&15];\r
#endif\r
  if(PicoMCD&1) return m68k_read_pcrelative_CD8(a);\r
  if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram\r
  return 0;\r
}\r
static unsigned int  m68k_read_16(unsigned int a, int do_fake)\r
{\r
  a&=0xffffff;\r
  if(a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k)    return *(u16 *)(Pico.rom+(a&~1)); // Rom\r
#ifdef EMU_CORE_DEBUG\r
  if(do_fake&&((ppop&0x3f)==0x3a||(ppop&0x3f)==0x3b)) return lastread_d[lrp_mus++&15];\r
#endif\r
  if(PicoMCD&1) return m68k_read_pcrelative_CD16(a);\r
  if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram\r
  return 0;\r
}\r
static unsigned int  m68k_read_32(unsigned int a, int do_fake)\r
{\r
  a&=0xffffff;\r
  if(a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }\r
#ifdef EMU_CORE_DEBUG\r
  if(do_fake&&((ppop&0x3f)==0x3a||(ppop&0x3f)==0x3b)) return lastread_d[lrp_mus++&15];\r
#endif\r
  if(PicoMCD&1) return m68k_read_pcrelative_CD32(a);\r
  if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram\r
  return 0;\r
}\r
\r
unsigned int m68k_read_pcrelative_8 (unsigned int a)   { return m68k_read_8 (a, 1); }\r
unsigned int m68k_read_pcrelative_16(unsigned int a)   { return m68k_read_16(a, 1); }\r
unsigned int m68k_read_pcrelative_32(unsigned int a)   { return m68k_read_32(a, 1); }\r
unsigned int m68k_read_immediate_16(unsigned int a)    { return m68k_read_16(a, 0); }\r
unsigned int m68k_read_immediate_32(unsigned int a)    { return m68k_read_32(a, 0); }\r
unsigned int m68k_read_disassembler_8 (unsigned int a) { return m68k_read_8 (a, 0); }\r
unsigned int m68k_read_disassembler_16(unsigned int a) { return m68k_read_16(a, 0); }\r
unsigned int m68k_read_disassembler_32(unsigned int a) { return m68k_read_32(a, 0); }\r
\r
#ifdef EMU_CORE_DEBUG\r
// ROM only\r
unsigned int m68k_read_memory_8(unsigned int a)\r
{\r
  u8 d;\r
  if (a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k)\r
       d = *(u8 *) (Pico.rom+(a^1));\r
  else d = (u8) lastread_d[lrp_mus++&15];\r
  elprintf(EL_IO, "r8_mu : %06x,   %02x @%06x", a&0xffffff, d, SekPc);\r
  return d;\r
}\r
unsigned int m68k_read_memory_16(unsigned int a)\r
{\r
  u16 d;\r
  if (a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k)\r
       d = *(u16 *)(Pico.rom+(a&~1));\r
  else d = (u16) lastread_d[lrp_mus++&15];\r
  elprintf(EL_IO, "r16_mu: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
  return d;\r
}\r
unsigned int m68k_read_memory_32(unsigned int a)\r
{\r
  u32 d;\r
  if (a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k)\r
       { u16 *pm=(u16 *)(Pico.rom+(a&~1));d=(pm[0]<<16)|pm[1]; }\r
  else if (a <= 0x78) d = m68k_read_32(a, 0);\r
  else d = lastread_d[lrp_mus++&15];\r
  elprintf(EL_IO, "r32_mu: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r
  return d;\r
}\r
\r
// ignore writes, Cyclone already done that\r
void m68k_write_memory_8(unsigned int address, unsigned int value)  { lastwrite_mus_d[lwp_mus++&15] = value; }\r
void m68k_write_memory_16(unsigned int address, unsigned int value) { lastwrite_mus_d[lwp_mus++&15] = value; }\r
void m68k_write_memory_32(unsigned int address, unsigned int value) { lastwrite_mus_d[lwp_mus++&15] = value; }\r
#else\r
unsigned char  PicoReadCD8w (unsigned int a);\r
unsigned short PicoReadCD16w(unsigned int a);\r
unsigned int   PicoReadCD32w(unsigned int a);\r
void PicoWriteCD8w (unsigned int a, unsigned char d);\r
void PicoWriteCD16w(unsigned int a, unsigned short d);\r
void PicoWriteCD32w(unsigned int a, unsigned int d);\r
\r
/* it appears that Musashi doesn't always mask the unused bits */\r
unsigned int  m68k_read_memory_8(unsigned int address)\r
{\r
    unsigned int d = (PicoMCD&1) ? PicoReadCD8w(address) : PicoRead8(address);\r
    return d&0xff;\r
}\r
\r
unsigned int  m68k_read_memory_16(unsigned int address)\r
{\r
    unsigned int d = (PicoMCD&1) ? PicoReadCD16w(address) : PicoRead16(address);\r
    return d&0xffff;\r
}\r
\r
unsigned int  m68k_read_memory_32(unsigned int address)\r
{\r
    return (PicoMCD&1) ? PicoReadCD32w(address) : PicoRead32(address);\r
}\r
\r
void m68k_write_memory_8(unsigned int address, unsigned int value)\r
{\r
    if (PicoMCD&1) PicoWriteCD8w(address, (u8)value); else PicoWrite8(address, (u8)value);\r
}\r
\r
void m68k_write_memory_16(unsigned int address, unsigned int value)\r
{\r
    if (PicoMCD&1) PicoWriteCD16w(address,(u16)value); else PicoWrite16(address,(u16)value);\r
}\r
\r
void m68k_write_memory_32(unsigned int address, unsigned int value)\r
{\r
    if (PicoMCD&1) PicoWriteCD32w(address, value); else PicoWrite32(address, value);\r
}\r
#endif\r
#endif // EMU_M68K\r
\r
\r
// -----------------------------------------------------------------\r
//                        z80 memhandlers\r
\r
PICO_INTERNAL unsigned char z80_read(unsigned short a)\r
{\r
  u8 ret = 0;\r
\r
  if ((a>>13)==2) // 0x4000-0x5fff (Charles MacDonald)\r
  {\r
    if (PicoOpt&1) ret = (u8) YM2612Read();\r
    return ret;\r
  }\r
\r
  if (a>=0x8000)\r
  {\r
    extern u32 PicoReadM68k8(u32 a);\r
    u32 addr68k;\r
    addr68k=Pico.m.z80_bank68k<<15;\r
    addr68k+=a&0x7fff;\r
\r
    if (PicoMCD & 1)\r
         ret = PicoReadM68k8(addr68k);\r
    else ret = PicoRead8(addr68k);\r
    elprintf(EL_Z80BNK, "z80->68k r8 [%06x] %02x", addr68k, ret);\r
    return ret;\r
  }\r
\r
  // should not be needed, cores should be able to access RAM themselves\r
  if (a<0x4000) return Pico.zram[a&0x1fff];\r
\r
  elprintf(EL_ANOMALY, "z80 invalid r8 [%06x] %02x", a, ret);\r
  return ret;\r
}\r
\r
#ifndef _USE_CZ80\r
PICO_INTERNAL_ASM void z80_write(unsigned char data, unsigned short a)\r
#else\r
PICO_INTERNAL_ASM void z80_write(unsigned int a, unsigned char data)\r
#endif\r
{\r
  if ((a>>13)==2) // 0x4000-0x5fff (Charles MacDonald)\r
  {\r
    if(PicoOpt&1) emustatus|=YM2612Write(a, data) & 1;\r
    return;\r
  }\r
\r
  if ((a&0xfff9)==0x7f11) // 7f11 7f13 7f15 7f17\r
  {\r
    if(PicoOpt&2) SN76496Write(data);\r
    return;\r
  }\r
\r
  if ((a>>8)==0x60)\r
  {\r
    Pico.m.z80_bank68k>>=1;\r
    Pico.m.z80_bank68k|=(data&1)<<8;\r
    Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one\r
    return;\r
  }\r
\r
  if (a>=0x8000)\r
  {\r
    extern void PicoWriteM68k8(u32 a,u8 d);\r
    u32 addr68k;\r
    addr68k=Pico.m.z80_bank68k<<15;\r
    addr68k+=a&0x7fff;\r
    elprintf(EL_Z80BNK, "z80->68k w8 [%06x] %02x", addr68k, data);\r
    if (PicoMCD & 1)\r
         PicoWriteM68k8(addr68k, data);\r
    else PicoWrite8(addr68k, data);\r
    return;\r
  }\r
\r
  // should not be needed\r
  if (a<0x4000) { Pico.zram[a&0x1fff]=data; return; }\r
\r
  elprintf(EL_ANOMALY, "z80 invalid w8 [%06x] %02x", a, data);\r
}\r
\r
#ifndef _USE_CZ80\r
PICO_INTERNAL unsigned short z80_read16(unsigned short a)\r
{\r
  return (u16) ( (u16)z80_read(a) | ((u16)z80_read((u16)(a+1))<<8) );\r
}\r
\r
PICO_INTERNAL void z80_write16(unsigned short data, unsigned short a)\r
{\r
  z80_write((unsigned char) data,a);\r
  z80_write((unsigned char)(data>>8),(u16)(a+1));\r
}\r
#endif\r
\r