step-frame added to debug
[picodrive.git] / Pico / Pico.c
CommitLineData
d9fc2fe1 1// PicoDrive\r
cc68a136 2\r
3// (c) Copyright 2004 Dave, All rights reserved.\r
d9fc2fe1 4// (c) Copyright 2006-2008 notaz, All rights reserved.\r
cc68a136 5// Free for non-commercial use.\r
6\r
7// For commercial use, separate licencing terms must be obtained.\r
8\r
9\r
10#include "PicoInt.h"\r
cc68a136 11#include "sound/ym2612.h"\r
12\r
69996cb7 13int PicoVer=0x0133;\r
cc68a136 14struct Pico Pico;\r
602133e1 15int PicoOpt = 0;\r
16int PicoSkipFrame = 0; // skip rendering frame?\r
17int emustatus = 0; // rapid_ym2612, multi_ym_updates\r
18int PicoPad[2]; // Joypads, format is SACB RLDU\r
5f9a0d16 19int PicoPadInt[2]; // internal copy\r
9037e45d 20int PicoAHW = 0; // active addon hardware: scd_active, 32x_active, svp_active, pico_active\r
cc68a136 21int PicoRegionOverride = 0; // override the region detection 0: Auto, 1: Japan NTSC, 2: Japan PAL, 4: US, 8: Europe\r
51a902ae 22int PicoAutoRgnOrder = 0;\r
602133e1 23struct PicoSRAM SRam = {0,};\r
24\r
f8ef8ff7 25void (*PicoWriteSound)(int len) = NULL; // called at the best time to send sound buffer (PsndOut) to hardware\r
26void (*PicoResetHook)(void) = NULL;\r
b0677887 27void (*PicoLineHook)(void) = NULL;\r
cc68a136 28\r
cc68a136 29// to be called once on emu init\r
2aa27095 30void PicoInit(void)\r
cc68a136 31{\r
32 // Blank space for state:\r
33 memset(&Pico,0,sizeof(Pico));\r
34 memset(&PicoPad,0,sizeof(PicoPad));\r
5f9a0d16 35 memset(&PicoPadInt,0,sizeof(PicoPadInt));\r
cc68a136 36\r
37 // Init CPUs:\r
38 SekInit();\r
39 z80_init(); // init even if we aren't going to use it\r
40\r
cc68a136 41 PicoInitMCD();\r
e807ac75 42 PicoSVPInit();\r
cc68a136 43\r
cc68a136 44 SRam.data=0;\r
cc68a136 45}\r
46\r
47// to be called once on emu exit\r
48void PicoExit(void)\r
49{\r
602133e1 50 if (PicoAHW & PAHW_MCD)\r
4f265db7 51 PicoExitMCD();\r
cc68a136 52 z80_exit();\r
53\r
1cb1584b 54 if (SRam.data) free(SRam.data); SRam.data=0;\r
cc68a136 55}\r
56\r
1cb1584b 57void PicoPower(void)\r
58{\r
583ab72c 59 unsigned char sram_reg=Pico.m.sram_reg; // must be preserved\r
60\r
053fd9b4 61 Pico.m.frame_count = 0;\r
62\r
1cb1584b 63 // clear all memory of the emulated machine\r
64 memset(&Pico.ram,0,(unsigned int)&Pico.rom-(unsigned int)&Pico.ram);\r
65\r
66 memset(&Pico.video,0,sizeof(Pico.video));\r
67 memset(&Pico.m,0,sizeof(Pico.m));\r
68\r
69 Pico.video.pending_ints=0;\r
70 z80_reset();\r
71\r
72 // default VDP register values (based on Fusion)\r
73 Pico.video.reg[0] = Pico.video.reg[1] = 0x04;\r
74 Pico.video.reg[0xc] = 0x81;\r
75 Pico.video.reg[0xf] = 0x02;\r
76\r
602133e1 77 if (PicoAHW & PAHW_MCD)\r
1cb1584b 78 PicoPowerMCD();\r
79\r
583ab72c 80 Pico.m.sram_reg=sram_reg;\r
1cb1584b 81 PicoReset();\r
82}\r
83\r
1e6b5e39 84PICO_INTERNAL void PicoDetectRegion(void)\r
cc68a136 85{\r
1e6b5e39 86 int support=0, hw=0, i;\r
cc68a136 87 unsigned char pal=0;\r
cc68a136 88\r
1e6b5e39 89 if (PicoRegionOverride)\r
cc68a136 90 {\r
91 support = PicoRegionOverride;\r
92 }\r
93 else\r
94 {\r
95 // Read cartridge region data:\r
1e6b5e39 96 int region=PicoRead32(0x1f0);\r
cc68a136 97\r
98 for (i=0;i<4;i++)\r
99 {\r
100 int c=0;\r
101\r
102 c=region>>(i<<3); c&=0xff;\r
103 if (c<=' ') continue;\r
104\r
51a902ae 105 if (c=='J') support|=1;\r
106 else if (c=='U') support|=4;\r
107 else if (c=='E') support|=8;\r
108 else if (c=='j') {support|=1; break; }\r
109 else if (c=='u') {support|=4; break; }\r
110 else if (c=='e') {support|=8; break; }\r
cc68a136 111 else\r
112 {\r
113 // New style code:\r
114 char s[2]={0,0};\r
115 s[0]=(char)c;\r
116 support|=strtol(s,NULL,16);\r
117 }\r
118 }\r
119 }\r
120\r
51a902ae 121 // auto detection order override\r
122 if (PicoAutoRgnOrder) {\r
123 if (((PicoAutoRgnOrder>>0)&0xf) & support) support = (PicoAutoRgnOrder>>0)&0xf;\r
124 else if (((PicoAutoRgnOrder>>4)&0xf) & support) support = (PicoAutoRgnOrder>>4)&0xf;\r
125 else if (((PicoAutoRgnOrder>>8)&0xf) & support) support = (PicoAutoRgnOrder>>8)&0xf;\r
126 }\r
127\r
cc68a136 128 // Try to pick the best hardware value for English/50hz:\r
129 if (support&8) { hw=0xc0; pal=1; } // Europe\r
130 else if (support&4) hw=0x80; // USA\r
131 else if (support&2) { hw=0x40; pal=1; } // Japan PAL\r
132 else if (support&1) hw=0x00; // Japan NTSC\r
133 else hw=0x80; // USA\r
134\r
135 Pico.m.hardware=(unsigned char)(hw|0x20); // No disk attached\r
136 Pico.m.pal=pal;\r
1e6b5e39 137}\r
138\r
139int PicoReset(void)\r
140{\r
141 unsigned char sram_reg=Pico.m.sram_reg; // must be preserved\r
142\r
143 if (Pico.romsize<=0) return 1;\r
144\r
145 /* must call now, so that banking is reset, and correct vectors get fetched */\r
146 if (PicoResetHook) PicoResetHook();\r
147\r
148 PicoMemReset();\r
149 SekReset();\r
5f9a0d16 150 memset(&PicoPadInt,0,sizeof(PicoPadInt));\r
1e6b5e39 151 // s68k doesn't have the TAS quirk, so we just globally set normal TAS handler in MCD mode (used by Batman games).\r
152 SekSetRealTAS(PicoAHW & PAHW_MCD);\r
153 SekCycleCntT=0;\r
154\r
155 if (PicoAHW & PAHW_MCD)\r
156 // needed for MCD to reset properly, probably some bug hides behind this..\r
157 memset(Pico.ioports,0,sizeof(Pico.ioports));\r
158 emustatus = 0;\r
159\r
160 Pico.m.dirtyPal = 1;\r
161\r
1832075e 162 Pico.m.z80_bank68k = 0;\r
163 memset(Pico.zram, 0, sizeof(Pico.zram)); // ??\r
164\r
1e6b5e39 165 PicoDetectRegion();\r
e5fa9817 166 Pico.video.status = 0x3428 | Pico.m.pal; // 'always set' bits | vblank | collision | pal\r
cc68a136 167\r
9d917eea 168 PsndReset(); // pal must be known here\r
cc68a136 169\r
1cb1584b 170 // create an empty "dma" to cause 68k exec start at random frame location\r
602133e1 171 if (Pico.m.dma_xfers == 0 && !(PicoOpt&POPT_DIS_VDP_FIFO))\r
1cb1584b 172 Pico.m.dma_xfers = rand() & 0x1fff;\r
173\r
602133e1 174 if (PicoAHW & PAHW_MCD) {\r
1cb1584b 175 PicoResetMCD();\r
cc68a136 176 return 0;\r
177 }\r
053fd9b4 178 else {\r
179 // reinit, so that checksum checks pass\r
180 SekFinishIdleDet();\r
181 if (!(PicoOpt & POPT_DIS_IDLE_DET))\r
182 SekInitIdleDet();\r
183 }\r
cc68a136 184\r
1dceadae 185 // reset sram state; enable sram access by default if it doesn't overlap with ROM\r
186 Pico.m.sram_reg=sram_reg&0x14;\r
187 if (!(Pico.m.sram_reg&4) && Pico.romsize <= SRam.start) Pico.m.sram_reg |= 1;\r
cc68a136 188\r
1dceadae 189 elprintf(EL_STATUS, "sram: det: %i; eeprom: %i; start: %06x; end: %06x",\r
190 (Pico.m.sram_reg>>4)&1, (Pico.m.sram_reg>>2)&1, SRam.start, SRam.end);\r
cc68a136 191\r
192 return 0;\r
193}\r
194\r
1dceadae 195\r
69996cb7 196// dma2vram settings are just hacks to unglitch Legend of Galahad (needs <= 104 to work)\r
197// same for Outrunners (92-121, when active is set to 24)\r
48df6e9e 198// 96 is VR hack\r
69996cb7 199static const int dma_timings[] = {\r
053fd9b4 200 96, 167, 166, 83, // vblank: 32cell: dma2vram dma2[vs|c]ram vram_fill vram_copy\r
201 102, 205, 204, 102, // vblank: 40cell:\r
202 16, 16, 15, 8, // active: 32cell:\r
203 24, 18, 17, 9 // ...\r
4f672280 204};\r
205\r
69996cb7 206static const int dma_bsycles[] = {\r
053fd9b4 207 (488<<8)/96, (488<<8)/167, (488<<8)/166, (488<<8)/83,\r
208 (488<<8)/102, (488<<8)/205, (488<<8)/204, (488<<8)/102,\r
209 (488<<8)/16, (488<<8)/16, (488<<8)/15, (488<<8)/8,\r
210 (488<<8)/24, (488<<8)/18, (488<<8)/17, (488<<8)/9\r
312e9ce1 211};\r
212\r
eff55556 213PICO_INTERNAL int CheckDMA(void)\r
4f672280 214{\r
69996cb7 215 int burn = 0, xfers_can, dma_op = Pico.video.reg[0x17]>>6; // see gens for 00 and 01 modes\r
216 int xfers = Pico.m.dma_xfers;\r
312e9ce1 217 int dma_op1;\r
4f672280 218\r
312e9ce1 219 if(!(dma_op&2)) dma_op = (Pico.video.type==1) ? 0 : 1; // setting dma_timings offset here according to Gens\r
220 dma_op1 = dma_op;\r
221 if(Pico.video.reg[12] & 1) dma_op |= 4; // 40 cell mode?\r
222 if(!(Pico.video.status&8)&&(Pico.video.reg[1]&0x40)) dma_op|=8; // active display?\r
69996cb7 223 xfers_can = dma_timings[dma_op];\r
9761a7d0 224 if(xfers <= xfers_can)\r
225 {\r
4f672280 226 if(dma_op&2) Pico.video.status&=~2; // dma no longer busy\r
227 else {\r
69996cb7 228 burn = xfers * dma_bsycles[dma_op] >> 8; // have to be approximate because can't afford division..\r
4f672280 229 }\r
69996cb7 230 Pico.m.dma_xfers = 0;\r
4f672280 231 } else {\r
232 if(!(dma_op&2)) burn = 488;\r
69996cb7 233 Pico.m.dma_xfers -= xfers_can;\r
4f672280 234 }\r
235\r
69996cb7 236 elprintf(EL_VDPDMA, "~Dma %i op=%i can=%i burn=%i [%i]", Pico.m.dma_xfers, dma_op1, xfers_can, burn, SekCyclesDone());\r
312e9ce1 237 //dprintf("~aim: %i, cnt: %i", SekCycleAim, SekCycleCnt);\r
238 return burn;\r
4f672280 239}\r
240\r
bf5fbbb4 241static __inline void SekRunM68k(int cyc)\r
cc68a136 242{\r
243 int cyc_do;\r
244 SekCycleAim+=cyc;\r
053fd9b4 245 if ((cyc_do=SekCycleAim-SekCycleCnt) <= 0) return;\r
03e4f2a3 246#if defined(EMU_CORE_DEBUG)\r
247 // this means we do run-compare\r
b5e5172d 248 SekCycleCnt+=CM_compareRun(cyc_do, 0);\r
cc68a136 249#elif defined(EMU_C68K)\r
3aa1e148 250 PicoCpuCM68k.cycles=cyc_do;\r
251 CycloneRun(&PicoCpuCM68k);\r
252 SekCycleCnt+=cyc_do-PicoCpuCM68k.cycles;\r
cc68a136 253#elif defined(EMU_M68K)\r
254 SekCycleCnt+=m68k_execute(cyc_do);\r
70357ce5 255#elif defined(EMU_F68K)\r
c060a9ab 256 SekCycleCnt+=fm68k_emulate(cyc_do+1, 0, 0);\r
cc68a136 257#endif\r
258}\r
259\r
fa283c9a 260\r
cc68a136 261// to be called on 224 or line_sample scanlines only\r
262static __inline void getSamples(int y)\r
263{\r
03a265e5 264#if SIMPLE_WRITE_SOUND\r
e0978fa8 265 if (y != 224) return;\r
03a265e5 266 PsndRender(0, PsndLen);\r
267 if (PicoWriteSound) PicoWriteSound(PsndLen);\r
268 PsndClear();\r
269#else\r
7a93adeb 270 static int curr_pos = 0;\r
271\r
cc68a136 272 if(y == 224) {\r
cc68a136 273 if(emustatus & 2)\r
9d917eea 274 curr_pos += PsndRender(curr_pos, PsndLen-PsndLen/2);\r
275 else curr_pos = PsndRender(0, PsndLen);\r
cc68a136 276 if (emustatus&1) emustatus|=2; else emustatus&=~2;\r
7a93adeb 277 if (PicoWriteSound) PicoWriteSound(curr_pos);\r
cc68a136 278 // clear sound buffer\r
9d917eea 279 PsndClear();\r
cc68a136 280 }\r
281 else if(emustatus & 3) {\r
282 emustatus|= 2;\r
283 emustatus&=~1;\r
9d917eea 284 curr_pos = PsndRender(0, PsndLen/2);\r
cc68a136 285 }\r
03a265e5 286#endif\r
cc68a136 287}\r
288\r
69996cb7 289\r
69996cb7 290#include "PicoFrameHints.c"\r
cc68a136 291\r
4b9c5888 292\r
293int z80stopCycle;\r
294int z80_cycle_cnt; /* 'done' z80 cycles before z80_run() */\r
295int z80_cycle_aim;\r
296int z80_scanline;\r
297int z80_scanline_cycles; /* cycles done until z80_scanline */\r
298\r
299/* sync z80 to 68k */\r
300PICO_INTERNAL void PicoSyncZ80(int m68k_cycles_done)\r
cc68a136 301{\r
4b9c5888 302 int cnt;\r
303 z80_cycle_aim = cycles_68k_to_z80(m68k_cycles_done);\r
304 cnt = z80_cycle_aim - z80_cycle_cnt;\r
cc68a136 305\r
e5fa9817 306 elprintf(EL_BUSREQ, "z80 sync %i (%i|%i -> %i|%i)", cnt, z80_cycle_cnt, z80_cycle_cnt / 228,\r
4b9c5888 307 z80_cycle_aim, z80_cycle_aim / 228);\r
308\r
309 if (cnt > 0)\r
310 z80_cycle_cnt += z80_run(cnt);\r
cc68a136 311}\r
312\r
4b9c5888 313\r
2aa27095 314void PicoFrame(void)\r
cc68a136 315{\r
8c1952f0 316 Pico.m.frame_count++;\r
317\r
602133e1 318 if (PicoAHW & PAHW_MCD) {\r
cc68a136 319 PicoFrameMCD();\r
2aa27095 320 return;\r
cc68a136 321 }\r
322\r
cc68a136 323 //if(Pico.video.reg[12]&0x2) Pico.video.status ^= 0x10; // change odd bit in interlace mode\r
324\r
602133e1 325 if (!(PicoOpt&POPT_ALT_RENDERER))\r
cc68a136 326 PicoFrameStart();\r
327\r
2aa27095 328 PicoFrameHints();\r
cc68a136 329}\r
330\r
a12e0116 331void PicoFrameDrawOnly(void)\r
332{\r
a12e0116 333 PicoFrameStart();\r
2aa27095 334 PicoDrawSync(223, 0);\r
a12e0116 335}\r
336\r
4609d0cd 337void PicoGetInternal(pint_t which, pint_ret_t *r)\r
8e5427a0 338{\r
339 switch (which)\r
340 {\r
4609d0cd 341 case PI_ROM: r->vptr = Pico.rom; break;\r
342 case PI_ISPAL: r->vint = Pico.m.pal; break;\r
343 case PI_IS40_CELL: r->vint = Pico.video.reg[12]&1; break;\r
344 case PI_IS240_LINES: r->vint = Pico.m.pal && (Pico.video.reg[1]&8); break;\r
8e5427a0 345 }\r
8e5427a0 346}\r
347\r
66fdc0f0 348// callback to output message from emu\r
349void (*PicoMessage)(const char *msg)=NULL;\r
cc68a136 350\r