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1.14 release
[picodrive.git] / Pico / PicoInt.h
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cc68a136 1// Pico Library - Header File\r
2\r
3// (c) Copyright 2004 Dave, All rights reserved.\r
4// (c) Copyright 2006 notaz, All rights reserved.\r
5// Free for non-commercial use.\r
6\r
7// For commercial use, separate licencing terms must be obtained.\r
8\r
9\r
10#include <stdio.h>\r
11#include <stdlib.h>\r
12#include <string.h>\r
13#include "Pico.h"\r
14\r
15\r
ab0607f7 16// to select core, define EMU_C68K, EMU_M68K or EMU_A68K in your makefile or project\r
cc68a136 17\r
18#ifdef __cplusplus\r
19extern "C" {\r
20#endif\r
21\r
22\r
23// ----------------------- 68000 CPU -----------------------\r
24#ifdef EMU_C68K\r
25#include "../cpu/Cyclone/Cyclone.h"\r
b837b69b 26extern struct Cyclone PicoCpu, PicoCpuS68k;\r
cc68a136 27#define SekCyclesLeft PicoCpu.cycles // cycles left for this run\r
28#define SekSetCyclesLeft(c) PicoCpu.cycles=c\r
29#define SekPc (PicoCpu.pc-PicoCpu.membase)\r
b837b69b 30#define SekPcS68k (PicoCpuS68k.pc-PicoCpuS68k.membase)\r
cc68a136 31#endif\r
32\r
33#ifdef EMU_A68K\r
34void __cdecl M68000_RUN();\r
35// The format of the data in a68k.asm (at the _M68000_regs location)\r
36struct A68KContext\r
37{\r
38 unsigned int d[8],a[8];\r
39 unsigned int isp,srh,ccr,xc,pc,irq,sr;\r
40 int (*IrqCallback) (int nIrq);\r
41 unsigned int ppc;\r
42 void *pResetCallback;\r
43 unsigned int sfc,dfc,usp,vbr;\r
44 unsigned int AsmBank,CpuVersion;\r
45};\r
46struct A68KContext M68000_regs;\r
47extern int m68k_ICount;\r
48#define SekCyclesLeft m68k_ICount\r
49#define SekSetCyclesLeft(c) m68k_ICount=c\r
50#define SekPc M68000_regs.pc\r
51#endif\r
52\r
53#ifdef EMU_M68K\r
54#include "../cpu/musashi/m68kcpu.h"\r
55extern m68ki_cpu_core PicoM68kCPU; // MD's CPU\r
56extern m68ki_cpu_core PicoS68kCPU; // Mega CD's CPU\r
57#ifndef SekCyclesLeft\r
58#define SekCyclesLeft m68k_cycles_remaining()\r
59#define SekSetCyclesLeft(c) SET_CYCLES(c)\r
60#define SekPc m68k_get_reg(&PicoM68kCPU, M68K_REG_PC)\r
61#define SekPcS68k m68k_get_reg(&PicoS68kCPU, M68K_REG_PC)\r
62#endif\r
63#endif\r
64\r
65extern int SekCycleCnt; // cycles done in this frame\r
66extern int SekCycleAim; // cycle aim\r
67extern unsigned int SekCycleCntT; // total cycle counter, updated once per frame\r
68\r
69#define SekCyclesReset() {SekCycleCntT+=SekCycleCnt;SekCycleCnt=SekCycleAim=0;}\r
70#define SekCyclesBurn(c) SekCycleCnt+=c\r
71#define SekCyclesDone() (SekCycleAim-SekCyclesLeft) // nuber of cycles done in this frame (can be checked anywhere)\r
72#define SekCyclesDoneT() (SekCycleCntT+SekCyclesDone()) // total nuber of cycles done for this rom\r
73\r
74#define SekEndRun(after) { \\r
75 SekCycleCnt -= SekCyclesLeft - after; \\r
76 if(SekCycleCnt < 0) SekCycleCnt = 0; \\r
77 SekSetCyclesLeft(after); \\r
78}\r
79\r
80extern int SekCycleCntS68k;\r
81extern int SekCycleAimS68k;\r
82\r
83#define SekCyclesResetS68k() {SekCycleCntS68k=SekCycleAimS68k=0;}\r
84\r
85// does not work as expected\r
86//extern int z80ExtraCycles; // extra z80 cycles, used when z80 is [en|dis]abled\r
87\r
88extern int PicoMCD;\r
89\r
90// ---------------------------------------------------------\r
91\r
92// main oscillator clock which controls timing\r
93#define OSC_NTSC 53693100\r
94#define OSC_PAL 53203424 // not accurate\r
95\r
96struct PicoVideo\r
97{\r
98 unsigned char reg[0x20];\r
99 unsigned int command; // 32-bit Command\r
100 unsigned char pending; // 1 if waiting for second half of 32-bit command\r
101 unsigned char type; // Command type (v/c/vsram read/write)\r
102 unsigned short addr; // Read/Write address\r
103 int status; // Status bits\r
104 unsigned char pending_ints; // pending interrupts: ??VH????\r
105 unsigned char pad[0x13];\r
106};\r
107\r
108struct PicoMisc\r
109{\r
110 unsigned char rotate;\r
111 unsigned char z80Run;\r
112 unsigned char padTHPhase[2]; // phase of gamepad TH switches\r
113 short scanline; // 0 to 261||311; -1 in fast mode\r
114 char dirtyPal; // Is the palette dirty (1 - change @ this frame, 2 - some time before)\r
115 unsigned char hardware; // Hardware value for country\r
116 unsigned char pal; // 1=PAL 0=NTSC\r
117 unsigned char sram_reg; // SRAM mode register. bit0: allow read? bit1: deny write? bit2: EEPROM?\r
118 unsigned short z80_bank68k;\r
119 unsigned short z80_lastaddr; // this is for Z80 faking\r
120 unsigned char z80_fakeval;\r
121 unsigned char pad0;\r
122 unsigned char padDelay[2]; // gamepad phase time outs, so we count a delay\r
123 unsigned short sram_addr; // EEPROM address register\r
124 unsigned char sram_cycle; // EEPROM SRAM cycle number\r
125 unsigned char sram_slave; // EEPROM slave word for X24C02 and better SRAMs\r
126 unsigned char prot_bytes[2]; // simple protection fakeing\r
4f672280 127 unsigned short dma_bytes; //\r
312e9ce1 128 unsigned char pad[2];\r
129 unsigned int frame_count; // mainly for movies\r
cc68a136 130};\r
131\r
132// some assembly stuff depend on these, do not touch!\r
133struct Pico\r
134{\r
135 unsigned char ram[0x10000]; // 0x00000 scratch ram\r
136 unsigned short vram[0x8000]; // 0x10000\r
137 unsigned char zram[0x2000]; // 0x20000 Z80 ram\r
138 unsigned char ioports[0x10];\r
139 unsigned int pad[0x3c]; // unused\r
140 unsigned short cram[0x40]; // 0x22100\r
141 unsigned short vsram[0x40]; // 0x22180\r
142\r
143 unsigned char *rom; // 0x22200\r
144 unsigned int romsize; // 0x22204\r
145\r
146 struct PicoMisc m;\r
147 struct PicoVideo video;\r
148};\r
149\r
150// sram\r
151struct PicoSRAM\r
152{\r
153 unsigned char *data; // actual data\r
154 unsigned int start; // start address in 68k address space\r
155 unsigned int end;\r
156 unsigned char resize; // 1=SRAM size changed and needs to be reallocated on PicoReset\r
157 unsigned char reg_back; // copy of Pico.m.sram_reg to set after reset\r
158 unsigned char changed;\r
159 unsigned char pad;\r
160};\r
161\r
162// MCD\r
163#include "cd/cd_sys.h"\r
164#include "cd/LC89510.h"\r
d1df8786 165#include "cd/gfx_cd.h"\r
cc68a136 166\r
4f265db7 167struct mcd_pcm\r
168{\r
169 unsigned char control; // reg7\r
170 unsigned char enabled; // reg8\r
171 unsigned char cur_ch;\r
172 unsigned char bank;\r
173 int pad1;\r
174\r
175 struct pcm_chan\r
176 {\r
177 unsigned char regs[8];\r
178 unsigned int addr; // played sample address\r
179 int pad;\r
180 } ch[8];\r
181};\r
182\r
c459aefd 183struct mcd_misc\r
184{\r
185 unsigned short hint_vector;\r
186 unsigned char busreq;\r
51a902ae 187 unsigned char s68k_pend_ints;\r
188 unsigned int state_flags; // emu state: reset_pending,\r
189 unsigned int counter75hz;\r
75736070 190 unsigned short audio_offset; // for savestates: play pointer offset (0-1023)\r
191 unsigned char audio_track; // playing audio track # (zero based)\r
192 char pad1;\r
4f265db7 193 int timer_int3;\r
194 unsigned int timer_stopwatch;\r
195 int pad[10];\r
c459aefd 196};\r
197\r
cc68a136 198typedef struct\r
199{\r
ab0607f7 200 unsigned char bios[0x20000]; // 128K\r
cc68a136 201 union {\r
ab0607f7 202 unsigned char prg_ram[0x80000]; // 512K\r
cc68a136 203 unsigned char prg_ram_b[4][0x20000];\r
204 };\r
ab0607f7 205 unsigned char word_ram[0x40000]; // 256K\r
4f265db7 206 union {\r
207 unsigned char pcm_ram[0x10000]; // 64K\r
208 unsigned char pcm_ram_b[0x10][0x1000];\r
209 };\r
ab0607f7 210 unsigned char bram[0x2000]; // 8K\r
4f265db7 211 unsigned char s68k_regs[0x200]; // GA, not CPU regs\r
212 struct mcd_pcm pcm;\r
75736070 213 _scd_toc TOC; // not to be saved\r
cc68a136 214 CDD cdd;\r
215 CDC cdc;\r
216 _scd scd;\r
d1df8786 217 Rot_Comp rot_comp;\r
c459aefd 218 struct mcd_misc m;\r
cc68a136 219} mcd_state;\r
220\r
221#define Pico_mcd ((mcd_state *)Pico.rom)\r
222\r
51a902ae 223// Area.c\r
224int PicoAreaPackCpu(unsigned char *cpu, int is_sub);\r
225int PicoAreaUnpackCpu(unsigned char *cpu, int is_sub);\r
226\r
227// cd/Area.c\r
228int PicoCdSaveState(void *file);\r
229int PicoCdLoadState(void *file);\r
cc68a136 230\r
231// Draw.c\r
232int PicoLine(int scan);\r
233void PicoFrameStart();\r
234\r
235// Draw2.c\r
236void PicoFrameFull();\r
237\r
238// Memory.c\r
239int PicoInitPc(unsigned int pc);\r
240unsigned int CPU_CALL PicoRead32(unsigned int a);\r
b837b69b 241void PicoMemSetup();\r
cc68a136 242void PicoMemReset();\r
b837b69b 243//void PicoDasm(int start,int len);\r
cc68a136 244unsigned char z80_read(unsigned short a);\r
245unsigned short z80_read16(unsigned short a);\r
246void z80_write(unsigned char data, unsigned short a);\r
247void z80_write16(unsigned short data, unsigned short a);\r
248\r
249// cd/Memory.c\r
b837b69b 250void PicoMemSetupCD();\r
cc68a136 251unsigned char PicoReadCD8 (unsigned int a);\r
252unsigned short PicoReadCD16(unsigned int a);\r
253unsigned int PicoReadCD32(unsigned int a);\r
254void PicoWriteCD8 (unsigned int a, unsigned char d);\r
255void PicoWriteCD16(unsigned int a, unsigned short d);\r
256void PicoWriteCD32(unsigned int a, unsigned int d);\r
257\r
258// Pico.c\r
259extern struct Pico Pico;\r
260extern struct PicoSRAM SRam;\r
261extern int emustatus;\r
312e9ce1 262int CheckDMA(void);\r
cc68a136 263\r
264// cd/Pico.c\r
265int PicoInitMCD(void);\r
266void PicoExitMCD(void);\r
267int PicoResetMCD(int hard);\r
268\r
269// Sek.c\r
270int SekInit(void);\r
271int SekReset(void);\r
272int SekInterrupt(int irq);\r
273void SekState(unsigned char *data);\r
274\r
275// cd/Sek.c\r
276int SekInitS68k(void);\r
277int SekResetS68k(void);\r
278int SekInterruptS68k(int irq);\r
279\r
280// VideoPort.c\r
281void PicoVideoWrite(unsigned int a,unsigned short d);\r
282unsigned int PicoVideoRead(unsigned int a);\r
283\r
284// Misc.c\r
285void SRAMWriteEEPROM(unsigned int d);\r
286unsigned int SRAMReadEEPROM();\r
287void SRAMUpdPending(unsigned int a, unsigned int d);\r
288\r
289\r
290#ifdef __cplusplus\r
291} // End of extern "C"\r
292#endif\r
fast MegaDrive/MegaCD/32X emulator