[picodrive.git] / Pico / Sek.c

// This is part of Pico Library\r
\r
// (c) Copyright 2004 Dave, All rights reserved.\r
// (c) Copyright 2006 notaz, All rights reserved.\r
// Free for non-commercial use.\r
\r
// For commercial use, separate licencing terms must be obtained.\r
\r
\r
#include "PicoInt.h"\r
\r
\r
int SekCycleCnt=0; // cycles done in this frame\r
int SekCycleAim=0; // cycle aim\r
unsigned int SekCycleCntT=0;\r
\r
\r
/* context */\r
// Cyclone 68000\r
#ifdef EMU_C68K\r
struct Cyclone PicoCpu;\r
#endif\r
// MUSASHI 68000\r
#ifdef EMU_M68K\r
m68ki_cpu_core PicoM68kCPU;\r
#endif\r
// FAME 68000\r
#ifdef EMU_F68K\r
M68K_CONTEXT PicoCpuM68k;\r
#endif\r
\r
\r
/* callbacks */\r
#ifdef EMU_C68K\r
// interrupt acknowledgment\r
static int SekIntAck(int level)\r
{\r
  // try to emulate VDP's reaction to 68000 int ack\r
  if     (level == 4) { Pico.video.pending_ints  =  0;    elprintf(EL_INTS, "hack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
  else if(level == 6) { Pico.video.pending_ints &= ~0x20; elprintf(EL_INTS, "vack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
  PicoCpu.irq = 0;\r
  return CYCLONE_INT_ACK_AUTOVECTOR;\r
}\r
\r
static void SekResetAck(void)\r
{\r
  elprintf(EL_ANOMALY, "Reset encountered @ %06x", SekPc);\r
}\r
\r
static int SekUnrecognizedOpcode()\r
{\r
  unsigned int pc, op;\r
  pc = SekPc;\r
  op = PicoCpu.read16(pc);\r
  elprintf(EL_ANOMALY, "Unrecognized Opcode %04x @ %06x", op, pc);\r
  // see if we are not executing trash\r
  if (pc < 0x200 || (pc > Pico.romsize+4 && (pc&0xe00000)!=0xe00000)) {\r
    PicoCpu.cycles = 0;\r
    PicoCpu.state_flags |= 1;\r
    return 1;\r
  }\r
#ifdef EMU_M68K // debugging cyclone\r
  {\r
    extern int have_illegal;\r
    have_illegal = 1;\r
  }\r
#endif\r
  return 0;\r
}\r
#endif\r
\r
\r
#ifdef EMU_M68K\r
static int SekIntAckM68K(int level)\r
{\r
  if     (level == 4) { Pico.video.pending_ints  =  0;    elprintf(EL_INTS, "hack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
  else if(level == 6) { Pico.video.pending_ints &= ~0x20; elprintf(EL_INTS, "vack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
  CPU_INT_LEVEL = 0;\r
  return M68K_INT_ACK_AUTOVECTOR;\r
}\r
\r
static int SekTasCallback(void)\r
{\r
  return 0; // no writeback\r
}\r
#endif\r
\r
\r
#ifdef EMU_F68K\r
static void setup_fame_fetchmap(void)\r
{\r
  int i;\r
\r
  // be default, point everything to fitst 64k of ROM\r
  for (i = 0; i < M68K_FETCHBANK1; i++)\r
    PicoCpuM68k.Fetch[i] = (unsigned int)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r
  // now real ROM\r
  for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)\r
    PicoCpuM68k.Fetch[i] = (unsigned int)Pico.rom;\r
  elprintf(EL_ANOMALY, "ROM end @ #%i %06x", i, (i<<(24-FAMEC_FETCHBITS)));\r
  // .. and RAM (TODO)\r
  for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)\r
    PicoCpuM68k.Fetch[i] = (unsigned int)Pico.ram - (i<<(24-FAMEC_FETCHBITS));\r
\r
  elprintf(EL_ANOMALY, "rom = %p, ram = %p", Pico.rom, Pico.ram);\r
  for (i = 0; i < M68K_FETCHBANK1; i++)\r
    elprintf(EL_ANOMALY, "Fetch[%i] = %p", i, PicoCpuM68k.Fetch[i]);\r
}\r
\r
void SekIntAckF68K(unsigned level)\r
{\r
  if     (level == 4) { Pico.video.pending_ints  =  0;    elprintf(EL_INTS, "hack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
  else if(level == 6) { Pico.video.pending_ints &= ~0x20; elprintf(EL_INTS, "vack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
  PicoCpuM68k.interrupts[0] = 0;\r
}\r
#endif\r
\r
\r
PICO_INTERNAL int SekInit()\r
{\r
#ifdef EMU_C68K\r
  CycloneInit();\r
  memset(&PicoCpu,0,sizeof(PicoCpu));\r
  PicoCpu.IrqCallback=SekIntAck;\r
  PicoCpu.ResetCallback=SekResetAck;\r
  PicoCpu.UnrecognizedCallback=SekUnrecognizedOpcode;\r
#endif\r
#ifdef EMU_M68K\r
  {\r
    void *oldcontext = m68ki_cpu_p;\r
    m68k_set_context(&PicoM68kCPU);\r
    m68k_set_cpu_type(M68K_CPU_TYPE_68000);\r
    m68k_init();\r
    m68k_set_int_ack_callback(SekIntAckM68K);\r
    m68k_set_tas_instr_callback(SekTasCallback);\r
    m68k_pulse_reset(); // Init cpu emulator\r
    m68k_set_context(oldcontext);\r
  }\r
#endif\r
#ifdef EMU_F68K\r
  {\r
    void *oldcontext = g_m68kcontext;\r
    g_m68kcontext = &PicoCpuM68k;\r
    memset(&PicoCpuM68k, 0, sizeof(PicoCpuM68k));\r
    m68k_init();\r
    PicoCpuM68k.iack_handler = SekIntAckF68K;\r
    g_m68kcontext = oldcontext;\r
  }\r
#endif\r
\r
  return 0;\r
}\r
\r
\r
// Reset the 68000:\r
PICO_INTERNAL int SekReset()\r
{\r
  if (Pico.rom==NULL) return 1;\r
\r
#ifdef EMU_C68K\r
  PicoCpu.state_flags=0;\r
  PicoCpu.osp=0;\r
  PicoCpu.srh =0x27; // Supervisor mode\r
  PicoCpu.flags=4;   // Z set\r
  PicoCpu.irq=0;\r
  PicoCpu.a[7]=PicoCpu.read32(0); // Stack Pointer\r
  PicoCpu.membase=0;\r
  PicoCpu.pc=PicoCpu.checkpc(PicoCpu.read32(4)); // Program Counter\r
#endif\r
#ifdef EMU_M68K\r
  m68k_set_context(&PicoM68kCPU); // if we ever reset m68k, we always need it's context to be set\r
  m68ki_cpu.sp[0]=0;\r
  m68k_set_irq(0);\r
  m68k_pulse_reset();\r
#endif\r
#ifdef EMU_F68K\r
  {\r
    unsigned ret;\r
    g_m68kcontext = &PicoCpuM68k;\r
    setup_fame_fetchmap();\r
    ret = m68k_reset();\r
    /*if (ret)*/ elprintf(EL_ANOMALY, "m68k_reset returned %u", ret);\r
  }\r
#endif\r
\r
  return 0;\r
}\r
\r
\r
PICO_INTERNAL int SekInterrupt(int irq)\r
{\r
#if defined(EMU_C68K) && defined(EMU_M68K)\r
  {\r
    extern unsigned int dbg_irq_level;\r
    dbg_irq_level=irq;\r
    return 0;\r
  }\r
#endif\r
#ifdef EMU_C68K\r
  PicoCpu.irq=irq;\r
#endif\r
#ifdef EMU_M68K\r
  {\r
    void *oldcontext = m68ki_cpu_p;\r
    m68k_set_context(&PicoM68kCPU);\r
    m68k_set_irq(irq); // raise irq (gets lowered after taken or must be done in ack)\r
    m68k_set_context(oldcontext);\r
  }\r
#endif\r
#ifdef EMU_F68K\r
  PicoCpuM68k.interrupts[0]=irq;\r
#endif\r
\r
  return 0;\r
}\r
\r
PICO_INTERNAL void SekState(unsigned char *data)\r
{\r
#ifdef EMU_C68K\r
  memcpy(data,PicoCpu.d,0x44);\r
#elif defined(EMU_M68K)\r
  memcpy(data, PicoM68kCPU.dar, 0x40);\r
  *(int *)(data+0x40) = PicoM68kCPU.pc;\r
#elif defined(EMU_F68K)\r
  memcpy(data, PicoCpuM68k.dreg, 0x40);\r
  *(int *)(data+0x40) = PicoCpuM68k.pc;\r
#endif\r
}\r
\r
PICO_INTERNAL void SekSetRealTAS(int use_real)\r
{\r
#ifdef EMU_C68K\r
  CycloneSetRealTAS(use_real);\r
#endif\r
#ifdef EMU_F68K\r
  // TODO\r
#endif\r
}\r
\r
Commit	Line	Data
cc68a136	1	// This is part of Pico Library\r
	2	\r
	3	// (c) Copyright 2004 Dave, All rights reserved.\r
	4	// (c) Copyright 2006 notaz, All rights reserved.\r
	5	// Free for non-commercial use.\r
	6	\r
	7	// For commercial use, separate licencing terms must be obtained.\r
	8	\r
	9	\r
	10	#include "PicoInt.h"\r
	11	\r
	12	\r
	13	int SekCycleCnt=0; // cycles done in this frame\r
	14	int SekCycleAim=0; // cycle aim\r
	15	unsigned int SekCycleCntT=0;\r
	16	\r
70357ce5	17	\r
	18	/* context */\r
	19	// Cyclone 68000\r
cc68a136	20	#ifdef EMU_C68K\r
cc68a136	21	struct Cyclone PicoCpu;\r
cc68a136	22	#endif\r
70357ce5	23	// MUSASHI 68000\r
cc68a136	24	#ifdef EMU_M68K\r
70357ce5	25	m68ki_cpu_core PicoM68kCPU;\r
cc68a136	26	#endif\r
70357ce5	27	// FAME 68000\r
	28	#ifdef EMU_F68K\r
	29	M68K_CONTEXT PicoCpuM68k;\r
cc68a136	30	#endif\r
	31	\r
	32	\r
70357ce5	33	/* callbacks */\r
cc68a136	34	#ifdef EMU_C68K\r
b837b69b	35	// interrupt acknowledgment\r
0af33fe0	36	static int SekIntAck(int level)\r
cc68a136	37	{\r
cc68a136	38	// try to emulate VDP's reaction to 68000 int ack\r
69996cb7	39	if (level == 4) { Pico.video.pending_ints = 0; elprintf(EL_INTS, "hack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
69996cb7	40	else if(level == 6) { Pico.video.pending_ints &= ~0x20; elprintf(EL_INTS, "vack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
cc68a136	41	PicoCpu.irq = 0;\r
0af33fe0	42	return CYCLONE_INT_ACK_AUTOVECTOR;\r
cc68a136	43	}\r
cc68a136	44	\r
69996cb7	45	static void SekResetAck(void)\r
cc68a136	46	{\r
69996cb7	47	elprintf(EL_ANOMALY, "Reset encountered @ %06x", SekPc);\r
cc68a136	48	}\r
	49	\r
	50	static int SekUnrecognizedOpcode()\r
	51	{\r
	52	unsigned int pc, op;\r
	53	pc = SekPc;\r
	54	op = PicoCpu.read16(pc);\r
69996cb7	55	elprintf(EL_ANOMALY, "Unrecognized Opcode %04x @ %06x", op, pc);\r
cc68a136	56	// see if we are not executing trash\r
	57	if (pc < 0x200 \|\| (pc > Pico.romsize+4 && (pc&0xe00000)!=0xe00000)) {\r
	58	PicoCpu.cycles = 0;\r
0af33fe0	59	PicoCpu.state_flags \|= 1;\r
cc68a136	60	return 1;\r
cc68a136	61	}\r
2d0b15bb	62	#ifdef EMU_M68K // debugging cyclone\r
	63	{\r
	64	extern int have_illegal;\r
	65	have_illegal = 1;\r
	66	}\r
	67	#endif\r
cc68a136	68	return 0;\r
	69	}\r
	70	#endif\r
	71	\r
	72	\r
	73	#ifdef EMU_M68K\r
	74	static int SekIntAckM68K(int level)\r
	75	{\r
69996cb7	76	if (level == 4) { Pico.video.pending_ints = 0; elprintf(EL_INTS, "hack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
69996cb7	77	else if(level == 6) { Pico.video.pending_ints &= ~0x20; elprintf(EL_INTS, "vack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
cc68a136	78	CPU_INT_LEVEL = 0;\r
	79	return M68K_INT_ACK_AUTOVECTOR;\r
	80	}\r
0af33fe0	81	\r
	82	static int SekTasCallback(void)\r
	83	{\r
	84	return 0; // no writeback\r
	85	}\r
cc68a136	86	#endif\r
	87	\r
	88	\r
70357ce5	89	#ifdef EMU_F68K\r
	90	static void setup_fame_fetchmap(void)\r
	91	{\r
	92	int i;\r
	93	\r
	94	// be default, point everything to fitst 64k of ROM\r
	95	for (i = 0; i < M68K_FETCHBANK1; i++)\r
	96	PicoCpuM68k.Fetch[i] = (unsigned int)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r
	97	// now real ROM\r
	98	for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)\r
	99	PicoCpuM68k.Fetch[i] = (unsigned int)Pico.rom;\r
	100	elprintf(EL_ANOMALY, "ROM end @ #%i %06x", i, (i<<(24-FAMEC_FETCHBITS)));\r
	101	// .. and RAM (TODO)\r
	102	for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)\r
	103	PicoCpuM68k.Fetch[i] = (unsigned int)Pico.ram - (i<<(24-FAMEC_FETCHBITS));\r
	104	\r
	105	elprintf(EL_ANOMALY, "rom = %p, ram = %p", Pico.rom, Pico.ram);\r
	106	for (i = 0; i < M68K_FETCHBANK1; i++)\r
	107	elprintf(EL_ANOMALY, "Fetch[%i] = %p", i, PicoCpuM68k.Fetch[i]);\r
	108	}\r
	109	\r
	110	void SekIntAckF68K(unsigned level)\r
	111	{\r
	112	if (level == 4) { Pico.video.pending_ints = 0; elprintf(EL_INTS, "hack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
	113	else if(level == 6) { Pico.video.pending_ints &= ~0x20; elprintf(EL_INTS, "vack: @ %06x [%i]", SekPc, SekCycleCnt); }\r
	114	PicoCpuM68k.interrupts[0] = 0;\r
	115	}\r
	116	#endif\r
	117	\r
cc68a136	118	\r
eff55556	119	PICO_INTERNAL int SekInit()\r
cc68a136	120	{\r
	121	#ifdef EMU_C68K\r
	122	CycloneInit();\r
	123	memset(&PicoCpu,0,sizeof(PicoCpu));\r
	124	PicoCpu.IrqCallback=SekIntAck;\r
	125	PicoCpu.ResetCallback=SekResetAck;\r
	126	PicoCpu.UnrecognizedCallback=SekUnrecognizedOpcode;\r
	127	#endif\r
cc68a136	128	#ifdef EMU_M68K\r
	129	{\r
	130	void *oldcontext = m68ki_cpu_p;\r
	131	m68k_set_context(&PicoM68kCPU);\r
	132	m68k_set_cpu_type(M68K_CPU_TYPE_68000);\r
	133	m68k_init();\r
	134	m68k_set_int_ack_callback(SekIntAckM68K);\r
0af33fe0	135	m68k_set_tas_instr_callback(SekTasCallback);\r
cc68a136	136	m68k_pulse_reset(); // Init cpu emulator\r
	137	m68k_set_context(oldcontext);\r
	138	}\r
	139	#endif\r
70357ce5	140	#ifdef EMU_F68K\r
	141	{\r
	142	void *oldcontext = g_m68kcontext;\r
	143	g_m68kcontext = &PicoCpuM68k;\r
	144	memset(&PicoCpuM68k, 0, sizeof(PicoCpuM68k));\r
	145	m68k_init();\r
	146	PicoCpuM68k.iack_handler = SekIntAckF68K;\r
	147	g_m68kcontext = oldcontext;\r
	148	}\r
	149	#endif\r
cc68a136	150	\r
	151	return 0;\r
	152	}\r
	153	\r
70357ce5	154	\r
cc68a136	155	// Reset the 68000:\r
eff55556	156	PICO_INTERNAL int SekReset()\r
cc68a136	157	{\r
	158	if (Pico.rom==NULL) return 1;\r
	159	\r
	160	#ifdef EMU_C68K\r
0af33fe0	161	PicoCpu.state_flags=0;\r
cc68a136	162	PicoCpu.osp=0;\r
	163	PicoCpu.srh =0x27; // Supervisor mode\r
	164	PicoCpu.flags=4; // Z set\r
	165	PicoCpu.irq=0;\r
	166	PicoCpu.a[7]=PicoCpu.read32(0); // Stack Pointer\r
	167	PicoCpu.membase=0;\r
	168	PicoCpu.pc=PicoCpu.checkpc(PicoCpu.read32(4)); // Program Counter\r
	169	#endif\r
cc68a136	170	#ifdef EMU_M68K\r
b837b69b	171	m68k_set_context(&PicoM68kCPU); // if we ever reset m68k, we always need it's context to be set\r
2d0b15bb	172	m68ki_cpu.sp[0]=0;\r
2d0b15bb	173	m68k_set_irq(0);\r
b837b69b	174	m68k_pulse_reset();\r
cc68a136	175	#endif\r
70357ce5	176	#ifdef EMU_F68K\r
	177	{\r
	178	unsigned ret;\r
	179	g_m68kcontext = &PicoCpuM68k;\r
	180	setup_fame_fetchmap();\r
	181	ret = m68k_reset();\r
	182	/if (ret)/ elprintf(EL_ANOMALY, "m68k_reset returned %u", ret);\r
	183	}\r
	184	#endif\r
cc68a136	185	\r
	186	return 0;\r
	187	}\r
	188	\r
	189	\r
eff55556	190	PICO_INTERNAL int SekInterrupt(int irq)\r
cc68a136	191	{\r
0af33fe0	192	#if defined(EMU_C68K) && defined(EMU_M68K)\r
	193	{\r
	194	extern unsigned int dbg_irq_level;\r
	195	dbg_irq_level=irq;\r
	196	return 0;\r
	197	}\r
	198	#endif\r
cc68a136	199	#ifdef EMU_C68K\r
	200	PicoCpu.irq=irq;\r
	201	#endif\r
cc68a136	202	#ifdef EMU_M68K\r
	203	{\r
	204	void *oldcontext = m68ki_cpu_p;\r
	205	m68k_set_context(&PicoM68kCPU);\r
	206	m68k_set_irq(irq); // raise irq (gets lowered after taken or must be done in ack)\r
	207	m68k_set_context(oldcontext);\r
	208	}\r
	209	#endif\r
70357ce5	210	#ifdef EMU_F68K\r
	211	PicoCpuM68k.interrupts[0]=irq;\r
	212	#endif\r
	213	\r
cc68a136	214	return 0;\r
	215	}\r
	216	\r
eff55556	217	PICO_INTERNAL void SekState(unsigned char *data)\r
cc68a136	218	{\r
	219	#ifdef EMU_C68K\r
	220	memcpy(data,PicoCpu.d,0x44);\r
cc68a136	221	#elif defined(EMU_M68K)\r
70357ce5	222	memcpy(data, PicoM68kCPU.dar, 0x40);\r
	223	(int )(data+0x40) = PicoM68kCPU.pc;\r
	224	#elif defined(EMU_F68K)\r
	225	memcpy(data, PicoCpuM68k.dreg, 0x40);\r
	226	(int )(data+0x40) = PicoCpuM68k.pc;\r
cc68a136	227	#endif\r
cc68a136	228	}\r
2433f409	229	\r
eff55556	230	PICO_INTERNAL void SekSetRealTAS(int use_real)\r
2433f409	231	{\r
	232	#ifdef EMU_C68K\r
	233	CycloneSetRealTAS(use_real);\r
	234	#endif\r
70357ce5	235	#ifdef EMU_F68K\r
	236	// TODO\r
	237	#endif\r
2433f409	238	}\r
2433f409	239	\r