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[picodrive.git] / Pico / cd / Memory.c
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6cadc2da 1// Memory I/O handlers for Sega/Mega CD.\r
2// Loosely based on Gens code.\r
3// (c) Copyright 2007, Grazvydas "notaz" Ignotas\r
cc68a136 4\r
cc68a136 5\r
cc68a136 6#include "../PicoInt.h"\r
7\r
cc68a136 8#include "../sound/ym2612.h"\r
9#include "../sound/sn76496.h"\r
10\r
cb4a513a 11#include "gfx_cd.h"\r
4f265db7 12#include "pcm.h"\r
cb4a513a 13\r
eff55556 14#ifndef UTYPES_DEFINED\r
cc68a136 15typedef unsigned char u8;\r
16typedef unsigned short u16;\r
17typedef unsigned int u32;\r
eff55556 18#define UTYPES_DEFINED\r
19#endif\r
cc68a136 20\r
b5e5172d 21//#define rdprintf dprintf\r
22#define rdprintf(...)\r
68cba51e 23//#define wrdprintf dprintf\r
913ef4b7 24#define wrdprintf(...)\r
cc68a136 25\r
b5e5172d 26#ifdef EMU_CORE_DEBUG\r
27extern u32 lastread_a, lastread_d[16], lastwrite_cyc_d[16];\r
28extern int lrp_cyc, lwp_cyc;\r
29#undef USE_POLL_DETECT\r
30#endif\r
31\r
cc68a136 32// -----------------------------------------------------------------\r
33\r
7a1f6e45 34// poller detection\r
7a1f6e45 35#define POLL_LIMIT 16\r
36#define POLL_CYCLES 124\r
37// int m68k_poll_addr, m68k_poll_cnt;\r
38unsigned int s68k_poll_adclk, s68k_poll_cnt;\r
cc68a136 39\r
4ff2d527 40#ifndef _ASM_CD_MEMORY_C\r
cb4a513a 41static u32 m68k_reg_read16(u32 a)\r
cc68a136 42{\r
43 u32 d=0;\r
44 a &= 0x3e;\r
672ad671 45 // dprintf("m68k_regs r%2i: [%02x] @%06x", realsize&~1, a+(realsize&1), SekPc);\r
cc68a136 46\r
47 switch (a) {\r
672ad671 48 case 0:\r
c459aefd 49 d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens\r
672ad671 50 goto end;\r
cc68a136 51 case 2:\r
672ad671 52 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);\r
c008977e 53 // the DMNA delay must only be visible on s68k side (Lunar2, Silpheed)\r
54 if (Pico_mcd->m.state_flags&2) { d &= ~1; d |= 2; }\r
55 //printf("m68k_regs r3: %02x @%06x\n", (u8)d, SekPc);\r
cc68a136 56 goto end;\r
c459aefd 57 case 4:\r
58 d = Pico_mcd->s68k_regs[4]<<8;\r
59 goto end;\r
60 case 6:\r
913ef4b7 61 d = *(u16 *)(Pico_mcd->bios + 0x72);\r
c459aefd 62 goto end;\r
cc68a136 63 case 8:\r
cc68a136 64 d = Read_CDC_Host(0);\r
65 goto end;\r
c459aefd 66 case 0xA:\r
ca61ee42 67 elprintf(EL_UIO, "m68k FIXME: reserved read");\r
c459aefd 68 goto end;\r
cc68a136 69 case 0xC:\r
1cd356a3 70 d = Pico_mcd->m.timer_stopwatch >> 16;\r
4ff2d527 71 dprintf("m68k stopwatch timer read (%04x)", d);\r
1cd356a3 72 goto end;\r
cc68a136 73 }\r
74\r
cc68a136 75 if (a < 0x30) {\r
76 // comm flag/cmd/status (0xE-0x2F)\r
77 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r
78 goto end;\r
79 }\r
80\r
ca61ee42 81 elprintf(EL_UIO, "m68k_regs FIXME invalid read @ %02x", a);\r
cc68a136 82\r
83end:\r
84\r
cc68a136 85 return d;\r
86}\r
4ff2d527 87#endif\r
cc68a136 88\r
4ff2d527 89#ifndef _ASM_CD_MEMORY_C\r
90static\r
91#endif\r
92void m68k_reg_write8(u32 a, u32 d)\r
cc68a136 93{\r
94 a &= 0x3f;\r
672ad671 95 // dprintf("m68k_regs w%2i: [%02x] %02x @%06x", realsize, a, d, SekPc);\r
cc68a136 96\r
97 switch (a) {\r
98 case 0:\r
672ad671 99 d &= 1;\r
ca61ee42 100 if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { elprintf(EL_INTS, "m68k: s68k irq 2"); SekInterruptS68k(2); }\r
c459aefd 101 return;\r
cc68a136 102 case 1:\r
672ad671 103 d &= 3;\r
51a902ae 104 if (!(d&1)) Pico_mcd->m.state_flags |= 1; // reset pending, needed to be sure we fetch the right vectors on reset\r
c459aefd 105 if ( (Pico_mcd->m.busreq&1) != (d&1)) dprintf("m68k: s68k reset %i", !(d&1));\r
106 if ( (Pico_mcd->m.busreq&2) != (d&2)) dprintf("m68k: s68k brq %i", (d&2)>>1);\r
51a902ae 107 if ((Pico_mcd->m.state_flags&1) && (d&3)==1) {\r
cc68a136 108 SekResetS68k(); // S68k comes out of RESET or BRQ state\r
4ff2d527 109 Pico_mcd->m.state_flags&=~1;\r
110 dprintf("m68k: resetting s68k, cycles=%i", SekCyclesLeft);\r
cc68a136 111 }\r
c459aefd 112 Pico_mcd->m.busreq = d;\r
113 return;\r
672ad671 114 case 2:\r
721cd396 115 dprintf("m68k: prg wp=%02x", d);\r
672ad671 116 Pico_mcd->s68k_regs[2] = d; // really use s68k side register\r
117 return;\r
66fdc0f0 118 case 3: {\r
119 u32 dold = Pico_mcd->s68k_regs[3]&0x1f;\r
c008977e 120 //printf("m68k_regs w3: %02x @%06x\n", (u8)d, SekPc);\r
672ad671 121 d &= 0xc2;\r
66fdc0f0 122 if ((dold>>6) != ((d>>6)&3))\r
672ad671 123 dprintf("m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));\r
124 //if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);\r
125 //if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :\r
126 // ((d&2) ? "word ram to s68k" : "word ram to m68k"));\r
66fdc0f0 127 if (dold & 4) {\r
128 d ^= 2; // writing 0 to DMNA actually sets it, 1 does nothing\r
129 } else {\r
130 //dold &= ~2; // ??\r
89fa852d 131#if 1\r
132 if ((d & 2) && !(dold & 2)) {\r
133 Pico_mcd->m.state_flags |= 2; // we must delay setting DMNA bit (needed for Silpheed)\r
134 d &= ~2;\r
135 }\r
136#else\r
66fdc0f0 137 if (d & 2) dold &= ~1; // return word RAM to s68k in 2M mode\r
89fa852d 138#endif\r
66fdc0f0 139 }\r
140 Pico_mcd->s68k_regs[3] = d | dold; // really use s68k side register\r
7a1f6e45 141#ifdef USE_POLL_DETECT\r
142 if ((s68k_poll_adclk&0xfe) == 2 && s68k_poll_cnt > POLL_LIMIT) {\r
143 SekSetStopS68k(0); s68k_poll_adclk = 0;\r
8f8fe01e 144 elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r
7a1f6e45 145 }\r
146#endif\r
672ad671 147 return;\r
66fdc0f0 148 }\r
c459aefd 149 case 6:\r
d1df8786 150 Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer\r
c459aefd 151 return;\r
152 case 7:\r
d1df8786 153 Pico_mcd->bios[0x72] = d;\r
913ef4b7 154 dprintf("hint vector set to %08x", PicoRead32(0x70));\r
c459aefd 155 return;\r
7a1f6e45 156 case 0xf:\r
157 d = (d << 1) | ((d >> 7) & 1); // rol8 1 (special case)\r
cc68a136 158 case 0xe:\r
672ad671 159 //dprintf("m68k: comm flag: %02x", d);\r
cc68a136 160 Pico_mcd->s68k_regs[0xe] = d;\r
7a1f6e45 161#ifdef USE_POLL_DETECT\r
162 if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {\r
163 SekSetStopS68k(0); s68k_poll_adclk = 0;\r
8f8fe01e 164 elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r
7a1f6e45 165 }\r
166#endif\r
c459aefd 167 return;\r
672ad671 168 }\r
169\r
170 if ((a&0xf0) == 0x10) {\r
cc68a136 171 Pico_mcd->s68k_regs[a] = d;\r
7a1f6e45 172#ifdef USE_POLL_DETECT\r
173 if ((a&0xfe) == (s68k_poll_adclk&0xfe) && s68k_poll_cnt > POLL_LIMIT) {\r
174 SekSetStopS68k(0); s68k_poll_adclk = 0;\r
8f8fe01e 175 elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r
7a1f6e45 176 }\r
177#endif\r
672ad671 178 return;\r
cc68a136 179 }\r
180\r
ca61ee42 181 elprintf(EL_UIO, "m68k FIXME: invalid write? [%02x] %02x", a, d);\r
cc68a136 182}\r
183\r
2433f409 184#ifndef _ASM_CD_MEMORY_C\r
185static\r
186#endif\r
187u32 s68k_poll_detect(u32 a, u32 d)\r
188{\r
189#ifdef USE_POLL_DETECT\r
ca61ee42 190 // needed mostly for Cyclone, which doesn't always check it's cycle counter\r
191 if (SekIsStoppedS68k()) return d;\r
2433f409 192 // polling detection\r
193 if (a == (s68k_poll_adclk&0xff)) {\r
194 unsigned int clkdiff = SekCyclesDoneS68k() - (s68k_poll_adclk>>8);\r
195 if (clkdiff <= POLL_CYCLES) {\r
196 s68k_poll_cnt++;\r
197 //printf("-- diff: %u, cnt = %i\n", clkdiff, s68k_poll_cnt);\r
198 if (s68k_poll_cnt > POLL_LIMIT) {\r
199 SekSetStopS68k(1);\r
8f8fe01e 200 elprintf(EL_CDPOLL, "s68k poll detected @ %06x, a=%02x", SekPcS68k, a);\r
2433f409 201 }\r
202 s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;\r
203 return d;\r
204 }\r
205 }\r
206 s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;\r
207 s68k_poll_cnt = 0;\r
208#endif\r
209 return d;\r
210}\r
cc68a136 211\r
913ef4b7 212#define READ_FONT_DATA(basemask) \\r
213{ \\r
214 unsigned int fnt = *(unsigned int *)(Pico_mcd->s68k_regs + 0x4c); \\r
215 unsigned int col0 = (fnt >> 8) & 0x0f, col1 = (fnt >> 12) & 0x0f; \\r
216 if (fnt & (basemask << 0)) d = col1 ; else d = col0; \\r
217 if (fnt & (basemask << 1)) d |= col1 << 4; else d |= col0 << 4; \\r
218 if (fnt & (basemask << 2)) d |= col1 << 8; else d |= col0 << 8; \\r
219 if (fnt & (basemask << 3)) d |= col1 << 12; else d |= col0 << 12; \\r
220}\r
221\r
cc68a136 222\r
4ff2d527 223#ifndef _ASM_CD_MEMORY_C\r
224static\r
225#endif\r
226u32 s68k_reg_read16(u32 a)\r
cc68a136 227{\r
228 u32 d=0;\r
cc68a136 229\r
672ad671 230 // dprintf("s68k_regs r%2i: [%02x] @ %06x", realsize&~1, a+(realsize&1), SekPcS68k);\r
cc68a136 231\r
232 switch (a) {\r
233 case 0:\r
7a1f6e45 234 return ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state\r
672ad671 235 case 2:\r
2433f409 236 d = (Pico_mcd->s68k_regs[2]<<8) | (Pico_mcd->s68k_regs[3]&0x1f);\r
c008977e 237 //printf("s68k_regs r3: %02x @%06x\n", (u8)d, SekPcS68k);\r
2433f409 238 return s68k_poll_detect(a, d);\r
cc68a136 239 case 6:\r
7a1f6e45 240 return CDC_Read_Reg();\r
cc68a136 241 case 8:\r
7a1f6e45 242 return Read_CDC_Host(1); // Gens returns 0 here on byte reads\r
cc68a136 243 case 0xC:\r
4f265db7 244 d = Pico_mcd->m.timer_stopwatch >> 16;\r
4ff2d527 245 dprintf("s68k stopwatch timer read (%04x)", d);\r
7a1f6e45 246 return d;\r
d1df8786 247 case 0x30:\r
7a1f6e45 248 dprintf("s68k int3 timer read (%02x)", Pico_mcd->s68k_regs[31]);\r
249 return Pico_mcd->s68k_regs[31];\r
cc68a136 250 case 0x34: // fader\r
7a1f6e45 251 return 0; // no busy bit\r
913ef4b7 252 case 0x50: // font data (check: Lunar 2, Silpheed)\r
253 READ_FONT_DATA(0x00100000);\r
7a1f6e45 254 return d;\r
913ef4b7 255 case 0x52:\r
256 READ_FONT_DATA(0x00010000);\r
7a1f6e45 257 return d;\r
913ef4b7 258 case 0x54:\r
259 READ_FONT_DATA(0x10000000);\r
7a1f6e45 260 return d;\r
913ef4b7 261 case 0x56:\r
262 READ_FONT_DATA(0x01000000);\r
7a1f6e45 263 return d;\r
cc68a136 264 }\r
265\r
266 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r
267\r
2433f409 268 if (a >= 0x0e && a < 0x30)\r
269 return s68k_poll_detect(a, d);\r
7a1f6e45 270\r
cc68a136 271 return d;\r
272}\r
273\r
4ff2d527 274#ifndef _ASM_CD_MEMORY_C\r
275static\r
276#endif\r
277void s68k_reg_write8(u32 a, u32 d)\r
cc68a136 278{\r
672ad671 279 //dprintf("s68k_regs w%2i: [%02x] %02x @ %06x", realsize, a, d, SekPcS68k);\r
cc68a136 280\r
48e8482f 281 // Warning: d might have upper bits set\r
cc68a136 282 switch (a) {\r
672ad671 283 case 2:\r
284 return; // only m68k can change WP\r
fa1e5e29 285 case 3: {\r
286 int dold = Pico_mcd->s68k_regs[3];\r
c008977e 287 //printf("s68k_regs w3: %02x @%06x\n", (u8)d, SekPcS68k);\r
672ad671 288 d &= 0x1d;\r
4ff2d527 289 d |= dold&0xc2;\r
d0d47c5b 290 if (d&4) {\r
4ff2d527 291 if ((d ^ dold) & 5) {\r
292 d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit\r
4ff2d527 293 PicoMemResetCD(d);\r
4ff2d527 294 }\r
48e8482f 295#ifdef _ASM_CD_MEMORY_C\r
296 if ((d ^ dold) & 0x1d)\r
297 PicoMemResetCDdecode(d);\r
298#endif\r
fa1e5e29 299 if (!(dold & 4)) {\r
300 dprintf("wram mode 2M->1M");\r
301 wram_2M_to_1M(Pico_mcd->word_ram2M);\r
4ff2d527 302 }\r
d0d47c5b 303 } else {\r
fa1e5e29 304 if (dold & 4) {\r
305 dprintf("wram mode 1M->2M");\r
4ff2d527 306 if (!(d&1)) { // it didn't set the ret bit, which means it doesn't want to give WRAM to m68k\r
307 d &= ~3;\r
308 d |= (dold&1) ? 2 : 1; // then give it to the one which had bank0 in 1M mode\r
309 }\r
fa1e5e29 310 wram_1M_to_2M(Pico_mcd->word_ram2M);\r
4ff2d527 311 PicoMemResetCD(d);\r
4ff2d527 312 }\r
313 else\r
314 d |= dold&1;\r
315 if (d&1) d &= ~2; // return word RAM to m68k in 2M mode\r
d0d47c5b 316 }\r
672ad671 317 break;\r
fa1e5e29 318 }\r
cc68a136 319 case 4:\r
320 dprintf("s68k CDC dest: %x", d&7);\r
321 Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode\r
322 return;\r
323 case 5:\r
c459aefd 324 //dprintf("s68k CDC reg addr: %x", d&0xf);\r
cc68a136 325 break;\r
326 case 7:\r
327 CDC_Write_Reg(d);\r
328 return;\r
329 case 0xa:\r
330 dprintf("s68k set CDC dma addr");\r
331 break;\r
d1df8786 332 case 0xc:\r
4f265db7 333 case 0xd:\r
d1df8786 334 dprintf("s68k set stopwatch timer");\r
4f265db7 335 Pico_mcd->m.timer_stopwatch = 0;\r
336 return;\r
1cd356a3 337 case 0xe:\r
7a1f6e45 338 Pico_mcd->s68k_regs[0xf] = (d>>1) | (d<<7); // ror8 1, Gens note: Dragons lair\r
1cd356a3 339 return;\r
d1df8786 340 case 0x31:\r
4f265db7 341 dprintf("s68k set int3 timer: %02x", d);\r
48e8482f 342 Pico_mcd->m.timer_int3 = (d & 0xff) << 16;\r
d1df8786 343 break;\r
cc68a136 344 case 0x33: // IRQ mask\r
345 dprintf("s68k irq mask: %02x", d);\r
346 if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) {\r
347 CDD_Export_Status();\r
cc68a136 348 }\r
349 break;\r
350 case 0x34: // fader\r
351 Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;\r
352 return;\r
672ad671 353 case 0x36:\r
354 return; // d/m bit is unsetable\r
355 case 0x37: {\r
356 u32 d_old = Pico_mcd->s68k_regs[0x37];\r
357 Pico_mcd->s68k_regs[0x37] = d&7;\r
358 if ((d&4) && !(d_old&4)) {\r
cc68a136 359 CDD_Export_Status();\r
cc68a136 360 }\r
672ad671 361 return;\r
362 }\r
cc68a136 363 case 0x4b:\r
364 Pico_mcd->s68k_regs[a] = (u8) d;\r
365 CDD_Import_Command();\r
366 return;\r
367 }\r
368\r
1cd356a3 369 if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))\r
cc68a136 370 {\r
ca61ee42 371 elprintf(EL_UIO, "s68k FIXME: invalid write @ %02x?", a);\r
cc68a136 372 return;\r
373 }\r
374\r
375 Pico_mcd->s68k_regs[a] = (u8) d;\r
376}\r
377\r
378\r
4ff2d527 379#ifndef _ASM_CD_MEMORY_C\r
fa1e5e29 380static u32 OtherRead16End(u32 a, int realsize)\r
cc68a136 381{\r
382 u32 d=0;\r
383\r
672ad671 384 if ((a&0xffffc0)==0xa12000) {\r
cb4a513a 385 d=m68k_reg_read16(a);\r
672ad671 386 goto end;\r
387 }\r
cc68a136 388\r
8022f53d 389 if (a==0x400000) {\r
390 if (SRam.data != NULL) d=3; // 64k cart\r
391 goto end;\r
392 }\r
393\r
394 if ((a&0xfe0000)==0x600000) {\r
395 if (SRam.data != NULL) {\r
396 d=SRam.data[((a>>1)&0xffff)+0x2000];\r
397 if (realsize == 8) d|=d<<8;\r
398 }\r
399 goto end;\r
400 }\r
401\r
402 if (a==0x7ffffe) {\r
403 d=Pico_mcd->m.bcram_reg;\r
404 goto end;\r
405 }\r
406\r
ca61ee42 407 elprintf(EL_UIO, "m68k FIXME: unusual r%i: %06x @%06x", realsize&~1, (a&0xfffffe)+(realsize&1), SekPc);\r
cc68a136 408\r
409end:\r
410 return d;\r
411}\r
412\r
cc68a136 413\r
fa1e5e29 414static void OtherWrite8End(u32 a, u32 d, int realsize)\r
cc68a136 415{\r
cb4a513a 416 if ((a&0xffffc0)==0xa12000) { m68k_reg_write8(a, d); return; }\r
cc68a136 417\r
8022f53d 418 if ((a&0xfe0000)==0x600000) {\r
419 if (SRam.data != NULL && (Pico_mcd->m.bcram_reg&1)) {\r
420 SRam.data[((a>>1)&0xffff)+0x2000]=d;\r
421 SRam.changed = 1;\r
422 }\r
423 return;\r
424 }\r
425\r
426 if (a==0x7fffff) {\r
427 Pico_mcd->m.bcram_reg=d;\r
428 return;\r
429 }\r
430\r
ca61ee42 431 elprintf(EL_UIO, "m68k FIXME: strange w%i: [%06x], %08x @%06x", realsize, a&0xffffff, d, SekPc);\r
cc68a136 432}\r
433\r
69996cb7 434#define _CD_MEMORY_C\r
fa1e5e29 435#undef _ASM_MEMORY_C\r
436#include "../MemoryCmn.c"\r
4ff2d527 437#include "cell_map.c"\r
438#endif // !def _ASM_CD_MEMORY_C\r
cc68a136 439\r
2433f409 440\r
cc68a136 441// -----------------------------------------------------------------\r
442// Read Rom and read Ram\r
443\r
4ff2d527 444#ifdef _ASM_CD_MEMORY_C\r
0af33fe0 445u32 PicoReadM68k8(u32 a);\r
4ff2d527 446#else\r
81fda4e8 447u32 PicoReadM68k8(u32 a)\r
cc68a136 448{\r
449 u32 d=0;\r
450\r
cc68a136 451 a&=0xffffff;\r
452\r
b542be46 453 switch (a >> 17)\r
454 {\r
455 case 0x00>>1: // BIOS: 000000 - 020000\r
456 d = *(u8 *)(Pico_mcd->bios+(a^1));\r
457 break;\r
458 case 0x02>>1: // prg RAM\r
459 if ((Pico_mcd->m.busreq&3)!=1) {\r
460 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
461 d = *(prg_bank+((a^1)&0x1ffff));\r
462 }\r
463 break;\r
464 case 0x20>>1: // word RAM: 200000 - 220000\r
465 wrdprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);\r
466 a &= 0x1ffff;\r
467 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
468 int bank = Pico_mcd->s68k_regs[3]&1;\r
469 d = Pico_mcd->word_ram1M[bank][a^1];\r
470 } else {\r
471 // allow access in any mode, like Gens does\r
472 d = Pico_mcd->word_ram2M[a^1];\r
473 }\r
474 wrdprintf("ret = %02x", (u8)d);\r
475 break;\r
476 case 0x22>>1: // word RAM: 220000 - 240000\r
477 wrdprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);\r
478 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
479 int bank = Pico_mcd->s68k_regs[3]&1;\r
480 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged\r
481 d = Pico_mcd->word_ram1M[bank][a^1];\r
482 } else {\r
483 // allow access in any mode, like Gens does\r
484 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];\r
485 }\r
486 wrdprintf("ret = %02x", (u8)d);\r
487 break;\r
488 case 0xc0>>1: case 0xc2>>1: case 0xc4>>1: case 0xc6>>1:\r
489 case 0xc8>>1: case 0xca>>1: case 0xcc>>1: case 0xce>>1:\r
490 case 0xd0>>1: case 0xd2>>1: case 0xd4>>1: case 0xd6>>1:\r
491 case 0xd8>>1: case 0xda>>1: case 0xdc>>1: case 0xde>>1:\r
492 // VDP\r
493 if ((a&0xe700e0)==0xc00000) {\r
494 d=PicoVideoRead(a);\r
495 if ((a&1)==0) d>>=8;\r
496 }\r
497 break;\r
498 case 0xe0>>1: case 0xe2>>1: case 0xe4>>1: case 0xe6>>1:\r
499 case 0xe8>>1: case 0xea>>1: case 0xec>>1: case 0xee>>1:\r
500 case 0xf0>>1: case 0xf2>>1: case 0xf4>>1: case 0xf6>>1:\r
501 case 0xf8>>1: case 0xfa>>1: case 0xfc>>1: case 0xfe>>1:\r
502 // RAM:\r
503 d = *(u8 *)(Pico.ram+((a^1)&0xffff));\r
504 break;\r
505 default:\r
506 if ((a&0xff4000)==0xa00000) { d=z80Read8(a); break; } // Z80 Ram\r
507 if ((a&0xffffc0)==0xa12000)\r
508 rdprintf("m68k_regs r8: [%02x] @%06x", a&0x3f, SekPc);\r
cc68a136 509\r
b542be46 510 d=OtherRead16(a&~1, 8|(a&1)); if ((a&1)==0) d>>=8;\r
cc68a136 511\r
b542be46 512 if ((a&0xffffc0)==0xa12000)\r
513 rdprintf("ret = %02x", (u8)d);\r
514 break;\r
d0d47c5b 515 }\r
516\r
cc68a136 517\r
ca61ee42 518 elprintf(EL_IO, "r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);\r
b5e5172d 519#ifdef EMU_CORE_DEBUG\r
520 if (a>=Pico.romsize) {\r
521 lastread_a = a;\r
522 lastread_d[lrp_cyc++&15] = d;\r
523 }\r
cc68a136 524#endif\r
0af33fe0 525 return d;\r
cc68a136 526}\r
4ff2d527 527#endif\r
cc68a136 528\r
ab0607f7 529\r
4ff2d527 530#ifdef _ASM_CD_MEMORY_C\r
0af33fe0 531u32 PicoReadM68k16(u32 a);\r
4ff2d527 532#else\r
0af33fe0 533static u32 PicoReadM68k16(u32 a)\r
cc68a136 534{\r
0af33fe0 535 u32 d=0;\r
cc68a136 536\r
cc68a136 537 a&=0xfffffe;\r
538\r
b542be46 539 switch (a >> 17)\r
540 {\r
541 case 0x00>>1: // BIOS: 000000 - 020000\r
542 d = *(u16 *)(Pico_mcd->bios+a);\r
543 break;\r
544 case 0x02>>1: // prg RAM\r
545 if ((Pico_mcd->m.busreq&3)!=1) {\r
546 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
547 wrdprintf("m68k_prgram r16: [%i,%06x] @%06x", Pico_mcd->s68k_regs[3]>>6, a, SekPc);\r
548 d = *(u16 *)(prg_bank+(a&0x1fffe));\r
549 wrdprintf("ret = %04x", d);\r
550 }\r
551 break;\r
552 case 0x20>>1: // word RAM: 200000 - 220000\r
553 wrdprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);\r
554 a &= 0x1fffe;\r
555 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
556 int bank = Pico_mcd->s68k_regs[3]&1;\r
557 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a);\r
558 } else {\r
559 // allow access in any mode, like Gens does\r
560 d = *(u16 *)(Pico_mcd->word_ram2M+a);\r
561 }\r
562 wrdprintf("ret = %04x", d);\r
563 break;\r
564 case 0x22>>1: // word RAM: 220000 - 240000\r
565 wrdprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);\r
566 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
567 int bank = Pico_mcd->s68k_regs[3]&1;\r
568 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged\r
569 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a);\r
570 } else {\r
571 // allow access in any mode, like Gens does\r
572 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
573 }\r
574 wrdprintf("ret = %04x", d);\r
575 break;\r
576 case 0xc0>>1: case 0xc2>>1: case 0xc4>>1: case 0xc6>>1:\r
577 case 0xc8>>1: case 0xca>>1: case 0xcc>>1: case 0xce>>1:\r
578 case 0xd0>>1: case 0xd2>>1: case 0xd4>>1: case 0xd6>>1:\r
579 case 0xd8>>1: case 0xda>>1: case 0xdc>>1: case 0xde>>1:\r
580 // VDP\r
581 if ((a&0xe700e0)==0xc00000)\r
582 d=PicoVideoRead(a);\r
583 break;\r
584 case 0xe0>>1: case 0xe2>>1: case 0xe4>>1: case 0xe6>>1:\r
585 case 0xe8>>1: case 0xea>>1: case 0xec>>1: case 0xee>>1:\r
586 case 0xf0>>1: case 0xf2>>1: case 0xf4>>1: case 0xf6>>1:\r
587 case 0xf8>>1: case 0xfa>>1: case 0xfc>>1: case 0xfe>>1:\r
588 // RAM:\r
589 d=*(u16 *)(Pico.ram+(a&0xfffe));\r
590 break;\r
591 default:\r
592 if ((a&0xffffc0)==0xa12000)\r
593 rdprintf("m68k_regs r16: [%02x] @%06x", a&0x3f, SekPc);\r
cc68a136 594\r
b542be46 595 d = OtherRead16(a, 16);\r
cc68a136 596\r
b542be46 597 if ((a&0xffffc0)==0xa12000)\r
598 rdprintf("ret = %04x", d);\r
599 break;\r
d0d47c5b 600 }\r
601\r
cc68a136 602\r
ca61ee42 603 elprintf(EL_IO, "r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
b5e5172d 604#ifdef EMU_CORE_DEBUG\r
605 if (a>=Pico.romsize) {\r
606 lastread_a = a;\r
607 lastread_d[lrp_cyc++&15] = d;\r
608 }\r
cc68a136 609#endif\r
610 return d;\r
611}\r
4ff2d527 612#endif\r
cc68a136 613\r
ab0607f7 614\r
4ff2d527 615#ifdef _ASM_CD_MEMORY_C\r
616u32 PicoReadM68k32(u32 a);\r
617#else\r
618static u32 PicoReadM68k32(u32 a)\r
cc68a136 619{\r
620 u32 d=0;\r
621\r
cc68a136 622 a&=0xfffffe;\r
623\r
b542be46 624 switch (a >> 17)\r
625 {\r
626 case 0x00>>1: { // BIOS: 000000 - 020000\r
627 u16 *pm=(u16 *)(Pico_mcd->bios+a);\r
628 d = (pm[0]<<16)|pm[1];\r
629 break;\r
630 }\r
631 case 0x02>>1: // prg RAM\r
632 if ((Pico_mcd->m.busreq&3)!=1) {\r
633 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
634 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));\r
635 d = (pm[0]<<16)|pm[1];\r
636 }\r
637 break;\r
638 case 0x20>>1: // word RAM: 200000 - 220000\r
639 wrdprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);\r
640 a&=0x1fffe;\r
641 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
642 int bank = Pico_mcd->s68k_regs[3]&1;\r
643 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+a);\r
644 d = (pm[0]<<16)|pm[1];\r
645 } else {\r
646 // allow access in any mode, like Gens does\r
647 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+a);\r
648 d = (pm[0]<<16)|pm[1];\r
649 }\r
650 wrdprintf("ret = %08x", d);\r
651 break;\r
652 case 0x22>>1: // word RAM: 220000 - 240000\r
653 wrdprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);\r
654 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode, cell arranged?\r
fa1e5e29 655 u32 a1, a2;\r
b542be46 656 int bank = Pico_mcd->s68k_regs[3]&1;\r
fa1e5e29 657 a1 = (a&2) | (cell_map(a >> 2) << 2);\r
4ff2d527 658 if (a&2) a2 = cell_map((a+2) >> 2) << 2;\r
659 else a2 = a1 + 2;\r
660 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) << 16;\r
661 d |= *(u16 *)(Pico_mcd->word_ram1M[bank]+a2);\r
bf098bc5 662 } else {\r
b542be46 663 // allow access in any mode, like Gens does\r
664 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
665 d = (pm[0]<<16)|pm[1];\r
bf098bc5 666 }\r
b542be46 667 wrdprintf("ret = %08x", d);\r
668 break;\r
669 case 0xc0>>1: case 0xc2>>1: case 0xc4>>1: case 0xc6>>1:\r
670 case 0xc8>>1: case 0xca>>1: case 0xcc>>1: case 0xce>>1:\r
671 case 0xd0>>1: case 0xd2>>1: case 0xd4>>1: case 0xd6>>1:\r
672 case 0xd8>>1: case 0xda>>1: case 0xdc>>1: case 0xde>>1:\r
673 // VDP\r
674 d = (PicoVideoRead(a)<<16)|PicoVideoRead(a+2);\r
675 break;\r
676 case 0xe0>>1: case 0xe2>>1: case 0xe4>>1: case 0xe6>>1:\r
677 case 0xe8>>1: case 0xea>>1: case 0xec>>1: case 0xee>>1:\r
678 case 0xf0>>1: case 0xf2>>1: case 0xf4>>1: case 0xf6>>1:\r
679 case 0xf8>>1: case 0xfa>>1: case 0xfc>>1: case 0xfe>>1: {\r
680 // RAM:\r
681 u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));\r
682 d = (pm[0]<<16)|pm[1];\r
683 break;\r
d0d47c5b 684 }\r
b542be46 685 default:\r
686 if ((a&0xffffc0)==0xa12000)\r
687 rdprintf("m68k_regs r32: [%02x] @%06x", a&0x3f, SekPc);\r
d0d47c5b 688\r
b542be46 689 d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);\r
672ad671 690\r
b542be46 691 if ((a&0xffffc0)==0xa12000)\r
692 rdprintf("ret = %08x", d);\r
693 break;\r
694 }\r
cc68a136 695\r
672ad671 696\r
ca61ee42 697 elprintf(EL_IO, "r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r
b5e5172d 698#ifdef EMU_CORE_DEBUG\r
699 if (a>=Pico.romsize) {\r
700 lastread_a = a;\r
701 lastread_d[lrp_cyc++&15] = d;\r
702 }\r
cc68a136 703#endif\r
704 return d;\r
705}\r
4ff2d527 706#endif\r
cc68a136 707\r
ab0607f7 708\r
cc68a136 709// -----------------------------------------------------------------\r
cc68a136 710\r
4ff2d527 711#ifdef _ASM_CD_MEMORY_C\r
712void PicoWriteM68k8(u32 a,u8 d);\r
713#else\r
81fda4e8 714void PicoWriteM68k8(u32 a,u8 d)\r
cc68a136 715{\r
ca61ee42 716 elprintf(EL_IO, "w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
b5e5172d 717#ifdef EMU_CORE_DEBUG\r
718 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
719#endif\r
cc68a136 720\r
ab0607f7 721 if ((a&0xe00000)==0xe00000) { // Ram\r
722 *(u8 *)(Pico.ram+((a^1)&0xffff)) = d;\r
723 return;\r
724 }\r
cc68a136 725\r
cc68a136 726 // prg RAM\r
721cd396 727 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {\r
672ad671 728 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
bf098bc5 729 *(u8 *)(prg_bank+((a^1)&0x1ffff))=d;\r
cc68a136 730 return;\r
731 }\r
732\r
b542be46 733 a&=0xffffff;\r
734\r
d0d47c5b 735 // word RAM\r
736 if ((a&0xfc0000)==0x200000) {\r
913ef4b7 737 wrdprintf("m68k_wram w8: [%06x] %02x @%06x", a, d, SekPc);\r
d0d47c5b 738 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
fa1e5e29 739 int bank = Pico_mcd->s68k_regs[3]&1;\r
740 if (a >= 0x220000)\r
741 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged\r
742 else a &= 0x1ffff;\r
743 *(u8 *)(Pico_mcd->word_ram1M[bank]+(a^1))=d;\r
d0d47c5b 744 } else {\r
745 // allow access in any mode, like Gens does\r
fa1e5e29 746 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;\r
d0d47c5b 747 }\r
748 return;\r
749 }\r
750\r
2433f409 751 if ((a&0xffffc0)==0xa12000) {\r
c459aefd 752 rdprintf("m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);\r
2433f409 753 m68k_reg_write8(a, d);\r
754 return;\r
755 }\r
672ad671 756\r
fb9bec94 757 OtherWrite8(a,d);\r
cc68a136 758}\r
4ff2d527 759#endif\r
cc68a136 760\r
ab0607f7 761\r
4ff2d527 762#ifdef _ASM_CD_MEMORY_C\r
763void PicoWriteM68k16(u32 a,u16 d);\r
764#else\r
765static void PicoWriteM68k16(u32 a,u16 d)\r
cc68a136 766{\r
ca61ee42 767 elprintf(EL_IO, "w16: %06x, %04x", a&0xffffff, d);\r
b5e5172d 768#ifdef EMU_CORE_DEBUG\r
769 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
770#endif\r
cc68a136 771\r
ab0607f7 772 if ((a&0xe00000)==0xe00000) { // Ram\r
773 *(u16 *)(Pico.ram+(a&0xfffe))=d;\r
774 return;\r
775 }\r
cc68a136 776\r
cc68a136 777 // prg RAM\r
721cd396 778 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {\r
672ad671 779 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
c008977e 780 wrdprintf("m68k_prgram w16: [%i,%06x] %04x @%06x", Pico_mcd->s68k_regs[3]>>6, a, d, SekPc);\r
cc68a136 781 *(u16 *)(prg_bank+(a&0x1fffe))=d;\r
782 return;\r
783 }\r
784\r
b542be46 785 a&=0xfffffe;\r
786\r
d0d47c5b 787 // word RAM\r
788 if ((a&0xfc0000)==0x200000) {\r
913ef4b7 789 wrdprintf("m68k_wram w16: [%06x] %04x @%06x", a, d, SekPc);\r
d0d47c5b 790 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
fa1e5e29 791 int bank = Pico_mcd->s68k_regs[3]&1;\r
792 if (a >= 0x220000)\r
793 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged\r
794 else a &= 0x1fffe;\r
795 *(u16 *)(Pico_mcd->word_ram1M[bank]+a)=d;\r
d0d47c5b 796 } else {\r
797 // allow access in any mode, like Gens does\r
fa1e5e29 798 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;\r
d0d47c5b 799 }\r
800 return;\r
801 }\r
802\r
7a1f6e45 803 // regs\r
804 if ((a&0xffffc0)==0xa12000) {\r
c459aefd 805 rdprintf("m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);\r
7a1f6e45 806 if (a == 0xe) { // special case, 2 byte writes would be handled differently\r
807 Pico_mcd->s68k_regs[0xe] = d >> 8;\r
808#ifdef USE_POLL_DETECT\r
809 if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {\r
6cadc2da 810 SekSetStopS68k(0); s68k_poll_adclk = 0;\r
8f8fe01e 811 elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r
7a1f6e45 812 }\r
813#endif\r
814 return;\r
815 }\r
816 m68k_reg_write8(a, d>>8);\r
817 m68k_reg_write8(a+1,d&0xff);\r
818 return;\r
819 }\r
cc68a136 820\r
b542be46 821 // VDP\r
822 if ((a&0xe700e0)==0xc00000) {\r
823 PicoVideoWrite(a,(u16)d);\r
824 return;\r
825 }\r
826\r
cc68a136 827 OtherWrite16(a,d);\r
828}\r
4ff2d527 829#endif\r
cc68a136 830\r
ab0607f7 831\r
4ff2d527 832#ifdef _ASM_CD_MEMORY_C\r
833void PicoWriteM68k32(u32 a,u32 d);\r
834#else\r
835static void PicoWriteM68k32(u32 a,u32 d)\r
cc68a136 836{\r
ca61ee42 837 elprintf(EL_IO, "w32: %06x, %08x", a&0xffffff, d);\r
b5e5172d 838#ifdef EMU_CORE_DEBUG\r
839 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
840#endif\r
cc68a136 841\r
842 if ((a&0xe00000)==0xe00000)\r
843 {\r
844 // Ram:\r
845 u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));\r
846 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
847 return;\r
848 }\r
849\r
cc68a136 850 // prg RAM\r
721cd396 851 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {\r
672ad671 852 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
cc68a136 853 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));\r
854 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
855 return;\r
856 }\r
857\r
b542be46 858 a&=0xfffffe;\r
859\r
672ad671 860 // word RAM\r
d0d47c5b 861 if ((a&0xfc0000)==0x200000) {\r
862 if (d != 0) // don't log clears\r
913ef4b7 863 wrdprintf("m68k_wram w32: [%06x] %08x @%06x", a, d, SekPc);\r
d0d47c5b 864 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
fa1e5e29 865 int bank = Pico_mcd->s68k_regs[3]&1;\r
866 if (a >= 0x220000) { // cell arranged\r
867 u32 a1, a2;\r
868 a1 = (a&2) | (cell_map(a >> 2) << 2);\r
4ff2d527 869 if (a&2) a2 = cell_map((a+2) >> 2) << 2;\r
870 else a2 = a1 + 2;\r
871 *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) = d >> 16;\r
872 *(u16 *)(Pico_mcd->word_ram1M[bank]+a2) = d;\r
bf098bc5 873 } else {\r
fa1e5e29 874 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
875 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
bf098bc5 876 }\r
d0d47c5b 877 } else {\r
878 // allow access in any mode, like Gens does\r
fa1e5e29 879 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
d0d47c5b 880 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
881 }\r
672ad671 882 return;\r
d0d47c5b 883 }\r
672ad671 884\r
2433f409 885 if ((a&0xffffc0)==0xa12000) {\r
c459aefd 886 rdprintf("m68k_regs w32: [%02x] %08x @%06x", a&0x3f, d, SekPc);\r
2433f409 887 if ((a&0x3e) == 0xe) dprintf("m68k FIXME: w32 [%02x]", a&0x3f);\r
888 }\r
cc68a136 889\r
b542be46 890 // VDP\r
891 if ((a&0xe700e0)==0xc00000)\r
892 {\r
893 PicoVideoWrite(a, (u16)(d>>16));\r
894 PicoVideoWrite(a+2,(u16)d);\r
895 return;\r
896 }\r
897\r
cc68a136 898 OtherWrite16(a, (u16)(d>>16));\r
899 OtherWrite16(a+2,(u16)d);\r
900}\r
4ff2d527 901#endif\r
cc68a136 902\r
903\r
721cd396 904// -----------------------------------------------------------------\r
905// S68k\r
cc68a136 906// -----------------------------------------------------------------\r
907\r
4ff2d527 908#ifdef _ASM_CD_MEMORY_C\r
0af33fe0 909u32 PicoReadS68k8(u32 a);\r
4ff2d527 910#else\r
0af33fe0 911static u32 PicoReadS68k8(u32 a)\r
cc68a136 912{\r
913 u32 d=0;\r
914\r
b5e5172d 915#ifdef EMU_CORE_DEBUG\r
916 u32 ab=a&0xfffffe;\r
917#endif\r
cc68a136 918 a&=0xffffff;\r
919\r
920 // prg RAM\r
921 if (a < 0x80000) {\r
922 d = *(Pico_mcd->prg_ram+(a^1));\r
923 goto end;\r
924 }\r
925\r
926 // regs\r
927 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 928 a &= 0x1ff;\r
929 rdprintf("s68k_regs r8: [%02x] @ %06x", a, SekPcS68k);\r
2433f409 930 if (a >= 0x0e && a < 0x30) {\r
931 d = Pico_mcd->s68k_regs[a];\r
932 s68k_poll_detect(a, d);\r
933 rdprintf("ret = %02x", (u8)d);\r
934 goto end;\r
935 }\r
936 else if (a >= 0x58 && a < 0x68)\r
cb4a513a 937 d = gfx_cd_read(a&~1);\r
938 else d = s68k_reg_read16(a&~1);\r
939 if ((a&1)==0) d>>=8;\r
c459aefd 940 rdprintf("ret = %02x", (u8)d);\r
cc68a136 941 goto end;\r
942 }\r
943\r
d0d47c5b 944 // word RAM (2M area)\r
945 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
fa1e5e29 946 // test: batman returns\r
913ef4b7 947 wrdprintf("s68k_wram2M r8: [%06x] @%06x", a, SekPcS68k);\r
fa1e5e29 948 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
3aa1e148 949 int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 950 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];\r
951 if (a&1) d &= 0x0f;\r
952 else d >>= 4;\r
d0d47c5b 953 } else {\r
954 // allow access in any mode, like Gens does\r
fa1e5e29 955 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];\r
d0d47c5b 956 }\r
913ef4b7 957 wrdprintf("ret = %02x", (u8)d);\r
d0d47c5b 958 goto end;\r
959 }\r
960\r
961 // word RAM (1M area)\r
68cba51e 962 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
fa1e5e29 963 int bank;\r
913ef4b7 964 wrdprintf("s68k_wram1M r8: [%06x] @%06x", a, SekPcS68k);\r
68cba51e 965// if (!(Pico_mcd->s68k_regs[3]&4))\r
966// dprintf("s68k_wram1M FIXME: wrong mode");\r
3aa1e148 967 bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 968 d = Pico_mcd->word_ram1M[bank][(a^1)&0x1ffff];\r
913ef4b7 969 wrdprintf("ret = %02x", (u8)d);\r
d0d47c5b 970 goto end;\r
971 }\r
972\r
4f265db7 973 // PCM\r
974 if ((a&0xff8000)==0xff0000) {\r
ca61ee42 975 elprintf(EL_IO, "s68k_pcm r8: [%06x] @%06x", a, SekPcS68k);\r
4f265db7 976 a &= 0x7fff;\r
977 if (a >= 0x2000)\r
978 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];\r
979 else if (a >= 0x20) {\r
980 a &= 0x1e;\r
981 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r
982 if (a & 2) d >>= 8;\r
983 }\r
ca61ee42 984 elprintf(EL_IO, "ret = %02x", (u8)d);\r
4f265db7 985 goto end;\r
986 }\r
987\r
ab0607f7 988 // bram\r
989 if ((a&0xff0000)==0xfe0000) {\r
990 d = Pico_mcd->bram[(a>>1)&0x1fff];\r
991 goto end;\r
992 }\r
993\r
ca61ee42 994 elprintf(EL_UIO, "s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);\r
cc68a136 995\r
996 end:\r
997\r
ca61ee42 998 elprintf(EL_IO, "s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);\r
b5e5172d 999#ifdef EMU_CORE_DEBUG\r
1000 lastread_a = ab;\r
1001 lastread_d[lrp_cyc++&15] = d;\r
cc68a136 1002#endif\r
0af33fe0 1003 return d;\r
cc68a136 1004}\r
4ff2d527 1005#endif\r
cc68a136 1006\r
ab0607f7 1007\r
4ff2d527 1008#ifdef _ASM_CD_MEMORY_C\r
0af33fe0 1009u32 PicoReadS68k16(u32 a);\r
4ff2d527 1010#else\r
0af33fe0 1011static u32 PicoReadS68k16(u32 a)\r
cc68a136 1012{\r
4f265db7 1013 u32 d=0;\r
cc68a136 1014\r
b5e5172d 1015#ifdef EMU_CORE_DEBUG\r
1016 u32 ab=a&0xfffffe;\r
1017#endif\r
cc68a136 1018 a&=0xfffffe;\r
1019\r
1020 // prg RAM\r
1021 if (a < 0x80000) {\r
c008977e 1022 wrdprintf("s68k_prgram r16: [%06x] @%06x", a, SekPcS68k);\r
cc68a136 1023 d = *(u16 *)(Pico_mcd->prg_ram+a);\r
c008977e 1024 wrdprintf("ret = %04x", d);\r
cc68a136 1025 goto end;\r
1026 }\r
1027\r
1028 // regs\r
1029 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 1030 a &= 0x1fe;\r
1031 rdprintf("s68k_regs r16: [%02x] @ %06x", a, SekPcS68k);\r
913ef4b7 1032 if (a >= 0x58 && a < 0x68)\r
cb4a513a 1033 d = gfx_cd_read(a);\r
1034 else d = s68k_reg_read16(a);\r
c459aefd 1035 rdprintf("ret = %04x", d);\r
cc68a136 1036 goto end;\r
1037 }\r
1038\r
d0d47c5b 1039 // word RAM (2M area)\r
1040 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
913ef4b7 1041 wrdprintf("s68k_wram2M r16: [%06x] @%06x", a, SekPcS68k);\r
fa1e5e29 1042 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
3aa1e148 1043 int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1044 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];\r
1045 d |= d << 4; d &= ~0xf0;\r
d0d47c5b 1046 } else {\r
1047 // allow access in any mode, like Gens does\r
fa1e5e29 1048 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
d0d47c5b 1049 }\r
913ef4b7 1050 wrdprintf("ret = %04x", d);\r
d0d47c5b 1051 goto end;\r
1052 }\r
1053\r
1054 // word RAM (1M area)\r
68cba51e 1055 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
fa1e5e29 1056 int bank;\r
913ef4b7 1057 wrdprintf("s68k_wram1M r16: [%06x] @%06x", a, SekPcS68k);\r
68cba51e 1058// if (!(Pico_mcd->s68k_regs[3]&4))\r
1059// dprintf("s68k_wram1M FIXME: wrong mode");\r
3aa1e148 1060 bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1061 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
913ef4b7 1062 wrdprintf("ret = %04x", d);\r
ab0607f7 1063 goto end;\r
1064 }\r
1065\r
1066 // bram\r
1067 if ((a&0xff0000)==0xfe0000) {\r
4ff2d527 1068 dprintf("FIXME: s68k_bram r16: [%06x] @%06x", a, SekPcS68k);\r
ab0607f7 1069 a = (a>>1)&0x1fff;\r
4f265db7 1070 d = Pico_mcd->bram[a++]; // Gens does little endian here, and so do we..\r
4ff2d527 1071 d|= Pico_mcd->bram[a++] << 8; // This is most likely wrong\r
ab0607f7 1072 dprintf("ret = %04x", d);\r
d0d47c5b 1073 goto end;\r
1074 }\r
1075\r
4f265db7 1076 // PCM\r
1077 if ((a&0xff8000)==0xff0000) {\r
4ff2d527 1078 dprintf("FIXME: s68k_pcm r16: [%06x] @%06x", a, SekPcS68k);\r
4f265db7 1079 a &= 0x7fff;\r
1080 if (a >= 0x2000)\r
1081 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];\r
1082 else if (a >= 0x20) {\r
1083 a &= 0x1e;\r
1084 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r
1085 if (a & 2) d >>= 8;\r
1086 }\r
1087 dprintf("ret = %04x", d);\r
1088 goto end;\r
1089 }\r
1090\r
ca61ee42 1091 elprintf(EL_UIO, "s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
cc68a136 1092\r
1093 end:\r
1094\r
ca61ee42 1095 elprintf(EL_IO, "s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
b5e5172d 1096#ifdef EMU_CORE_DEBUG\r
1097 lastread_a = ab;\r
1098 lastread_d[lrp_cyc++&15] = d;\r
cc68a136 1099#endif\r
1100 return d;\r
1101}\r
4ff2d527 1102#endif\r
cc68a136 1103\r
ab0607f7 1104\r
4ff2d527 1105#ifdef _ASM_CD_MEMORY_C\r
1106u32 PicoReadS68k32(u32 a);\r
1107#else\r
1108static u32 PicoReadS68k32(u32 a)\r
cc68a136 1109{\r
1110 u32 d=0;\r
1111\r
b5e5172d 1112#ifdef EMU_CORE_DEBUG\r
1113 u32 ab=a&0xfffffe;\r
1114#endif\r
cc68a136 1115 a&=0xfffffe;\r
1116\r
1117 // prg RAM\r
1118 if (a < 0x80000) {\r
1119 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);\r
1120 d = (pm[0]<<16)|pm[1];\r
1121 goto end;\r
1122 }\r
1123\r
1124 // regs\r
1125 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 1126 a &= 0x1fe;\r
1127 rdprintf("s68k_regs r32: [%02x] @ %06x", a, SekPcS68k);\r
913ef4b7 1128 if (a >= 0x58 && a < 0x68)\r
cb4a513a 1129 d = (gfx_cd_read(a)<<16)|gfx_cd_read(a+2);\r
1130 else d = (s68k_reg_read16(a)<<16)|s68k_reg_read16(a+2);\r
c459aefd 1131 rdprintf("ret = %08x", d);\r
cc68a136 1132 goto end;\r
1133 }\r
1134\r
d0d47c5b 1135 // word RAM (2M area)\r
1136 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
913ef4b7 1137 wrdprintf("s68k_wram2M r32: [%06x] @%06x", a, SekPcS68k);\r
fa1e5e29 1138 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
3aa1e148 1139 int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1140 a >>= 1;\r
1141 d = Pico_mcd->word_ram1M[bank][((a+0)^1)&0x1ffff] << 16;\r
1142 d |= Pico_mcd->word_ram1M[bank][((a+1)^1)&0x1ffff];\r
1143 d |= d << 4; d &= 0x0f0f0f0f;\r
d0d47c5b 1144 } else {\r
1145 // allow access in any mode, like Gens does\r
fa1e5e29 1146 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];\r
d0d47c5b 1147 }\r
913ef4b7 1148 wrdprintf("ret = %08x", d);\r
d0d47c5b 1149 goto end;\r
1150 }\r
1151\r
1152 // word RAM (1M area)\r
68cba51e 1153 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
fa1e5e29 1154 int bank;\r
913ef4b7 1155 wrdprintf("s68k_wram1M r32: [%06x] @%06x", a, SekPcS68k);\r
68cba51e 1156// if (!(Pico_mcd->s68k_regs[3]&4))\r
1157// dprintf("s68k_wram1M FIXME: wrong mode");\r
3aa1e148 1158 bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1159 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];\r
913ef4b7 1160 wrdprintf("ret = %08x", d);\r
ab0607f7 1161 goto end;\r
1162 }\r
1163\r
4f265db7 1164 // PCM\r
1165 if ((a&0xff8000)==0xff0000) {\r
2433f409 1166 dprintf("s68k_pcm r32: [%06x] @%06x", a, SekPcS68k);\r
4f265db7 1167 a &= 0x7fff;\r
1168 if (a >= 0x2000) {\r
1169 a >>= 1;\r
1170 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] << 16;\r
1171 d |= Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff];\r
1172 } else if (a >= 0x20) {\r
1173 a &= 0x1e;\r
1174 if (a & 2) {\r
1175 a >>= 2;\r
1176 d = (Pico_mcd->pcm.ch[a].addr >> (PCM_STEP_SHIFT-8)) & 0xff0000;\r
1177 d |= (Pico_mcd->pcm.ch[(a+1)&7].addr >> PCM_STEP_SHIFT) & 0xff;\r
1178 } else {\r
1179 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r
1180 d = ((d<<16)&0xff0000) | ((d>>8)&0xff); // PCM chip is LE\r
1181 }\r
1182 }\r
1183 dprintf("ret = %08x", d);\r
1184 goto end;\r
1185 }\r
1186\r
ab0607f7 1187 // bram\r
1188 if ((a&0xff0000)==0xfe0000) {\r
4ff2d527 1189 dprintf("FIXME: s68k_bram r32: [%06x] @%06x", a, SekPcS68k);\r
ab0607f7 1190 a = (a>>1)&0x1fff;\r
1191 d = Pico_mcd->bram[a++] << 16; // middle endian? TODO: verify against Fusion..\r
1192 d|= Pico_mcd->bram[a++] << 24;\r
1193 d|= Pico_mcd->bram[a++];\r
1194 d|= Pico_mcd->bram[a++] << 8;\r
1195 dprintf("ret = %08x", d);\r
d0d47c5b 1196 goto end;\r
1197 }\r
1198\r
ca61ee42 1199 elprintf(EL_UIO, "s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
cc68a136 1200\r
1201 end:\r
1202\r
ca61ee42 1203 elprintf(EL_IO, "s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
b5e5172d 1204#ifdef EMU_CORE_DEBUG\r
1205 if (ab > 0x78) { // not vectors and stuff\r
1206 lastread_a = ab;\r
1207 lastread_d[lrp_cyc++&15] = d;\r
1208 }\r
cc68a136 1209#endif\r
1210 return d;\r
1211}\r
4ff2d527 1212#endif\r
cc68a136 1213\r
ab0607f7 1214\r
a4030801 1215#ifndef _ASM_CD_MEMORY_C\r
0a051f55 1216/* check: jaguar xj 220 (draws entire world using decode) */\r
1217static void decode_write8(u32 a, u8 d, int r3)\r
1218{\r
3aa1e148 1219 u8 *pd = Pico_mcd->word_ram1M[(r3 & 1)^1] + (((a>>1)^1)&0x1ffff);\r
0a051f55 1220 u8 oldmask = (a&1) ? 0xf0 : 0x0f;\r
1221\r
0a051f55 1222 r3 &= 0x18;\r
1223 d &= 0x0f;\r
1224 if (!(a&1)) d <<= 4;\r
1225\r
0a051f55 1226 if (r3 == 8) {\r
1227 if ((!(*pd & (~oldmask))) && d) goto do_it;\r
1228 } else if (r3 > 8) {\r
1229 if (d) goto do_it;\r
1230 } else {\r
1231 goto do_it;\r
1232 }\r
1233\r
1234 return;\r
1235do_it:\r
1236 *pd = d | (*pd & oldmask);\r
1237}\r
1238\r
1239\r
1240static void decode_write16(u32 a, u16 d, int r3)\r
1241{\r
3aa1e148 1242 u8 *pd = Pico_mcd->word_ram1M[(r3 & 1)^1] + (((a>>1)^1)&0x1ffff);\r
0a051f55 1243\r
1244 //if ((a & 0x3ffff) < 0x28000) return;\r
1245\r
1246 r3 &= 0x18;\r
1247 d &= 0x0f0f;\r
1248 d |= d >> 4;\r
1249\r
1250 if (r3 == 8) {\r
1251 u8 dold = *pd;\r
1252 if (!(dold & 0xf0)) dold |= d & 0xf0;\r
1253 if (!(dold & 0x0f)) dold |= d & 0x0f;\r
1254 *pd = dold;\r
1255 } else if (r3 > 8) {\r
1256 u8 dold = *pd;\r
1257 if (!(d & 0xf0)) d |= dold & 0xf0;\r
1258 if (!(d & 0x0f)) d |= dold & 0x0f;\r
1259 *pd = d;\r
1260 } else {\r
1261 *pd = d;\r
1262 }\r
0a051f55 1263}\r
a4030801 1264#endif\r
0a051f55 1265\r
cc68a136 1266// -----------------------------------------------------------------\r
1267\r
4ff2d527 1268#ifdef _ASM_CD_MEMORY_C\r
1269void PicoWriteS68k8(u32 a,u8 d);\r
1270#else\r
1271static void PicoWriteS68k8(u32 a,u8 d)\r
cc68a136 1272{\r
ca61ee42 1273 elprintf(EL_IO, "s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);\r
cc68a136 1274\r
1275 a&=0xffffff;\r
1276\r
b5e5172d 1277#ifdef EMU_CORE_DEBUG\r
1278 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
1279#endif\r
1280\r
cc68a136 1281 // prg RAM\r
1282 if (a < 0x80000) {\r
1283 u8 *pm=(u8 *)(Pico_mcd->prg_ram+(a^1));\r
721cd396 1284 if (a >= (Pico_mcd->s68k_regs[2]<<8)) *pm=d;\r
cc68a136 1285 return;\r
1286 }\r
1287\r
1288 // regs\r
1289 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 1290 a &= 0x1ff;\r
1291 rdprintf("s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k);\r
913ef4b7 1292 if (a >= 0x58 && a < 0x68)\r
48e8482f 1293 gfx_cd_write16(a&~1, (d<<8)|d);\r
cb4a513a 1294 else s68k_reg_write8(a,d);\r
cc68a136 1295 return;\r
1296 }\r
1297\r
d0d47c5b 1298 // word RAM (2M area)\r
1299 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
0a051f55 1300 int r3 = Pico_mcd->s68k_regs[3];\r
913ef4b7 1301 wrdprintf("s68k_wram2M w8: [%06x] %02x @%06x", a, d, SekPcS68k);\r
0a051f55 1302 if (r3 & 4) { // 1M decode mode?\r
1303 decode_write8(a, d, r3);\r
d0d47c5b 1304 } else {\r
1305 // allow access in any mode, like Gens does\r
fa1e5e29 1306 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;\r
d0d47c5b 1307 }\r
1308 return;\r
1309 }\r
1310\r
1311 // word RAM (1M area)\r
68cba51e 1312 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
1313 // Wing Commander tries to write here in wrong mode\r
fa1e5e29 1314 int bank;\r
d0d47c5b 1315 if (d)\r
913ef4b7 1316 wrdprintf("s68k_wram1M w8: [%06x] %02x @%06x", a, d, SekPcS68k);\r
68cba51e 1317// if (!(Pico_mcd->s68k_regs[3]&4))\r
1318// dprintf("s68k_wram1M FIXME: wrong mode");\r
3aa1e148 1319 bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1320 *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff))=d;\r
d0d47c5b 1321 return;\r
1322 }\r
1323\r
4f265db7 1324 // PCM\r
1325 if ((a&0xff8000)==0xff0000) {\r
1326 a &= 0x7fff;\r
1327 if (a >= 0x2000)\r
1328 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;\r
1329 else if (a < 0x12)\r
1330 pcm_write(a>>1, d);\r
1331 return;\r
1332 }\r
1333\r
ab0607f7 1334 // bram\r
1335 if ((a&0xff0000)==0xfe0000) {\r
1336 Pico_mcd->bram[(a>>1)&0x1fff] = d;\r
1337 SRam.changed = 1;\r
1338 return;\r
1339 }\r
1340\r
ca61ee42 1341 elprintf(EL_UIO, "s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);\r
cc68a136 1342}\r
4ff2d527 1343#endif\r
cc68a136 1344\r
ab0607f7 1345\r
4ff2d527 1346#ifdef _ASM_CD_MEMORY_C\r
1347void PicoWriteS68k16(u32 a,u16 d);\r
1348#else\r
1349static void PicoWriteS68k16(u32 a,u16 d)\r
cc68a136 1350{\r
ca61ee42 1351 elprintf(EL_IO, "s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
cc68a136 1352\r
1353 a&=0xfffffe;\r
1354\r
b5e5172d 1355#ifdef EMU_CORE_DEBUG\r
1356 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
1357#endif\r
1358\r
cc68a136 1359 // prg RAM\r
1360 if (a < 0x80000) {\r
c008977e 1361 wrdprintf("s68k_prgram w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
721cd396 1362 if (a >= (Pico_mcd->s68k_regs[2]<<8)) // needed for Dungeon Explorer\r
1363 *(u16 *)(Pico_mcd->prg_ram+a)=d;\r
cc68a136 1364 return;\r
1365 }\r
1366\r
1367 // regs\r
1368 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 1369 a &= 0x1fe;\r
1370 rdprintf("s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k);\r
913ef4b7 1371 if (a >= 0x58 && a < 0x68)\r
48e8482f 1372 gfx_cd_write16(a, d);\r
cb4a513a 1373 else {\r
1cd356a3 1374 if (a == 0xe) { // special case, 2 byte writes would be handled differently\r
1375 Pico_mcd->s68k_regs[0xf] = d;\r
4ff2d527 1376 return;\r
1cd356a3 1377 }\r
cb4a513a 1378 s68k_reg_write8(a, d>>8);\r
1379 s68k_reg_write8(a+1,d&0xff);\r
1380 }\r
cc68a136 1381 return;\r
1382 }\r
1383\r
d0d47c5b 1384 // word RAM (2M area)\r
1385 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
0a051f55 1386 int r3 = Pico_mcd->s68k_regs[3];\r
913ef4b7 1387 wrdprintf("s68k_wram2M w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
0a051f55 1388 if (r3 & 4) { // 1M decode mode?\r
1389 decode_write16(a, d, r3);\r
d0d47c5b 1390 } else {\r
1391 // allow access in any mode, like Gens does\r
fa1e5e29 1392 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;\r
d0d47c5b 1393 }\r
1394 return;\r
1395 }\r
1396\r
1397 // word RAM (1M area)\r
68cba51e 1398 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
fa1e5e29 1399 int bank;\r
d0d47c5b 1400 if (d)\r
913ef4b7 1401 wrdprintf("s68k_wram1M w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
68cba51e 1402// if (!(Pico_mcd->s68k_regs[3]&4))\r
1403// dprintf("s68k_wram1M FIXME: wrong mode");\r
3aa1e148 1404 bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1405 *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe))=d;\r
d0d47c5b 1406 return;\r
1407 }\r
1408\r
4f265db7 1409 // PCM\r
1410 if ((a&0xff8000)==0xff0000) {\r
1411 a &= 0x7fff;\r
1412 if (a >= 0x2000)\r
1413 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;\r
1414 else if (a < 0x12)\r
1415 pcm_write(a>>1, d & 0xff);\r
1416 return;\r
1417 }\r
1418\r
ab0607f7 1419 // bram\r
1420 if ((a&0xff0000)==0xfe0000) {\r
1cd356a3 1421 dprintf("s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
ab0607f7 1422 a = (a>>1)&0x1fff;\r
1423 Pico_mcd->bram[a++] = d; // Gens does little endian here, an so do we..\r
1424 Pico_mcd->bram[a++] = d >> 8;\r
1425 SRam.changed = 1;\r
1426 return;\r
1427 }\r
1428\r
ca61ee42 1429 elprintf(EL_UIO, "s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
cc68a136 1430}\r
4ff2d527 1431#endif\r
cc68a136 1432\r
ab0607f7 1433\r
4ff2d527 1434#ifdef _ASM_CD_MEMORY_C\r
1435void PicoWriteS68k32(u32 a,u32 d);\r
1436#else\r
1437static void PicoWriteS68k32(u32 a,u32 d)\r
cc68a136 1438{\r
ca61ee42 1439 elprintf(EL_IO, "s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
cc68a136 1440\r
1441 a&=0xfffffe;\r
1442\r
b5e5172d 1443#ifdef EMU_CORE_DEBUG\r
1444 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
1445#endif\r
1446\r
cc68a136 1447 // prg RAM\r
1448 if (a < 0x80000) {\r
721cd396 1449 if (a >= (Pico_mcd->s68k_regs[2]<<8)) {\r
1450 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);\r
1451 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
1452 }\r
cc68a136 1453 return;\r
1454 }\r
1455\r
1456 // regs\r
1457 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 1458 a &= 0x1fe;\r
1459 rdprintf("s68k_regs w32: [%02x] %08x @ %06x", a, d, SekPcS68k);\r
913ef4b7 1460 if (a >= 0x58 && a < 0x68) {\r
48e8482f 1461 gfx_cd_write16(a, d>>16);\r
1462 gfx_cd_write16(a+2, d&0xffff);\r
cb4a513a 1463 } else {\r
2433f409 1464 if ((a&0x1fe) == 0xe) dprintf("s68k FIXME: w32 [%02x]", a&0x3f);\r
cb4a513a 1465 s68k_reg_write8(a, d>>24);\r
1466 s68k_reg_write8(a+1,(d>>16)&0xff);\r
1467 s68k_reg_write8(a+2,(d>>8) &0xff);\r
1468 s68k_reg_write8(a+3, d &0xff);\r
1469 }\r
cc68a136 1470 return;\r
1471 }\r
1472\r
d0d47c5b 1473 // word RAM (2M area)\r
1474 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
0a051f55 1475 int r3 = Pico_mcd->s68k_regs[3];\r
913ef4b7 1476 wrdprintf("s68k_wram2M w32: [%06x] %08x @%06x", a, d, SekPcS68k);\r
0a051f55 1477 if (r3 & 4) { // 1M decode mode?\r
1478 decode_write16(a , d >> 16, r3);\r
1479 decode_write16(a+2, d , r3);\r
d0d47c5b 1480 } else {\r
1481 // allow access in any mode, like Gens does\r
fa1e5e29 1482 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
d0d47c5b 1483 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
1484 }\r
1485 return;\r
1486 }\r
1487\r
1488 // word RAM (1M area)\r
68cba51e 1489 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
fa1e5e29 1490 int bank;\r
1491 u16 *pm;\r
d0d47c5b 1492 if (d)\r
913ef4b7 1493 wrdprintf("s68k_wram1M w32: [%06x] %08x @%06x", a, d, SekPcS68k);\r
68cba51e 1494// if (!(Pico_mcd->s68k_regs[3]&4))\r
1495// dprintf("s68k_wram1M FIXME: wrong mode");\r
3aa1e148 1496 bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1497 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1498 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
d0d47c5b 1499 return;\r
1500 }\r
ab0607f7 1501\r
4f265db7 1502 // PCM\r
1503 if ((a&0xff8000)==0xff0000) {\r
1504 a &= 0x7fff;\r
1505 if (a >= 0x2000) {\r
1506 a >>= 1;\r
1507 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] = (d >> 16);\r
1508 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff] = d;\r
1509 } else if (a < 0x12) {\r
1510 a >>= 1;\r
1511 pcm_write(a, (d>>16) & 0xff);\r
1512 pcm_write(a+1, d & 0xff);\r
1513 }\r
1514 return;\r
1515 }\r
1516\r
ab0607f7 1517 // bram\r
1518 if ((a&0xff0000)==0xfe0000) {\r
1cd356a3 1519 dprintf("s68k_bram w32: [%06x] %08x @%06x", a, d, SekPcS68k);\r
ab0607f7 1520 a = (a>>1)&0x1fff;\r
1521 Pico_mcd->bram[a++] = d >> 16; // middle endian? verify?\r
1522 Pico_mcd->bram[a++] = d >> 24;\r
1523 Pico_mcd->bram[a++] = d;\r
1524 Pico_mcd->bram[a++] = d >> 8;\r
1525 SRam.changed = 1;\r
1526 return;\r
1527 }\r
1528\r
ca61ee42 1529 elprintf(EL_UIO, "s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
cc68a136 1530}\r
4ff2d527 1531#endif\r
cc68a136 1532\r
1533\r
1534// -----------------------------------------------------------------\r
1535\r
b837b69b 1536\r
3aa1e148 1537#ifdef EMU_C68K\r
b837b69b 1538static __inline int PicoMemBaseM68k(u32 pc)\r
1539{\r
fa1e5e29 1540 if ((pc&0xe00000)==0xe00000)\r
1541 return (int)Pico.ram-(pc&0xff0000); // Program Counter in Ram\r
b837b69b 1542\r
1543 if (pc < 0x20000)\r
fa1e5e29 1544 return (int)Pico_mcd->bios; // Program Counter in BIOS\r
1545\r
1546 if ((pc&0xfc0000)==0x200000)\r
b837b69b 1547 {\r
fa1e5e29 1548 if (!(Pico_mcd->s68k_regs[3]&4))\r
1549 return (int)Pico_mcd->word_ram2M - 0x200000; // Program Counter in Word Ram\r
1550 if (pc < 0x220000) {\r
3aa1e148 1551 int bank = Pico_mcd->s68k_regs[3]&1;\r
fa1e5e29 1552 return (int)Pico_mcd->word_ram1M[bank] - 0x200000;\r
1553 }\r
b837b69b 1554 }\r
1555\r
fa1e5e29 1556 // Error - Program Counter is invalid\r
ca61ee42 1557 elprintf(EL_ANOMALY, "m68k FIXME: unhandled jump to %06x", pc);\r
fa1e5e29 1558\r
1559 return (int)Pico_mcd->bios;\r
b837b69b 1560}\r
1561\r
1562\r
1563static u32 PicoCheckPcM68k(u32 pc)\r
1564{\r
3aa1e148 1565 pc-=PicoCpuCM68k.membase; // Get real pc\r
b837b69b 1566 pc&=0xfffffe;\r
1567\r
3aa1e148 1568 PicoCpuCM68k.membase=PicoMemBaseM68k(pc);\r
b837b69b 1569\r
3aa1e148 1570 return PicoCpuCM68k.membase+pc;\r
b837b69b 1571}\r
1572\r
1573\r
1574static __inline int PicoMemBaseS68k(u32 pc)\r
1575{\r
fa1e5e29 1576 if (pc < 0x80000) // PRG RAM\r
1577 return (int)Pico_mcd->prg_ram;\r
b837b69b 1578\r
fa1e5e29 1579 if ((pc&0xfc0000)==0x080000) // WORD RAM 2M area (assume we are in the right mode..)\r
1580 return (int)Pico_mcd->word_ram2M - 0x080000;\r
1581\r
1582 if ((pc&0xfe0000)==0x0c0000) { // word RAM 1M area\r
3aa1e148 1583 int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1584 return (int)Pico_mcd->word_ram1M[bank] - 0x0c0000;\r
b837b69b 1585 }\r
1586\r
fa1e5e29 1587 // Error - Program Counter is invalid\r
ca61ee42 1588 elprintf(EL_ANOMALY, "s68k FIXME: unhandled jump to %06x", pc);\r
fa1e5e29 1589\r
1590 return (int)Pico_mcd->prg_ram;\r
b837b69b 1591}\r
1592\r
1593\r
1594static u32 PicoCheckPcS68k(u32 pc)\r
1595{\r
3aa1e148 1596 pc-=PicoCpuCS68k.membase; // Get real pc\r
b837b69b 1597 pc&=0xfffffe;\r
1598\r
3aa1e148 1599 PicoCpuCS68k.membase=PicoMemBaseS68k(pc);\r
b837b69b 1600\r
3aa1e148 1601 return PicoCpuCS68k.membase+pc;\r
b837b69b 1602}\r
1603#endif\r
1604\r
3aa1e148 1605#ifndef _ASM_CD_MEMORY_C\r
1606void PicoMemResetCD(int r3)\r
1607{\r
1608#ifdef EMU_F68K\r
1609 // update fetchmap..\r
1610 int i;\r
1611 if (!(r3 & 4))\r
1612 {\r
1613 for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x240000; i++)\r
1614 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram2M - 0x200000;\r
1615 }\r
1616 else\r
1617 {\r
1618 for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x220000; i++)\r
1619 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram1M[r3 & 1] - 0x200000;\r
1620 for (i = M68K_FETCHBANK1*0x0c/0x100; (i<<(24-FAMEC_FETCHBITS)) < 0x0e0000; i++)\r
1621 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram1M[(r3&1)^1] - 0x0c0000;\r
1622 }\r
1623#endif\r
1624}\r
1625#endif\r
b837b69b 1626\r
eff55556 1627PICO_INTERNAL void PicoMemSetupCD(void)\r
b837b69b 1628{\r
b837b69b 1629#ifdef EMU_C68K\r
1630 // Setup m68k memory callbacks:\r
3aa1e148 1631 PicoCpuCM68k.checkpc=PicoCheckPcM68k;\r
1632 PicoCpuCM68k.fetch8 =PicoCpuCM68k.read8 =PicoReadM68k8;\r
1633 PicoCpuCM68k.fetch16=PicoCpuCM68k.read16=PicoReadM68k16;\r
1634 PicoCpuCM68k.fetch32=PicoCpuCM68k.read32=PicoReadM68k32;\r
1635 PicoCpuCM68k.write8 =PicoWriteM68k8;\r
1636 PicoCpuCM68k.write16=PicoWriteM68k16;\r
1637 PicoCpuCM68k.write32=PicoWriteM68k32;\r
b837b69b 1638 // s68k\r
3aa1e148 1639 PicoCpuCS68k.checkpc=PicoCheckPcS68k;\r
1640 PicoCpuCS68k.fetch8 =PicoCpuCS68k.read8 =PicoReadS68k8;\r
1641 PicoCpuCS68k.fetch16=PicoCpuCS68k.read16=PicoReadS68k16;\r
1642 PicoCpuCS68k.fetch32=PicoCpuCS68k.read32=PicoReadS68k32;\r
1643 PicoCpuCS68k.write8 =PicoWriteS68k8;\r
1644 PicoCpuCS68k.write16=PicoWriteS68k16;\r
1645 PicoCpuCS68k.write32=PicoWriteS68k32;\r
b837b69b 1646#endif\r
3aa1e148 1647#ifdef EMU_F68K\r
1648 // m68k\r
1649 PicoCpuFM68k.read_byte =PicoReadM68k8;\r
1650 PicoCpuFM68k.read_word =PicoReadM68k16;\r
1651 PicoCpuFM68k.read_long =PicoReadM68k32;\r
1652 PicoCpuFM68k.write_byte=PicoWriteM68k8;\r
1653 PicoCpuFM68k.write_word=PicoWriteM68k16;\r
1654 PicoCpuFM68k.write_long=PicoWriteM68k32;\r
1655 // s68k\r
1656 PicoCpuFS68k.read_byte =PicoReadS68k8;\r
1657 PicoCpuFS68k.read_word =PicoReadS68k16;\r
1658 PicoCpuFS68k.read_long =PicoReadS68k32;\r
1659 PicoCpuFS68k.write_byte=PicoWriteS68k8;\r
1660 PicoCpuFS68k.write_word=PicoWriteS68k16;\r
1661 PicoCpuFS68k.write_long=PicoWriteS68k32;\r
1662\r
1663 // setup FAME fetchmap\r
1664 {\r
1665 int i;\r
1666 // M68k\r
1667 // by default, point everything to fitst 64k of ROM (BIOS)\r
1668 for (i = 0; i < M68K_FETCHBANK1; i++)\r
1669 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r
1670 // now real ROM (BIOS)\r
1671 for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)\r
1672 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom;\r
1673 // .. and RAM\r
1674 for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)\r
1675 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.ram - (i<<(24-FAMEC_FETCHBITS));\r
1676 // S68k\r
1677 // PRG RAM is default\r
1678 for (i = 0; i < M68K_FETCHBANK1; i++)\r
1679 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->prg_ram - (i<<(24-FAMEC_FETCHBITS));\r
1680 // real PRG RAM\r
1681 for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0x80000; i++)\r
1682 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->prg_ram;\r
1683 // WORD RAM 2M area\r
1684 for (i = M68K_FETCHBANK1*0x08/0x100; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0xc0000; i++)\r
1685 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram2M - 0x80000;\r
1686 // PicoMemResetCD() will setup word ram for both\r
1687 }\r
1688#endif\r
1689\r
7a1f6e45 1690 // m68k_poll_addr = m68k_poll_cnt = 0;\r
1691 s68k_poll_adclk = s68k_poll_cnt = 0;\r
b837b69b 1692}\r
1693\r
1694\r
cc68a136 1695#ifdef EMU_M68K\r
1696unsigned char PicoReadCD8w (unsigned int a) {\r
3aa1e148 1697 return m68ki_cpu_p == &PicoCpuMS68k ? PicoReadS68k8(a) : PicoReadM68k8(a);\r
cc68a136 1698}\r
1699unsigned short PicoReadCD16w(unsigned int a) {\r
3aa1e148 1700 return m68ki_cpu_p == &PicoCpuMS68k ? PicoReadS68k16(a) : PicoReadM68k16(a);\r
cc68a136 1701}\r
1702unsigned int PicoReadCD32w(unsigned int a) {\r
3aa1e148 1703 return m68ki_cpu_p == &PicoCpuMS68k ? PicoReadS68k32(a) : PicoReadM68k32(a);\r
cc68a136 1704}\r
1705void PicoWriteCD8w (unsigned int a, unsigned char d) {\r
3aa1e148 1706 if (m68ki_cpu_p == &PicoCpuMS68k) PicoWriteS68k8(a, d); else PicoWriteM68k8(a, d);\r
cc68a136 1707}\r
1708void PicoWriteCD16w(unsigned int a, unsigned short d) {\r
3aa1e148 1709 if (m68ki_cpu_p == &PicoCpuMS68k) PicoWriteS68k16(a, d); else PicoWriteM68k16(a, d);\r
cc68a136 1710}\r
1711void PicoWriteCD32w(unsigned int a, unsigned int d) {\r
3aa1e148 1712 if (m68ki_cpu_p == &PicoCpuMS68k) PicoWriteS68k32(a, d); else PicoWriteM68k32(a, d);\r
cc68a136 1713}\r
1714\r
1715// these are allowed to access RAM\r
b5e5172d 1716unsigned int m68k_read_pcrelative_CD8 (unsigned int a)\r
1717{\r
cc68a136 1718 a&=0xffffff;\r
3aa1e148 1719 if(m68ki_cpu_p == &PicoCpuMS68k) {\r
cc68a136 1720 if (a < 0x80000) return *(u8 *)(Pico_mcd->prg_ram+(a^1)); // PRG Ram\r
fa1e5e29 1721 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)\r
1722 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));\r
1723 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)\r
3aa1e148 1724 int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1725 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));\r
1726 }\r
ca61ee42 1727 elprintf(EL_ANOMALY, "s68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);\r
cc68a136 1728 } else {\r
cc68a136 1729 if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram\r
fa1e5e29 1730 if(a<0x20000) return *(u8 *)(Pico.rom+(a^1)); // Bios\r
1731 if((a&0xfc0000)==0x200000) { // word RAM\r
1732 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?\r
1733 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));\r
1734 else if (a < 0x220000) {\r
1735 int bank = Pico_mcd->s68k_regs[3]&1;\r
1736 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));\r
1737 }\r
1738 }\r
ca61ee42 1739 elprintf(EL_ANOMALY, "m68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);\r
cc68a136 1740 }\r
1741 return 0;//(u8) lastread_d;\r
1742}\r
b5e5172d 1743unsigned int m68k_read_pcrelative_CD16(unsigned int a)\r
1744{\r
cc68a136 1745 a&=0xffffff;\r
3aa1e148 1746 if(m68ki_cpu_p == &PicoCpuMS68k) {\r
cc68a136 1747 if (a < 0x80000) return *(u16 *)(Pico_mcd->prg_ram+(a&~1)); // PRG Ram\r
fa1e5e29 1748 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)\r
1749 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
1750 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)\r
3aa1e148 1751 int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1752 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1753 }\r
ca61ee42 1754 elprintf(EL_ANOMALY, "s68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);\r
cc68a136 1755 } else {\r
cc68a136 1756 if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram\r
fa1e5e29 1757 if(a<0x20000) return *(u16 *)(Pico.rom+(a&~1)); // Bios\r
1758 if((a&0xfc0000)==0x200000) { // word RAM\r
1759 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?\r
1760 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
1761 else if (a < 0x220000) {\r
1762 int bank = Pico_mcd->s68k_regs[3]&1;\r
1763 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1764 }\r
1765 }\r
ca61ee42 1766 elprintf(EL_ANOMALY, "m68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);\r
cc68a136 1767 }\r
b837b69b 1768 return 0;\r
cc68a136 1769}\r
b5e5172d 1770unsigned int m68k_read_pcrelative_CD32(unsigned int a)\r
1771{\r
fa1e5e29 1772 u16 *pm;\r
cc68a136 1773 a&=0xffffff;\r
3aa1e148 1774 if(m68ki_cpu_p == &PicoCpuMS68k) {\r
cc68a136 1775 if (a < 0x80000) { u16 *pm=(u16 *)(Pico_mcd->prg_ram+(a&~1)); return (pm[0]<<16)|pm[1]; } // PRG Ram\r
fa1e5e29 1776 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)\r
1777 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }\r
1778 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)\r
3aa1e148 1779 int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1780 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1781 return (pm[0]<<16)|pm[1];\r
1782 }\r
ca61ee42 1783 elprintf(EL_ANOMALY, "s68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);\r
cc68a136 1784 } else {\r
cc68a136 1785 if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram\r
fa1e5e29 1786 if(a<0x20000) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }\r
1787 if((a&0xfc0000)==0x200000) { // word RAM\r
1788 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?\r
1789 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }\r
1790 else if (a < 0x220000) {\r
1791 int bank = Pico_mcd->s68k_regs[3]&1;\r
1792 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1793 return (pm[0]<<16)|pm[1];\r
1794 }\r
1795 }\r
ca61ee42 1796 elprintf(EL_ANOMALY, "m68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);\r
cc68a136 1797 }\r
b837b69b 1798 return 0;\r
cc68a136 1799}\r
1800#endif // EMU_M68K\r
1801\r
fast MegaDrive/MegaCD/32X emulator