[picodrive.git] / Pico / cd / Pico.c

// (c) Copyright 2007 notaz, All rights reserved.


#include "../PicoInt.h"


extern unsigned char formatted_bram[4*0x10];
extern unsigned int s68k_poll_adclk;

void (*PicoMCDopenTray)(void) = NULL;
int  (*PicoMCDcloseTray)(void) = NULL;

#define dump_ram(ram,fname) \
{ \
  int i, d; \
  FILE *f; \
\
  for (i = 0; i < sizeof(ram); i+=2) { \
    d = (ram[i]<<8) | ram[i+1]; \
    *(unsigned short *)(ram+i) = d; \
  } \
  f = fopen(fname, "wb"); \
  if (f) { \
    fwrite(ram, 1, sizeof(ram), f); \
    fclose(f); \
  } \
  for (i = 0; i < sizeof(ram); i+=2) { \
    d = (ram[i]<<8) | ram[i+1]; \
    *(unsigned short *)(ram+i) = d; \
  } \
}


PICO_INTERNAL int PicoInitMCD(void)
{
  SekInitS68k();
  Init_CD_Driver();

  return 0;
}


PICO_INTERNAL void PicoExitMCD(void)
{
  End_CD_Driver();

  //dump_ram(Pico_mcd->prg_ram, "prg.bin");
  //dump_ram(Pico.ram, "ram.bin");
}

PICO_INTERNAL int PicoResetMCD(int hard)
{
  if (hard) {
    int fmt_size = sizeof(formatted_bram);
    memset(Pico_mcd->prg_ram,    0, sizeof(Pico_mcd->prg_ram));
    memset(Pico_mcd->word_ram2M, 0, sizeof(Pico_mcd->word_ram2M));
    memset(Pico_mcd->pcm_ram,    0, sizeof(Pico_mcd->pcm_ram));
    memset(Pico_mcd->bram, 0, sizeof(Pico_mcd->bram));
    memcpy(Pico_mcd->bram + sizeof(Pico_mcd->bram) - fmt_size, formatted_bram, fmt_size);
  }
  memset(Pico_mcd->s68k_regs, 0, sizeof(Pico_mcd->s68k_regs));
  memset(&Pico_mcd->pcm, 0, sizeof(Pico_mcd->pcm));
  memset(&Pico_mcd->m, 0, sizeof(Pico_mcd->m));

  *(unsigned int *)(Pico_mcd->bios + 0x70) = 0xffffffff; // reset hint vector (simplest way to implement reg6)
  Pico_mcd->m.state_flags |= 1; // s68k reset pending
  Pico_mcd->s68k_regs[3] = 1; // 2M word RAM mode with m68k access after reset

  Reset_CD();
  LC89510_Reset();
  gfx_cd_reset();
#ifdef _ASM_CD_MEMORY_C
  PicoMemResetCD(1);
  //PicoMemResetCDdecode(1); // don't have to call this in 2M mode
#endif

  // use SRam.data for RAM cart
  if (SRam.data) free(SRam.data);
  SRam.data = NULL;
  if (PicoOpt&0x8000)
    SRam.data = calloc(1, 0x12000);

  return 0;
}

static __inline void SekRunM68k(int cyc)
{
  int cyc_do;
  SekCycleAim+=cyc;
  if((cyc_do=SekCycleAim-SekCycleCnt) < 0) return;
#if defined(EMU_C68K)
  PicoCpu.cycles=cyc_do;
  CycloneRun(&PicoCpu);
  SekCycleCnt+=cyc_do-PicoCpu.cycles;
#elif defined(EMU_M68K)
  m68k_set_context(&PicoM68kCPU);
  SekCycleCnt+=m68k_execute(cyc_do);
#endif
}

static __inline void SekRunS68k(int cyc)
{
  int cyc_do;
  SekCycleAimS68k+=cyc;
  if((cyc_do=SekCycleAimS68k-SekCycleCntS68k) < 0) return;
#if defined(EMU_C68K)
  PicoCpuS68k.cycles=cyc_do;
  CycloneRun(&PicoCpuS68k);
  SekCycleCntS68k+=cyc_do-PicoCpuS68k.cycles;
#elif defined(EMU_M68K)
  m68k_set_context(&PicoS68kCPU);
  SekCycleCntS68k+=m68k_execute(cyc_do);
#endif
}

#define PS_STEP_M68K ((488<<16)/20) // ~24
//#define PS_STEP_S68K 13

#ifdef _ASM_CD_PICO_C
void SekRunPS(int cyc_m68k, int cyc_s68k);
#else
static __inline void SekRunPS(int cyc_m68k, int cyc_s68k)
{
  int cycn, cycn_s68k, cyc_do;
  int ex;
  SekCycleAim+=cyc_m68k;
  SekCycleAimS68k+=cyc_s68k;

//  fprintf(stderr, "=== start %3i/%3i [%3i/%3i] {%05i.%i} ===\n", cyc_m68k, cyc_s68k,
//  		SekCycleAim-SekCycleCnt, SekCycleAimS68k-SekCycleCntS68k, Pico.m.frame_count, Pico.m.scanline);

  /* loop 488 downto 0 in steps of PS_STEP */
  for (cycn = (488<<16)-PS_STEP_M68K; cycn >= 0; cycn -= PS_STEP_M68K)
  {
    ex = 0;
    cycn_s68k = (cycn + cycn/2 + cycn/8) >> 16;
    if ((cyc_do = SekCycleAim-SekCycleCnt-(cycn>>16)) > 0) {
#if defined(EMU_C68K)
      PicoCpu.cycles = cyc_do;
      CycloneRun(&PicoCpu);
      SekCycleCnt += cyc_do - PicoCpu.cycles;
#elif defined(EMU_M68K)
      m68k_set_context(&PicoM68kCPU);
      SekCycleCnt += (ex = m68k_execute(cyc_do));
#endif
    }
    if ((cyc_do = SekCycleAimS68k-SekCycleCntS68k-cycn_s68k) > 0) {
#if defined(EMU_C68K)
      PicoCpuS68k.cycles = cyc_do;
      CycloneRun(&PicoCpuS68k);
      SekCycleCntS68k += cyc_do - PicoCpuS68k.cycles;
#elif defined(EMU_M68K)
      m68k_set_context(&PicoS68kCPU);
      SekCycleCntS68k += (ex = m68k_execute(cyc_do));
#endif
    }
  }
}
#endif


static __inline void check_cd_dma(void)
{
	int ddx;

	if (!(Pico_mcd->scd.Status_CDC & 0x08)) return;

	ddx = Pico_mcd->s68k_regs[4] & 7;
	if (ddx <  2) return; // invalid
	if (ddx <  4) {
		Pico_mcd->s68k_regs[4] |= 0x40; // Data set ready in host port
		return;
	}
	if (ddx == 6) return; // invalid

	Update_CDC_TRansfer(ddx); // now go and do the actual transfer
}

static __inline void update_chips(void)
{
	int counter_timer, int3_set;
	int counter75hz_lim = Pico.m.pal ? 2080 : 2096;

	// 75Hz CDC update
	if ((Pico_mcd->m.counter75hz+=10) >= counter75hz_lim) {
		Pico_mcd->m.counter75hz -= counter75hz_lim;
		Check_CD_Command();
	}

	// update timers
	counter_timer = Pico.m.pal ? 0x21630 : 0x2121c; // 136752 : 135708;
	Pico_mcd->m.timer_stopwatch += counter_timer;
	if ((int3_set = Pico_mcd->s68k_regs[0x31])) {
		Pico_mcd->m.timer_int3 -= counter_timer;
		if (Pico_mcd->m.timer_int3 < 0) {
			if (Pico_mcd->s68k_regs[0x33] & (1<<3)) {
				elprintf(EL_INTS, "s68k: timer irq 3");
				SekInterruptS68k(3);
				Pico_mcd->m.timer_int3 += int3_set << 16;
			}
			// is this really what happens if irq3 is masked out?
			Pico_mcd->m.timer_int3 &= 0xffffff;
		}
	}

	// update gfx chip
	if (Pico_mcd->rot_comp.Reg_58 & 0x8000)
		gfx_cd_update();

	// delayed setting of DMNA bit (needed for Silpheed)
	if (Pico_mcd->m.state_flags & 2) {
		Pico_mcd->m.state_flags &= ~2;
		if (!(Pico_mcd->s68k_regs[3] & 4)) {
			Pico_mcd->s68k_regs[3] |=  2;
			Pico_mcd->s68k_regs[3] &= ~1;
#ifdef USE_POLL_DETECT
			if ((s68k_poll_adclk&0xfe) == 2) {
				SekSetStopS68k(0); s68k_poll_adclk = 0;
			}
#endif
		}
	}
}


static int PicoFrameHintsMCD(void)
{
  struct PicoVideo *pv=&Pico.video;
  int total_z80=0,lines,y,lines_vis = 224,z80CycleAim = 0,line_sample;
  const int cycles_68k=488,cycles_z80=228,cycles_s68k=795; // both PAL and NTSC compile to same values
  int skip=PicoSkipFrame || (PicoOpt&0x10);
  int hint; // Hint counter

  if(Pico.m.pal) { //
    //cycles_68k = (int) ((double) OSC_PAL  /  7 / 50 / 312 + 0.4); // should compile to a constant (488)
    //cycles_z80 = (int) ((double) OSC_PAL  / 15 / 50 / 312 + 0.4); // 228
    lines  = 312;    // Steve Snake says there are 313 lines, but this seems to also work well
    line_sample = 68;
    if(pv->reg[1]&8) lines_vis = 240;
  } else {
    //cycles_68k = (int) ((double) OSC_NTSC /  7 / 60 / 262 + 0.4); // 488
    //cycles_z80 = (int) ((double) OSC_NTSC / 15 / 60 / 262 + 0.4); // 228
    lines  = 262;
    line_sample = 93;
  }

  SekCyclesReset();
  SekCyclesResetS68k();
  //z80ExtraCycles = 0;

  if(PicoOpt&4)
    z80CycleAim = 0;
//    z80_resetCycles();

  pv->status&=~0x88; // clear V-Int, come out of vblank

  hint=pv->reg[10]; // Load H-Int counter
  //dprintf("-hint: %i", hint);

  for (y=0;y<lines;y++)
  {
    Pico.m.scanline=(short)y;

    // pad delay (for 6 button pads)
    if(PicoOpt&0x20) {
      if(Pico.m.padDelay[0]++ > 25) Pico.m.padTHPhase[0]=0;
      if(Pico.m.padDelay[1]++ > 25) Pico.m.padTHPhase[1]=0;
    }

    check_cd_dma();

    // H-Interrupts:
    if(y <= lines_vis && --hint < 0) // y <= lines_vis: Comix Zone, Golden Axe
    {
      //dprintf("rhint:old @ %06x", SekPc);
      hint=pv->reg[10]; // Reload H-Int counter
      pv->pending_ints|=0x10;
      if (pv->reg[0]&0x10) SekInterrupt(4);
      //dprintf("rhint: %i @ %06x [%i|%i]", hint, SekPc, y, SekCycleCnt);
      //dprintf("hint_routine: %x", (*(unsigned short*)(Pico.ram+0x0B84)<<16)|*(unsigned short*)(Pico.ram+0x0B86));
    }

    // V-Interrupt:
    if (y == lines_vis)
    {
      //dprintf("vint: @ %06x [%i|%i]", SekPc, y, SekCycleCnt);
      pv->status|=0x88; // V-Int happened, go into vblank
      SekRunM68k(128); SekCycleAim-=128; // there must be a gap between H and V ints, also after vblank bit set (Mazin Saga, Bram Stoker's Dracula)
      /*if(Pico.m.z80Run && (PicoOpt&4)) {
        z80CycleAim+=cycles_z80/2;
        total_z80+=z80_run(z80CycleAim-total_z80);
        z80CycleAim-=cycles_z80/2;
      }*/
      pv->pending_ints|=0x20;
      if(pv->reg[1]&0x20) SekInterrupt(6);
      if(Pico.m.z80Run && (PicoOpt&4)) // ?
        z80_int();
      //dprintf("zint: [%i|%i] zPC=%04x", Pico.m.scanline, SekCyclesDone(), mz80GetRegisterValue(NULL, 0));
    }

    // decide if we draw this line
#if CAN_HANDLE_240_LINES
    if(!skip && ((!(pv->reg[1]&8) && y<224) || ((pv->reg[1]&8) && y<240)) )
#else
    if(!skip && y<224)
#endif
      PicoLine(y);

    if(PicoOpt&1)
      sound_timers_and_dac(y);

    // get samples from sound chips
    if (y == 224 && PsndOut) {
      int len = sound_render(0, PsndLen);
      if (PicoWriteSound) PicoWriteSound(len);
      // clear sound buffer
      sound_clear();
    }

    // Run scanline:
      //dprintf("m68k starting exec @ %06x", SekPc);
    if (Pico.m.dma_xfers) SekCycleCnt+=CheckDMA();
    if ((PicoOpt & 0x2000) && (Pico_mcd->m.busreq&3) == 1) {
      SekRunPS(cycles_68k, cycles_s68k); // "better/perfect sync"
    } else {
      SekRunM68k(cycles_68k);
      if ((Pico_mcd->m.busreq&3) == 1) // no busreq/no reset
        SekRunS68k(cycles_s68k);
    }

    if ((PicoOpt&4) && Pico.m.z80Run) {
      if (Pico.m.z80Run & 2) z80CycleAim+=cycles_z80;
      else {
        int cnt = SekCyclesDone() - z80startCycle;
        cnt = (cnt>>1)-(cnt>>5);
        //if (cnt > cycles_z80) printf("FIXME: z80 cycles: %i\n", cnt);
        if (cnt > cycles_z80) cnt = cycles_z80;
        Pico.m.z80Run |= 2;
        z80CycleAim+=cnt;
      }
      total_z80+=z80_run(z80CycleAim-total_z80);
    }

    update_chips();
  }

  // draw a frame just after vblank in alternative render mode
  if (!PicoSkipFrame && (PicoOpt&0x10))
    PicoFrameFull();

  return 0;
}


PICO_INTERNAL int PicoFrameMCD(void)
{
  if(!(PicoOpt&0x10))
    PicoFrameStart();

  PicoFrameHintsMCD();

  return 0;
}
Commit	Line	Data
672ad671	1	// (c) Copyright 2007 notaz, All rights reserved.
cc68a136	2
	3
	4	#include "../PicoInt.h"
cc68a136	5
cc68a136	6
76276b0b	7	extern unsigned char formatted_bram[4*0x10];
89fa852d	8	extern unsigned int s68k_poll_adclk;
89fa852d	9
721cd396	10	void (*PicoMCDopenTray)(void) = NULL;
721cd396	11	int (*PicoMCDcloseTray)(void) = NULL;
89fa852d	12
	13	#define dump_ram(ram,fname) \
	14	{ \
	15	int i, d; \
	16	FILE *f; \
	17	\
	18	for (i = 0; i < sizeof(ram); i+=2) { \
	19	d = (ram[i]<<8) \| ram[i+1]; \
	20	(unsigned short )(ram+i) = d; \
	21	} \
	22	f = fopen(fname, "wb"); \
	23	if (f) { \
	24	fwrite(ram, 1, sizeof(ram), f); \
	25	fclose(f); \
	26	} \
	27	for (i = 0; i < sizeof(ram); i+=2) { \
	28	d = (ram[i]<<8) \| ram[i+1]; \
	29	(unsigned short )(ram+i) = d; \
	30	} \
	31	}
cc68a136	32
cc68a136	33
eff55556	34	PICO_INTERNAL int PicoInitMCD(void)
cc68a136	35	{
	36	SekInitS68k();
	37	Init_CD_Driver();
	38
	39	return 0;
	40	}
	41
	42
eff55556	43	PICO_INTERNAL void PicoExitMCD(void)
cc68a136	44	{
cc68a136	45	End_CD_Driver();
89fa852d	46
	47	//dump_ram(Pico_mcd->prg_ram, "prg.bin");
	48	//dump_ram(Pico.ram, "ram.bin");
cc68a136	49	}
cc68a136	50
eff55556	51	PICO_INTERNAL int PicoResetMCD(int hard)
cc68a136	52	{
51a902ae	53	if (hard) {
a4030801	54	int fmt_size = sizeof(formatted_bram);
	55	memset(Pico_mcd->prg_ram, 0, sizeof(Pico_mcd->prg_ram));
	56	memset(Pico_mcd->word_ram2M, 0, sizeof(Pico_mcd->word_ram2M));
	57	memset(Pico_mcd->pcm_ram, 0, sizeof(Pico_mcd->pcm_ram));
	58	memset(Pico_mcd->bram, 0, sizeof(Pico_mcd->bram));
	59	memcpy(Pico_mcd->bram + sizeof(Pico_mcd->bram) - fmt_size, formatted_bram, fmt_size);
51a902ae	60	}
51a902ae	61	memset(Pico_mcd->s68k_regs, 0, sizeof(Pico_mcd->s68k_regs));
4f265db7	62	memset(&Pico_mcd->pcm, 0, sizeof(Pico_mcd->pcm));
5c69a605	63	memset(&Pico_mcd->m, 0, sizeof(Pico_mcd->m));
51a902ae	64
d1df8786	65	(unsigned int )(Pico_mcd->bios + 0x70) = 0xffffffff; // reset hint vector (simplest way to implement reg6)
c008977e	66	Pico_mcd->m.state_flags \|= 1; // s68k reset pending
672ad671	67	Pico_mcd->s68k_regs[3] = 1; // 2M word RAM mode with m68k access after reset
cc68a136	68
cc68a136	69	Reset_CD();
5c69a605	70	LC89510_Reset();
51a902ae	71	gfx_cd_reset();
4ff2d527	72	#ifdef _ASM_CD_MEMORY_C
4ff2d527	73	PicoMemResetCD(1);
00bd648e	74	//PicoMemResetCDdecode(1); // don't have to call this in 2M mode
4ff2d527	75	#endif
cc68a136	76
6cadc2da	77	// use SRam.data for RAM cart
	78	if (SRam.data) free(SRam.data);
	79	SRam.data = NULL;
	80	if (PicoOpt&0x8000)
	81	SRam.data = calloc(1, 0x12000);
	82
cc68a136	83	return 0;
	84	}
	85
eff55556	86	static __inline void SekRunM68k(int cyc)
cc68a136	87	{
	88	int cyc_do;
	89	SekCycleAim+=cyc;
	90	if((cyc_do=SekCycleAim-SekCycleCnt) < 0) return;
b837b69b	91	#if defined(EMU_C68K)
	92	PicoCpu.cycles=cyc_do;
	93	CycloneRun(&PicoCpu);
	94	SekCycleCnt+=cyc_do-PicoCpu.cycles;
	95	#elif defined(EMU_M68K)
cc68a136	96	m68k_set_context(&PicoM68kCPU);
	97	SekCycleCnt+=m68k_execute(cyc_do);
	98	#endif
	99	}
	100
	101	static __inline void SekRunS68k(int cyc)
	102	{
	103	int cyc_do;
	104	SekCycleAimS68k+=cyc;
	105	if((cyc_do=SekCycleAimS68k-SekCycleCntS68k) < 0) return;
b837b69b	106	#if defined(EMU_C68K)
	107	PicoCpuS68k.cycles=cyc_do;
	108	CycloneRun(&PicoCpuS68k);
	109	SekCycleCntS68k+=cyc_do-PicoCpuS68k.cycles;
	110	#elif defined(EMU_M68K)
cc68a136	111	m68k_set_context(&PicoS68kCPU);
	112	SekCycleCntS68k+=m68k_execute(cyc_do);
	113	#endif
	114	}
	115
7336a99a	116	#define PS_STEP_M68K ((488<<16)/20) // ~24
7336a99a	117	//#define PS_STEP_S68K 13
68cba51e	118
a4030801	119	#ifdef _ASM_CD_PICO_C
	120	void SekRunPS(int cyc_m68k, int cyc_s68k);
	121	#else
68cba51e	122	static __inline void SekRunPS(int cyc_m68k, int cyc_s68k)
68cba51e	123	{
7336a99a	124	int cycn, cycn_s68k, cyc_do;
fb9bec94	125	int ex;
68cba51e	126	SekCycleAim+=cyc_m68k;
68cba51e	127	SekCycleAimS68k+=cyc_s68k;
7336a99a	128
	129	// fprintf(stderr, "=== start %3i/%3i [%3i/%3i] {%05i.%i} ===\n", cyc_m68k, cyc_s68k,
	130	// SekCycleAim-SekCycleCnt, SekCycleAimS68k-SekCycleCntS68k, Pico.m.frame_count, Pico.m.scanline);
	131
	132	/* loop 488 downto 0 in steps of PS_STEP */
	133	for (cycn = (488<<16)-PS_STEP_M68K; cycn >= 0; cycn -= PS_STEP_M68K)
	134	{
	135	ex = 0;
	136	cycn_s68k = (cycn + cycn/2 + cycn/8) >> 16;
7336a99a	137	if ((cyc_do = SekCycleAim-SekCycleCnt-(cycn>>16)) > 0) {
68cba51e	138	#if defined(EMU_C68K)
7336a99a	139	PicoCpu.cycles = cyc_do;
68cba51e	140	CycloneRun(&PicoCpu);
7336a99a	141	SekCycleCnt += cyc_do - PicoCpu.cycles;
68cba51e	142	#elif defined(EMU_M68K)
68cba51e	143	m68k_set_context(&PicoM68kCPU);
7336a99a	144	SekCycleCnt += (ex = m68k_execute(cyc_do));
68cba51e	145	#endif
7336a99a	146	}
7336a99a	147	if ((cyc_do = SekCycleAimS68k-SekCycleCntS68k-cycn_s68k) > 0) {
68cba51e	148	#if defined(EMU_C68K)
7336a99a	149	PicoCpuS68k.cycles = cyc_do;
68cba51e	150	CycloneRun(&PicoCpuS68k);
7336a99a	151	SekCycleCntS68k += cyc_do - PicoCpuS68k.cycles;
68cba51e	152	#elif defined(EMU_M68K)
68cba51e	153	m68k_set_context(&PicoS68kCPU);
7336a99a	154	SekCycleCntS68k += (ex = m68k_execute(cyc_do));
68cba51e	155	#endif
7336a99a	156	}
68cba51e	157	}
68cba51e	158	}
7336a99a	159	#endif
68cba51e	160
68cba51e	161
bf098bc5	162	static __inline void check_cd_dma(void)
	163	{
	164	int ddx;
	165
c459aefd	166	if (!(Pico_mcd->scd.Status_CDC & 0x08)) return;
bf098bc5	167
	168	ddx = Pico_mcd->s68k_regs[4] & 7;
	169	if (ddx < 2) return; // invalid
c459aefd	170	if (ddx < 4) {
	171	Pico_mcd->s68k_regs[4] \|= 0x40; // Data set ready in host port
	172	return;
	173	}
bf098bc5	174	if (ddx == 6) return; // invalid
	175
	176	Update_CDC_TRansfer(ddx); // now go and do the actual transfer
	177	}
	178
4f265db7	179	static __inline void update_chips(void)
	180	{
	181	int counter_timer, int3_set;
	182	int counter75hz_lim = Pico.m.pal ? 2080 : 2096;
	183
	184	// 75Hz CDC update
	185	if ((Pico_mcd->m.counter75hz+=10) >= counter75hz_lim) {
	186	Pico_mcd->m.counter75hz -= counter75hz_lim;
	187	Check_CD_Command();
	188	}
	189
	190	// update timers
	191	counter_timer = Pico.m.pal ? 0x21630 : 0x2121c; // 136752 : 135708;
	192	Pico_mcd->m.timer_stopwatch += counter_timer;
	193	if ((int3_set = Pico_mcd->s68k_regs[0x31])) {
	194	Pico_mcd->m.timer_int3 -= counter_timer;
	195	if (Pico_mcd->m.timer_int3 < 0) {
	196	if (Pico_mcd->s68k_regs[0x33] & (1<<3)) {
69996cb7	197	elprintf(EL_INTS, "s68k: timer irq 3");
4f265db7	198	SekInterruptS68k(3);
	199	Pico_mcd->m.timer_int3 += int3_set << 16;
	200	}
	201	// is this really what happens if irq3 is masked out?
	202	Pico_mcd->m.timer_int3 &= 0xffffff;
	203	}
	204	}
	205
	206	// update gfx chip
	207	if (Pico_mcd->rot_comp.Reg_58 & 0x8000)
	208	gfx_cd_update();
89fa852d	209
	210	// delayed setting of DMNA bit (needed for Silpheed)
	211	if (Pico_mcd->m.state_flags & 2) {
	212	Pico_mcd->m.state_flags &= ~2;
46969540	213	if (!(Pico_mcd->s68k_regs[3] & 4)) {
	214	Pico_mcd->s68k_regs[3] \|= 2;
	215	Pico_mcd->s68k_regs[3] &= ~1;
89fa852d	216	#ifdef USE_POLL_DETECT
46969540	217	if ((s68k_poll_adclk&0xfe) == 2) {
	218	SekSetStopS68k(0); s68k_poll_adclk = 0;
	219	}
89fa852d	220	#endif
46969540	221	}
89fa852d	222	}
4f265db7	223	}
4f265db7	224
b837b69b	225
cc68a136	226	static int PicoFrameHintsMCD(void)
	227	{
	228	struct PicoVideo *pv=&Pico.video;
4f265db7	229	int total_z80=0,lines,y,lines_vis = 224,z80CycleAim = 0,line_sample;
cc68a136	230	const int cycles_68k=488,cycles_z80=228,cycles_s68k=795; // both PAL and NTSC compile to same values
	231	int skip=PicoSkipFrame \|\| (PicoOpt&0x10);
	232	int hint; // Hint counter
	233
	234	if(Pico.m.pal) { //
	235	//cycles_68k = (int) ((double) OSC_PAL / 7 / 50 / 312 + 0.4); // should compile to a constant (488)
	236	//cycles_z80 = (int) ((double) OSC_PAL / 15 / 50 / 312 + 0.4); // 228
	237	lines = 312; // Steve Snake says there are 313 lines, but this seems to also work well
	238	line_sample = 68;
	239	if(pv->reg[1]&8) lines_vis = 240;
	240	} else {
	241	//cycles_68k = (int) ((double) OSC_NTSC / 7 / 60 / 262 + 0.4); // 488
	242	//cycles_z80 = (int) ((double) OSC_NTSC / 15 / 60 / 262 + 0.4); // 228
	243	lines = 262;
	244	line_sample = 93;
	245	}
	246
	247	SekCyclesReset();
	248	SekCyclesResetS68k();
	249	//z80ExtraCycles = 0;
	250
	251	if(PicoOpt&4)
	252	z80CycleAim = 0;
	253	// z80_resetCycles();
	254
	255	pv->status&=~0x88; // clear V-Int, come out of vblank
	256
	257	hint=pv->reg[10]; // Load H-Int counter
	258	//dprintf("-hint: %i", hint);
	259
	260	for (y=0;y<lines;y++)
	261	{
	262	Pico.m.scanline=(short)y;
	263
	264	// pad delay (for 6 button pads)
	265	if(PicoOpt&0x20) {
	266	if(Pico.m.padDelay[0]++ > 25) Pico.m.padTHPhase[0]=0;
	267	if(Pico.m.padDelay[1]++ > 25) Pico.m.padTHPhase[1]=0;
	268	}
	269
bf098bc5	270	check_cd_dma();
bf098bc5	271
cc68a136	272	// H-Interrupts:
	273	if(y <= lines_vis && --hint < 0) // y <= lines_vis: Comix Zone, Golden Axe
	274	{
	275	//dprintf("rhint:old @ %06x", SekPc);
	276	hint=pv->reg[10]; // Reload H-Int counter
	277	pv->pending_ints\|=0x10;
	278	if (pv->reg[0]&0x10) SekInterrupt(4);
	279	//dprintf("rhint: %i @ %06x [%i\|%i]", hint, SekPc, y, SekCycleCnt);
	280	//dprintf("hint_routine: %x", ((unsigned short)(Pico.ram+0x0B84)<<16)\|(unsigned short)(Pico.ram+0x0B86));
	281	}
	282
	283	// V-Interrupt:
	284	if (y == lines_vis)
	285	{
	286	//dprintf("vint: @ %06x [%i\|%i]", SekPc, y, SekCycleCnt);
	287	pv->status\|=0x88; // V-Int happened, go into vblank
eff55556	288	SekRunM68k(128); SekCycleAim-=128; // there must be a gap between H and V ints, also after vblank bit set (Mazin Saga, Bram Stoker's Dracula)
cc68a136	289	/*if(Pico.m.z80Run && (PicoOpt&4)) {
	290	z80CycleAim+=cycles_z80/2;
	291	total_z80+=z80_run(z80CycleAim-total_z80);
	292	z80CycleAim-=cycles_z80/2;
	293	}*/
	294	pv->pending_ints\|=0x20;
	295	if(pv->reg[1]&0x20) SekInterrupt(6);
	296	if(Pico.m.z80Run && (PicoOpt&4)) // ?
	297	z80_int();
	298	//dprintf("zint: [%i\|%i] zPC=%04x", Pico.m.scanline, SekCyclesDone(), mz80GetRegisterValue(NULL, 0));
	299	}
	300
	301	// decide if we draw this line
	302	#if CAN_HANDLE_240_LINES
	303	if(!skip && ((!(pv->reg[1]&8) && y<224) \|\| ((pv->reg[1]&8) && y<240)) )
	304	#else
	305	if(!skip && y<224)
	306	#endif
	307	PicoLine(y);
	308
	309	if(PicoOpt&1)
	310	sound_timers_and_dac(y);
	311
	312	// get samples from sound chips
7a93adeb	313	if (y == 224 && PsndOut) {
	314	int len = sound_render(0, PsndLen);
	315	if (PicoWriteSound) PicoWriteSound(len);
	316	// clear sound buffer
	317	sound_clear();
	318	}
cc68a136	319
	320	// Run scanline:
	321	//dprintf("m68k starting exec @ %06x", SekPc);
69996cb7	322	if (Pico.m.dma_xfers) SekCycleCnt+=CheckDMA();
89fa852d	323	if ((PicoOpt & 0x2000) && (Pico_mcd->m.busreq&3) == 1) {
7336a99a	324	SekRunPS(cycles_68k, cycles_s68k); // "better/perfect sync"
68cba51e	325	} else {
eff55556	326	SekRunM68k(cycles_68k);
68cba51e	327	if ((Pico_mcd->m.busreq&3) == 1) // no busreq/no reset
68cba51e	328	SekRunS68k(cycles_s68k);
cc68a136	329	}
cc68a136	330
89fa852d	331	if ((PicoOpt&4) && Pico.m.z80Run) {
d9153729	332	if (Pico.m.z80Run & 2) z80CycleAim+=cycles_z80;
	333	else {
	334	int cnt = SekCyclesDone() - z80startCycle;
	335	cnt = (cnt>>1)-(cnt>>5);
	336	//if (cnt > cycles_z80) printf("FIXME: z80 cycles: %i\n", cnt);
	337	if (cnt > cycles_z80) cnt = cycles_z80;
	338	Pico.m.z80Run \|= 2;
	339	z80CycleAim+=cnt;
	340	}
cc68a136	341	total_z80+=z80_run(z80CycleAim-total_z80);
	342	}
	343
4f265db7	344	update_chips();
cc68a136	345	}
	346
	347	// draw a frame just after vblank in alternative render mode
89fa852d	348	if (!PicoSkipFrame && (PicoOpt&0x10))
cc68a136	349	PicoFrameFull();
	350
	351	return 0;
	352	}
	353
	354
eff55556	355	PICO_INTERNAL int PicoFrameMCD(void)
cc68a136	356	{
	357	if(!(PicoOpt&0x10))
	358	PicoFrameStart();
	359
	360	PicoFrameHintsMCD();
	361
	362	return 0;
	363	}
	364
	365