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1 | #ifndef __SH2_H__\r |
| 2 | #define __SH2_H__\r |
| 3 | \r |
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4 | // registers - matches structure order\r |
| 5 | typedef enum {\r |
| 6 | SHR_R0 = 0, SHR_SP = 15,\r |
| 7 | SHR_PC, SHR_PPC, SHR_PR, SHR_SR,\r |
| 8 | SHR_GBR, SHR_VBR, SHR_MACH, SHR_MACL,\r |
| 9 | } sh2_reg_e;\r |
| 10 | \r |
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11 | typedef struct\r |
| 12 | {\r |
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13 | unsigned int r[16]; // 00\r |
| 14 | unsigned int pc; // 40\r |
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15 | unsigned int ppc;\r |
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16 | unsigned int pr;\r |
| 17 | unsigned int sr;\r |
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18 | unsigned int gbr, vbr; // 50\r |
| 19 | unsigned int mach, macl; // 58\r |
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20 | \r |
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21 | // common\r |
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22 | const void *read8_map; // 60\r |
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23 | const void *read16_map;\r |
| 24 | const void **write8_tab;\r |
| 25 | const void **write16_tab;\r |
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26 | \r |
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27 | // drc stuff\r |
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28 | int drc_tmp; // 70\r |
| 29 | \r |
| 30 | // interpreter stuff\r |
| 31 | int icount; // cycles left in current timeslice\r |
| 32 | unsigned int ea;\r |
| 33 | unsigned int delay;\r |
| 34 | unsigned int test_irq;\r |
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35 | \r |
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36 | int pending_level; // MAX(pending_irl, pending_int_irq)\r |
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37 | int pending_irl;\r |
| 38 | int pending_int_irq; // internal irq\r |
| 39 | int pending_int_vector;\r |
| 40 | void (*irq_callback)(int id, int level);\r |
| 41 | int is_slave;\r |
| 42 | \r |
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43 | unsigned int cycles_aim; // subtract sh2_icount to get global counter\r |
| 44 | unsigned int cycles_done;\r |
| 45 | } SH2;\r |
| 46 | \r |
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47 | extern SH2 *sh2; // active sh2. XXX: consider removing\r |
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48 | \r |
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49 | int sh2_init(SH2 *sh2, int is_slave);\r |
| e898de13 |
50 | void sh2_finish(SH2 *sh2);\r |
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51 | void sh2_reset(SH2 *sh2);\r |
| 52 | void sh2_irl_irq(SH2 *sh2, int level);\r |
| 53 | void sh2_internal_irq(SH2 *sh2, int level, int vector);\r |
| 6add7875 |
54 | void sh2_do_irq(SH2 *sh2, int level, int vector);\r |
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55 | \r |
| 56 | void sh2_execute(SH2 *sh2, int cycles);\r |
| 57 | \r |
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58 | // pico memhandlers\r |
| 59 | // XXX: move somewhere else\r |
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60 | #if !defined(REGPARM) && defined(__i386__) \r |
| 61 | #define REGPARM(x) __attribute__((regparm(x)))\r |
| 62 | #else\r |
| 63 | #define REGPARM(x)\r |
| 64 | #endif\r |
| 65 | \r |
| 66 | unsigned int REGPARM(2) p32x_sh2_read8(unsigned int a, SH2 *sh2);\r |
| 67 | unsigned int REGPARM(2) p32x_sh2_read16(unsigned int a, SH2 *sh2);\r |
| 68 | unsigned int REGPARM(2) p32x_sh2_read32(unsigned int a, SH2 *sh2);\r |
| 69 | void REGPARM(3) p32x_sh2_write8(unsigned int a, unsigned int d, SH2 *sh2);\r |
| 70 | void REGPARM(3) p32x_sh2_write16(unsigned int a, unsigned int d, SH2 *sh2);\r |
| 71 | void REGPARM(3) p32x_sh2_write32(unsigned int a, unsigned int d, SH2 *sh2);\r |
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72 | \r |
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73 | #endif /* __SH2_H__ */\r |
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