be2c4208 |
1 | #include "../pico_int.h" |
2 | #include "../memory.h" |
3 | |
4 | static const char str_mars[] = "MARS"; |
5 | |
974fdb5b |
6 | struct Pico32xMem *Pico32xMem; |
7 | |
5e49c3a8 |
8 | static void bank_switch(int b); |
9 | |
acd35d4c |
10 | #define MSB8(x) ((x) >> 8) |
11 | |
266c6afa |
12 | // poll detection |
4ea707e1 |
13 | #define POLL_THRESHOLD 6 |
14 | |
266c6afa |
15 | struct poll_det { |
16 | int addr, pc, cnt; |
17 | }; |
4ea707e1 |
18 | static struct poll_det m68k_poll, msh2_poll; |
266c6afa |
19 | |
4ea707e1 |
20 | static int p32x_poll_detect(struct poll_det *pd, u32 a, u32 pc, int flag) |
266c6afa |
21 | { |
22 | int ret = 0; |
23 | |
24 | if (a - 2 <= pd->addr && pd->addr <= a + 2 && pd->pc == pc) { |
25 | pd->cnt++; |
26 | if (pd->cnt > POLL_THRESHOLD) { |
27 | if (!(Pico32x.emu_flags & flag)) { |
28 | elprintf(EL_32X, "%s poll addr %08x @ %06x", |
29 | flag == P32XF_68KPOLL ? "m68k" : (flag == P32XF_MSH2POLL ? "msh2" : "ssh2"), a, pc); |
30 | ret = 1; |
31 | } |
32 | Pico32x.emu_flags |= flag; |
33 | } |
34 | } |
35 | else |
36 | pd->cnt = 0; |
37 | pd->addr = a; |
38 | pd->pc = pc; |
39 | |
40 | return ret; |
41 | } |
42 | |
4ea707e1 |
43 | static int p32x_poll_undetect(struct poll_det *pd, int flag) |
266c6afa |
44 | { |
45 | int ret = 0; |
46 | if (pd->cnt > POLL_THRESHOLD) |
47 | ret = 1; |
48 | pd->addr = pd->cnt = 0; |
49 | Pico32x.emu_flags &= ~flag; |
50 | return ret; |
51 | } |
52 | |
4ea707e1 |
53 | void p32x_poll_event(int is_vdp) |
54 | { |
55 | p32x_poll_undetect(&msh2_poll, is_vdp ? P32XF_MSH2VPOLL : P32XF_MSH2POLL); |
56 | } |
57 | |
974fdb5b |
58 | // SH2 faking |
3cf9570b |
59 | #define FAKE_SH2 |
acd35d4c |
60 | int p32x_csum_faked; |
61 | #ifdef FAKE_SH2 |
974fdb5b |
62 | static const u16 comm_fakevals[] = { |
63 | 0x4d5f, 0x4f4b, // M_OK |
64 | 0x535f, 0x4f4b, // S_OK |
5e49c3a8 |
65 | 0x4D41, 0x5346, // MASF - Brutal Unleashed |
66 | 0x5331, 0x4d31, // Darxide |
67 | 0x5332, 0x4d32, |
68 | 0x5333, 0x4d33, |
69 | 0x0000, 0x0000, // eq for doom |
974fdb5b |
70 | 0x0002, // Mortal Kombat |
acd35d4c |
71 | // 0, // pad |
be2c4208 |
72 | }; |
acd35d4c |
73 | |
74 | static u32 sh2_comm_faker(u32 a) |
75 | { |
76 | static int f = 0; |
77 | if (a == 0x28 && !p32x_csum_faked) { |
78 | p32x_csum_faked = 1; |
79 | return *(unsigned short *)(Pico.rom + 0x18e); |
80 | } |
81 | if (f >= sizeof(comm_fakevals) / sizeof(comm_fakevals[0])) |
82 | f = 0; |
83 | return comm_fakevals[f++]; |
84 | } |
85 | #endif |
be2c4208 |
86 | |
4ea707e1 |
87 | // DMAC handling |
88 | static struct { |
89 | unsigned int sar0, dar0, tcr0; // src addr, dst addr, transfer count |
90 | unsigned int chcr0; // chan ctl |
91 | unsigned int sar1, dar1, tcr1; // same for chan 1 |
92 | unsigned int chcr1; |
93 | int pad[4]; |
94 | unsigned int dmaor; |
95 | } * dmac0; |
96 | |
97 | static void dma_68k2sh2_do(void) |
98 | { |
99 | unsigned short *dreqlen = &Pico32x.regs[0x10 / 2]; |
100 | int i; |
101 | |
102 | if (dmac0->tcr0 != *dreqlen) |
103 | elprintf(EL_32X|EL_ANOMALY, "tcr0 and dreq len differ: %d != %d", dmac0->tcr0, *dreqlen); |
104 | |
105 | for (i = 0; i < Pico32x.dmac_ptr && dmac0->tcr0 > 0; i++) { |
106 | extern void p32x_sh2_write16(u32 a, u32 d); |
107 | elprintf(EL_32X|EL_ANOMALY, "dmaw [%08x] %04x, left %d", dmac0->dar0, Pico32x.dmac_fifo[i], *dreqlen); |
108 | p32x_sh2_write16(dmac0->dar0, Pico32x.dmac_fifo[i]); |
109 | dmac0->dar0 += 2; |
110 | dmac0->tcr0--; |
111 | (*dreqlen)--; |
112 | } |
113 | |
114 | Pico32x.dmac_ptr = 0; // HACK |
115 | Pico32x.regs[6 / 2] &= ~P32XS_FULL; |
116 | if (*dreqlen == 0) |
117 | Pico32x.regs[6 / 2] &= ~P32XS_68S; // transfer complete |
118 | if (dmac0->tcr0 == 0) |
119 | dmac0->chcr0 |= 2; // DMA has ended normally |
120 | p32x_poll_undetect(&m68k_poll, P32XF_68KPOLL); |
121 | } |
122 | |
123 | // ------------------------------------------------------------------ |
124 | |
be2c4208 |
125 | static u32 p32x_reg_read16(u32 a) |
126 | { |
127 | a &= 0x3e; |
128 | |
3cf9570b |
129 | #if 0 |
974fdb5b |
130 | if ((a & 0x30) == 0x20) |
acd35d4c |
131 | return sh2_comm_faker(a); |
266c6afa |
132 | #else |
4ea707e1 |
133 | if (p32x_poll_detect(&m68k_poll, a, SekPc, P32XF_68KPOLL)) { |
266c6afa |
134 | SekEndRun(16); |
135 | } |
acd35d4c |
136 | #endif |
3cf9570b |
137 | #ifdef FAKE_SH2 |
138 | // fake only slave for now |
139 | if (a == 0x24 || a == 0x26) |
140 | return sh2_comm_faker(a); |
141 | #endif |
974fdb5b |
142 | |
be2c4208 |
143 | return Pico32x.regs[a / 2]; |
144 | } |
145 | |
be2c4208 |
146 | static void p32x_reg_write8(u32 a, u32 d) |
147 | { |
acd35d4c |
148 | u16 *r = Pico32x.regs; |
be2c4208 |
149 | a &= 0x3f; |
150 | |
acd35d4c |
151 | if (a == 1 && !(r[0] & 1)) { |
152 | r[0] |= 1; |
be2c4208 |
153 | Pico32xStartup(); |
154 | return; |
155 | } |
5e49c3a8 |
156 | |
acd35d4c |
157 | if (!(r[0] & 1)) |
5e49c3a8 |
158 | return; |
159 | |
acd35d4c |
160 | switch (a) { |
4ea707e1 |
161 | case 0: // adapter ctl |
acd35d4c |
162 | r[0] = (r[0] & 0x83) | ((d << 8) & P32XS_FM); |
163 | break; |
4ea707e1 |
164 | case 3: // irq ctl |
165 | if ((d & 1) && !(Pico32x.sh2irqi[0] & P32XI_CMD)) { |
166 | Pico32x.sh2irqi[0] |= P32XI_CMD; |
167 | p32x_update_irls(); |
168 | } |
169 | break; |
170 | case 5: // bank |
acd35d4c |
171 | d &= 7; |
4ea707e1 |
172 | if (r[4 / 2] != d) { |
173 | r[4 / 2] = d; |
acd35d4c |
174 | bank_switch(d); |
175 | } |
176 | break; |
4ea707e1 |
177 | case 7: // DREQ ctl |
178 | r[6 / 2] = (r[6 / 2] & P32XS_FULL) | (d & (P32XS_68S|P32XS_RV)); |
179 | break; |
5e49c3a8 |
180 | } |
181 | } |
182 | |
183 | static void p32x_reg_write16(u32 a, u32 d) |
184 | { |
acd35d4c |
185 | u16 *r = Pico32x.regs; |
186 | a &= 0x3e; |
187 | |
4ea707e1 |
188 | // for write loops with FIFO checks.. |
189 | m68k_poll.cnt = 0; |
190 | |
acd35d4c |
191 | switch (a) { |
4ea707e1 |
192 | case 0x00: // adapter ctl |
acd35d4c |
193 | r[0] = (r[0] & 0x83) | (d & P32XS_FM); |
194 | return; |
4ea707e1 |
195 | case 0x10: // DREQ len |
196 | r[a / 2] = d & ~3; |
197 | return; |
198 | case 0x12: // FIFO reg |
199 | if (!(r[6 / 2] & P32XS_68S)) { |
200 | elprintf(EL_32X|EL_ANOMALY, "DREQ FIFO w16 without 68S?"); |
201 | return; |
202 | } |
203 | if (Pico32x.dmac_ptr < DMAC_FIFO_LEN) { |
204 | Pico32x.dmac_fifo[Pico32x.dmac_ptr++] = d; |
205 | if ((Pico32x.dmac_ptr & 3) == 0 && (dmac0->chcr0 & 3) == 1 && (dmac0->dmaor & 1)) |
206 | dma_68k2sh2_do(); |
207 | if (Pico32x.dmac_ptr == DMAC_FIFO_LEN) |
208 | r[6 / 2] |= P32XS_FULL; |
209 | } |
210 | break; |
acd35d4c |
211 | } |
212 | |
4ea707e1 |
213 | // DREQ src, dst |
214 | if ((a & 0x38) == 0x08) { |
215 | r[a / 2] = d; |
216 | return; |
217 | } |
218 | // comm port |
219 | else if ((a & 0x30) == 0x20 && r[a / 2] != d) { |
acd35d4c |
220 | r[a / 2] = d; |
4ea707e1 |
221 | if (p32x_poll_undetect(&msh2_poll, P32XF_MSH2POLL)) |
3cf9570b |
222 | // if SH2 is busy waiting, it needs to see the result ASAP |
223 | SekEndRun(16); |
acd35d4c |
224 | return; |
225 | } |
226 | |
5e49c3a8 |
227 | p32x_reg_write8(a + 1, d); |
be2c4208 |
228 | } |
229 | |
4ea707e1 |
230 | // ------------------------------------------------------------------ |
be2c4208 |
231 | // VDP regs |
232 | static u32 p32x_vdp_read16(u32 a) |
233 | { |
234 | a &= 0x0e; |
235 | |
236 | return Pico32x.vdp_regs[a / 2]; |
237 | } |
238 | |
be2c4208 |
239 | static void p32x_vdp_write8(u32 a, u32 d) |
240 | { |
974fdb5b |
241 | u16 *r = Pico32x.vdp_regs; |
be2c4208 |
242 | a &= 0x0f; |
243 | |
4ea707e1 |
244 | // for FEN checks between writes |
245 | msh2_poll.cnt = 0; |
246 | |
974fdb5b |
247 | // TODO: verify what's writeable |
be2c4208 |
248 | switch (a) { |
974fdb5b |
249 | case 0x01: |
5e49c3a8 |
250 | // priority inversion is handled in palette |
251 | if ((r[0] ^ d) & P32XV_PRI) |
252 | Pico32x.dirty_pal = 1; |
974fdb5b |
253 | r[0] = (r[0] & P32XV_nPAL) | (d & 0xff); |
254 | break; |
be2c4208 |
255 | case 0x0b: |
974fdb5b |
256 | d &= 1; |
257 | Pico32x.pending_fb = d; |
258 | // if we are blanking and FS bit is changing |
4ea707e1 |
259 | if (((r[0x0a/2] & P32XV_VBLK) || (r[0] & P32XV_Mx) == 0) && ((r[0x0a/2] ^ d) & P32XV_FS)) { |
974fdb5b |
260 | r[0x0a/2] ^= 1; |
261 | Pico32xSwapDRAM(d ^ 1); |
266c6afa |
262 | elprintf(EL_32X, "VDP FS: %d", r[0x0a/2] & P32XV_FS); |
be2c4208 |
263 | } |
264 | break; |
265 | } |
266 | } |
267 | |
974fdb5b |
268 | static void p32x_vdp_write16(u32 a, u32 d) |
269 | { |
270 | p32x_vdp_write8(a | 1, d); |
271 | } |
272 | |
4ea707e1 |
273 | // ------------------------------------------------------------------ |
acd35d4c |
274 | // SH2 regs |
275 | static u32 p32x_sh2reg_read16(u32 a) |
276 | { |
4ea707e1 |
277 | u16 *r = Pico32x.regs; |
278 | a &= 0xfe; // ? |
266c6afa |
279 | |
4ea707e1 |
280 | switch (a) { |
281 | case 0x00: // adapter/irq ctl |
282 | return (r[0] & P32XS_FM) | P32XS2_ADEN | Pico32x.sh2irq_mask[0]; |
283 | case 0x10: // DREQ len |
284 | return r[a / 2]; |
acd35d4c |
285 | } |
4ea707e1 |
286 | |
287 | // DREQ src, dst; comm port |
288 | if ((a & 0x38) == 0x08 || (a & 0x30) == 0x20) |
289 | return r[a / 2]; |
acd35d4c |
290 | |
291 | return 0; |
292 | } |
293 | |
294 | static void p32x_sh2reg_write8(u32 a, u32 d) |
295 | { |
4ea707e1 |
296 | a &= 0xff; |
297 | if (a == 1) { |
298 | Pico32x.sh2irq_mask[0] = d & 0x0f; |
299 | p32x_update_irls(); |
300 | } |
acd35d4c |
301 | } |
302 | |
303 | static void p32x_sh2reg_write16(u32 a, u32 d) |
304 | { |
4ea707e1 |
305 | a &= 0xfe; |
acd35d4c |
306 | |
4ea707e1 |
307 | if ((a & 0x30) == 0x20 && Pico32x.regs[a/2] != d) { |
acd35d4c |
308 | Pico32x.regs[a/2] = d; |
4ea707e1 |
309 | p32x_poll_undetect(&m68k_poll, P32XF_68KPOLL); |
acd35d4c |
310 | return; |
311 | } |
312 | |
4ea707e1 |
313 | switch (a) { |
314 | case 0x14: Pico32x.sh2irqs &= ~P32XI_VRES; goto irls; |
315 | case 0x16: Pico32x.sh2irqs &= ~P32XI_VINT; goto irls; |
316 | case 0x18: Pico32x.sh2irqs &= ~P32XI_HINT; goto irls; |
317 | case 0x1a: Pico32x.sh2irqi[0] &= ~P32XI_CMD; goto irls; |
318 | case 0x1c: Pico32x.sh2irqs &= ~P32XI_PWM; goto irls; |
319 | } |
320 | |
acd35d4c |
321 | p32x_sh2reg_write8(a | 1, d); |
4ea707e1 |
322 | return; |
323 | |
324 | irls: |
325 | p32x_update_irls(); |
326 | } |
327 | |
328 | static u32 sh2_peripheral_read(u32 a) |
329 | { |
330 | u32 d; |
331 | a &= 0x1fc; |
332 | d = Pico32xMem->sh2_peri_regs[0][a / 4]; |
333 | |
334 | elprintf(EL_32X, "sh2 peri r32 [%08x] %08x @%06x", a, d, ash2_pc()); |
335 | return d; |
acd35d4c |
336 | } |
337 | |
4ea707e1 |
338 | static void sh2_peripheral_write(u32 a, u32 d) |
339 | { |
340 | unsigned int *r = Pico32xMem->sh2_peri_regs[0]; |
341 | elprintf(EL_32X, "sh2 peri w32 [%08x] %08x @%06x", a, d, ash2_pc()); |
342 | |
343 | a &= 0x1fc; |
344 | r[a / 4] = d; |
345 | |
346 | if ((a == 0x1b0 || a == 0x18c) && (dmac0->chcr0 & 3) == 1 && (dmac0->dmaor & 1)) { |
347 | elprintf(EL_32X, "sh2 DMA %08x -> %08x, cnt %d, chcr %04x @%06x", |
348 | dmac0->sar0, dmac0->dar0, dmac0->tcr0, dmac0->chcr0, ash2_pc()); |
349 | dmac0->tcr0 &= 0xffffff; |
350 | // DREQ is only sent after first 4 words are written. |
351 | // we do multiple of 4 words to avoid messing up alignment |
352 | if (dmac0->sar0 == 0x20004012 && Pico32x.dmac_ptr && (Pico32x.dmac_ptr & 3) == 0) { |
353 | elprintf(EL_32X, "68k -> sh2 DMA"); |
354 | dma_68k2sh2_do(); |
355 | } |
356 | } |
357 | } |
358 | |
359 | // ------------------------------------------------------------------ |
be2c4208 |
360 | // default 32x handlers |
361 | u32 PicoRead8_32x(u32 a) |
362 | { |
363 | u32 d = 0; |
364 | if ((a & 0xffc0) == 0x5100) { // a15100 |
365 | d = p32x_reg_read16(a); |
366 | goto out_16to8; |
367 | } |
368 | |
974fdb5b |
369 | if (!(Pico32x.regs[0] & 1)) |
370 | goto no_vdp; |
371 | |
372 | if ((a & 0xfff0) == 0x5180) { // a15180 |
be2c4208 |
373 | d = p32x_vdp_read16(a); |
374 | goto out_16to8; |
375 | } |
376 | |
974fdb5b |
377 | if ((a & 0xfe00) == 0x5200) { // a15200 |
378 | d = Pico32xMem->pal[(a & 0x1ff) / 2]; |
379 | goto out_16to8; |
380 | } |
381 | |
382 | no_vdp: |
be2c4208 |
383 | if ((a & 0xfffc) == 0x30ec) { // a130ec |
384 | d = str_mars[a & 3]; |
385 | goto out; |
386 | } |
387 | |
388 | elprintf(EL_UIO, "m68k unmapped r8 [%06x] @%06x", a, SekPc); |
389 | return d; |
390 | |
391 | out_16to8: |
392 | if (a & 1) |
393 | d &= 0xff; |
394 | else |
395 | d >>= 8; |
396 | |
397 | out: |
398 | elprintf(EL_32X, "m68k 32x r8 [%06x] %02x @%06x", a, d, SekPc); |
399 | return d; |
400 | } |
401 | |
402 | u32 PicoRead16_32x(u32 a) |
403 | { |
404 | u32 d = 0; |
405 | if ((a & 0xffc0) == 0x5100) { // a15100 |
406 | d = p32x_reg_read16(a); |
407 | goto out; |
408 | } |
409 | |
974fdb5b |
410 | if (!(Pico32x.regs[0] & 1)) |
411 | goto no_vdp; |
412 | |
413 | if ((a & 0xfff0) == 0x5180) { // a15180 |
be2c4208 |
414 | d = p32x_vdp_read16(a); |
415 | goto out; |
416 | } |
417 | |
974fdb5b |
418 | if ((a & 0xfe00) == 0x5200) { // a15200 |
419 | d = Pico32xMem->pal[(a & 0x1ff) / 2]; |
420 | goto out; |
421 | } |
422 | |
423 | no_vdp: |
be2c4208 |
424 | if ((a & 0xfffc) == 0x30ec) { // a130ec |
425 | d = !(a & 2) ? ('M'<<8)|'A' : ('R'<<8)|'S'; |
426 | goto out; |
427 | } |
428 | |
429 | elprintf(EL_UIO, "m68k unmapped r16 [%06x] @%06x", a, SekPc); |
430 | return d; |
431 | |
432 | out: |
433 | elprintf(EL_32X, "m68k 32x r16 [%06x] %04x @%06x", a, d, SekPc); |
434 | return d; |
435 | } |
436 | |
437 | void PicoWrite8_32x(u32 a, u32 d) |
438 | { |
439 | if ((a & 0xfc00) == 0x5000) |
440 | elprintf(EL_32X, "m68k 32x w8 [%06x] %02x @%06x", a, d & 0xff, SekPc); |
441 | |
442 | if ((a & 0xffc0) == 0x5100) { // a15100 |
443 | p32x_reg_write8(a, d); |
444 | return; |
445 | } |
446 | |
974fdb5b |
447 | if (!(Pico32x.regs[0] & 1)) |
448 | goto no_vdp; |
449 | |
450 | if ((a & 0xfff0) == 0x5180) { // a15180 |
be2c4208 |
451 | p32x_vdp_write8(a, d); |
452 | return; |
453 | } |
454 | |
974fdb5b |
455 | // TODO: verify |
456 | if ((a & 0xfe00) == 0x5200) { // a15200 |
457 | elprintf(EL_32X|EL_ANOMALY, "m68k 32x PAL w8 [%06x] %02x @%06x", a, d & 0xff, SekPc); |
458 | ((u8 *)Pico32xMem->pal)[(a & 0x1ff) ^ 1] = d; |
459 | Pico32x.dirty_pal = 1; |
460 | return; |
461 | } |
462 | |
463 | no_vdp: |
be2c4208 |
464 | elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc); |
465 | } |
466 | |
467 | void PicoWrite16_32x(u32 a, u32 d) |
468 | { |
469 | if ((a & 0xfc00) == 0x5000) |
470 | elprintf(EL_UIO, "m68k 32x w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc); |
471 | |
472 | if ((a & 0xffc0) == 0x5100) { // a15100 |
473 | p32x_reg_write16(a, d); |
474 | return; |
475 | } |
476 | |
974fdb5b |
477 | if (!(Pico32x.regs[0] & 1)) |
478 | goto no_vdp; |
479 | |
480 | if ((a & 0xfff0) == 0x5180) { // a15180 |
be2c4208 |
481 | p32x_vdp_write16(a, d); |
482 | return; |
483 | } |
484 | |
974fdb5b |
485 | if ((a & 0xfe00) == 0x5200) { // a15200 |
486 | Pico32xMem->pal[(a & 0x1ff) / 2] = d; |
487 | Pico32x.dirty_pal = 1; |
488 | return; |
489 | } |
490 | |
491 | no_vdp: |
be2c4208 |
492 | elprintf(EL_UIO, "m68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc); |
493 | } |
494 | |
495 | // hint vector is writeable |
496 | static void PicoWrite8_hint(u32 a, u32 d) |
497 | { |
498 | if ((a & 0xfffc) == 0x0070) { |
499 | Pico32xMem->m68k_rom[a ^ 1] = d; |
500 | return; |
501 | } |
502 | |
503 | elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc); |
504 | } |
505 | |
506 | static void PicoWrite16_hint(u32 a, u32 d) |
507 | { |
508 | if ((a & 0xfffc) == 0x0070) { |
509 | ((u16 *)Pico32xMem->m68k_rom)[a/2] = d; |
510 | return; |
511 | } |
512 | |
513 | elprintf(EL_UIO, "m68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc); |
514 | } |
515 | |
974fdb5b |
516 | void Pico32xSwapDRAM(int b) |
517 | { |
518 | cpu68k_map_set(m68k_read8_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0); |
519 | cpu68k_map_set(m68k_read16_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0); |
520 | cpu68k_map_set(m68k_write8_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0); |
521 | cpu68k_map_set(m68k_write16_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0); |
522 | } |
523 | |
5e49c3a8 |
524 | static void bank_switch(int b) |
525 | { |
526 | unsigned int rs, bank; |
527 | |
528 | bank = b << 20; |
529 | if (bank >= Pico.romsize) { |
530 | elprintf(EL_32X|EL_ANOMALY, "missing bank @ %06x", bank); |
531 | return; |
532 | } |
533 | |
534 | // 32X ROM (unbanked, XXX: consider mirroring?) |
535 | rs = (Pico.romsize + M68K_BANK_MASK) & ~M68K_BANK_MASK; |
536 | rs -= bank; |
537 | if (rs > 0x100000) |
538 | rs = 0x100000; |
539 | cpu68k_map_set(m68k_read8_map, 0x900000, 0x900000 + rs - 1, Pico.rom + bank, 0); |
540 | cpu68k_map_set(m68k_read16_map, 0x900000, 0x900000 + rs - 1, Pico.rom + bank, 0); |
541 | |
542 | elprintf(EL_32X, "bank %06x-%06x -> %06x", 0x900000, 0x900000 + rs - 1, bank); |
543 | } |
544 | |
acd35d4c |
545 | // ----------------------------------------------------------------- |
546 | // SH2 |
547 | // ----------------------------------------------------------------- |
548 | |
4ea707e1 |
549 | u32 p32x_sh2_read8(u32 a) |
acd35d4c |
550 | { |
4ea707e1 |
551 | int pd = 0; |
acd35d4c |
552 | u32 d = 0; |
4ea707e1 |
553 | |
acd35d4c |
554 | if (a < sizeof(Pico32xMem->sh2_rom_m)) |
555 | return Pico32xMem->sh2_rom_m[a ^ 1]; |
556 | |
557 | if ((a & 0x0ffc0000) == 0x06000000) |
558 | return Pico32xMem->sdram[(a & 0x3ffff) ^ 1]; |
559 | |
560 | if ((a & 0x0fc00000) == 0x02000000) |
561 | if ((a & 0x003fffff) < Pico.romsize) |
562 | return Pico.rom[(a & 0x3fffff) ^ 1]; |
563 | |
564 | if ((a & 0x0fffff00) == 0x4000) { |
565 | d = p32x_sh2reg_read16(a); |
4ea707e1 |
566 | pd = P32XF_MSH2POLL; |
567 | goto out_pd; |
acd35d4c |
568 | } |
569 | |
570 | if ((a & 0x0fffff00) == 0x4100) { |
571 | d = p32x_vdp_read16(a); |
4ea707e1 |
572 | pd = P32XF_MSH2VPOLL; |
573 | goto out_pd; |
acd35d4c |
574 | } |
575 | |
576 | if ((a & 0x0fffff00) == 0x4200) { |
577 | d = Pico32xMem->pal[(a & 0x1ff) / 2]; |
578 | goto out_16to8; |
579 | } |
580 | |
581 | elprintf(EL_UIO, "sh2 unmapped r8 [%08x] %02x @%06x", a, d, ash2_pc()); |
582 | return d; |
583 | |
4ea707e1 |
584 | out_pd: |
585 | if (p32x_poll_detect(&msh2_poll, a, ash2_pc(), pd)) |
586 | ash2_end_run(8); |
587 | |
acd35d4c |
588 | out_16to8: |
589 | if (a & 1) |
590 | d &= 0xff; |
591 | else |
592 | d >>= 8; |
593 | |
594 | elprintf(EL_32X, "sh2 r8 [%08x] %02x @%06x", a, d, ash2_pc()); |
595 | return d; |
596 | } |
597 | |
4ea707e1 |
598 | u32 p32x_sh2_read16(u32 a) |
acd35d4c |
599 | { |
4ea707e1 |
600 | int pd = 0; |
acd35d4c |
601 | u32 d = 0; |
3cf9570b |
602 | |
acd35d4c |
603 | if (a < sizeof(Pico32xMem->sh2_rom_m)) |
604 | return *(u16 *)(Pico32xMem->sh2_rom_m + a); |
605 | |
606 | if ((a & 0x0ffc0000) == 0x06000000) |
607 | return ((u16 *)Pico32xMem->sdram)[(a & 0x3ffff) / 2]; |
608 | |
609 | if ((a & 0x0fc00000) == 0x02000000) |
610 | if ((a & 0x003fffff) < Pico.romsize) |
611 | return ((u16 *)Pico.rom)[(a & 0x3fffff) / 2]; |
612 | |
613 | if ((a & 0x0fffff00) == 0x4000) { |
614 | d = p32x_sh2reg_read16(a); |
4ea707e1 |
615 | pd = P32XF_MSH2POLL; |
616 | goto out_pd; |
acd35d4c |
617 | } |
618 | |
619 | if ((a & 0x0fffff00) == 0x4100) { |
620 | d = p32x_vdp_read16(a); |
4ea707e1 |
621 | pd = P32XF_MSH2VPOLL; |
622 | goto out_pd; |
acd35d4c |
623 | } |
624 | |
625 | if ((a & 0x0fffff00) == 0x4200) { |
626 | d = Pico32xMem->pal[(a & 0x1ff) / 2]; |
627 | goto out; |
628 | } |
629 | |
630 | elprintf(EL_UIO, "sh2 unmapped r16 [%08x] %04x @%06x", a, d, ash2_pc()); |
631 | return d; |
632 | |
4ea707e1 |
633 | out_pd: |
634 | if (p32x_poll_detect(&msh2_poll, a, ash2_pc(), pd)) |
635 | ash2_end_run(8); |
636 | |
acd35d4c |
637 | out: |
638 | elprintf(EL_32X, "sh2 r16 [%08x] %04x @%06x", a, d, ash2_pc()); |
639 | return d; |
640 | } |
641 | |
4ea707e1 |
642 | u32 p32x_sh2_read32(u32 a) |
acd35d4c |
643 | { |
4ea707e1 |
644 | if ((a & 0xfffffe00) == 0xfffffe00) |
645 | return sh2_peripheral_read(a); |
646 | |
acd35d4c |
647 | // elprintf(EL_UIO, "sh2 r32 [%08x] %08x @%06x", a, d, ash2_pc()); |
4ea707e1 |
648 | return (p32x_sh2_read16(a) << 16) | p32x_sh2_read16(a + 2); |
acd35d4c |
649 | } |
650 | |
4ea707e1 |
651 | void p32x_sh2_write8(u32 a, u32 d) |
acd35d4c |
652 | { |
653 | if ((a & 0x0ffffc00) == 0x4000) |
654 | elprintf(EL_32X, "sh2 w8 [%08x] %02x @%06x", a, d & 0xff, ash2_pc()); |
655 | |
656 | if ((a & 0x0ffc0000) == 0x06000000) { |
657 | Pico32xMem->sdram[(a & 0x3ffff) ^ 1] = d; |
658 | return; |
659 | } |
660 | |
266c6afa |
661 | if ((a & 0x0ffe0000) == 0x04000000) { |
662 | u8 *dram = (u8 *)Pico32xMem->dram[(Pico32x.vdp_regs[0x0a/2] & P32XV_FS) ^ 1]; |
663 | dram[(a & 0x1ffff) ^ 1] = d; |
664 | return; |
665 | } |
666 | |
acd35d4c |
667 | if ((a & 0x0fffff00) == 0x4100) { |
668 | p32x_vdp_write8(a, d); |
669 | return; |
670 | } |
671 | |
672 | if ((a & 0x0fffff00) == 0x4000) { |
673 | p32x_sh2reg_write8(a, d); |
674 | return; |
675 | } |
676 | |
677 | elprintf(EL_UIO, "sh2 unmapped w8 [%08x] %02x @%06x", a, d & 0xff, ash2_pc()); |
678 | } |
679 | |
4ea707e1 |
680 | void p32x_sh2_write16(u32 a, u32 d) |
acd35d4c |
681 | { |
682 | if ((a & 0x0ffffc00) == 0x4000) |
683 | elprintf(EL_32X, "sh2 w16 [%08x] %04x @%06x", a, d & 0xffff, ash2_pc()); |
684 | |
685 | if ((a & 0x0ffc0000) == 0x06000000) { |
686 | ((u16 *)Pico32xMem->sdram)[(a & 0x3ffff) / 2] = d; |
687 | return; |
688 | } |
689 | |
266c6afa |
690 | if ((a & 0x0ffe0000) == 0x04000000) { |
691 | Pico32xMem->dram[(Pico32x.vdp_regs[0x0a/2] & P32XV_FS) ^ 1][(a & 0x1ffff) / 2] = d; |
692 | return; |
693 | } |
694 | |
acd35d4c |
695 | if ((a & 0x0fffff00) == 0x4100) { |
696 | p32x_vdp_write16(a, d); |
697 | return; |
698 | } |
699 | |
700 | if ((a & 0x0ffffe00) == 0x4200) { |
701 | Pico32xMem->pal[(a & 0x1ff) / 2] = d; |
702 | Pico32x.dirty_pal = 1; |
703 | return; |
704 | } |
705 | |
706 | if ((a & 0x0fffff00) == 0x4000) { |
707 | p32x_sh2reg_write16(a, d); |
708 | return; |
709 | } |
710 | |
711 | elprintf(EL_UIO, "sh2 unmapped w16 [%08x] %04x @%06x", a, d & 0xffff, ash2_pc()); |
712 | } |
713 | |
4ea707e1 |
714 | void p32x_sh2_write32(u32 a, u32 d) |
acd35d4c |
715 | { |
4ea707e1 |
716 | if ((a & 0xfffffe00) == 0xfffffe00) { |
717 | sh2_peripheral_write(a, d); |
718 | return; |
719 | } |
720 | |
acd35d4c |
721 | // elprintf(EL_UIO, "sh2 w32 [%08x] %08x @%06x", a, d, ash2_pc()); |
4ea707e1 |
722 | p32x_sh2_write16(a, d >> 16); |
723 | p32x_sh2_write16(a + 2, d); |
acd35d4c |
724 | } |
725 | |
be2c4208 |
726 | #define HWSWAP(x) (((x) << 16) | ((x) >> 16)) |
727 | void PicoMemSetup32x(void) |
728 | { |
729 | unsigned short *ps; |
730 | unsigned int *pl; |
5e49c3a8 |
731 | unsigned int rs; |
be2c4208 |
732 | int i; |
733 | |
734 | Pico32xMem = calloc(1, sizeof(*Pico32xMem)); |
735 | if (Pico32xMem == NULL) { |
736 | elprintf(EL_STATUS, "OOM"); |
737 | return; |
738 | } |
739 | |
4ea707e1 |
740 | dmac0 = (void *)&Pico32xMem->sh2_peri_regs[0][0x180 / 4]; |
741 | |
be2c4208 |
742 | // generate 68k ROM |
743 | ps = (unsigned short *)Pico32xMem->m68k_rom; |
744 | pl = (unsigned int *)Pico32xMem->m68k_rom; |
745 | for (i = 1; i < 0xc0/4; i++) |
974fdb5b |
746 | pl[i] = HWSWAP(0x880200 + (i - 1) * 6); |
be2c4208 |
747 | |
748 | // fill with nops |
749 | for (i = 0xc0/2; i < 0x100/2; i++) |
750 | ps[i] = 0x4e71; |
751 | |
5e49c3a8 |
752 | #if 0 |
be2c4208 |
753 | ps[0xc0/2] = 0x46fc; |
754 | ps[0xc2/2] = 0x2700; // move #0x2700,sr |
755 | ps[0xfe/2] = 0x60fe; // jump to self |
5e49c3a8 |
756 | #else |
757 | ps[0xfe/2] = 0x4e75; // rts |
758 | #endif |
be2c4208 |
759 | |
760 | // fill remaining mem with ROM |
974fdb5b |
761 | memcpy(Pico32xMem->m68k_rom + 0x100, Pico.rom + 0x100, sizeof(Pico32xMem->m68k_rom) - 0x100); |
be2c4208 |
762 | |
acd35d4c |
763 | // 32X ROM |
764 | // TODO: move |
765 | { |
766 | FILE *f = fopen("32X_M_BIOS.BIN", "rb"); |
767 | int i; |
768 | if (f == NULL) { |
769 | printf("missing BIOS\n"); |
770 | exit(1); |
771 | } |
772 | fread(Pico32xMem->sh2_rom_m, 1, sizeof(Pico32xMem->sh2_rom_m), f); |
773 | fclose(f); |
774 | for (i = 0; i < sizeof(Pico32xMem->sh2_rom_m); i += 2) { |
775 | int t = Pico32xMem->sh2_rom_m[i]; |
776 | Pico32xMem->sh2_rom_m[i] = Pico32xMem->sh2_rom_m[i + 1]; |
777 | Pico32xMem->sh2_rom_m[i + 1] = t; |
778 | } |
779 | } |
780 | |
be2c4208 |
781 | // cartridge area becomes unmapped |
782 | // XXX: we take the easy way and don't unmap ROM, |
783 | // so that we can avoid handling the RV bit. |
784 | // m68k_map_unmap(0x000000, 0x3fffff); |
785 | |
786 | // MD ROM area |
974fdb5b |
787 | rs = sizeof(Pico32xMem->m68k_rom); |
788 | cpu68k_map_set(m68k_read8_map, 0x000000, rs - 1, Pico32xMem->m68k_rom, 0); |
789 | cpu68k_map_set(m68k_read16_map, 0x000000, rs - 1, Pico32xMem->m68k_rom, 0); |
790 | cpu68k_map_set(m68k_write8_map, 0x000000, rs - 1, PicoWrite8_hint, 1); // TODO verify |
791 | cpu68k_map_set(m68k_write16_map, 0x000000, rs - 1, PicoWrite16_hint, 1); |
792 | |
793 | // DRAM area |
794 | Pico32xSwapDRAM(1); |
be2c4208 |
795 | |
796 | // 32X ROM (unbanked, XXX: consider mirroring?) |
5e49c3a8 |
797 | rs = (Pico.romsize + M68K_BANK_MASK) & ~M68K_BANK_MASK; |
798 | if (rs > 0x80000) |
799 | rs = 0x80000; |
800 | cpu68k_map_set(m68k_read8_map, 0x880000, 0x880000 + rs - 1, Pico.rom, 0); |
801 | cpu68k_map_set(m68k_read16_map, 0x880000, 0x880000 + rs - 1, Pico.rom, 0); |
be2c4208 |
802 | |
803 | // 32X ROM (banked) |
5e49c3a8 |
804 | bank_switch(0); |
be2c4208 |
805 | } |
806 | |