draw: fix mistake from 9c9cda8c3
[picodrive.git] / pico / pico_cmn.c
CommitLineData
cff531af 1/*
2 * common code for pico.c and cd/pico.c
3 * (C) notaz, 2007-2009
4 *
5 * This work is licensed under the terms of MAME license.
6 * See COPYING file in the top-level directory.
7 */
8b99ab90 8
69996cb7 9#define CYCLES_M68K_LINE 488 // suitable for both PAL/NTSC
10#define CYCLES_M68K_VINT_LAG 68
11#define CYCLES_M68K_ASD 148
bf5fbbb4 12#define CYCLES_S68K_LINE 795
236990cf 13#define CYCLES_S68K_VINT_LAG 111
bf5fbbb4 14#define CYCLES_S68K_ASD 241
69996cb7 15
16// pad delay (for 6 button pads)
17#define PAD_DELAY \
602133e1 18 if (PicoOpt&POPT_6BTN_PAD) { \
69996cb7 19 if(Pico.m.padDelay[0]++ > 25) Pico.m.padTHPhase[0]=0; \
20 if(Pico.m.padDelay[1]++ > 25) Pico.m.padTHPhase[1]=0; \
21 }
22
bf5fbbb4 23// CPUS_RUN
c987bb5c 24#ifndef CPUS_RUN
538a6098 25#define CPUS_RUN(m68k_cycles,s68k_cycles) \
c987bb5c 26 SekRunM68k(m68k_cycles)
bf5fbbb4 27#endif
28
ed4402a7 29static __inline void SekRunM68k(int cyc)
30{
31 int cyc_do;
32 pprof_start(m68k);
19886062 33 pevt_log_m68k_o(EVT_RUN_START);
ed4402a7 34
35 SekCycleAim+=cyc;
19886062 36 if ((cyc_do=SekCycleAim-SekCycleCnt) <= 0)
37 goto out;
38
ed4402a7 39#if defined(EMU_CORE_DEBUG)
40 // this means we do run-compare
41 SekCycleCnt+=CM_compareRun(cyc_do, 0);
42#elif defined(EMU_C68K)
43 PicoCpuCM68k.cycles=cyc_do;
44 CycloneRun(&PicoCpuCM68k);
45 SekCycleCnt+=cyc_do-PicoCpuCM68k.cycles;
46#elif defined(EMU_M68K)
47 SekCycleCnt+=m68k_execute(cyc_do);
48#elif defined(EMU_F68K)
3e5b912c 49 SekCycleCnt+=fm68k_emulate(cyc_do, 0, 0);
ed4402a7 50#endif
51
19886062 52out:
12da51c2 53 SekTrace(0);
19886062 54 pevt_log_m68k_o(EVT_RUN_END);
ed4402a7 55 pprof_end(m68k);
56}
57
69996cb7 58static int PicoFrameHints(void)
59{
60 struct PicoVideo *pv=&Pico.video;
9761a7d0 61 int lines, y, lines_vis = 224, line_sample, skip, vcnt_wrap;
69996cb7 62 int hint; // Hint counter
63
19886062 64 pevt_log_m68k_o(EVT_FRAME_START);
9761a7d0 65 pv->v_counter = Pico.m.scanline = 0;
538a6098 66
602133e1 67 if ((PicoOpt&POPT_ALT_RENDERER) && !PicoSkipFrame && (pv->reg[1]&0x40)) { // fast rend., display enabled
03e4f2a3 68 // draw a frame just after vblank in alternative render mode
69 // yes, this will cause 1 frame lag, but this is inaccurate mode anyway.
70 PicoFrameFull();
71#ifdef DRAW_FINISH_FUNC
72 DRAW_FINISH_FUNC();
73#endif
74 skip = 1;
75 }
76 else skip=PicoSkipFrame;
77
69996cb7 78 if (Pico.m.pal) {
69996cb7 79 line_sample = 68;
9761a7d0 80 if (pv->reg[1]&8) lines_vis = 240;
69996cb7 81 } else {
69996cb7 82 line_sample = 93;
83 }
84
85 SekCyclesReset();
4b9c5888 86 z80_resetCycles();
bf5fbbb4 87#ifdef PICO_CD
88 SekCyclesResetS68k();
89#endif
4b9c5888 90 PsndDacLine = 0;
7b3f44c6 91 emustatus &= ~1;
69996cb7 92
93 pv->status&=~0x88; // clear V-Int, come out of vblank
94
95 hint=pv->reg[10]; // Load H-Int counter
96 //dprintf("-hint: %i", hint);
97
98 // This is to make active scan longer (needed for Double Dragon 2, mainly)
538a6098 99 CPUS_RUN(CYCLES_M68K_ASD, CYCLES_S68K_ASD);
69996cb7 100
b6d7ac70 101 for (y = 0; y < lines_vis; y++)
69996cb7 102 {
9761a7d0 103 pv->v_counter = Pico.m.scanline = y;
104 if ((pv->reg[12]&6) == 6) { // interlace mode 2
105 pv->v_counter <<= 1;
106 pv->v_counter |= pv->v_counter >> 8;
107 pv->v_counter &= 0xff;
108 }
69996cb7 109
110 // VDP FIFO
111 pv->lwrite_cnt -= 12;
112 if (pv->lwrite_cnt <= 0) {
113 pv->lwrite_cnt=0;
114 Pico.video.status|=0x200;
115 }
116
117 PAD_DELAY
bf5fbbb4 118#ifdef PICO_CD
119 check_cd_dma();
120#endif
69996cb7 121
122 // H-Interrupts:
123 if (--hint < 0) // y <= lines_vis: Comix Zone, Golden Axe
124 {
125 hint=pv->reg[10]; // Reload H-Int counter
126 pv->pending_ints|=0x10;
127 if (pv->reg[0]&0x10) {
128 elprintf(EL_INTS, "hint: @ %06x [%i]", SekPc, SekCycleCnt);
129 SekInterrupt(4);
130 }
131 }
132
133 // decide if we draw this line
b6d7ac70 134 if (!skip && (PicoOpt & POPT_ALT_RENDERER))
fad24893 135 {
b6d7ac70 136 // find the right moment for frame renderer, when display is no longer blanked
137 if ((pv->reg[1]&0x40) || y > 100) {
138 PicoFrameFull();
fad24893 139#ifdef DRAW_FINISH_FUNC
b6d7ac70 140 DRAW_FINISH_FUNC();
fad24893 141#endif
b6d7ac70 142 skip = 1;
fad24893 143 }
144 }
69996cb7 145
69996cb7 146 // get samples from sound chips
7b3f44c6 147 if ((y == 224 || y == line_sample) && PsndOut)
4b9c5888 148 {
be297089 149 if (Pico.m.z80Run && !Pico.m.z80_reset && (PicoOpt&POPT_EN_Z80))
4b9c5888 150 PicoSyncZ80(SekCycleCnt);
151 if (ym2612.dacen && PsndDacLine <= y)
152 PsndDoDAC(y);
a8fd6e37 153#ifdef PICO_32X
19886062 154 p32x_sync_sh2s(SekCyclesDoneT2());
a8fd6e37 155#endif
7b3f44c6 156 PsndGetSamples(y);
4b9c5888 157 }
69996cb7 158
159 // Run scanline:
160 if (Pico.m.dma_xfers) SekCyclesBurn(CheckDMA());
538a6098 161 CPUS_RUN(CYCLES_M68K_LINE, CYCLES_S68K_LINE);
bf5fbbb4 162
163#ifdef PICO_CD
164 update_chips();
017512f2 165#else
b0677887 166 if (PicoLineHook) PicoLineHook();
bf5fbbb4 167#endif
19886062 168 pevt_log_m68k_o(EVT_NEXT_LINE);
69996cb7 169 }
170
03e4f2a3 171 if (!skip)
b6d7ac70 172 {
173 if (DrawScanline < y)
174 PicoDrawSync(y - 1, 0);
175#ifdef DRAW_FINISH_FUNC
03e4f2a3 176 DRAW_FINISH_FUNC();
8ab3e3c1 177#endif
b6d7ac70 178 }
8ab3e3c1 179
947fb5f9 180 // V-int line (224 or 240)
181 Pico.m.scanline = y;
182 pv->v_counter = 0xe0; // bad for 240 mode
183 if ((pv->reg[12]&6) == 6) pv->v_counter = 0xc1;
184
69996cb7 185 // VDP FIFO
186 pv->lwrite_cnt=0;
187 Pico.video.status|=0x200;
188
5f9a0d16 189 memcpy(PicoPadInt, PicoPad, sizeof(PicoPadInt));
69996cb7 190 PAD_DELAY
bf5fbbb4 191#ifdef PICO_CD
192 check_cd_dma();
193#endif
69996cb7 194
195 // Last H-Int:
196 if (--hint < 0)
197 {
198 hint=pv->reg[10]; // Reload H-Int counter
199 pv->pending_ints|=0x10;
200 //printf("rhint: %i @ %06x [%i|%i]\n", hint, SekPc, y, SekCycleCnt);
201 if (pv->reg[0]&0x10) SekInterrupt(4);
202 }
203
69996cb7 204 pv->status|=0x08; // go into vblank
205 pv->pending_ints|=0x20;
206
207 // the following SekRun is there for several reasons:
208 // there must be a delay after vblank bit is set and irq is asserted (Mazin Saga)
209 // also delay between F bit (bit 7) is set in SR and IRQ happens (Ex-Mutants)
210 // also delay between last H-int and V-int (Golden Axe 3)
236990cf 211 CPUS_RUN(CYCLES_M68K_VINT_LAG, CYCLES_S68K_VINT_LAG);
4b9c5888 212
69996cb7 213 if (pv->reg[1]&0x20) {
214 elprintf(EL_INTS, "vint: @ %06x [%i]", SekPc, SekCycleCnt);
215 SekInterrupt(6);
216 }
be297089 217 if (Pico.m.z80Run && !Pico.m.z80_reset && (PicoOpt&POPT_EN_Z80)) {
4b9c5888 218 PicoSyncZ80(SekCycleCnt);
583ab72c 219 elprintf(EL_INTS, "zint");
69996cb7 220 z80_int();
583ab72c 221 }
69996cb7 222
a8fd6e37 223#ifdef PICO_32X
19886062 224 p32x_sync_sh2s(SekCyclesDoneT2());
a8fd6e37 225 p32x_start_blank();
226#endif
227
69996cb7 228 // get samples from sound chips
7b3f44c6 229 if (y == 224 && PsndOut)
230 {
231 if (ym2612.dacen && PsndDacLine <= y)
232 PsndDoDAC(y);
233 PsndGetSamples(y);
234 }
69996cb7 235
236 // Run scanline:
237 if (Pico.m.dma_xfers) SekCyclesBurn(CheckDMA());
bf5fbbb4 238 CPUS_RUN(CYCLES_M68K_LINE - CYCLES_M68K_VINT_LAG - CYCLES_M68K_ASD,
236990cf 239 CYCLES_S68K_LINE - CYCLES_S68K_VINT_LAG - CYCLES_S68K_ASD);
bf5fbbb4 240
241#ifdef PICO_CD
017512f2 242 update_chips();
243#else
b0677887 244 if (PicoLineHook) PicoLineHook();
bf5fbbb4 245#endif
19886062 246 pevt_log_m68k_o(EVT_NEXT_LINE);
69996cb7 247
5e128c6d 248 lines = scanlines_total;
249 vcnt_wrap = Pico.m.pal ? 0x103 : 0xEB; // based on Gens, TODO: verify
69996cb7 250
b6d7ac70 251 for (y++; y < lines; y++)
69996cb7 252 {
9761a7d0 253 pv->v_counter = Pico.m.scanline = y;
254 if (y >= vcnt_wrap)
255 pv->v_counter -= Pico.m.pal ? 56 : 6;
256 if ((pv->reg[12]&6) == 6)
257 pv->v_counter = (pv->v_counter << 1) | 1;
258 pv->v_counter &= 0xff;
69996cb7 259
260 PAD_DELAY
bf5fbbb4 261#ifdef PICO_CD
262 check_cd_dma();
263#endif
69996cb7 264
69996cb7 265 // Run scanline:
266 if (Pico.m.dma_xfers) SekCyclesBurn(CheckDMA());
538a6098 267 CPUS_RUN(CYCLES_M68K_LINE, CYCLES_S68K_LINE);
bf5fbbb4 268
269#ifdef PICO_CD
270 update_chips();
017512f2 271#else
b0677887 272 if (PicoLineHook) PicoLineHook();
bf5fbbb4 273#endif
19886062 274 pevt_log_m68k_o(EVT_NEXT_LINE);
69996cb7 275 }
276
4b9c5888 277 // sync z80
be297089 278 if (Pico.m.z80Run && !Pico.m.z80_reset && (PicoOpt&POPT_EN_Z80))
e53704e6 279 PicoSyncZ80(Pico.m.pal ? 151809 : 127671); // cycles adjusted for converter
4b9c5888 280 if (PsndOut && ym2612.dacen && PsndDacLine <= lines-1)
281 PsndDoDAC(lines-1);
282
a8fd6e37 283#ifdef PICO_32X
19886062 284 p32x_sync_sh2s(SekCyclesDoneT2());
a8fd6e37 285#endif
e53704e6 286 timers_cycle();
287
69996cb7 288 return 0;
289}
290
291#undef PAD_DELAY
bf5fbbb4 292#undef CPUS_RUN
69996cb7 293