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vdp timing hacks
[picodrive.git] / pico / videoport.c
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cff531af 1/*\r
2 * PicoDrive\r
3 * (c) Copyright Dave, 2004\r
4 * (C) notaz, 2006-2009\r
5 *\r
6 * This work is licensed under the terms of MAME license.\r
7 * See COPYING file in the top-level directory.\r
8 */\r
cc68a136 9\r
efcba75f 10#include "pico_int.h"\r
0c7d1ba3 11#define NEED_DMA_SOURCE\r
7feeb880 12#include "memory.h"\r
cc68a136 13\r
53f948c9 14int line_base_cycles;\r
cc68a136 15extern const unsigned char hcounts_32[];\r
16extern const unsigned char hcounts_40[];\r
cc68a136 17\r
eff55556 18#ifndef UTYPES_DEFINED\r
ab0607f7 19typedef unsigned char u8;\r
cc68a136 20typedef unsigned short u16;\r
eff55556 21typedef unsigned int u32;\r
22#define UTYPES_DEFINED\r
23#endif\r
cc68a136 24\r
0c7d1ba3 25int (*PicoDmaHook)(unsigned int source, int len, unsigned short **base, unsigned int *mask) = NULL;\r
cc68a136 26\r
69996cb7 27static __inline void AutoIncrement(void)\r
cc68a136 28{\r
29 Pico.video.addr=(unsigned short)(Pico.video.addr+Pico.video.reg[0xf]);\r
30}\r
31\r
b71cbbf7 32static NOINLINE void VideoWrite128(u32 a, u16 d)\r
33{\r
34 // nasty\r
35 a = ((a & 2) >> 1) | ((a & 0x400) >> 9) | (a & 0x3FC) | ((a & 0x1F800) >> 1);\r
36 ((u8 *)Pico.vram)[a] = d;\r
37}\r
38\r
cc68a136 39static void VideoWrite(u16 d)\r
40{\r
41 unsigned int a=Pico.video.addr;\r
42\r
43 switch (Pico.video.type)\r
44 {\r
45 case 1: if(a&1) d=(u16)((d<<8)|(d>>8)); // If address is odd, bytes are swapped (which game needs this?)\r
46 Pico.vram [(a>>1)&0x7fff]=d;\r
947fb5f9 47 if (a - ((unsigned)(Pico.video.reg[5]&0x7f) << 9) < 0x400)\r
ea38612f 48 Pico.est.rendstatus |= PDRAW_DIRTY_SPRITES;\r
947fb5f9 49 break;\r
cc68a136 50 case 3: Pico.m.dirtyPal = 1;\r
cc68a136 51 Pico.cram [(a>>1)&0x003f]=d; break; // wraps (Desert Strike)\r
52 case 5: Pico.vsram[(a>>1)&0x003f]=d; break;\r
b71cbbf7 53 case 0x81:\r
54 a |= Pico.video.addr_u << 16;\r
55 VideoWrite128(a, d);\r
56 break;\r
d26dc685 57 //default:elprintf(EL_ANOMALY, "VDP write %04x with bad type %i", d, Pico.video.type); break;\r
cc68a136 58 }\r
59\r
cc68a136 60 AutoIncrement();\r
61}\r
62\r
69996cb7 63static unsigned int VideoRead(void)\r
cc68a136 64{\r
65 unsigned int a=0,d=0;\r
66\r
67 a=Pico.video.addr; a>>=1;\r
68\r
69 switch (Pico.video.type)\r
70 {\r
71 case 0: d=Pico.vram [a&0x7fff]; break;\r
72 case 8: d=Pico.cram [a&0x003f]; break;\r
73 case 4: d=Pico.vsram[a&0x003f]; break;\r
69996cb7 74 default:elprintf(EL_ANOMALY, "VDP read with bad type %i", Pico.video.type); break;\r
cc68a136 75 }\r
4f672280 76\r
cc68a136 77 AutoIncrement();\r
78 return d;\r
79}\r
80\r
69996cb7 81static int GetDmaLength(void)\r
cc68a136 82{\r
83 struct PicoVideo *pvid=&Pico.video;\r
84 int len=0;\r
85 // 16-bit words to transfer:\r
86 len =pvid->reg[0x13];\r
87 len|=pvid->reg[0x14]<<8;\r
0c7d1ba3 88 len = ((len - 1) & 0xffff) + 1;\r
cc68a136 89 return len;\r
90}\r
91\r
0c7d1ba3 92static void DmaSlow(int len, unsigned int source)\r
cc68a136 93{\r
0c7d1ba3 94 u32 inc = Pico.video.reg[0xf];\r
95 u32 a = Pico.video.addr;\r
96 u16 *r, *base = NULL;\r
97 u32 mask = 0x1ffff;\r
cc68a136 98\r
0c7d1ba3 99 elprintf(EL_VDPDMA, "DmaSlow[%i] %06x->%04x len %i inc=%i blank %i [%u] @ %06x",\r
312e9ce1 100 Pico.video.type, source, a, len, inc, (Pico.video.status&8)||!(Pico.video.reg[1]&0x40),\r
69996cb7 101 SekCyclesDone(), SekPc);\r
cc68a136 102\r
2aa27095 103 Pico.m.dma_xfers += len;\r
0c7d1ba3 104 if (Pico.m.dma_xfers < len) // lame 16bit var\r
105 Pico.m.dma_xfers = ~0;\r
ae214f1c 106 SekCyclesBurnRun(CheckDMA());\r
672ad671 107\r
0c7d1ba3 108 if ((source & 0xe00000) == 0xe00000) { // Ram\r
109 base = (u16 *)Pico.ram;\r
110 mask = 0xffff;\r
602133e1 111 }\r
112 else if (PicoAHW & PAHW_MCD)\r
113 {\r
0c7d1ba3 114 u8 r3 = Pico_mcd->s68k_regs[3];\r
115 elprintf(EL_VDPDMA, "DmaSlow CD, r3=%02x", r3);\r
116 if (source < 0x20000) { // Bios area\r
117 base = (u16 *)Pico_mcd->bios;\r
118 } else if ((source & 0xfc0000) == 0x200000) { // Word Ram\r
119 if (!(r3 & 4)) { // 2M mode\r
120 base = (u16 *)(Pico_mcd->word_ram2M + (source & 0x20000));\r
ab0607f7 121 } else {\r
fa1e5e29 122 if (source < 0x220000) { // 1M mode\r
0c7d1ba3 123 int bank = r3 & 1;\r
124 base = (u16 *)(Pico_mcd->word_ram1M[bank]);\r
69996cb7 125 } else {\r
0c7d1ba3 126 DmaSlowCell(source - 2, a, len, inc);\r
fa1e5e29 127 return;\r
69996cb7 128 }\r
ab0607f7 129 }\r
0c7d1ba3 130 source -= 2;\r
131 } else if ((source & 0xfe0000) == 0x020000) { // Prg Ram\r
132 base = (u16 *)Pico_mcd->prg_ram_b[r3 >> 6];\r
133 source -= 2; // XXX: test\r
ab0607f7 134 }\r
602133e1 135 }\r
136 else\r
137 {\r
50483b53 138 // if we have DmaHook, let it handle ROM because of possible DMA delay\r
0c7d1ba3 139 u32 source2;\r
140 if (PicoDmaHook && (source2 = PicoDmaHook(source, len, &base, &mask)))\r
141 source = source2;\r
142 else // Rom\r
143 base = m68k_dma_source(source);\r
ab0607f7 144 }\r
0c7d1ba3 145 if (!base) {\r
146 elprintf(EL_VDPDMA|EL_ANOMALY, "DmaSlow[%i] %06x->%04x: invalid src", Pico.video.type, source, a);\r
147 return;\r
672ad671 148 }\r
cc68a136 149\r
0c7d1ba3 150 // operate in words\r
151 source >>= 1;\r
152 mask >>= 1;\r
153\r
cc68a136 154 switch (Pico.video.type)\r
155 {\r
156 case 1: // vram\r
157 r = Pico.vram;\r
0c7d1ba3 158 if (inc == 2 && !(a & 1) && a + len * 2 < 0x10000\r
159 && !(((source + len - 1) ^ source) & ~mask))\r
cc68a136 160 {\r
cea65903 161 // most used DMA mode\r
0c7d1ba3 162 memcpy((char *)r + a, base + (source & mask), len * 2);\r
163 a += len * 2;\r
cea65903 164 }\r
165 else\r
166 {\r
167 for(; len; len--)\r
168 {\r
0c7d1ba3 169 u16 d = base[source++ & mask];\r
170 if(a & 1) d=(d<<8)|(d>>8);\r
171 r[a >> 1] = d;\r
cea65903 172 // AutoIncrement\r
0c7d1ba3 173 a = (u16)(a + inc);\r
cea65903 174 }\r
cc68a136 175 }\r
ea38612f 176 Pico.est.rendstatus |= PDRAW_DIRTY_SPRITES;\r
cc68a136 177 break;\r
4f672280 178\r
cc68a136 179 case 3: // cram\r
cc68a136 180 Pico.m.dirtyPal = 1;\r
181 r = Pico.cram;\r
0c7d1ba3 182 for (; len; len--)\r
cc68a136 183 {\r
0c7d1ba3 184 r[(a / 2) & 0x3f] = base[source++ & mask];\r
cc68a136 185 // AutoIncrement\r
0c7d1ba3 186 a += inc;\r
cc68a136 187 }\r
cc68a136 188 break;\r
189\r
0c7d1ba3 190 case 5: // vsram\r
cc68a136 191 r = Pico.vsram;\r
0c7d1ba3 192 for (; len; len--)\r
cc68a136 193 {\r
0c7d1ba3 194 r[(a / 2) & 0x3f] = base[source++ & mask];\r
cc68a136 195 // AutoIncrement\r
0c7d1ba3 196 a += inc;\r
cc68a136 197 }\r
cc68a136 198 break;\r
69996cb7 199\r
b71cbbf7 200 case 0x81: // vram 128k\r
201 a |= Pico.video.addr_u << 16;\r
202 for(; len; len--)\r
203 {\r
204 VideoWrite128(a, base[source++ & mask]);\r
205 // AutoIncrement\r
206 a = (a + inc) & 0x1ffff;\r
207 }\r
208 Pico.video.addr_u = a >> 16;\r
209 break;\r
210\r
69996cb7 211 default:\r
e7b3ad1b 212 if (Pico.video.type != 0 || (EL_LOGMASK & EL_VDPDMA))\r
213 elprintf(EL_VDPDMA|EL_ANOMALY, "DMA with bad type %i", Pico.video.type);\r
69996cb7 214 break;\r
cc68a136 215 }\r
216 // remember addr\r
217 Pico.video.addr=(u16)a;\r
218}\r
219\r
220static void DmaCopy(int len)\r
221{\r
222 u16 a=Pico.video.addr;\r
223 unsigned char *vr = (unsigned char *) Pico.vram;\r
cc68a136 224 unsigned char inc=Pico.video.reg[0xf];\r
225 int source;\r
ebd70cb5 226 elprintf(EL_VDPDMA, "DmaCopy len %i [%u]", len, SekCyclesDone());\r
4f672280 227\r
69996cb7 228 Pico.m.dma_xfers += len;\r
0c7d1ba3 229 if (Pico.m.dma_xfers < len)\r
230 Pico.m.dma_xfers = ~0;\r
2aa27095 231 Pico.video.status |= 2; // dma busy\r
cc68a136 232\r
233 source =Pico.video.reg[0x15];\r
234 source|=Pico.video.reg[0x16]<<8;\r
cc68a136 235\r
2aa27095 236 for (; len; len--)\r
cc68a136 237 {\r
0c7d1ba3 238 vr[a] = vr[source++ & 0xffff];\r
cc68a136 239 // AutoIncrement\r
240 a=(u16)(a+inc);\r
241 }\r
242 // remember addr\r
243 Pico.video.addr=a;\r
ea38612f 244 Pico.est.rendstatus |= PDRAW_DIRTY_SPRITES;\r
cc68a136 245}\r
246\r
0c7d1ba3 247static NOINLINE void DmaFill(int data)\r
cc68a136 248{\r
cc68a136 249 unsigned short a=Pico.video.addr;\r
250 unsigned char *vr=(unsigned char *) Pico.vram;\r
251 unsigned char high = (unsigned char) (data >> 8);\r
252 unsigned char inc=Pico.video.reg[0xf];\r
0c7d1ba3 253 int source;\r
254 int len, l;\r
4f672280 255\r
0c7d1ba3 256 len = GetDmaLength();\r
ebd70cb5 257 elprintf(EL_VDPDMA, "DmaFill len %i inc %i [%u]", len, inc, SekCyclesDone());\r
4f672280 258\r
69996cb7 259 Pico.m.dma_xfers += len;\r
0c7d1ba3 260 if (Pico.m.dma_xfers < len) // lame 16bit var\r
261 Pico.m.dma_xfers = ~0;\r
2aa27095 262 Pico.video.status |= 2; // dma busy\r
cc68a136 263\r
0c7d1ba3 264 switch (Pico.video.type)\r
265 {\r
266 case 1: // vram\r
267 for (l = len; l; l--) {\r
268 // Write upper byte to adjacent address\r
269 // (here we are byteswapped, so address is already 'adjacent')\r
270 vr[a] = high;\r
cc68a136 271\r
0c7d1ba3 272 // Increment address register\r
273 a = (u16)(a + inc);\r
274 }\r
275 break;\r
276 case 3: // cram\r
277 case 5: { // vsram\r
278 // TODO: needs fifo; anyone using these?\r
279 static int once;\r
280 if (!once++)\r
281 elprintf(EL_STATUS|EL_ANOMALY|EL_VDPDMA, "TODO: cram/vsram fill");\r
282 }\r
283 default:\r
284 a += len * inc;\r
285 break;\r
cc68a136 286 }\r
0c7d1ba3 287\r
cc68a136 288 // remember addr\r
0c7d1ba3 289 Pico.video.addr = a;\r
290 // register update\r
291 Pico.video.reg[0x13] = Pico.video.reg[0x14] = 0;\r
292 source = Pico.video.reg[0x15];\r
293 source |= Pico.video.reg[0x16] << 8;\r
294 source += len;\r
295 Pico.video.reg[0x15] = source;\r
296 Pico.video.reg[0x16] = source >> 8;\r
cc68a136 297\r
ea38612f 298 Pico.est.rendstatus |= PDRAW_DIRTY_SPRITES;\r
cc68a136 299}\r
300\r
0c7d1ba3 301static NOINLINE void CommandDma(void)\r
cc68a136 302{\r
303 struct PicoVideo *pvid=&Pico.video;\r
0c7d1ba3 304 u32 len, method;\r
305 u32 source;\r
cc68a136 306\r
307 if ((pvid->reg[1]&0x10)==0) return; // DMA not enabled\r
308\r
0c7d1ba3 309 len = GetDmaLength();\r
310 source =Pico.video.reg[0x15];\r
311 source|=Pico.video.reg[0x16] << 8;\r
312 source|=Pico.video.reg[0x17] << 16;\r
cc68a136 313\r
314 method=pvid->reg[0x17]>>6;\r
0c7d1ba3 315 if (method < 2)\r
316 DmaSlow(len, source << 1); // 68000 to VDP\r
317 else if (method == 3)\r
318 DmaCopy(len); // VRAM Copy\r
319 else\r
320 return;\r
321\r
322 source += len;\r
323 Pico.video.reg[0x13] = Pico.video.reg[0x14] = 0;\r
324 Pico.video.reg[0x15] = source;\r
325 Pico.video.reg[0x16] = source >> 8;\r
cc68a136 326}\r
327\r
b71cbbf7 328static NOINLINE void CommandChange(void)\r
cc68a136 329{\r
b71cbbf7 330 struct PicoVideo *pvid = &Pico.video;\r
331 unsigned int cmd, addr;\r
cc68a136 332\r
b71cbbf7 333 cmd = pvid->command;\r
cc68a136 334\r
335 // Get type of transfer 0xc0000030 (v/c/vsram read/write)\r
b71cbbf7 336 pvid->type = (u8)(((cmd >> 2) & 0xc) | (cmd >> 30));\r
337 if (pvid->type == 1) // vram\r
338 pvid->type |= pvid->reg[1] & 0x80; // 128k\r
cc68a136 339\r
340 // Get address 0x3fff0003\r
b71cbbf7 341 addr = (cmd >> 16) & 0x3fff;\r
342 addr |= (cmd << 14) & 0xc000;\r
343 pvid->addr = (u16)addr;\r
344 pvid->addr_u = (u8)((cmd >> 2) & 1);\r
cc68a136 345}\r
346\r
697746df 347static void DrawSync(int blank_on)\r
b6d7ac70 348{\r
349 if (Pico.m.scanline < 224 && !(PicoOpt & POPT_ALT_RENDERER) &&\r
ea38612f 350 !PicoSkipFrame && Pico.est.DrawScanline <= Pico.m.scanline) {\r
2aa27095 351 //elprintf(EL_ANOMALY, "sync");\r
b6d7ac70 352 PicoDrawSync(Pico.m.scanline, blank_on);\r
353 }\r
354}\r
355\r
eff55556 356PICO_INTERNAL_ASM void PicoVideoWrite(unsigned int a,unsigned short d)\r
cc68a136 357{\r
358 struct PicoVideo *pvid=&Pico.video;\r
359\r
2aa27095 360 //if (Pico.m.scanline < 224)\r
361 // elprintf(EL_STATUS, "PicoVideoWrite [%06x] %04x", a, d);\r
cc68a136 362 a&=0x1c;\r
363\r
e0bcb7a9 364 switch (a)\r
4f672280 365 {\r
e0bcb7a9 366 case 0x00: // Data port 0 or 2\r
b6d7ac70 367 // try avoiding the sync..\r
368 if (Pico.m.scanline < 224 && (pvid->reg[1]&0x40) &&\r
369 !(!pvid->pending &&\r
370 ((pvid->command & 0xc00000f0) == 0x40000010 && Pico.vsram[pvid->addr>>1] == d))\r
371 )\r
372 DrawSync(0);\r
373\r
69996cb7 374 if (pvid->pending) {\r
375 CommandChange();\r
376 pvid->pending=0;\r
377 }\r
cc68a136 378\r
0c7d1ba3 379 // preliminary FIFO emulation for Chaos Engine, The (E)\r
334f00e2 380 if (!(pvid->status & SR_VB) && (pvid->reg[1] & 0x40) && !(PicoOpt&POPT_DIS_VDP_FIFO)) // active display?\r
cc68a136 381 {\r
334f00e2 382 int use = pvid->type == 1 ? 2 : 1;\r
383 pvid->lwrite_cnt -= use;\r
384 if (pvid->lwrite_cnt < 0)\r
385 SekCyclesLeft = 0;\r
0c7d1ba3 386 elprintf(EL_ASVDP, "VDP data write: %04x [%06x] {%i} #%i @ %06x", d, Pico.video.addr,\r
387 Pico.video.type, pvid->lwrite_cnt, SekPc);\r
cc68a136 388 }\r
0c7d1ba3 389 VideoWrite(d);\r
390\r
391 if ((pvid->command&0x80) && (pvid->reg[1]&0x10) && (pvid->reg[0x17]>>6)==2)\r
392 DmaFill(d);\r
393\r
e0bcb7a9 394 break;\r
cc68a136 395\r
e0bcb7a9 396 case 0x04: // Control (command) port 4 or 6\r
b6d7ac70 397 if (pvid->pending)\r
cc68a136 398 {\r
399 // Low word of command:\r
0c7d1ba3 400 pvid->command &= 0xffff0000;\r
401 pvid->command |= d;\r
402 pvid->pending = 0;\r
cc68a136 403 CommandChange();\r
0c7d1ba3 404 // Check for dma:\r
405 if (d & 0x80) {\r
406 DrawSync(0);\r
407 CommandDma();\r
408 }\r
602133e1 409 }\r
410 else\r
411 {\r
412 if ((d&0xc000)==0x8000)\r
cc68a136 413 {\r
414 // Register write:\r
415 int num=(d>>8)&0x1f;\r
0ffefdb8 416 int dold=pvid->reg[num];\r
147f8df1 417 int blank_on = 0;\r
602133e1 418 pvid->type=0; // register writes clear command (else no Sega logo in Golden Axe II)\r
0ffefdb8 419 if (num > 0x0a && !(pvid->reg[1]&4)) {\r
420 elprintf(EL_ANOMALY, "%02x written to reg %02x in SMS mode @ %06x", d, num, SekPc);\r
602133e1 421 return;\r
b6d7ac70 422 }\r
602133e1 423\r
53f948c9 424 if (num == 1 && !(d&0x40) && SekCyclesDone() - line_base_cycles <= 488-390)\r
425 blank_on = 1;\r
147f8df1 426 DrawSync(blank_on);\r
427 pvid->reg[num]=(unsigned char)d;\r
602133e1 428 switch (num)\r
429 {\r
430 case 0x00:\r
ebd70cb5 431 elprintf(EL_INTSW, "hint_onoff: %i->%i [%u] pend=%i @ %06x", (dold&0x10)>>4,\r
602133e1 432 (d&0x10)>>4, SekCyclesDone(), (pvid->pending_ints&0x10)>>4, SekPc);\r
147f8df1 433 goto update_irq;\r
602133e1 434 case 0x01:\r
ebd70cb5 435 elprintf(EL_INTSW, "vint_onoff: %i->%i [%u] pend=%i @ %06x", (dold&0x20)>>5,\r
602133e1 436 (d&0x20)>>5, SekCyclesDone(), (pvid->pending_ints&0x20)>>5, SekPc);\r
147f8df1 437 goto update_irq;\r
602133e1 438 case 0x05:\r
4c436138 439 //elprintf(EL_STATUS, "spritep moved to %04x", (unsigned)(Pico.video.reg[5]&0x7f) << 9);\r
ea38612f 440 if (d^dold) Pico.est.rendstatus |= PDRAW_SPRITES_MOVED;\r
602133e1 441 break;\r
442 case 0x0c:\r
443 // renderers should update their palettes if sh/hi mode is changed\r
444 if ((d^dold)&8) Pico.m.dirtyPal = 2;\r
445 break;\r
446 }\r
147f8df1 447 return;\r
602133e1 448\r
147f8df1 449update_irq:\r
03e4f2a3 450#ifndef EMU_CORE_DEBUG\r
b6d7ac70 451 // update IRQ level\r
08769494 452 if (!SekShouldInterrupt()) // hack\r
03e4f2a3 453 {\r
602133e1 454 int lines, pints, irq=0;\r
455 lines = (pvid->reg[1] & 0x20) | (pvid->reg[0] & 0x10);\r
456 pints = (pvid->pending_ints&lines);\r
b6d7ac70 457 if (pints & 0x20) irq = 6;\r
458 else if (pints & 0x10) irq = 4;\r
602133e1 459 SekInterrupt(irq); // update line\r
460\r
2aa27095 461 if (irq) SekEndRun(24); // make it delayed\r
cc68a136 462 }\r
cc68a136 463#endif\r
602133e1 464 }\r
465 else\r
466 {\r
cc68a136 467 // High word of command:\r
468 pvid->command&=0x0000ffff;\r
469 pvid->command|=d<<16;\r
470 pvid->pending=1;\r
471 }\r
472 }\r
e0bcb7a9 473 break;\r
474\r
475 // case 0x08: // 08 0a - HV counter - lock up\r
476 // case 0x0c: // 0c 0e - HV counter - lock up\r
477 // case 0x10: // 10 12 - PSG - handled by caller\r
478 // case 0x14: // 14 16 - PSG - handled by caller\r
479 // case 0x18: // 18 1a - no effect?\r
480 case 0x1c: // 1c 1e - debug\r
481 pvid->debug = d;\r
482 pvid->debug_p = 0;\r
483 if (d & (1 << 6)) {\r
484 pvid->debug_p |= PVD_KILL_A | PVD_KILL_B;\r
485 pvid->debug_p |= PVD_KILL_S_LO | PVD_KILL_S_HI;\r
486 }\r
487 switch ((d >> 7) & 3) {\r
488 case 1:\r
489 pvid->debug_p &= ~(PVD_KILL_S_LO | PVD_KILL_S_HI);\r
490 pvid->debug_p |= PVD_FORCE_S;\r
491 break;\r
492 case 2:\r
493 pvid->debug_p &= ~PVD_KILL_A;\r
494 pvid->debug_p |= PVD_FORCE_A;\r
495 break;\r
496 case 3:\r
497 pvid->debug_p &= ~PVD_KILL_B;\r
498 pvid->debug_p |= PVD_FORCE_B;\r
499 break;\r
500 }\r
501 break;\r
cc68a136 502 }\r
503}\r
504\r
eff55556 505PICO_INTERNAL_ASM unsigned int PicoVideoRead(unsigned int a)\r
cc68a136 506{\r
cc68a136 507 a&=0x1c;\r
508\r
cc68a136 509 if (a==0x04) // control port\r
510 {\r
69996cb7 511 struct PicoVideo *pv=&Pico.video;\r
b6d7ac70 512 unsigned int d;\r
69996cb7 513 d=pv->status;\r
9761a7d0 514 //if (PicoOpt&POPT_ALT_RENDERER) d|=0x0020; // sprite collision (Shadow of the Beast)\r
53f948c9 515 if (SekCyclesDone() - line_base_cycles >= 488-88)\r
516 d|=0x0004; // H-Blank (Sonic3 vs)\r
69996cb7 517\r
9761a7d0 518 d |= ((pv->reg[1]&0x40)^0x40) >> 3; // set V-Blank if display is disabled\r
519 d |= (pv->pending_ints&0x20)<<2; // V-int pending?\r
69996cb7 520 if (d&0x100) pv->status&=~0x100; // FIFO no longer full\r
cc68a136 521\r
9761a7d0 522 pv->pending = 0; // ctrl port reads clear write-pending flag (Charles MacDonald)\r
cc68a136 523\r
69996cb7 524 elprintf(EL_SR, "SR read: %04x @ %06x", d, SekPc);\r
b6d7ac70 525 return d;\r
cc68a136 526 }\r
527\r
528 // H-counter info (based on Generator):\r
529 // frame:\r
530 // | <- hblank? -> |\r
531 // start <416> hint <36> hdisplay <38> end // CPU cycles\r
532 // |---------...---------|------------|-------------|\r
533 // 0 B6 E4 FF // 40 cells\r
534 // 0 93 E8 FF // 32 cells\r
535\r
536 // Gens (?) v-render\r
537 // start <hblank=84> hint hdisplay <404> |\r
538 // |---------------------|--------------------------|\r
539 // E4 (hc[0x43]==0) 07 B1 // 40\r
540 // E8 (hc[0x45]==0) 05 91 // 32\r
4f672280 541\r
cc68a136 542 // check: Sonic 3D Blast bonus, Cannon Fodder, Chase HQ II, 3 Ninjas kick back, Road Rash 3, Skitchin', Wheel of Fortune\r
543 if ((a&0x1c)==0x08)\r
544 {\r
9761a7d0 545 unsigned int d;\r
947fb5f9 546\r
53f948c9 547 d = (SekCyclesDone() - line_base_cycles) & 0x1ff; // FIXME\r
2aa27095 548 if (Pico.video.reg[12]&1)\r
53f948c9 549 d = hcounts_40[d];\r
550 else d = hcounts_32[d];\r
cc68a136 551\r
ebd70cb5 552 elprintf(EL_HVCNT, "hv: %02x %02x [%u] @ %06x", d, Pico.video.v_counter, SekCyclesDone(), SekPc);\r
9761a7d0 553 return d | (Pico.video.v_counter << 8);\r
554 }\r
cc68a136 555\r
9761a7d0 556 if (a==0x00) // data port\r
557 {\r
558 return VideoRead();\r
559 }\r
cc68a136 560\r
9761a7d0 561 return 0;\r
562}\r
563\r
75b84e4b 564unsigned char PicoVideoRead8DataH(void)\r
9761a7d0 565{\r
75b84e4b 566 return VideoRead() >> 8;\r
567}\r
9761a7d0 568\r
75b84e4b 569unsigned char PicoVideoRead8DataL(void)\r
570{\r
571 return VideoRead();\r
572}\r
cc68a136 573\r
75b84e4b 574// FIXME: broken mess\r
575unsigned char PicoVideoRead8CtlH(void)\r
576{\r
577 u8 d = (u8)(Pico.video.status >> 8);\r
578 if (d & 1)\r
579 Pico.video.status &= ~0x100; // FIFO no longer full\r
580 Pico.video.pending = 0;\r
581 elprintf(EL_SR, "SR read (h): %02x @ %06x", d, SekPc);\r
582 return d;\r
583}\r
584\r
585unsigned char PicoVideoRead8CtlL(void)\r
586{\r
587 u8 d = (u8)Pico.video.status;\r
588 //if (PicoOpt&POPT_ALT_RENDERER) d|=0x0020; // sprite collision (Shadow of the Beast)\r
589 d |= ((Pico.video.reg[1]&0x40)^0x40) >> 3; // set V-Blank if display is disabled\r
590 d |= (Pico.video.pending_ints&0x20)<<2; // V-int pending?\r
591 if (SekCyclesDone() - line_base_cycles >= 488-88) d |= 4; // H-Blank\r
592 Pico.video.pending = 0;\r
593 elprintf(EL_SR, "SR read (l): %02x @ %06x", d, SekPc);\r
594 return d;\r
595}\r
596\r
597unsigned char PicoVideoRead8HV_H(void)\r
598{\r
ebd70cb5 599 elprintf(EL_HVCNT, "vcounter: %02x [%u] @ %06x", Pico.video.v_counter, SekCyclesDone(), SekPc);\r
75b84e4b 600 return Pico.video.v_counter;\r
601}\r
602\r
603// FIXME: broken\r
604unsigned char PicoVideoRead8HV_L(void)\r
605{\r
606 u32 d = (SekCyclesDone() - line_base_cycles) & 0x1ff; // FIXME\r
607 if (Pico.video.reg[12]&1)\r
608 d = hcounts_40[d];\r
609 else d = hcounts_32[d];\r
ebd70cb5 610 elprintf(EL_HVCNT, "hcounter: %02x [%u] @ %06x", d, SekCyclesDone(), SekPc);\r
75b84e4b 611 return d;\r
cc68a136 612}\r
e7b3ad1b 613\r
614// vim:shiftwidth=2:ts=2:expandtab\r
fast MegaDrive/MegaCD/32X emulator