[picodrive.git] / pico / videoport.c

/*\r
 * PicoDrive\r
 * (c) Copyright Dave, 2004\r
 * (C) notaz, 2006-2009\r
 *\r
 * This work is licensed under the terms of MAME license.\r
 * See COPYING file in the top-level directory.\r
 */\r
\r
#include "pico_int.h"\r
#define NEED_DMA_SOURCE\r
#include "memory.h"\r
\r
int line_base_cycles;\r
extern const unsigned char  hcounts_32[];\r
extern const unsigned char  hcounts_40[];\r
\r
#ifndef UTYPES_DEFINED\r
typedef unsigned char  u8;\r
typedef unsigned short u16;\r
typedef unsigned int   u32;\r
#define UTYPES_DEFINED\r
#endif\r
\r
int (*PicoDmaHook)(unsigned int source, int len, unsigned short **base, unsigned int *mask) = NULL;\r
\r
static __inline void AutoIncrement(void)\r
{\r
  Pico.video.addr=(unsigned short)(Pico.video.addr+Pico.video.reg[0xf]);\r
}\r
\r
static NOINLINE void VideoWrite128(u32 a, u16 d)\r
{\r
  // nasty\r
  a = ((a & 2) >> 1) | ((a & 0x400) >> 9) | (a & 0x3FC) | ((a & 0x1F800) >> 1);\r
  ((u8 *)Pico.vram)[a] = d;\r
}\r
\r
static void VideoWrite(u16 d)\r
{\r
  unsigned int a=Pico.video.addr;\r
\r
  switch (Pico.video.type)\r
  {\r
    case 1: if(a&1) d=(u16)((d<<8)|(d>>8)); // If address is odd, bytes are swapped (which game needs this?)\r
            Pico.vram [(a>>1)&0x7fff]=d;\r
            if (a - ((unsigned)(Pico.video.reg[5]&0x7f) << 9) < 0x400)\r
              Pico.est.rendstatus |= PDRAW_DIRTY_SPRITES;\r
            break;\r
    case 3: Pico.m.dirtyPal = 1;\r
            Pico.cram [(a>>1)&0x003f]=d; break; // wraps (Desert Strike)\r
    case 5: Pico.vsram[(a>>1)&0x003f]=d; break;\r
    case 0x81:\r
      a |= Pico.video.addr_u << 16;\r
      VideoWrite128(a, d);\r
      break;\r
    //default:elprintf(EL_ANOMALY, "VDP write %04x with bad type %i", d, Pico.video.type); break;\r
  }\r
\r
  AutoIncrement();\r
}\r
\r
static unsigned int VideoRead(void)\r
{\r
  unsigned int a=0,d=0;\r
\r
  a=Pico.video.addr; a>>=1;\r
\r
  switch (Pico.video.type)\r
  {\r
    case 0: d=Pico.vram [a&0x7fff]; break;\r
    case 8: d=Pico.cram [a&0x003f]; break;\r
    case 4: d=Pico.vsram[a&0x003f]; break;\r
    default:elprintf(EL_ANOMALY, "VDP read with bad type %i", Pico.video.type); break;\r
  }\r
\r
  AutoIncrement();\r
  return d;\r
}\r
\r
static int GetDmaLength(void)\r
{\r
  struct PicoVideo *pvid=&Pico.video;\r
  int len=0;\r
  // 16-bit words to transfer:\r
  len =pvid->reg[0x13];\r
  len|=pvid->reg[0x14]<<8;\r
  len = ((len - 1) & 0xffff) + 1;\r
  return len;\r
}\r
\r
static void DmaSlow(int len, unsigned int source)\r
{\r
  u32 inc = Pico.video.reg[0xf];\r
  u32 a = Pico.video.addr;\r
  u16 *r, *base = NULL;\r
  u32 mask = 0x1ffff;\r
\r
  elprintf(EL_VDPDMA, "DmaSlow[%i] %06x->%04x len %i inc=%i blank %i [%u] @ %06x",\r
    Pico.video.type, source, a, len, inc, (Pico.video.status&8)||!(Pico.video.reg[1]&0x40),\r
    SekCyclesDone(), SekPc);\r
\r
  Pico.m.dma_xfers += len;\r
  if (Pico.m.dma_xfers < len) // lame 16bit var\r
    Pico.m.dma_xfers = ~0;\r
  SekCyclesBurnRun(CheckDMA());\r
\r
  if ((source & 0xe00000) == 0xe00000) { // Ram\r
    base = (u16 *)Pico.ram;\r
    mask = 0xffff;\r
  }\r
  else if (PicoAHW & PAHW_MCD)\r
  {\r
    u8 r3 = Pico_mcd->s68k_regs[3];\r
    elprintf(EL_VDPDMA, "DmaSlow CD, r3=%02x", r3);\r
    if (source < 0x20000) { // Bios area\r
      base = (u16 *)Pico_mcd->bios;\r
    } else if ((source & 0xfc0000) == 0x200000) { // Word Ram\r
      if (!(r3 & 4)) { // 2M mode\r
        base = (u16 *)(Pico_mcd->word_ram2M + (source & 0x20000));\r
      } else {\r
        if (source < 0x220000) { // 1M mode\r
          int bank = r3 & 1;\r
          base = (u16 *)(Pico_mcd->word_ram1M[bank]);\r
        } else {\r
          DmaSlowCell(source - 2, a, len, inc);\r
          return;\r
        }\r
      }\r
      source -= 2;\r
    } else if ((source & 0xfe0000) == 0x020000) { // Prg Ram\r
      base = (u16 *)Pico_mcd->prg_ram_b[r3 >> 6];\r
      source -= 2; // XXX: test\r
    }\r
  }\r
  else\r
  {\r
    // if we have DmaHook, let it handle ROM because of possible DMA delay\r
    u32 source2;\r
    if (PicoDmaHook && (source2 = PicoDmaHook(source, len, &base, &mask)))\r
      source = source2;\r
    else // Rom\r
      base = m68k_dma_source(source);\r
  }\r
  if (!base) {\r
    elprintf(EL_VDPDMA|EL_ANOMALY, "DmaSlow[%i] %06x->%04x: invalid src", Pico.video.type, source, a);\r
    return;\r
  }\r
\r
  // operate in words\r
  source >>= 1;\r
  mask >>= 1;\r
\r
  switch (Pico.video.type)\r
  {\r
    case 1: // vram\r
      r = Pico.vram;\r
      if (inc == 2 && !(a & 1) && a + len * 2 < 0x10000\r
          && !(((source + len - 1) ^ source) & ~mask))\r
      {\r
        // most used DMA mode\r
        memcpy((char *)r + a, base + (source & mask), len * 2);\r
        a += len * 2;\r
      }\r
      else\r
      {\r
        for(; len; len--)\r
        {\r
          u16 d = base[source++ & mask];\r
          if(a & 1) d=(d<<8)|(d>>8);\r
          r[a >> 1] = d;\r
          // AutoIncrement\r
          a = (u16)(a + inc);\r
        }\r
      }\r
      Pico.est.rendstatus |= PDRAW_DIRTY_SPRITES;\r
      break;\r
\r
    case 3: // cram\r
      Pico.m.dirtyPal = 1;\r
      r = Pico.cram;\r
      for (; len; len--)\r
      {\r
        r[(a / 2) & 0x3f] = base[source++ & mask];\r
        // AutoIncrement\r
        a += inc;\r
      }\r
      break;\r
\r
    case 5: // vsram\r
      r = Pico.vsram;\r
      for (; len; len--)\r
      {\r
        r[(a / 2) & 0x3f] = base[source++ & mask];\r
        // AutoIncrement\r
        a += inc;\r
      }\r
      break;\r
\r
    case 0x81: // vram 128k\r
      a |= Pico.video.addr_u << 16;\r
      for(; len; len--)\r
      {\r
        VideoWrite128(a, base[source++ & mask]);\r
        // AutoIncrement\r
        a = (a + inc) & 0x1ffff;\r
      }\r
      Pico.video.addr_u = a >> 16;\r
      break;\r
\r
    default:\r
      if (Pico.video.type != 0 || (EL_LOGMASK & EL_VDPDMA))\r
        elprintf(EL_VDPDMA|EL_ANOMALY, "DMA with bad type %i", Pico.video.type);\r
      break;\r
  }\r
  // remember addr\r
  Pico.video.addr=(u16)a;\r
}\r
\r
static void DmaCopy(int len)\r
{\r
  u16 a=Pico.video.addr;\r
  unsigned char *vr = (unsigned char *) Pico.vram;\r
  unsigned char inc=Pico.video.reg[0xf];\r
  int source;\r
  elprintf(EL_VDPDMA, "DmaCopy len %i [%i]", len, SekCyclesDone());\r
\r
  Pico.m.dma_xfers += len;\r
  if (Pico.m.dma_xfers < len)\r
    Pico.m.dma_xfers = ~0;\r
  Pico.video.status |= 2; // dma busy\r
\r
  source =Pico.video.reg[0x15];\r
  source|=Pico.video.reg[0x16]<<8;\r
\r
  for (; len; len--)\r
  {\r
    vr[a] = vr[source++ & 0xffff];\r
    // AutoIncrement\r
    a=(u16)(a+inc);\r
  }\r
  // remember addr\r
  Pico.video.addr=a;\r
  Pico.est.rendstatus |= PDRAW_DIRTY_SPRITES;\r
}\r
\r
static NOINLINE void DmaFill(int data)\r
{\r
  unsigned short a=Pico.video.addr;\r
  unsigned char *vr=(unsigned char *) Pico.vram;\r
  unsigned char high = (unsigned char) (data >> 8);\r
  unsigned char inc=Pico.video.reg[0xf];\r
  int source;\r
  int len, l;\r
\r
  len = GetDmaLength();\r
  elprintf(EL_VDPDMA, "DmaFill len %i inc %i [%i]", len, inc, SekCyclesDone());\r
\r
  Pico.m.dma_xfers += len;\r
  if (Pico.m.dma_xfers < len) // lame 16bit var\r
    Pico.m.dma_xfers = ~0;\r
  Pico.video.status |= 2; // dma busy\r
\r
  switch (Pico.video.type)\r
  {\r
    case 1: // vram\r
      for (l = len; l; l--) {\r
        // Write upper byte to adjacent address\r
        // (here we are byteswapped, so address is already 'adjacent')\r
        vr[a] = high;\r
\r
        // Increment address register\r
        a = (u16)(a + inc);\r
      }\r
      break;\r
    case 3:   // cram\r
    case 5: { // vsram\r
      // TODO: needs fifo; anyone using these?\r
      static int once;\r
      if (!once++)\r
        elprintf(EL_STATUS|EL_ANOMALY|EL_VDPDMA, "TODO: cram/vsram fill");\r
    }\r
    default:\r
      a += len * inc;\r
      break;\r
  }\r
\r
  // remember addr\r
  Pico.video.addr = a;\r
  // register update\r
  Pico.video.reg[0x13] = Pico.video.reg[0x14] = 0;\r
  source  = Pico.video.reg[0x15];\r
  source |= Pico.video.reg[0x16] << 8;\r
  source += len;\r
  Pico.video.reg[0x15] = source;\r
  Pico.video.reg[0x16] = source >> 8;\r
\r
  Pico.est.rendstatus |= PDRAW_DIRTY_SPRITES;\r
}\r
\r
static NOINLINE void CommandDma(void)\r
{\r
  struct PicoVideo *pvid=&Pico.video;\r
  u32 len, method;\r
  u32 source;\r
\r
  if ((pvid->reg[1]&0x10)==0) return; // DMA not enabled\r
\r
  len = GetDmaLength();\r
  source =Pico.video.reg[0x15];\r
  source|=Pico.video.reg[0x16] << 8;\r
  source|=Pico.video.reg[0x17] << 16;\r
\r
  method=pvid->reg[0x17]>>6;\r
  if (method < 2)\r
    DmaSlow(len, source << 1); // 68000 to VDP\r
  else if (method == 3)\r
    DmaCopy(len); // VRAM Copy\r
  else\r
    return;\r
\r
  source += len;\r
  Pico.video.reg[0x13] = Pico.video.reg[0x14] = 0;\r
  Pico.video.reg[0x15] = source;\r
  Pico.video.reg[0x16] = source >> 8;\r
}\r
\r
static NOINLINE void CommandChange(void)\r
{\r
  struct PicoVideo *pvid = &Pico.video;\r
  unsigned int cmd, addr;\r
\r
  cmd = pvid->command;\r
\r
  // Get type of transfer 0xc0000030 (v/c/vsram read/write)\r
  pvid->type = (u8)(((cmd >> 2) & 0xc) | (cmd >> 30));\r
  if (pvid->type == 1) // vram\r
    pvid->type |= pvid->reg[1] & 0x80; // 128k\r
\r
  // Get address 0x3fff0003\r
  addr  = (cmd >> 16) & 0x3fff;\r
  addr |= (cmd << 14) & 0xc000;\r
  pvid->addr = (u16)addr;\r
  pvid->addr_u = (u8)((cmd >> 2) & 1);\r
}\r
\r
static void DrawSync(int blank_on)\r
{\r
  if (Pico.m.scanline < 224 && !(PicoOpt & POPT_ALT_RENDERER) &&\r
      !PicoSkipFrame && Pico.est.DrawScanline <= Pico.m.scanline) {\r
    //elprintf(EL_ANOMALY, "sync");\r
    PicoDrawSync(Pico.m.scanline, blank_on);\r
  }\r
}\r
\r
PICO_INTERNAL_ASM void PicoVideoWrite(unsigned int a,unsigned short d)\r
{\r
  struct PicoVideo *pvid=&Pico.video;\r
\r
  //if (Pico.m.scanline < 224)\r
  //  elprintf(EL_STATUS, "PicoVideoWrite [%06x] %04x", a, d);\r
  a&=0x1c;\r
\r
  switch (a)\r
  {\r
  case 0x00: // Data port 0 or 2\r
    // try avoiding the sync..\r
    if (Pico.m.scanline < 224 && (pvid->reg[1]&0x40) &&\r
        !(!pvid->pending &&\r
          ((pvid->command & 0xc00000f0) == 0x40000010 && Pico.vsram[pvid->addr>>1] == d))\r
       )\r
      DrawSync(0);\r
\r
    if (pvid->pending) {\r
      CommandChange();\r
      pvid->pending=0;\r
    }\r
\r
    // preliminary FIFO emulation for Chaos Engine, The (E)\r
    if (!(pvid->status&8) && (pvid->reg[1]&0x40) && !(PicoOpt&POPT_DIS_VDP_FIFO)) // active display?\r
    {\r
      pvid->status&=~0x200; // FIFO no longer empty\r
      pvid->lwrite_cnt++;\r
      if (pvid->lwrite_cnt >= 4) pvid->status|=0x100; // FIFO full\r
      if (pvid->lwrite_cnt >  4) {\r
        SekCyclesBurnRun(32); // penalty // 488/12-8\r
      }\r
      elprintf(EL_ASVDP, "VDP data write: %04x [%06x] {%i} #%i @ %06x", d, Pico.video.addr,\r
               Pico.video.type, pvid->lwrite_cnt, SekPc);\r
    }\r
    VideoWrite(d);\r
\r
    if ((pvid->command&0x80) && (pvid->reg[1]&0x10) && (pvid->reg[0x17]>>6)==2)\r
      DmaFill(d);\r
\r
    break;\r
\r
  case 0x04: // Control (command) port 4 or 6\r
    if (pvid->pending)\r
    {\r
      // Low word of command:\r
      pvid->command &= 0xffff0000;\r
      pvid->command |= d;\r
      pvid->pending = 0;\r
      CommandChange();\r
      // Check for dma:\r
      if (d & 0x80) {\r
        DrawSync(0);\r
        CommandDma();\r
      }\r
    }\r
    else\r
    {\r
      if ((d&0xc000)==0x8000)\r
      {\r
        // Register write:\r
        int num=(d>>8)&0x1f;\r
        int dold=pvid->reg[num];\r
        int blank_on = 0;\r
        pvid->type=0; // register writes clear command (else no Sega logo in Golden Axe II)\r
        if (num > 0x0a && !(pvid->reg[1]&4)) {\r
          elprintf(EL_ANOMALY, "%02x written to reg %02x in SMS mode @ %06x", d, num, SekPc);\r
          return;\r
        }\r
\r
        if (num == 1 && !(d&0x40) && SekCyclesDone() - line_base_cycles <= 488-390)\r
          blank_on = 1;\r
        DrawSync(blank_on);\r
        pvid->reg[num]=(unsigned char)d;\r
        switch (num)\r
        {\r
          case 0x00:\r
            elprintf(EL_INTSW, "hint_onoff: %i->%i [%i] pend=%i @ %06x", (dold&0x10)>>4,\r
                    (d&0x10)>>4, SekCyclesDone(), (pvid->pending_ints&0x10)>>4, SekPc);\r
            goto update_irq;\r
          case 0x01:\r
            elprintf(EL_INTSW, "vint_onoff: %i->%i [%i] pend=%i @ %06x", (dold&0x20)>>5,\r
                    (d&0x20)>>5, SekCyclesDone(), (pvid->pending_ints&0x20)>>5, SekPc);\r
            goto update_irq;\r
          case 0x05:\r
            //elprintf(EL_STATUS, "spritep moved to %04x", (unsigned)(Pico.video.reg[5]&0x7f) << 9);\r
            if (d^dold) Pico.est.rendstatus |= PDRAW_SPRITES_MOVED;\r
            break;\r
          case 0x0c:\r
            // renderers should update their palettes if sh/hi mode is changed\r
            if ((d^dold)&8) Pico.m.dirtyPal = 2;\r
            break;\r
        }\r
        return;\r
\r
update_irq:\r
#ifndef EMU_CORE_DEBUG\r
        // update IRQ level\r
        if (!SekShouldInterrupt()) // hack\r
        {\r
          int lines, pints, irq=0;\r
          lines = (pvid->reg[1] & 0x20) | (pvid->reg[0] & 0x10);\r
          pints = (pvid->pending_ints&lines);\r
               if (pints & 0x20) irq = 6;\r
          else if (pints & 0x10) irq = 4;\r
          SekInterrupt(irq); // update line\r
\r
          if (irq) SekEndRun(24); // make it delayed\r
        }\r
#endif\r
      }\r
      else\r
      {\r
        // High word of command:\r
        pvid->command&=0x0000ffff;\r
        pvid->command|=d<<16;\r
        pvid->pending=1;\r
      }\r
    }\r
    break;\r
\r
  // case 0x08: // 08 0a - HV counter - lock up\r
  // case 0x0c: // 0c 0e - HV counter - lock up\r
  // case 0x10: // 10 12 - PSG - handled by caller\r
  // case 0x14: // 14 16 - PSG - handled by caller\r
  // case 0x18: // 18 1a - no effect?\r
  case 0x1c: // 1c 1e - debug\r
    pvid->debug = d;\r
    pvid->debug_p = 0;\r
    if (d & (1 << 6)) {\r
      pvid->debug_p |= PVD_KILL_A | PVD_KILL_B;\r
      pvid->debug_p |= PVD_KILL_S_LO | PVD_KILL_S_HI;\r
    }\r
    switch ((d >> 7) & 3) {\r
      case 1:\r
        pvid->debug_p &= ~(PVD_KILL_S_LO | PVD_KILL_S_HI);\r
        pvid->debug_p |= PVD_FORCE_S;\r
        break;\r
      case 2:\r
        pvid->debug_p &= ~PVD_KILL_A;\r
        pvid->debug_p |= PVD_FORCE_A;\r
        break;\r
      case 3:\r
        pvid->debug_p &= ~PVD_KILL_B;\r
        pvid->debug_p |= PVD_FORCE_B;\r
        break;\r
    }\r
    break;\r
  }\r
}\r
\r
PICO_INTERNAL_ASM unsigned int PicoVideoRead(unsigned int a)\r
{\r
  a&=0x1c;\r
\r
  if (a==0x04) // control port\r
  {\r
    struct PicoVideo *pv=&Pico.video;\r
    unsigned int d;\r
    d=pv->status;\r
    //if (PicoOpt&POPT_ALT_RENDERER) d|=0x0020; // sprite collision (Shadow of the Beast)\r
    if (SekCyclesDone() - line_base_cycles >= 488-88)\r
      d|=0x0004; // H-Blank (Sonic3 vs)\r
\r
    d |= ((pv->reg[1]&0x40)^0x40) >> 3;  // set V-Blank if display is disabled\r
    d |= (pv->pending_ints&0x20)<<2;     // V-int pending?\r
    if (d&0x100) pv->status&=~0x100; // FIFO no longer full\r
\r
    pv->pending = 0; // ctrl port reads clear write-pending flag (Charles MacDonald)\r
\r
    elprintf(EL_SR, "SR read: %04x @ %06x", d, SekPc);\r
    return d;\r
  }\r
\r
  // H-counter info (based on Generator):\r
  // frame:\r
  //                       |       <- hblank? ->      |\r
  // start    <416>       hint  <36> hdisplay <38>  end // CPU cycles\r
  // |---------...---------|------------|-------------|\r
  // 0                   B6 E4                       FF // 40 cells\r
  // 0                   93 E8                       FF // 32 cells\r
\r
  // Gens (?)              v-render\r
  // start  <hblank=84>   hint    hdisplay <404>      |\r
  // |---------------------|--------------------------|\r
  // E4  (hc[0x43]==0)    07                         B1 // 40\r
  // E8  (hc[0x45]==0)    05                         91 // 32\r
\r
  // check: Sonic 3D Blast bonus, Cannon Fodder, Chase HQ II, 3 Ninjas kick back, Road Rash 3, Skitchin', Wheel of Fortune\r
  if ((a&0x1c)==0x08)\r
  {\r
    unsigned int d;\r
\r
    d = (SekCyclesDone() - line_base_cycles) & 0x1ff; // FIXME\r
    if (Pico.video.reg[12]&1)\r
         d = hcounts_40[d];\r
    else d = hcounts_32[d];\r
\r
    elprintf(EL_HVCNT, "hv: %02x %02x (%i) @ %06x", d, Pico.video.v_counter, SekCyclesDone(), SekPc);\r
    return d | (Pico.video.v_counter << 8);\r
  }\r
\r
  if (a==0x00) // data port\r
  {\r
    return VideoRead();\r
  }\r
\r
  return 0;\r
}\r
\r
unsigned int PicoVideoRead8(unsigned int a)\r
{\r
  unsigned int d;\r
  a&=0x1d;\r
\r
  switch (a)\r
  {\r
    case 0: return VideoRead() >> 8;\r
    case 1: return VideoRead() & 0xff;\r
    case 4: // control port/status reg\r
      d = Pico.video.status >> 8;\r
      if (d&1) Pico.video.status&=~0x100; // FIFO no longer full\r
      Pico.video.pending = 0;\r
      elprintf(EL_SR, "SR read (h): %02x @ %06x", d, SekPc);\r
      return d;\r
    case 5:\r
      d = Pico.video.status & 0xff;\r
      //if (PicoOpt&POPT_ALT_RENDERER) d|=0x0020; // sprite collision (Shadow of the Beast)\r
      d |= ((Pico.video.reg[1]&0x40)^0x40) >> 3;  // set V-Blank if display is disabled\r
      d |= (Pico.video.pending_ints&0x20)<<2;     // V-int pending?\r
      if (SekCyclesDone() - line_base_cycles >= 488-88) d |= 4;    // H-Blank\r
      Pico.video.pending = 0;\r
      elprintf(EL_SR, "SR read (l): %02x @ %06x", d, SekPc);\r
      return d;\r
    case 8: // hv counter\r
      elprintf(EL_HVCNT, "vcounter: %02x (%i) @ %06x", Pico.video.v_counter, SekCyclesDone(), SekPc);\r
      return Pico.video.v_counter;\r
    case 9:\r
      d = (SekCyclesDone() - line_base_cycles) & 0x1ff; // FIXME\r
      if (Pico.video.reg[12]&1)\r
           d = hcounts_40[d];\r
      else d = hcounts_32[d];\r
      elprintf(EL_HVCNT, "hcounter: %02x (%i) @ %06x", d, SekCyclesDone(), SekPc);\r
      return d;\r
  }\r
\r
  return 0;\r
}\r
\r
// vim:shiftwidth=2:ts=2:expandtab\r
Commit	Line	Data
cff531af	1	/*\r
	2	* PicoDrive\r
	3	* (c) Copyright Dave, 2004\r
	4	* (C) notaz, 2006-2009\r
	5	*\r
	6	* This work is licensed under the terms of MAME license.\r
	7	* See COPYING file in the top-level directory.\r
	8	*/\r
cc68a136	9	\r
efcba75f	10	#include "pico_int.h"\r
0c7d1ba3	11	#define NEED_DMA_SOURCE\r
7feeb880	12	#include "memory.h"\r
cc68a136	13	\r
53f948c9	14	int line_base_cycles;\r
cc68a136	15	extern const unsigned char hcounts_32[];\r
cc68a136	16	extern const unsigned char hcounts_40[];\r
cc68a136	17	\r
eff55556	18	#ifndef UTYPES_DEFINED\r
ab0607f7	19	typedef unsigned char u8;\r
cc68a136	20	typedef unsigned short u16;\r
eff55556	21	typedef unsigned int u32;\r
	22	#define UTYPES_DEFINED\r
	23	#endif\r
cc68a136	24	\r
0c7d1ba3	25	int (PicoDmaHook)(unsigned int source, int len, unsigned short base, unsigned int mask) = NULL;\r
cc68a136	26	\r
69996cb7	27	static __inline void AutoIncrement(void)\r
cc68a136	28	{\r
	29	Pico.video.addr=(unsigned short)(Pico.video.addr+Pico.video.reg[0xf]);\r
	30	}\r
	31	\r
b71cbbf7	32	static NOINLINE void VideoWrite128(u32 a, u16 d)\r
	33	{\r
	34	// nasty\r
	35	a = ((a & 2) >> 1) \| ((a & 0x400) >> 9) \| (a & 0x3FC) \| ((a & 0x1F800) >> 1);\r
	36	((u8 *)Pico.vram)[a] = d;\r
	37	}\r
	38	\r
cc68a136	39	static void VideoWrite(u16 d)\r
	40	{\r
	41	unsigned int a=Pico.video.addr;\r
	42	\r
	43	switch (Pico.video.type)\r
	44	{\r
	45	case 1: if(a&1) d=(u16)((d<<8)\|(d>>8)); // If address is odd, bytes are swapped (which game needs this?)\r
	46	Pico.vram [(a>>1)&0x7fff]=d;\r
947fb5f9	47	if (a - ((unsigned)(Pico.video.reg[5]&0x7f) << 9) < 0x400)\r
ea38612f	48	Pico.est.rendstatus \|= PDRAW_DIRTY_SPRITES;\r
947fb5f9	49	break;\r
cc68a136	50	case 3: Pico.m.dirtyPal = 1;\r
cc68a136	51	Pico.cram [(a>>1)&0x003f]=d; break; // wraps (Desert Strike)\r
cc68a136	52	case 5: Pico.vsram[(a>>1)&0x003f]=d; break;\r
b71cbbf7	53	case 0x81:\r
	54	a \|= Pico.video.addr_u << 16;\r
	55	VideoWrite128(a, d);\r
	56	break;\r
d26dc685	57	//default:elprintf(EL_ANOMALY, "VDP write %04x with bad type %i", d, Pico.video.type); break;\r
cc68a136	58	}\r
cc68a136	59	\r
cc68a136	60	AutoIncrement();\r
	61	}\r
	62	\r
69996cb7	63	static unsigned int VideoRead(void)\r
cc68a136	64	{\r
	65	unsigned int a=0,d=0;\r
	66	\r
	67	a=Pico.video.addr; a>>=1;\r
	68	\r
	69	switch (Pico.video.type)\r
	70	{\r
	71	case 0: d=Pico.vram [a&0x7fff]; break;\r
	72	case 8: d=Pico.cram [a&0x003f]; break;\r
	73	case 4: d=Pico.vsram[a&0x003f]; break;\r
69996cb7	74	default:elprintf(EL_ANOMALY, "VDP read with bad type %i", Pico.video.type); break;\r
cc68a136	75	}\r
4f672280	76	\r
cc68a136	77	AutoIncrement();\r
	78	return d;\r
	79	}\r
	80	\r
69996cb7	81	static int GetDmaLength(void)\r
cc68a136	82	{\r
	83	struct PicoVideo *pvid=&Pico.video;\r
	84	int len=0;\r
	85	// 16-bit words to transfer:\r
	86	len =pvid->reg[0x13];\r
	87	len\|=pvid->reg[0x14]<<8;\r
0c7d1ba3	88	len = ((len - 1) & 0xffff) + 1;\r
cc68a136	89	return len;\r
	90	}\r
	91	\r
0c7d1ba3	92	static void DmaSlow(int len, unsigned int source)\r
cc68a136	93	{\r
0c7d1ba3	94	u32 inc = Pico.video.reg[0xf];\r
	95	u32 a = Pico.video.addr;\r
	96	u16 r, base = NULL;\r
	97	u32 mask = 0x1ffff;\r
cc68a136	98	\r
0c7d1ba3	99	elprintf(EL_VDPDMA, "DmaSlow[%i] %06x->%04x len %i inc=%i blank %i [%u] @ %06x",\r
312e9ce1	100	Pico.video.type, source, a, len, inc, (Pico.video.status&8)\|\|!(Pico.video.reg[1]&0x40),\r
69996cb7	101	SekCyclesDone(), SekPc);\r
cc68a136	102	\r
2aa27095	103	Pico.m.dma_xfers += len;\r
0c7d1ba3	104	if (Pico.m.dma_xfers < len) // lame 16bit var\r
0c7d1ba3	105	Pico.m.dma_xfers = ~0;\r
ae214f1c	106	SekCyclesBurnRun(CheckDMA());\r
672ad671	107	\r
0c7d1ba3	108	if ((source & 0xe00000) == 0xe00000) { // Ram\r
	109	base = (u16 *)Pico.ram;\r
	110	mask = 0xffff;\r
602133e1	111	}\r
	112	else if (PicoAHW & PAHW_MCD)\r
	113	{\r
0c7d1ba3	114	u8 r3 = Pico_mcd->s68k_regs[3];\r
	115	elprintf(EL_VDPDMA, "DmaSlow CD, r3=%02x", r3);\r
	116	if (source < 0x20000) { // Bios area\r
	117	base = (u16 *)Pico_mcd->bios;\r
	118	} else if ((source & 0xfc0000) == 0x200000) { // Word Ram\r
	119	if (!(r3 & 4)) { // 2M mode\r
	120	base = (u16 *)(Pico_mcd->word_ram2M + (source & 0x20000));\r
ab0607f7	121	} else {\r
fa1e5e29	122	if (source < 0x220000) { // 1M mode\r
0c7d1ba3	123	int bank = r3 & 1;\r
0c7d1ba3	124	base = (u16 *)(Pico_mcd->word_ram1M[bank]);\r
69996cb7	125	} else {\r
0c7d1ba3	126	DmaSlowCell(source - 2, a, len, inc);\r
fa1e5e29	127	return;\r
69996cb7	128	}\r
ab0607f7	129	}\r
0c7d1ba3	130	source -= 2;\r
	131	} else if ((source & 0xfe0000) == 0x020000) { // Prg Ram\r
	132	base = (u16 *)Pico_mcd->prg_ram_b[r3 >> 6];\r
	133	source -= 2; // XXX: test\r
ab0607f7	134	}\r
602133e1	135	}\r
	136	else\r
	137	{\r
50483b53	138	// if we have DmaHook, let it handle ROM because of possible DMA delay\r
0c7d1ba3	139	u32 source2;\r
	140	if (PicoDmaHook && (source2 = PicoDmaHook(source, len, &base, &mask)))\r
	141	source = source2;\r
	142	else // Rom\r
	143	base = m68k_dma_source(source);\r
ab0607f7	144	}\r
0c7d1ba3	145	if (!base) {\r
	146	elprintf(EL_VDPDMA\|EL_ANOMALY, "DmaSlow[%i] %06x->%04x: invalid src", Pico.video.type, source, a);\r
	147	return;\r
672ad671	148	}\r
cc68a136	149	\r
0c7d1ba3	150	// operate in words\r
	151	source >>= 1;\r
	152	mask >>= 1;\r
	153	\r
cc68a136	154	switch (Pico.video.type)\r
	155	{\r
	156	case 1: // vram\r
	157	r = Pico.vram;\r
0c7d1ba3	158	if (inc == 2 && !(a & 1) && a + len * 2 < 0x10000\r
0c7d1ba3	159	&& !(((source + len - 1) ^ source) & ~mask))\r
cc68a136	160	{\r
cea65903	161	// most used DMA mode\r
0c7d1ba3	162	memcpy((char )r + a, base + (source & mask), len 2);\r
0c7d1ba3	163	a += len * 2;\r
cea65903	164	}\r
	165	else\r
	166	{\r
	167	for(; len; len--)\r
	168	{\r
0c7d1ba3	169	u16 d = base[source++ & mask];\r
	170	if(a & 1) d=(d<<8)\|(d>>8);\r
	171	r[a >> 1] = d;\r
cea65903	172	// AutoIncrement\r
0c7d1ba3	173	a = (u16)(a + inc);\r
cea65903	174	}\r
cc68a136	175	}\r
ea38612f	176	Pico.est.rendstatus \|= PDRAW_DIRTY_SPRITES;\r
cc68a136	177	break;\r
4f672280	178	\r
cc68a136	179	case 3: // cram\r
cc68a136	180	Pico.m.dirtyPal = 1;\r
cc68a136	181	r = Pico.cram;\r
0c7d1ba3	182	for (; len; len--)\r
cc68a136	183	{\r
0c7d1ba3	184	r[(a / 2) & 0x3f] = base[source++ & mask];\r
cc68a136	185	// AutoIncrement\r
0c7d1ba3	186	a += inc;\r
cc68a136	187	}\r
cc68a136	188	break;\r
cc68a136	189	\r
0c7d1ba3	190	case 5: // vsram\r
cc68a136	191	r = Pico.vsram;\r
0c7d1ba3	192	for (; len; len--)\r
cc68a136	193	{\r
0c7d1ba3	194	r[(a / 2) & 0x3f] = base[source++ & mask];\r
cc68a136	195	// AutoIncrement\r
0c7d1ba3	196	a += inc;\r
cc68a136	197	}\r
cc68a136	198	break;\r
69996cb7	199	\r
b71cbbf7	200	case 0x81: // vram 128k\r
	201	a \|= Pico.video.addr_u << 16;\r
	202	for(; len; len--)\r
	203	{\r
	204	VideoWrite128(a, base[source++ & mask]);\r
	205	// AutoIncrement\r
	206	a = (a + inc) & 0x1ffff;\r
	207	}\r
	208	Pico.video.addr_u = a >> 16;\r
	209	break;\r
	210	\r
69996cb7	211	default:\r
e7b3ad1b	212	if (Pico.video.type != 0 \|\| (EL_LOGMASK & EL_VDPDMA))\r
e7b3ad1b	213	elprintf(EL_VDPDMA\|EL_ANOMALY, "DMA with bad type %i", Pico.video.type);\r
69996cb7	214	break;\r
cc68a136	215	}\r
	216	// remember addr\r
	217	Pico.video.addr=(u16)a;\r
	218	}\r
	219	\r
	220	static void DmaCopy(int len)\r
	221	{\r
	222	u16 a=Pico.video.addr;\r
	223	unsigned char vr = (unsigned char ) Pico.vram;\r
cc68a136	224	unsigned char inc=Pico.video.reg[0xf];\r
cc68a136	225	int source;\r
69996cb7	226	elprintf(EL_VDPDMA, "DmaCopy len %i [%i]", len, SekCyclesDone());\r
4f672280	227	\r
69996cb7	228	Pico.m.dma_xfers += len;\r
0c7d1ba3	229	if (Pico.m.dma_xfers < len)\r
0c7d1ba3	230	Pico.m.dma_xfers = ~0;\r
2aa27095	231	Pico.video.status \|= 2; // dma busy\r
cc68a136	232	\r
	233	source =Pico.video.reg[0x15];\r
	234	source\|=Pico.video.reg[0x16]<<8;\r
cc68a136	235	\r
2aa27095	236	for (; len; len--)\r
cc68a136	237	{\r
0c7d1ba3	238	vr[a] = vr[source++ & 0xffff];\r
cc68a136	239	// AutoIncrement\r
	240	a=(u16)(a+inc);\r
	241	}\r
	242	// remember addr\r
	243	Pico.video.addr=a;\r
ea38612f	244	Pico.est.rendstatus \|= PDRAW_DIRTY_SPRITES;\r
cc68a136	245	}\r
cc68a136	246	\r
0c7d1ba3	247	static NOINLINE void DmaFill(int data)\r
cc68a136	248	{\r
cc68a136	249	unsigned short a=Pico.video.addr;\r
	250	unsigned char vr=(unsigned char ) Pico.vram;\r
	251	unsigned char high = (unsigned char) (data >> 8);\r
	252	unsigned char inc=Pico.video.reg[0xf];\r
0c7d1ba3	253	int source;\r
0c7d1ba3	254	int len, l;\r
4f672280	255	\r
0c7d1ba3	256	len = GetDmaLength();\r
69996cb7	257	elprintf(EL_VDPDMA, "DmaFill len %i inc %i [%i]", len, inc, SekCyclesDone());\r
4f672280	258	\r
69996cb7	259	Pico.m.dma_xfers += len;\r
0c7d1ba3	260	if (Pico.m.dma_xfers < len) // lame 16bit var\r
0c7d1ba3	261	Pico.m.dma_xfers = ~0;\r
2aa27095	262	Pico.video.status \|= 2; // dma busy\r
cc68a136	263	\r
0c7d1ba3	264	switch (Pico.video.type)\r
	265	{\r
	266	case 1: // vram\r
	267	for (l = len; l; l--) {\r
	268	// Write upper byte to adjacent address\r
	269	// (here we are byteswapped, so address is already 'adjacent')\r
	270	vr[a] = high;\r
cc68a136	271	\r
0c7d1ba3	272	// Increment address register\r
	273	a = (u16)(a + inc);\r
	274	}\r
	275	break;\r
	276	case 3: // cram\r
	277	case 5: { // vsram\r
	278	// TODO: needs fifo; anyone using these?\r
	279	static int once;\r
	280	if (!once++)\r
	281	elprintf(EL_STATUS\|EL_ANOMALY\|EL_VDPDMA, "TODO: cram/vsram fill");\r
	282	}\r
	283	default:\r
	284	a += len * inc;\r
	285	break;\r
cc68a136	286	}\r
0c7d1ba3	287	\r
cc68a136	288	// remember addr\r
0c7d1ba3	289	Pico.video.addr = a;\r
	290	// register update\r
	291	Pico.video.reg[0x13] = Pico.video.reg[0x14] = 0;\r
	292	source = Pico.video.reg[0x15];\r
	293	source \|= Pico.video.reg[0x16] << 8;\r
	294	source += len;\r
	295	Pico.video.reg[0x15] = source;\r
	296	Pico.video.reg[0x16] = source >> 8;\r
cc68a136	297	\r
ea38612f	298	Pico.est.rendstatus \|= PDRAW_DIRTY_SPRITES;\r
cc68a136	299	}\r
cc68a136	300	\r
0c7d1ba3	301	static NOINLINE void CommandDma(void)\r
cc68a136	302	{\r
cc68a136	303	struct PicoVideo *pvid=&Pico.video;\r
0c7d1ba3	304	u32 len, method;\r
0c7d1ba3	305	u32 source;\r
cc68a136	306	\r
	307	if ((pvid->reg[1]&0x10)==0) return; // DMA not enabled\r
	308	\r
0c7d1ba3	309	len = GetDmaLength();\r
	310	source =Pico.video.reg[0x15];\r
	311	source\|=Pico.video.reg[0x16] << 8;\r
	312	source\|=Pico.video.reg[0x17] << 16;\r
cc68a136	313	\r
cc68a136	314	method=pvid->reg[0x17]>>6;\r
0c7d1ba3	315	if (method < 2)\r
	316	DmaSlow(len, source << 1); // 68000 to VDP\r
	317	else if (method == 3)\r
	318	DmaCopy(len); // VRAM Copy\r
	319	else\r
	320	return;\r
	321	\r
	322	source += len;\r
	323	Pico.video.reg[0x13] = Pico.video.reg[0x14] = 0;\r
	324	Pico.video.reg[0x15] = source;\r
	325	Pico.video.reg[0x16] = source >> 8;\r
cc68a136	326	}\r
cc68a136	327	\r
b71cbbf7	328	static NOINLINE void CommandChange(void)\r
cc68a136	329	{\r
b71cbbf7	330	struct PicoVideo *pvid = &Pico.video;\r
b71cbbf7	331	unsigned int cmd, addr;\r
cc68a136	332	\r
b71cbbf7	333	cmd = pvid->command;\r
cc68a136	334	\r
cc68a136	335	// Get type of transfer 0xc0000030 (v/c/vsram read/write)\r
b71cbbf7	336	pvid->type = (u8)(((cmd >> 2) & 0xc) \| (cmd >> 30));\r
	337	if (pvid->type == 1) // vram\r
	338	pvid->type \|= pvid->reg[1] & 0x80; // 128k\r
cc68a136	339	\r
cc68a136	340	// Get address 0x3fff0003\r
b71cbbf7	341	addr = (cmd >> 16) & 0x3fff;\r
	342	addr \|= (cmd << 14) & 0xc000;\r
	343	pvid->addr = (u16)addr;\r
	344	pvid->addr_u = (u8)((cmd >> 2) & 1);\r
cc68a136	345	}\r
cc68a136	346	\r
697746df	347	static void DrawSync(int blank_on)\r
b6d7ac70	348	{\r
b6d7ac70	349	if (Pico.m.scanline < 224 && !(PicoOpt & POPT_ALT_RENDERER) &&\r
ea38612f	350	!PicoSkipFrame && Pico.est.DrawScanline <= Pico.m.scanline) {\r
2aa27095	351	//elprintf(EL_ANOMALY, "sync");\r
b6d7ac70	352	PicoDrawSync(Pico.m.scanline, blank_on);\r
	353	}\r
	354	}\r
	355	\r
eff55556	356	PICO_INTERNAL_ASM void PicoVideoWrite(unsigned int a,unsigned short d)\r
cc68a136	357	{\r
	358	struct PicoVideo *pvid=&Pico.video;\r
	359	\r
2aa27095	360	//if (Pico.m.scanline < 224)\r
2aa27095	361	// elprintf(EL_STATUS, "PicoVideoWrite [%06x] %04x", a, d);\r
cc68a136	362	a&=0x1c;\r
cc68a136	363	\r
e0bcb7a9	364	switch (a)\r
4f672280	365	{\r
e0bcb7a9	366	case 0x00: // Data port 0 or 2\r
b6d7ac70	367	// try avoiding the sync..\r
	368	if (Pico.m.scanline < 224 && (pvid->reg[1]&0x40) &&\r
	369	!(!pvid->pending &&\r
	370	((pvid->command & 0xc00000f0) == 0x40000010 && Pico.vsram[pvid->addr>>1] == d))\r
	371	)\r
	372	DrawSync(0);\r
	373	\r
69996cb7	374	if (pvid->pending) {\r
	375	CommandChange();\r
	376	pvid->pending=0;\r
	377	}\r
cc68a136	378	\r
0c7d1ba3	379	// preliminary FIFO emulation for Chaos Engine, The (E)\r
0c7d1ba3	380	if (!(pvid->status&8) && (pvid->reg[1]&0x40) && !(PicoOpt&POPT_DIS_VDP_FIFO)) // active display?\r
cc68a136	381	{\r
0c7d1ba3	382	pvid->status&=~0x200; // FIFO no longer empty\r
	383	pvid->lwrite_cnt++;\r
	384	if (pvid->lwrite_cnt >= 4) pvid->status\|=0x100; // FIFO full\r
	385	if (pvid->lwrite_cnt > 4) {\r
	386	SekCyclesBurnRun(32); // penalty // 488/12-8\r
69996cb7	387	}\r
0c7d1ba3	388	elprintf(EL_ASVDP, "VDP data write: %04x [%06x] {%i} #%i @ %06x", d, Pico.video.addr,\r
0c7d1ba3	389	Pico.video.type, pvid->lwrite_cnt, SekPc);\r
cc68a136	390	}\r
0c7d1ba3	391	VideoWrite(d);\r
	392	\r
	393	if ((pvid->command&0x80) && (pvid->reg[1]&0x10) && (pvid->reg[0x17]>>6)==2)\r
	394	DmaFill(d);\r
	395	\r
e0bcb7a9	396	break;\r
cc68a136	397	\r
e0bcb7a9	398	case 0x04: // Control (command) port 4 or 6\r
b6d7ac70	399	if (pvid->pending)\r
cc68a136	400	{\r
cc68a136	401	// Low word of command:\r
0c7d1ba3	402	pvid->command &= 0xffff0000;\r
	403	pvid->command \|= d;\r
	404	pvid->pending = 0;\r
cc68a136	405	CommandChange();\r
0c7d1ba3	406	// Check for dma:\r
	407	if (d & 0x80) {\r
	408	DrawSync(0);\r
	409	CommandDma();\r
	410	}\r
602133e1	411	}\r
	412	else\r
	413	{\r
	414	if ((d&0xc000)==0x8000)\r
cc68a136	415	{\r
	416	// Register write:\r
	417	int num=(d>>8)&0x1f;\r
0ffefdb8	418	int dold=pvid->reg[num];\r
147f8df1	419	int blank_on = 0;\r
602133e1	420	pvid->type=0; // register writes clear command (else no Sega logo in Golden Axe II)\r
0ffefdb8	421	if (num > 0x0a && !(pvid->reg[1]&4)) {\r
0ffefdb8	422	elprintf(EL_ANOMALY, "%02x written to reg %02x in SMS mode @ %06x", d, num, SekPc);\r
602133e1	423	return;\r
b6d7ac70	424	}\r
602133e1	425	\r
53f948c9	426	if (num == 1 && !(d&0x40) && SekCyclesDone() - line_base_cycles <= 488-390)\r
53f948c9	427	blank_on = 1;\r
147f8df1	428	DrawSync(blank_on);\r
147f8df1	429	pvid->reg[num]=(unsigned char)d;\r
602133e1	430	switch (num)\r
	431	{\r
	432	case 0x00:\r
	433	elprintf(EL_INTSW, "hint_onoff: %i->%i [%i] pend=%i @ %06x", (dold&0x10)>>4,\r
	434	(d&0x10)>>4, SekCyclesDone(), (pvid->pending_ints&0x10)>>4, SekPc);\r
147f8df1	435	goto update_irq;\r
602133e1	436	case 0x01:\r
	437	elprintf(EL_INTSW, "vint_onoff: %i->%i [%i] pend=%i @ %06x", (dold&0x20)>>5,\r
	438	(d&0x20)>>5, SekCyclesDone(), (pvid->pending_ints&0x20)>>5, SekPc);\r
147f8df1	439	goto update_irq;\r
602133e1	440	case 0x05:\r
4c436138	441	//elprintf(EL_STATUS, "spritep moved to %04x", (unsigned)(Pico.video.reg[5]&0x7f) << 9);\r
ea38612f	442	if (d^dold) Pico.est.rendstatus \|= PDRAW_SPRITES_MOVED;\r
602133e1	443	break;\r
	444	case 0x0c:\r
	445	// renderers should update their palettes if sh/hi mode is changed\r
	446	if ((d^dold)&8) Pico.m.dirtyPal = 2;\r
	447	break;\r
	448	}\r
147f8df1	449	return;\r
602133e1	450	\r
147f8df1	451	update_irq:\r
03e4f2a3	452	#ifndef EMU_CORE_DEBUG\r
b6d7ac70	453	// update IRQ level\r
08769494	454	if (!SekShouldInterrupt()) // hack\r
03e4f2a3	455	{\r
602133e1	456	int lines, pints, irq=0;\r
	457	lines = (pvid->reg[1] & 0x20) \| (pvid->reg[0] & 0x10);\r
	458	pints = (pvid->pending_ints&lines);\r
b6d7ac70	459	if (pints & 0x20) irq = 6;\r
b6d7ac70	460	else if (pints & 0x10) irq = 4;\r
602133e1	461	SekInterrupt(irq); // update line\r
602133e1	462	\r
2aa27095	463	if (irq) SekEndRun(24); // make it delayed\r
cc68a136	464	}\r
cc68a136	465	#endif\r
602133e1	466	}\r
	467	else\r
	468	{\r
cc68a136	469	// High word of command:\r
	470	pvid->command&=0x0000ffff;\r
	471	pvid->command\|=d<<16;\r
	472	pvid->pending=1;\r
	473	}\r
	474	}\r
e0bcb7a9	475	break;\r
	476	\r
	477	// case 0x08: // 08 0a - HV counter - lock up\r
	478	// case 0x0c: // 0c 0e - HV counter - lock up\r
	479	// case 0x10: // 10 12 - PSG - handled by caller\r
	480	// case 0x14: // 14 16 - PSG - handled by caller\r
	481	// case 0x18: // 18 1a - no effect?\r
	482	case 0x1c: // 1c 1e - debug\r
	483	pvid->debug = d;\r
	484	pvid->debug_p = 0;\r
	485	if (d & (1 << 6)) {\r
	486	pvid->debug_p \|= PVD_KILL_A \| PVD_KILL_B;\r
	487	pvid->debug_p \|= PVD_KILL_S_LO \| PVD_KILL_S_HI;\r
	488	}\r
	489	switch ((d >> 7) & 3) {\r
	490	case 1:\r
	491	pvid->debug_p &= ~(PVD_KILL_S_LO \| PVD_KILL_S_HI);\r
	492	pvid->debug_p \|= PVD_FORCE_S;\r
	493	break;\r
	494	case 2:\r
	495	pvid->debug_p &= ~PVD_KILL_A;\r
	496	pvid->debug_p \|= PVD_FORCE_A;\r
	497	break;\r
	498	case 3:\r
	499	pvid->debug_p &= ~PVD_KILL_B;\r
	500	pvid->debug_p \|= PVD_FORCE_B;\r
	501	break;\r
	502	}\r
	503	break;\r
cc68a136	504	}\r
	505	}\r
	506	\r
eff55556	507	PICO_INTERNAL_ASM unsigned int PicoVideoRead(unsigned int a)\r
cc68a136	508	{\r
cc68a136	509	a&=0x1c;\r
cc68a136	510	\r
cc68a136	511	if (a==0x04) // control port\r
cc68a136	512	{\r
69996cb7	513	struct PicoVideo *pv=&Pico.video;\r
b6d7ac70	514	unsigned int d;\r
69996cb7	515	d=pv->status;\r
9761a7d0	516	//if (PicoOpt&POPT_ALT_RENDERER) d\|=0x0020; // sprite collision (Shadow of the Beast)\r
53f948c9	517	if (SekCyclesDone() - line_base_cycles >= 488-88)\r
53f948c9	518	d\|=0x0004; // H-Blank (Sonic3 vs)\r
69996cb7	519	\r
9761a7d0	520	d \|= ((pv->reg[1]&0x40)^0x40) >> 3; // set V-Blank if display is disabled\r
9761a7d0	521	d \|= (pv->pending_ints&0x20)<<2; // V-int pending?\r
69996cb7	522	if (d&0x100) pv->status&=~0x100; // FIFO no longer full\r
cc68a136	523	\r
9761a7d0	524	pv->pending = 0; // ctrl port reads clear write-pending flag (Charles MacDonald)\r
cc68a136	525	\r
69996cb7	526	elprintf(EL_SR, "SR read: %04x @ %06x", d, SekPc);\r
b6d7ac70	527	return d;\r
cc68a136	528	}\r
	529	\r
	530	// H-counter info (based on Generator):\r
	531	// frame:\r
	532	// \| <- hblank? -> \|\r
	533	// start <416> hint <36> hdisplay <38> end // CPU cycles\r
	534	// \|---------...---------\|------------\|-------------\|\r
	535	// 0 B6 E4 FF // 40 cells\r
	536	// 0 93 E8 FF // 32 cells\r
	537	\r
	538	// Gens (?) v-render\r
	539	// start <hblank=84> hint hdisplay <404> \|\r
	540	// \|---------------------\|--------------------------\|\r
	541	// E4 (hc[0x43]==0) 07 B1 // 40\r
	542	// E8 (hc[0x45]==0) 05 91 // 32\r
4f672280	543	\r
cc68a136	544	// check: Sonic 3D Blast bonus, Cannon Fodder, Chase HQ II, 3 Ninjas kick back, Road Rash 3, Skitchin', Wheel of Fortune\r
	545	if ((a&0x1c)==0x08)\r
	546	{\r
9761a7d0	547	unsigned int d;\r
947fb5f9	548	\r
53f948c9	549	d = (SekCyclesDone() - line_base_cycles) & 0x1ff; // FIXME\r
2aa27095	550	if (Pico.video.reg[12]&1)\r
53f948c9	551	d = hcounts_40[d];\r
53f948c9	552	else d = hcounts_32[d];\r
cc68a136	553	\r
9761a7d0	554	elprintf(EL_HVCNT, "hv: %02x %02x (%i) @ %06x", d, Pico.video.v_counter, SekCyclesDone(), SekPc);\r
	555	return d \| (Pico.video.v_counter << 8);\r
	556	}\r
cc68a136	557	\r
9761a7d0	558	if (a==0x00) // data port\r
	559	{\r
	560	return VideoRead();\r
	561	}\r
cc68a136	562	\r
9761a7d0	563	return 0;\r
	564	}\r
	565	\r
	566	unsigned int PicoVideoRead8(unsigned int a)\r
	567	{\r
	568	unsigned int d;\r
	569	a&=0x1d;\r
	570	\r
	571	switch (a)\r
	572	{\r
	573	case 0: return VideoRead() >> 8;\r
	574	case 1: return VideoRead() & 0xff;\r
	575	case 4: // control port/status reg\r
	576	d = Pico.video.status >> 8;\r
	577	if (d&1) Pico.video.status&=~0x100; // FIFO no longer full\r
	578	Pico.video.pending = 0;\r
	579	elprintf(EL_SR, "SR read (h): %02x @ %06x", d, SekPc);\r
	580	return d;\r
	581	case 5:\r
	582	d = Pico.video.status & 0xff;\r
	583	//if (PicoOpt&POPT_ALT_RENDERER) d\|=0x0020; // sprite collision (Shadow of the Beast)\r
	584	d \|= ((Pico.video.reg[1]&0x40)^0x40) >> 3; // set V-Blank if display is disabled\r
	585	d \|= (Pico.video.pending_ints&0x20)<<2; // V-int pending?\r
53f948c9	586	if (SekCyclesDone() - line_base_cycles >= 488-88) d \|= 4; // H-Blank\r
9761a7d0	587	Pico.video.pending = 0;\r
	588	elprintf(EL_SR, "SR read (l): %02x @ %06x", d, SekPc);\r
	589	return d;\r
	590	case 8: // hv counter\r
	591	elprintf(EL_HVCNT, "vcounter: %02x (%i) @ %06x", Pico.video.v_counter, SekCyclesDone(), SekPc);\r
	592	return Pico.video.v_counter;\r
	593	case 9:\r
53f948c9	594	d = (SekCyclesDone() - line_base_cycles) & 0x1ff; // FIXME\r
9761a7d0	595	if (Pico.video.reg[12]&1)\r
	596	d = hcounts_40[d];\r
	597	else d = hcounts_32[d];\r
	598	elprintf(EL_HVCNT, "hcounter: %02x (%i) @ %06x", d, SekCyclesDone(), SekPc);\r
	599	return d;\r
cc68a136	600	}\r
cc68a136	601	\r
b6d7ac70	602	return 0;\r
cc68a136	603	}\r
e7b3ad1b	604	\r
e7b3ad1b	605	// vim:shiftwidth=2:ts=2:expandtab\r