[picodrive.git] / pico / sms.c

/*
 * SMS emulation
 * (C) notaz, 2009-2010
 *
 * This work is licensed under the terms of MAME license.
 * See COPYING file in the top-level directory.
 */
/*
 * TODO:
 * - start in a state as if BIOS ran
 * - remaining status flags (OVR/COL)
 * - RAM support in mapper
 * - region support
 * - SN76496 DAC-like usage
 * - H counter
 */
#include "pico_int.h"
#include "memory.h"
#include "sound/sn76496.h"

static unsigned char vdp_data_read(void)
{
  struct PicoVideo *pv = &Pico.video;
  unsigned char d;

  d = PicoMem.vramb[pv->addr];
  pv->addr = (pv->addr + 1) & 0x3fff;
  pv->pending = 0;
  return d;
}

static unsigned char vdp_ctl_read(void)
{
  unsigned char d = Pico.video.pending_ints << 7;
  Pico.video.pending = 0;
  Pico.video.pending_ints = 0;

  elprintf(EL_SR, "VDP sr: %02x", d);
  return d;
}

static void vdp_data_write(unsigned char d)
{
  struct PicoVideo *pv = &Pico.video;

  if (pv->type == 3) {
    PicoMem.cram[pv->addr & 0x1f] = d;
    Pico.m.dirtyPal = 1;
  } else {
    PicoMem.vramb[pv->addr] = d;
  }
  pv->addr = (pv->addr + 1) & 0x3fff;

  pv->pending = 0;
}

static void vdp_ctl_write(unsigned char d)
{
  struct PicoVideo *pv = &Pico.video;

  if (pv->pending) {
    if ((d >> 6) == 2) {
      pv->reg[d & 0x0f] = pv->addr;
      elprintf(EL_IO, "  VDP r%02x=%02x", d & 0x0f, pv->addr & 0xff);
    }
    pv->type = d >> 6;
    pv->addr &= 0x00ff;
    pv->addr |= (d & 0x3f) << 8;
  } else {
    pv->addr &= 0x3f00;
    pv->addr |= d;
  }
  pv->pending ^= 1;
}

static unsigned char z80_sms_in(unsigned short a)
{
  unsigned char d = 0;

  elprintf(EL_IO, "z80 port %04x read", a);
  a &= 0xc1;
  switch (a)
  {
    case 0x00:
    case 0x01:
      d = 0xff;
      break;

    case 0x40: /* V counter */
      d = Pico.video.v_counter;
      elprintf(EL_HVCNT, "V counter read: %02x", d);
      break;

    case 0x41: /* H counter */
      d = Pico.m.rotate++;
      elprintf(EL_HVCNT, "H counter read: %02x", d);
      break;

    case 0x80:
      d = vdp_data_read();
      break;

    case 0x81:
      d = vdp_ctl_read();
      break;

    case 0xc0: /* I/O port A and B */
      d = ~((PicoPad[0] & 0x3f) | (PicoPad[1] << 6));
      break;

    case 0xc1: /* I/O port B and miscellaneous */
      d = (Pico.ms.io_ctl & 0x80) | ((Pico.ms.io_ctl << 1) & 0x40) | 0x30;
      d |= ~(PicoPad[1] >> 2) & 0x0f;
      break;
  }

  elprintf(EL_IO, "ret = %02x", d);
  return d;
}

static void z80_sms_out(unsigned short a, unsigned char d)
{
  elprintf(EL_IO, "z80 port %04x write %02x", a, d);
  a &= 0xc1;
  switch (a)
  {
    case 0x01:
      Pico.ms.io_ctl = d;
      break;

    case 0x40:
    case 0x41:
      if (PicoOpt & POPT_EN_PSG)
        SN76496Write(d);
      break;

    case 0x80:
      vdp_data_write(d);
      break;

    case 0x81:
      vdp_ctl_write(d);
      break;
  }
}

static int bank_mask;

static void write_bank(unsigned short a, unsigned char d)
{
  elprintf(EL_Z80BNK, "bank %04x %02x @ %04x", a, d, z80_pc());
  switch (a & 0x0f)
  {
    case 0x0c:
      elprintf(EL_STATUS|EL_ANOMALY, "%02x written to control reg!", d);
      break;
    case 0x0d:
      if (d != 0)
        elprintf(EL_STATUS|EL_ANOMALY, "bank0 changed to %d!", d);
      break;
    case 0x0e:
      d &= bank_mask;
      z80_map_set(z80_read_map, 0x4000, 0x7fff, Pico.rom + (d << 14), 0);
#ifdef _USE_CZ80
      Cz80_Set_Fetch(&CZ80, 0x4000, 0x7fff, (FPTR)Pico.rom + (d << 14));
#endif
      break;
    case 0x0f:
      d &= bank_mask;
      z80_map_set(z80_read_map, 0x8000, 0xbfff, Pico.rom + (d << 14), 0);
#ifdef _USE_CZ80
      Cz80_Set_Fetch(&CZ80, 0x8000, 0xbfff, (FPTR)Pico.rom + (d << 14));
#endif
      break;
  }
  Pico.ms.carthw[a & 0x0f] = d;
}

static void xwrite(unsigned int a, unsigned char d)
{
  elprintf(EL_IO, "z80 write [%04x] %02x", a, d);
  if (a >= 0xc000)
    PicoMem.zram[a & 0x1fff] = d;
  if (a >= 0xfff8)
    write_bank(a, d);
}

void PicoResetMS(void)
{
  z80_reset();
  PsndReset(); // pal must be known here
}

void PicoPowerMS(void)
{
  int s, tmp;

  memset(&PicoMem,0,sizeof(PicoMem));
  memset(&Pico.video,0,sizeof(Pico.video));
  memset(&Pico.m,0,sizeof(Pico.m));
  Pico.m.pal = 0;

  // calculate a mask for bank writes.
  // ROM loader has aligned the size for us, so this is safe.
  s = 0; tmp = Pico.romsize;
  while ((tmp >>= 1) != 0)
    s++;
  if (Pico.romsize > (1 << s))
    s++;
  tmp = 1 << s;
  bank_mask = (tmp - 1) >> 14;

  Pico.ms.carthw[0x0e] = 1;
  Pico.ms.carthw[0x0f] = 2;

  PicoReset();
}

void PicoMemSetupMS(void)
{
  z80_map_set(z80_read_map, 0x0000, 0xbfff, Pico.rom, 0);
  z80_map_set(z80_read_map, 0xc000, 0xdfff, PicoMem.zram, 0);
  z80_map_set(z80_read_map, 0xe000, 0xffff, PicoMem.zram, 0);

  z80_map_set(z80_write_map, 0x0000, 0xbfff, xwrite, 1);
  z80_map_set(z80_write_map, 0xc000, 0xdfff, PicoMem.zram, 0);
  z80_map_set(z80_write_map, 0xe000, 0xffff, xwrite, 1);
 
#ifdef _USE_DRZ80
  drZ80.z80_in = z80_sms_in;
  drZ80.z80_out = z80_sms_out;
#endif
#ifdef _USE_CZ80
  Cz80_Set_Fetch(&CZ80, 0x0000, 0xbfff, (FPTR)Pico.rom);
  Cz80_Set_Fetch(&CZ80, 0xc000, 0xdfff, (FPTR)PicoMem.zram);
  Cz80_Set_Fetch(&CZ80, 0xe000, 0xffff, (FPTR)PicoMem.zram);
  Cz80_Set_INPort(&CZ80, z80_sms_in);
  Cz80_Set_OUTPort(&CZ80, z80_sms_out);
#endif
}

void PicoStateLoadedMS(void)
{
  write_bank(0xfffe, Pico.ms.carthw[0x0e]);
  write_bank(0xffff, Pico.ms.carthw[0x0f]);
}

void PicoFrameMS(void)
{
  struct PicoVideo *pv = &Pico.video;
  int is_pal = Pico.m.pal;
  int lines = is_pal ? 313 : 262;
  int cycles_line = is_pal ? 58020 : 58293; /* (226.6 : 227.7) * 256 */
  int cycles_done = 0, cycles_aim = 0;
  int skip = PicoSkipFrame;
  int lines_vis = 192;
  int hint; // Hint counter
  int nmi;
  int y;

  PsndStartFrame();

  nmi = (PicoPad[0] >> 7) & 1;
  if (!Pico.ms.nmi_state && nmi)
    z80_nmi();
  Pico.ms.nmi_state = nmi;

  PicoFrameStartMode4();
  hint = pv->reg[0x0a];

  for (y = 0; y < lines; y++)
  {
    pv->v_counter = Pico.m.scanline = y;
    if (y > 218)
      pv->v_counter = y - 6;

    if (y < lines_vis && !skip)
      PicoLineMode4(y);

    if (y <= lines_vis)
    {
      if (--hint < 0)
      {
        hint = pv->reg[0x0a];
        pv->pending_ints |= 2;
        if (pv->reg[0] & 0x10) {
          elprintf(EL_INTS, "hint");
          z80_int();
        }
      }
    }
    else if (y == lines_vis + 1) {
      pv->pending_ints |= 1;
      if (pv->reg[1] & 0x20) {
        elprintf(EL_INTS, "vint");
        z80_int();
      }
    }

    cycles_aim += cycles_line;
    cycles_done += z80_run((cycles_aim - cycles_done) >> 8) << 8;
  }

  if (PsndOut)
    PsndGetSamplesMS();
}

void PicoFrameDrawOnlyMS(void)
{
  int lines_vis = 192;
  int y;

  PicoFrameStartMode4();

  for (y = 0; y < lines_vis; y++)
    PicoLineMode4(y);
}
Commit	Line	Data
	1	/*
	2	* SMS emulation
	3	* (C) notaz, 2009-2010
	4	*
	5	* This work is licensed under the terms of MAME license.
	6	* See COPYING file in the top-level directory.
	7	*/
	8	/*
	9	* TODO:
	10	* - start in a state as if BIOS ran
	11	* - remaining status flags (OVR/COL)
	12	* - RAM support in mapper
	13	* - region support
	14	* - SN76496 DAC-like usage
	15	* - H counter
	16	*/
	17	#include "pico_int.h"
	18	#include "memory.h"
	19	#include "sound/sn76496.h"
	20
	21	static unsigned char vdp_data_read(void)
	22	{
	23	struct PicoVideo *pv = &Pico.video;
	24	unsigned char d;
	25
	26	d = PicoMem.vramb[pv->addr];
	27	pv->addr = (pv->addr + 1) & 0x3fff;
	28	pv->pending = 0;
	29	return d;
	30	}
	31
	32	static unsigned char vdp_ctl_read(void)
	33	{
	34	unsigned char d = Pico.video.pending_ints << 7;
	35	Pico.video.pending = 0;
	36	Pico.video.pending_ints = 0;
	37
	38	elprintf(EL_SR, "VDP sr: %02x", d);
	39	return d;
	40	}
	41
	42	static void vdp_data_write(unsigned char d)
	43	{
	44	struct PicoVideo *pv = &Pico.video;
	45
	46	if (pv->type == 3) {
	47	PicoMem.cram[pv->addr & 0x1f] = d;
	48	Pico.m.dirtyPal = 1;
	49	} else {
	50	PicoMem.vramb[pv->addr] = d;
	51	}
	52	pv->addr = (pv->addr + 1) & 0x3fff;
	53
	54	pv->pending = 0;
	55	}
	56
	57	static void vdp_ctl_write(unsigned char d)
	58	{
	59	struct PicoVideo *pv = &Pico.video;
	60
	61	if (pv->pending) {
	62	if ((d >> 6) == 2) {
	63	pv->reg[d & 0x0f] = pv->addr;
	64	elprintf(EL_IO, " VDP r%02x=%02x", d & 0x0f, pv->addr & 0xff);
	65	}
	66	pv->type = d >> 6;
	67	pv->addr &= 0x00ff;
	68	pv->addr \|= (d & 0x3f) << 8;
	69	} else {
	70	pv->addr &= 0x3f00;
	71	pv->addr \|= d;
	72	}
	73	pv->pending ^= 1;
	74	}
	75
	76	static unsigned char z80_sms_in(unsigned short a)
	77	{
	78	unsigned char d = 0;
	79
	80	elprintf(EL_IO, "z80 port %04x read", a);
	81	a &= 0xc1;
	82	switch (a)
	83	{
	84	case 0x00:
	85	case 0x01:
	86	d = 0xff;
	87	break;
	88
	89	case 0x40: /* V counter */
	90	d = Pico.video.v_counter;
	91	elprintf(EL_HVCNT, "V counter read: %02x", d);
	92	break;
	93
	94	case 0x41: /* H counter */
	95	d = Pico.m.rotate++;
	96	elprintf(EL_HVCNT, "H counter read: %02x", d);
	97	break;
	98
	99	case 0x80:
	100	d = vdp_data_read();
	101	break;
	102
	103	case 0x81:
	104	d = vdp_ctl_read();
	105	break;
	106
	107	case 0xc0: /* I/O port A and B */
	108	d = ~((PicoPad[0] & 0x3f) \| (PicoPad[1] << 6));
	109	break;
	110
	111	case 0xc1: /* I/O port B and miscellaneous */
	112	d = (Pico.ms.io_ctl & 0x80) \| ((Pico.ms.io_ctl << 1) & 0x40) \| 0x30;
	113	d \|= ~(PicoPad[1] >> 2) & 0x0f;
	114	break;
	115	}
	116
	117	elprintf(EL_IO, "ret = %02x", d);
	118	return d;
	119	}
	120
	121	static void z80_sms_out(unsigned short a, unsigned char d)
	122	{
	123	elprintf(EL_IO, "z80 port %04x write %02x", a, d);
	124	a &= 0xc1;
	125	switch (a)
	126	{
	127	case 0x01:
	128	Pico.ms.io_ctl = d;
	129	break;
	130
	131	case 0x40:
	132	case 0x41:
	133	if (PicoOpt & POPT_EN_PSG)
	134	SN76496Write(d);
	135	break;
	136
	137	case 0x80:
	138	vdp_data_write(d);
	139	break;
	140
	141	case 0x81:
	142	vdp_ctl_write(d);
	143	break;
	144	}
	145	}
	146
	147	static int bank_mask;
	148
	149	static void write_bank(unsigned short a, unsigned char d)
	150	{
	151	elprintf(EL_Z80BNK, "bank %04x %02x @ %04x", a, d, z80_pc());
	152	switch (a & 0x0f)
	153	{
	154	case 0x0c:
	155	elprintf(EL_STATUS\|EL_ANOMALY, "%02x written to control reg!", d);
	156	break;
	157	case 0x0d:
	158	if (d != 0)
	159	elprintf(EL_STATUS\|EL_ANOMALY, "bank0 changed to %d!", d);
	160	break;
	161	case 0x0e:
	162	d &= bank_mask;
	163	z80_map_set(z80_read_map, 0x4000, 0x7fff, Pico.rom + (d << 14), 0);
	164	#ifdef _USE_CZ80
	165	Cz80_Set_Fetch(&CZ80, 0x4000, 0x7fff, (FPTR)Pico.rom + (d << 14));
	166	#endif
	167	break;
	168	case 0x0f:
	169	d &= bank_mask;
	170	z80_map_set(z80_read_map, 0x8000, 0xbfff, Pico.rom + (d << 14), 0);
	171	#ifdef _USE_CZ80
	172	Cz80_Set_Fetch(&CZ80, 0x8000, 0xbfff, (FPTR)Pico.rom + (d << 14));
	173	#endif
	174	break;
	175	}
	176	Pico.ms.carthw[a & 0x0f] = d;
	177	}
	178
	179	static void xwrite(unsigned int a, unsigned char d)
	180	{
	181	elprintf(EL_IO, "z80 write [%04x] %02x", a, d);
	182	if (a >= 0xc000)
	183	PicoMem.zram[a & 0x1fff] = d;
	184	if (a >= 0xfff8)
	185	write_bank(a, d);
	186	}
	187
	188	void PicoResetMS(void)
	189	{
	190	z80_reset();
	191	PsndReset(); // pal must be known here
	192	}
	193
	194	void PicoPowerMS(void)
	195	{
	196	int s, tmp;
	197
	198	memset(&PicoMem,0,sizeof(PicoMem));
	199	memset(&Pico.video,0,sizeof(Pico.video));
	200	memset(&Pico.m,0,sizeof(Pico.m));
	201	Pico.m.pal = 0;
	202
	203	// calculate a mask for bank writes.
	204	// ROM loader has aligned the size for us, so this is safe.
	205	s = 0; tmp = Pico.romsize;
	206	while ((tmp >>= 1) != 0)
	207	s++;
	208	if (Pico.romsize > (1 << s))
	209	s++;
	210	tmp = 1 << s;
	211	bank_mask = (tmp - 1) >> 14;
	212
	213	Pico.ms.carthw[0x0e] = 1;
	214	Pico.ms.carthw[0x0f] = 2;
	215
	216	PicoReset();
	217	}
	218
	219	void PicoMemSetupMS(void)
	220	{
	221	z80_map_set(z80_read_map, 0x0000, 0xbfff, Pico.rom, 0);
	222	z80_map_set(z80_read_map, 0xc000, 0xdfff, PicoMem.zram, 0);
	223	z80_map_set(z80_read_map, 0xe000, 0xffff, PicoMem.zram, 0);
	224
	225	z80_map_set(z80_write_map, 0x0000, 0xbfff, xwrite, 1);
	226	z80_map_set(z80_write_map, 0xc000, 0xdfff, PicoMem.zram, 0);
	227	z80_map_set(z80_write_map, 0xe000, 0xffff, xwrite, 1);
	228
	229	#ifdef _USE_DRZ80
	230	drZ80.z80_in = z80_sms_in;
	231	drZ80.z80_out = z80_sms_out;
	232	#endif
	233	#ifdef _USE_CZ80
	234	Cz80_Set_Fetch(&CZ80, 0x0000, 0xbfff, (FPTR)Pico.rom);
	235	Cz80_Set_Fetch(&CZ80, 0xc000, 0xdfff, (FPTR)PicoMem.zram);
	236	Cz80_Set_Fetch(&CZ80, 0xe000, 0xffff, (FPTR)PicoMem.zram);
	237	Cz80_Set_INPort(&CZ80, z80_sms_in);
	238	Cz80_Set_OUTPort(&CZ80, z80_sms_out);
	239	#endif
	240	}
	241
	242	void PicoStateLoadedMS(void)
	243	{
	244	write_bank(0xfffe, Pico.ms.carthw[0x0e]);
	245	write_bank(0xffff, Pico.ms.carthw[0x0f]);
	246	}
	247
	248	void PicoFrameMS(void)
	249	{
	250	struct PicoVideo *pv = &Pico.video;
	251	int is_pal = Pico.m.pal;
	252	int lines = is_pal ? 313 : 262;
	253	int cycles_line = is_pal ? 58020 : 58293; /* (226.6 : 227.7) * 256 */
	254	int cycles_done = 0, cycles_aim = 0;
	255	int skip = PicoSkipFrame;
	256	int lines_vis = 192;
	257	int hint; // Hint counter
	258	int nmi;
	259	int y;
	260
	261	PsndStartFrame();
	262
	263	nmi = (PicoPad[0] >> 7) & 1;
	264	if (!Pico.ms.nmi_state && nmi)
	265	z80_nmi();
	266	Pico.ms.nmi_state = nmi;
	267
	268	PicoFrameStartMode4();
	269	hint = pv->reg[0x0a];
	270
	271	for (y = 0; y < lines; y++)
	272	{
	273	pv->v_counter = Pico.m.scanline = y;
	274	if (y > 218)
	275	pv->v_counter = y - 6;
	276
	277	if (y < lines_vis && !skip)
	278	PicoLineMode4(y);
	279
	280	if (y <= lines_vis)
	281	{
	282	if (--hint < 0)
	283	{
	284	hint = pv->reg[0x0a];
	285	pv->pending_ints \|= 2;
	286	if (pv->reg[0] & 0x10) {
	287	elprintf(EL_INTS, "hint");
	288	z80_int();
	289	}
	290	}
	291	}
	292	else if (y == lines_vis + 1) {
	293	pv->pending_ints \|= 1;
	294	if (pv->reg[1] & 0x20) {
	295	elprintf(EL_INTS, "vint");
	296	z80_int();
	297	}
	298	}
	299
	300	cycles_aim += cycles_line;
	301	cycles_done += z80_run((cycles_aim - cycles_done) >> 8) << 8;
	302	}
	303
	304	if (PsndOut)
	305	PsndGetSamplesMS();
	306	}
	307
	308	void PicoFrameDrawOnlyMS(void)
	309	{
	310	int lines_vis = 192;
	311	int y;
	312
	313	PicoFrameStartMode4();
	314
	315	for (y = 0; y < lines_vis; y++)
	316	PicoLineMode4(y);
	317	}
	318