1 // (c) Copyright 2007 notaz, All rights reserved.
4 #include "../PicoInt.h"
7 extern unsigned char formatted_bram[4*0x10];
8 extern unsigned int s68k_poll_adclk;
10 void (*PicoMCDopenTray)(void) = NULL;
11 int (*PicoMCDcloseTray)(void) = NULL;
13 #define dump_ram(ram,fname) \
18 for (i = 0; i < sizeof(ram); i+=2) { \
19 d = (ram[i]<<8) | ram[i+1]; \
20 *(unsigned short *)(ram+i) = d; \
22 f = fopen(fname, "wb"); \
24 fwrite(ram, 1, sizeof(ram), f); \
27 for (i = 0; i < sizeof(ram); i+=2) { \
28 d = (ram[i]<<8) | ram[i+1]; \
29 *(unsigned short *)(ram+i) = d; \
34 PICO_INTERNAL int PicoInitMCD(void)
43 PICO_INTERNAL void PicoExitMCD(void)
47 //dump_ram(Pico_mcd->prg_ram, "prg.bin");
48 //dump_ram(Pico.ram, "ram.bin");
51 PICO_INTERNAL int PicoResetMCD(int hard)
54 int fmt_size = sizeof(formatted_bram);
55 memset(Pico_mcd->prg_ram, 0, sizeof(Pico_mcd->prg_ram));
56 memset(Pico_mcd->word_ram2M, 0, sizeof(Pico_mcd->word_ram2M));
57 memset(Pico_mcd->pcm_ram, 0, sizeof(Pico_mcd->pcm_ram));
58 memset(Pico_mcd->bram, 0, sizeof(Pico_mcd->bram));
59 memcpy(Pico_mcd->bram + sizeof(Pico_mcd->bram) - fmt_size, formatted_bram, fmt_size);
61 memset(Pico_mcd->s68k_regs, 0, sizeof(Pico_mcd->s68k_regs));
62 memset(&Pico_mcd->pcm, 0, sizeof(Pico_mcd->pcm));
63 memset(&Pico_mcd->m, 0, sizeof(Pico_mcd->m));
65 *(unsigned int *)(Pico_mcd->bios + 0x70) = 0xffffffff; // reset hint vector (simplest way to implement reg6)
66 Pico_mcd->m.state_flags |= 1; // s68k reset pending
67 Pico_mcd->s68k_regs[3] = 1; // 2M word RAM mode with m68k access after reset
73 #ifdef _ASM_CD_MEMORY_C
74 //PicoMemResetCDdecode(1); // don't have to call this in 2M mode
77 // use SRam.data for RAM cart
78 if (SRam.data) free(SRam.data);
81 SRam.data = calloc(1, 0x12000);
86 static __inline void SekRunM68k(int cyc)
90 if ((cyc_do=SekCycleAim-SekCycleCnt) <= 0) return;
91 #if defined(EMU_CORE_DEBUG)
92 SekCycleCnt+=CM_compareRun(cyc_do, 0);
93 #elif defined(EMU_C68K)
94 PicoCpuCM68k.cycles=cyc_do;
95 CycloneRun(&PicoCpuCM68k);
96 SekCycleCnt+=cyc_do-PicoCpuCM68k.cycles;
97 #elif defined(EMU_M68K)
98 m68k_set_context(&PicoCpuMM68k);
99 SekCycleCnt+=m68k_execute(cyc_do);
100 #elif defined(EMU_F68K)
101 g_m68kcontext=&PicoCpuFM68k;
102 SekCycleCnt+=fm68k_emulate(cyc_do);
106 static __inline void SekRunS68k(int cyc)
109 SekCycleAimS68k+=cyc;
110 if ((cyc_do=SekCycleAimS68k-SekCycleCntS68k) <= 0) return;
111 #if defined(EMU_CORE_DEBUG)
112 SekCycleCntS68k+=CM_compareRun(cyc_do, 1);
113 #elif defined(EMU_C68K)
114 PicoCpuCS68k.cycles=cyc_do;
115 CycloneRun(&PicoCpuCS68k);
116 SekCycleCntS68k+=cyc_do-PicoCpuCS68k.cycles;
117 #elif defined(EMU_M68K)
118 m68k_set_context(&PicoCpuMS68k);
119 SekCycleCntS68k+=m68k_execute(cyc_do);
120 #elif defined(EMU_F68K)
121 g_m68kcontext=&PicoCpuFS68k;
122 SekCycleCntS68k+=fm68k_emulate(cyc_do);
126 #define PS_STEP_M68K ((488<<16)/20) // ~24
127 //#define PS_STEP_S68K 13
129 #ifdef _ASM_CD_PICO_C
130 void SekRunPS(int cyc_m68k, int cyc_s68k);
132 static __inline void SekRunPS(int cyc_m68k, int cyc_s68k)
134 int cycn, cycn_s68k, cyc_do;
135 SekCycleAim+=cyc_m68k;
136 SekCycleAimS68k+=cyc_s68k;
138 // fprintf(stderr, "=== start %3i/%3i [%3i/%3i] {%05i.%i} ===\n", cyc_m68k, cyc_s68k,
139 // SekCycleAim-SekCycleCnt, SekCycleAimS68k-SekCycleCntS68k, Pico.m.frame_count, Pico.m.scanline);
141 /* loop 488 downto 0 in steps of PS_STEP */
142 for (cycn = (488<<16)-PS_STEP_M68K; cycn >= 0; cycn -= PS_STEP_M68K)
144 cycn_s68k = (cycn + cycn/2 + cycn/8) >> 16;
145 if ((cyc_do = SekCycleAim-SekCycleCnt-(cycn>>16)) > 0) {
146 #if defined(EMU_C68K)
147 PicoCpuCM68k.cycles = cyc_do;
148 CycloneRun(&PicoCpuCM68k);
149 SekCycleCnt += cyc_do - PicoCpuCM68k.cycles;
150 #elif defined(EMU_M68K)
151 m68k_set_context(&PicoCpuMM68k);
152 SekCycleCnt += m68k_execute(cyc_do);
153 #elif defined(EMU_F68K)
154 g_m68kcontext = &PicoCpuFM68k;
155 SekCycleCnt += fm68k_emulate(cyc_do);
158 if ((cyc_do = SekCycleAimS68k-SekCycleCntS68k-cycn_s68k) > 0) {
159 #if defined(EMU_C68K)
160 PicoCpuCS68k.cycles = cyc_do;
161 CycloneRun(&PicoCpuCS68k);
162 SekCycleCntS68k += cyc_do - PicoCpuCS68k.cycles;
163 #elif defined(EMU_M68K)
164 m68k_set_context(&PicoCpuMS68k);
165 SekCycleCntS68k += m68k_execute(cyc_do);
166 #elif defined(EMU_F68K)
167 g_m68kcontext = &PicoCpuFS68k;
168 SekCycleCntS68k += fm68k_emulate(cyc_do);
176 static __inline void check_cd_dma(void)
180 if (!(Pico_mcd->scd.Status_CDC & 0x08)) return;
182 ddx = Pico_mcd->s68k_regs[4] & 7;
183 if (ddx < 2) return; // invalid
185 Pico_mcd->s68k_regs[4] |= 0x40; // Data set ready in host port
188 if (ddx == 6) return; // invalid
190 Update_CDC_TRansfer(ddx); // now go and do the actual transfer
193 static __inline void update_chips(void)
195 int counter_timer, int3_set;
196 int counter75hz_lim = Pico.m.pal ? 2080 : 2096;
199 if ((Pico_mcd->m.counter75hz+=10) >= counter75hz_lim) {
200 Pico_mcd->m.counter75hz -= counter75hz_lim;
205 counter_timer = Pico.m.pal ? 0x21630 : 0x2121c; // 136752 : 135708;
206 Pico_mcd->m.timer_stopwatch += counter_timer;
207 if ((int3_set = Pico_mcd->s68k_regs[0x31])) {
208 Pico_mcd->m.timer_int3 -= counter_timer;
209 if (Pico_mcd->m.timer_int3 < 0) {
210 if (Pico_mcd->s68k_regs[0x33] & (1<<3)) {
211 elprintf(EL_INTS, "s68k: timer irq 3");
213 Pico_mcd->m.timer_int3 += int3_set << 16;
215 // is this really what happens if irq3 is masked out?
216 Pico_mcd->m.timer_int3 &= 0xffffff;
221 if (Pico_mcd->rot_comp.Reg_58 & 0x8000)
224 // delayed setting of DMNA bit (needed for Silpheed)
225 if (Pico_mcd->m.state_flags & 2) {
226 Pico_mcd->m.state_flags &= ~2;
227 if (!(Pico_mcd->s68k_regs[3] & 4)) {
228 Pico_mcd->s68k_regs[3] |= 2;
229 Pico_mcd->s68k_regs[3] &= ~1;
230 #ifdef USE_POLL_DETECT
231 if ((s68k_poll_adclk&0xfe) == 2) {
232 SekSetStopS68k(0); s68k_poll_adclk = 0;
240 static __inline void getSamples(int y)
242 int len = PsndRender(0, PsndLen);
243 if (PicoWriteSound) PicoWriteSound(len);
244 // clear sound buffer
250 #include "../PicoFrameHints.c"
253 PICO_INTERNAL int PicoFrameMCD(void)