3 enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
5 #define CONTEXT_REG xBP
7 #define EMIT_PTR(ptr, val, type) \
10 #define EMIT(val, type) { \
11 EMIT_PTR(tcache_ptr, val, type); \
12 tcache_ptr += sizeof(type); \
15 #define EMIT_OP(op) { \
20 #define EMIT_MODRM(mod,r,rm) \
21 EMIT(((mod)<<6) | ((r)<<3) | (rm), u8)
23 #define EMIT_OP_MODRM(op,mod,r,rm) { \
25 EMIT_MODRM(mod, r, rm); \
28 #define emith_move_r_r(dst, src) \
29 EMIT_OP_MODRM(0x8b, 3, dst, src)
31 #define emith_move_r_imm(r, imm) { \
32 EMIT_OP(0xb8 + (r)); \
36 #define emith_add_r_imm(r, imm) { \
37 EMIT_OP_MODRM(0x81, 3, 0, r); \
41 #define emith_sub_r_imm(r, imm) { \
42 EMIT_OP_MODRM(0x81, 3, 5, r); \
46 // XXX: offs is 8bit only
47 #define emith_ctx_read(r, offs) { \
48 EMIT_OP_MODRM(0x8b, 1, r, xBP); \
49 EMIT(offs, u8); /* mov tmp, [ebp+#offs] */ \
52 #define emith_ctx_write(r, offs) { \
53 EMIT_OP_MODRM(0x89, 1, r, xBP); \
54 EMIT(offs, u8); /* mov [ebp+#offs], tmp */ \
57 #define emith_ctx_sub(val, offs) { \
58 EMIT_OP_MODRM(0x81, 1, 5, xBP); \
60 EMIT(val, u32); /* sub [ebp+#offs], dword val */ \
63 #define emith_jump(ptr) { \
64 u32 disp = (u32)ptr - ((u32)tcache_ptr + 5); \
69 #define emith_call(ptr) { \
70 u32 disp = (u32)ptr - ((u32)tcache_ptr + 5); \
75 #define EMITH_CONDITIONAL(code, is_nonzero) { \
76 u8 *ptr = tcache_ptr; \
77 tcache_ptr = tcache_ptr + 2; \
79 EMIT_PTR(ptr, ((is_nonzero) ? 0x75 : 0x74), u8); \
80 EMIT_PTR(ptr + 1, (tcache_ptr - (ptr + 2)), u8); \
83 #define arg2reg(rd, arg) \
85 case 0: rd = xAX; break; \
86 case 1: rd = xDX; break; \
87 case 2: rd = xCX; break; \
90 #define emith_pass_arg_r(arg, reg) { \
93 emith_move_r_r(rd, reg); \
96 #define emith_pass_arg_imm(arg, imm) { \
99 emith_move_r_imm(rd, imm); \
102 /* SH2 drc specific */
103 #define emith_test_t() { \
104 if (reg_map_g2h[SHR_SR] == -1) { \
105 EMIT_OP_MODRM(0xf6, 1, 0, 5); \
106 EMIT(SHR_SR * 4, u8); \
107 EMIT(0x01, u8); /* test [ebp+SHR_SR], byte 1 */ \
109 EMIT_OP_MODRM(0xf7, 3, 0, reg_map_g2h[SHR_SR]); \
110 EMIT(0x01, u16); /* test <reg>, word 1 */ \