cpu/sh2/mame/sh2pico.c

   1 #include "../sh2.h"
   2 #ifdef DRC_CMP
   3 #include "../compiler.c"
   4 #endif
   5
   6 // MAME types
   7 #ifndef INT8
   8 typedef signed char  INT8;
   9 typedef signed short INT16;
  10 typedef signed int   INT32;
  11 typedef unsigned int   UINT32;
  12 typedef unsigned short UINT16;
  13 typedef unsigned char  UINT8;
  14 #endif
  15
  16 #define RB(sh2, a) p32x_sh2_read8(a,sh2)
  17 #define RW(sh2, a) p32x_sh2_read16(a,sh2)
  18 #define RL(sh2, a) p32x_sh2_read32(a,sh2)
  19 #define WB(sh2, a, d) p32x_sh2_write8(a,d,sh2)
  20 #define WW(sh2, a, d) p32x_sh2_write16(a,d,sh2)
  21 #define WL(sh2, a, d) p32x_sh2_write32(a,d,sh2)
  22
  23 // some stuff from sh2comn.h
  24 #define T       0x00000001
  25 #define S       0x00000002
  26 #define I       0x000000f0
  27 #define Q       0x00000100
  28 #define M       0x00000200
  29
  30 #define AM      0xc7ffffff
  31
  32 #define FLAGS   (M|Q|I|S|T)
  33
  34 #define Rn      ((opcode>>8)&15)
  35 #define Rm      ((opcode>>4)&15)
  36
  37 #define sh2_state SH2
  38
  39 extern void lprintf(const char *fmt, ...);
  40 #define logerror lprintf
  41
  42 #ifdef SH2_STATS
  43 static SH2 sh2_stats;
  44 static unsigned int op_refs[0x10000];
  45 # define LRN  1
  46 # define LRM  2
  47 # define LRNM (LRN|LRM)
  48 # define rlog(rnm) {   \
  49   int op = opcode;     \
  50   if ((rnm) & LRN) {   \
  51     op &= ~0x0f00;     \
  52     sh2_stats.r[Rn]++; \
  53   }                    \
  54   if ((rnm) & LRM) {   \
  55     op &= ~0x00f0;     \
  56     sh2_stats.r[Rm]++; \
  57   }                    \
  58   op_refs[op]++;       \
  59 }
  60 # define rlog1(x) sh2_stats.r[x]++
  61 # define rlog2(x1,x2) sh2_stats.r[x1]++; sh2_stats.r[x2]++
  62 #else
  63 # define rlog(x)
  64 # define rlog1(...)
  65 # define rlog2(...)
  66 #endif
  67
  68 #include "sh2.c"
  69
  70 #ifndef DRC_SH2
  71
  72 int sh2_execute(SH2 *sh2, int cycles)
  73 {
  74 #ifdef DRC_CMP
  75         static unsigned int base_pc_[2] = { 0, 0 };
  76         static unsigned int end_pc_[2] = { 0, 0 };
  77         static unsigned char op_flags_[2][BLOCK_INSN_LIMIT];
  78         unsigned int *base_pc = &base_pc_[sh2->is_slave];
  79         unsigned int *end_pc = &end_pc_[sh2->is_slave];
  80         unsigned char *op_flags = op_flags_[sh2->is_slave];
  81         unsigned int pc_expect = sh2->pc;
  82 #endif
  83         UINT32 opcode;
  84
  85         sh2->icount = cycles;
  86
  87         if (sh2->icount <= 0)
  88                 return cycles;
  89
  90         sh2->cycles_timeslice = cycles;
  91
  92         do
  93         {
  94 #ifdef DRC_CMP
  95                 if (!sh2->delay) {
  96                         if (sh2->pc < *base_pc || sh2->pc >= *end_pc) {
  97                                 *base_pc = sh2->pc;
  98                                 scan_block(*base_pc, sh2->is_slave,
  99                                         op_flags, end_pc, NULL);
 100                         }
 101                         if ((op_flags[(sh2->pc - *base_pc) / 2]
 102                                 & OF_BTARGET) || sh2->pc == *base_pc
 103                                 || pc_expect != sh2->pc) // branched
 104                         {
 105                                 pc_expect = sh2->pc;
 106                                 if (sh2->icount < 0)
 107                                         break;
 108                         }
 109
 110                         do_sh2_trace(sh2, sh2->icount);
 111                 }
 112                 pc_expect += 2;
 113 #endif
 114
 115                 if (sh2->delay)
 116                 {
 117                         sh2->ppc = sh2->delay;
 118                         opcode = RW(sh2, sh2->delay);
 119                         sh2->pc -= 2;
 120                 }
 121                 else
 122                 {
 123                         sh2->ppc = sh2->pc;
 124                         opcode = RW(sh2, sh2->pc);
 125                 }
 126
 127                 sh2->delay = 0;
 128                 sh2->pc += 2;
 129
 130                 switch (opcode & ( 15 << 12))
 131                 {
 132                 case  0<<12: op0000(sh2, opcode); break;
 133                 case  1<<12: op0001(sh2, opcode); break;
 134                 case  2<<12: op0010(sh2, opcode); break;
 135                 case  3<<12: op0011(sh2, opcode); break;
 136                 case  4<<12: op0100(sh2, opcode); break;
 137                 case  5<<12: op0101(sh2, opcode); break;
 138                 case  6<<12: op0110(sh2, opcode); break;
 139                 case  7<<12: op0111(sh2, opcode); break;
 140                 case  8<<12: op1000(sh2, opcode); break;
 141                 case  9<<12: op1001(sh2, opcode); break;
 142                 case 10<<12: op1010(sh2, opcode); break;
 143                 case 11<<12: op1011(sh2, opcode); break;
 144                 case 12<<12: op1100(sh2, opcode); break;
 145                 case 13<<12: op1101(sh2, opcode); break;
 146                 case 14<<12: op1110(sh2, opcode); break;
 147                 default: op1111(sh2, opcode); break;
 148                 }
 149
 150                 sh2->icount--;
 151
 152                 if (sh2->test_irq && !sh2->delay && sh2->pending_level > ((sh2->sr >> 4) & 0x0f))
 153                 {
 154                         int level = sh2->pending_level;
 155                         int vector = sh2->irq_callback(sh2, level);
 156                         sh2_do_irq(sh2, level, vector);
 157                         sh2->test_irq = 0;
 158                 }
 159
 160         }
 161 #ifndef DRC_CMP
 162         while (sh2->icount > 0 || sh2->delay);  /* can't interrupt before delay */
 163 #else
 164         while (1);
 165 #endif
 166
 167         return sh2->cycles_timeslice - sh2->icount;
 168 }
 169
 170 #endif // DRC_SH2
 171
 172 #ifdef SH2_STATS
 173 #include <stdio.h>
 174 #include <string.h>
 175 #include "sh2dasm.h"
 176
 177 void sh2_dump_stats(void)
 178 {
 179         static const char *rnames[] = {
 180                 "R0", "R1", "R2",  "R3",  "R4",  "R5",  "R6",  "R7",
 181                 "R8", "R9", "R10", "R11", "R12", "R13", "R14", "SP",
 182                 "PC", "", "PR", "SR", "GBR", "VBR", "MACH", "MACL"
 183         };
 184         long long total;
 185         char buff[64];
 186         int u, i;
 187
 188         // dump reg usage
 189         total = 0;
 190         for (i = 0; i < 24; i++)
 191                 total += sh2_stats.r[i];
 192
 193         for (i = 0; i < 24; i++) {
 194                 if (i == 16 || i == 17 || i == 19)
 195                         continue;
 196                 printf("r %6.3f%% %-4s %9d\n", (double)sh2_stats.r[i] * 100.0 / total,
 197                         rnames[i], sh2_stats.r[i]);
 198         }
 199
 200         memset(&sh2_stats, 0, sizeof(sh2_stats));
 201
 202         // dump ops
 203         printf("\n");
 204         total = 0;
 205         for (i = 0; i < 0x10000; i++)
 206                 total += op_refs[i];
 207
 208         for (u = 0; u < 16; u++) {
 209                 int max = 0, op = 0;
 210                 for (i = 0; i < 0x10000; i++) {
 211                         if (op_refs[i] > max) {
 212                                 max = op_refs[i];
 213                                 op = i;
 214                         }
 215                 }
 216                 DasmSH2(buff, 0, op);
 217                 printf("i %6.3f%% %9d %s\n", (double)op_refs[op] * 100.0 / total,
 218                         op_refs[op], buff);
 219                 op_refs[op] = 0;
 220         }
 221         memset(op_refs, 0, sizeof(op_refs));
 222 }
 223 #endif
 224