5 * This work is licensed under the terms of MAME license.
6 * See COPYING file in the top-level directory.
8 #include "../pico_int.h"
9 #include "../sound/ym2612.h"
11 struct Pico32x Pico32x;
14 static int REGPARM(2) sh2_irq_cb(SH2 *sh2, int level)
16 if (sh2->pending_irl > sh2->pending_int_irq) {
17 elprintf(EL_32X, "%csh2 ack/irl %d @ %08x",
18 sh2->is_slave ? 's' : 'm', level, sh2->pc);
19 return 64 + sh2->pending_irl / 2;
21 elprintf(EL_32X, "%csh2 ack/int %d/%d @ %08x",
22 sh2->is_slave ? 's' : 'm', level, sh2->pending_int_vector, sh2->pc);
23 sh2->pending_int_irq = 0; // auto-clear
24 sh2->pending_level = sh2->pending_irl;
25 return sh2->pending_int_vector;
29 void p32x_update_irls(int nested_call)
31 int irqs, mlvl = 0, slvl = 0;
34 irqs = (Pico32x.sh2irqs | Pico32x.sh2irqi[0]) & ((Pico32x.sh2irq_mask[0] << 3) | P32XI_VRES);
40 irqs = (Pico32x.sh2irqs | Pico32x.sh2irqi[1]) & ((Pico32x.sh2irq_mask[1] << 3) | P32XI_VRES);
45 elprintf(EL_32X, "update_irls: m %d, s %d", mlvl, slvl);
46 sh2_irl_irq(&msh2, mlvl, nested_call);
47 sh2_irl_irq(&ssh2, slvl, nested_call);
50 p32x_poll_event(mlvl | (slvl << 1), 0);
53 void Pico32xStartup(void)
55 elprintf(EL_STATUS|EL_32X, "32X startup");
60 msh2.irq_callback = sh2_irq_cb;
62 ssh2.irq_callback = sh2_irq_cb;
67 Pico32x.vdp_regs[0] |= P32XV_nPAL;
69 PREG8(Pico32xMem->sh2_peri_regs[0], 4) =
70 PREG8(Pico32xMem->sh2_peri_regs[1], 4) = 0x84; // SCI SSR
77 #define HWSWAP(x) (((x) << 16) | ((x) >> 16))
78 void p32x_reset_sh2s(void)
80 elprintf(EL_32X, "sh2 reset");
85 // if we don't have BIOS set, perform it's work here.
87 if (p32x_bios_m == NULL) {
88 unsigned int idl_src, idl_dst, idl_size; // initial data load
92 idl_src = HWSWAP(*(unsigned int *)(Pico.rom + 0x3d4)) & ~0xf0000000;
93 idl_dst = HWSWAP(*(unsigned int *)(Pico.rom + 0x3d8)) & ~0xf0000000;
94 idl_size= HWSWAP(*(unsigned int *)(Pico.rom + 0x3dc));
95 if (idl_size > Pico.romsize || idl_src + idl_size > Pico.romsize ||
96 idl_size > 0x40000 || idl_dst + idl_size > 0x40000 || (idl_src & 3) || (idl_dst & 3)) {
97 elprintf(EL_STATUS|EL_ANOMALY, "32x: invalid initial data ptrs: %06x -> %06x, %06x",
98 idl_src, idl_dst, idl_size);
101 memcpy(Pico32xMem->sdram + idl_dst, Pico.rom + idl_src, idl_size);
104 vbr = HWSWAP(*(unsigned int *)(Pico.rom + 0x3e8));
105 sh2_set_gbr(0, 0x20004000);
109 Pico32x.regs[0x28 / 2] = *(unsigned short *)(Pico.rom + 0x18e);
110 // program will set M_OK
114 if (p32x_bios_s == NULL) {
118 vbr = HWSWAP(*(unsigned int *)(Pico.rom + 0x3ec));
119 sh2_set_gbr(1, 0x20004000);
121 // program will set S_OK
124 msh2.m68krcycles_done = ssh2.m68krcycles_done = SekCyclesDoneT();
127 void Pico32xInit(void)
129 if (msh2.mult_m68k_to_sh2 == 0 || msh2.mult_sh2_to_m68k == 0)
130 Pico32xSetClocks(PICO_MSH2_HZ, 0);
131 if (ssh2.mult_m68k_to_sh2 == 0 || ssh2.mult_sh2_to_m68k == 0)
132 Pico32xSetClocks(0, PICO_MSH2_HZ);
135 void PicoPower32x(void)
137 memset(&Pico32x, 0, sizeof(Pico32x));
139 Pico32x.regs[0] = P32XS_REN|P32XS_nRES; // verified
140 Pico32x.vdp_regs[0x0a/2] = P32XV_VBLK|P32XV_HBLK|P32XV_PEN;
141 Pico32x.sh2_regs[0] = P32XS2_ADEN;
144 void PicoUnload32x(void)
146 if (Pico32xMem != NULL)
147 plat_munmap(Pico32xMem, sizeof(*Pico32xMem));
152 PicoAHW &= ~PAHW_32X;
155 void PicoReset32x(void)
157 if (PicoAHW & PAHW_32X) {
158 Pico32x.sh2irqs |= P32XI_VRES;
160 p32x_poll_event(3, 0);
164 static void p32x_start_blank(void)
166 if (Pico32xDrawMode != PDM32X_OFF && !PicoSkipFrame) {
171 offs = 8; lines = 224;
172 if ((Pico.video.reg[1] & 8) && !(PicoOpt & POPT_ALT_RENDERER)) {
177 // XXX: no proper handling of 32col mode..
178 if ((Pico32x.vdp_regs[0] & P32XV_Mx) != 0 && // 32x not blanking
179 (Pico.video.reg[12] & 1) && // 40col mode
180 (PicoDrawMask & PDRAW_32X_ON))
182 int md_bg = Pico.video.reg[7] & 0x3f;
184 // we draw full layer (not line-by-line)
185 PicoDraw32xLayer(offs, lines, md_bg);
187 else if (Pico32xDrawMode != PDM32X_32X_ONLY)
188 PicoDraw32xLayerMdOnly(offs, lines);
194 Pico32x.vdp_regs[0x0a/2] |= P32XV_VBLK|P32XV_PEN;
196 // FB swap waits until vblank
197 if ((Pico32x.vdp_regs[0x0a/2] ^ Pico32x.pending_fb) & P32XV_FS) {
198 Pico32x.vdp_regs[0x0a/2] &= ~P32XV_FS;
199 Pico32x.vdp_regs[0x0a/2] |= Pico32x.pending_fb;
200 Pico32xSwapDRAM(Pico32x.pending_fb ^ 1);
203 Pico32x.sh2irqs |= P32XI_VINT;
205 p32x_poll_event(3, 1);
208 #define sync_sh2s_normal p32x_sync_sh2s
209 //#define sync_sh2s_lockstep p32x_sync_sh2s
211 void sync_sh2s_normal(unsigned int m68k_target)
213 unsigned int target = m68k_target;
214 int msh2_cycles, ssh2_cycles;
217 elprintf(EL_32X, "sh2 sync to %u (%u)", m68k_target, SekCycleCnt);
219 if (!(Pico32x.regs[0] & P32XS_nRES))
223 msh2_cycles = C_M68K_TO_SH2(msh2, target - msh2.m68krcycles_done);
224 ssh2_cycles = C_M68K_TO_SH2(ssh2, target - ssh2.m68krcycles_done);
226 while (msh2_cycles > 0 || ssh2_cycles > 0) {
227 elprintf(EL_32X, "sh2 exec %u,%u->%u",
228 msh2.m68krcycles_done, ssh2.m68krcycles_done, target);
230 if (Pico32x.emu_flags & (P32XF_SSH2POLL|P32XF_SSH2VPOLL)) {
231 ssh2.m68krcycles_done = target;
234 else if (ssh2_cycles > 0) {
235 done = sh2_execute(&ssh2, ssh2_cycles);
236 ssh2.m68krcycles_done += C_SH2_TO_M68K(ssh2, done);
238 ssh2_cycles = C_M68K_TO_SH2(ssh2, target - ssh2.m68krcycles_done);
241 if (Pico32x.emu_flags & (P32XF_MSH2POLL|P32XF_MSH2VPOLL)) {
242 msh2.m68krcycles_done = target;
245 else if (msh2_cycles > 0) {
246 done = sh2_execute(&msh2, msh2_cycles);
247 msh2.m68krcycles_done += C_SH2_TO_M68K(msh2, done);
249 msh2_cycles = C_M68K_TO_SH2(msh2, target - msh2.m68krcycles_done);
257 void sync_sh2s_lockstep(unsigned int m68k_target)
259 unsigned int mcycles;
261 mcycles = msh2.m68krcycles_done;
262 if (ssh2.m68krcycles_done < mcycles)
263 mcycles = ssh2.m68krcycles_done;
265 while (mcycles < m68k_target) {
267 sync_sh2s_normal(mcycles);
271 #define CPUS_RUN(m68k_cycles,s68k_cycles) do { \
272 SekRunM68k(m68k_cycles); \
273 if (SekIsStoppedM68k()) \
274 p32x_sync_sh2s(SekCycleCntT + SekCycleCnt); \
278 #include "../pico_cmn.c"
280 void PicoFrame32x(void)
282 pwm_frame_smp_cnt = 0;
284 Pico32x.vdp_regs[0x0a/2] &= ~P32XV_VBLK; // get out of vblank
285 if ((Pico32x.vdp_regs[0] & P32XV_Mx) != 0) // no forced blanking
286 Pico32x.vdp_regs[0x0a/2] &= ~P32XV_PEN; // no palette access
288 p32x_poll_event(3, 1);
292 elprintf(EL_32X, "poll: %02x", Pico32x.emu_flags);
295 // calculate multipliers against 68k clock (7670442)
296 // normally * 3, but effectively slower due to high latencies everywhere
297 // however using something lower breaks MK2 animations
298 void Pico32xSetClocks(int msh2_hz, int ssh2_hz)
300 float m68k_clk = (float)(OSC_NTSC / 7);
302 msh2.mult_m68k_to_sh2 = (int)((float)msh2_hz * (1 << CYCLE_MULT_SHIFT) / m68k_clk);
303 msh2.mult_sh2_to_m68k = (int)(m68k_clk * (1 << CYCLE_MULT_SHIFT) / (float)msh2_hz);
306 ssh2.mult_m68k_to_sh2 = (int)((float)ssh2_hz * (1 << CYCLE_MULT_SHIFT) / m68k_clk);
307 ssh2.mult_sh2_to_m68k = (int)(m68k_clk * (1 << CYCLE_MULT_SHIFT) / (float)ssh2_hz);
311 // vim:shiftwidth=2:ts=2:expandtab