1 #include "../pico_int.h"
4 static const char str_mars[] = "MARS";
6 struct Pico32xMem *Pico32xMem;
8 static void bank_switch(int b);
10 #define MSB8(x) ((x) >> 8)
13 #define POLL_THRESHOLD 6
16 int addr, pc, cnt, flag;
18 static struct poll_det m68k_poll, sh2_poll[2];
20 static int p32x_poll_detect(struct poll_det *pd, u32 a, u32 pc, int is_vdp)
22 int ret = 0, flag = pd->flag;
27 if (a - 2 <= pd->addr && pd->addr <= a + 2 && pd->pc == pc) {
29 if (pd->cnt > POLL_THRESHOLD) {
30 if (!(Pico32x.emu_flags & flag)) {
31 elprintf(EL_32X, "%s poll addr %08x @ %06x",
32 flag == P32XF_68KPOLL ? "m68k" : (flag == P32XF_MSH2POLL ? "msh2" : "ssh2"), a, pc);
35 Pico32x.emu_flags |= flag;
46 static int p32x_poll_undetect(struct poll_det *pd, int is_vdp)
48 int ret = 0, flag = pd->flag;
51 if (pd->cnt > POLL_THRESHOLD)
53 pd->addr = pd->cnt = 0;
54 Pico32x.emu_flags &= ~flag;
58 void p32x_poll_event(int is_vdp)
60 p32x_poll_undetect(&sh2_poll[0], is_vdp);
61 p32x_poll_undetect(&sh2_poll[1], is_vdp);
68 static const u16 comm_fakevals[] = {
69 0x4d5f, 0x4f4b, // M_OK
70 0x535f, 0x4f4b, // S_OK
71 0x4D41, 0x5346, // MASF - Brutal Unleashed
72 0x5331, 0x4d31, // Darxide
75 0x0000, 0x0000, // eq for doom
76 0x0002, // Mortal Kombat
80 static u32 sh2_comm_faker(u32 a)
83 if (a == 0x28 && !p32x_csum_faked) {
85 return *(unsigned short *)(Pico.rom + 0x18e);
87 if (f >= sizeof(comm_fakevals) / sizeof(comm_fakevals[0]))
89 return comm_fakevals[f++];
95 unsigned int sar0, dar0, tcr0; // src addr, dst addr, transfer count
96 unsigned int chcr0; // chan ctl
97 unsigned int sar1, dar1, tcr1; // same for chan 1
103 static void dma_68k2sh2_do(void)
105 unsigned short *dreqlen = &Pico32x.regs[0x10 / 2];
108 if (dmac0->tcr0 != *dreqlen)
109 elprintf(EL_32X|EL_ANOMALY, "tcr0 and dreq len differ: %d != %d", dmac0->tcr0, *dreqlen);
111 for (i = 0; i < Pico32x.dmac_ptr && dmac0->tcr0 > 0; i++) {
112 extern void p32x_sh2_write16(u32 a, u32 d, int id);
113 elprintf(EL_32X|EL_ANOMALY, "dmaw [%08x] %04x, left %d", dmac0->dar0, Pico32x.dmac_fifo[i], *dreqlen);
114 p32x_sh2_write16(dmac0->dar0, Pico32x.dmac_fifo[i], 0);
120 Pico32x.dmac_ptr = 0; // HACK
121 Pico32x.regs[6 / 2] &= ~P32XS_FULL;
123 Pico32x.regs[6 / 2] &= ~P32XS_68S; // transfer complete
124 if (dmac0->tcr0 == 0)
125 dmac0->chcr0 |= 2; // DMA has ended normally
128 // ------------------------------------------------------------------
131 static u32 p32x_reg_read16(u32 a)
136 if ((a & 0x30) == 0x20)
137 return sh2_comm_faker(a);
139 if ((a & 0x30) == 0x20 && p32x_poll_detect(&m68k_poll, a, SekPc, 0)) {
144 // fake only slave for now
145 if (a == 0x24 || a == 0x26)
146 return sh2_comm_faker(a);
148 if ((a & 0x30) == 0x30)
149 return p32x_pwm_read16(a);
151 return Pico32x.regs[a / 2];
154 static void p32x_reg_write8(u32 a, u32 d)
156 u16 *r = Pico32x.regs;
159 // for things like bset on comm port
162 if (a == 1 && !(r[0] & 1)) {
172 case 0: // adapter ctl
173 r[0] = (r[0] & 0x83) | ((d << 8) & P32XS_FM);
176 if ((d & 1) && !(Pico32x.sh2irqi[0] & P32XI_CMD)) {
177 Pico32x.sh2irqi[0] |= P32XI_CMD;
180 if ((d & 2) && !(Pico32x.sh2irqi[1] & P32XI_CMD)) {
181 Pico32x.sh2irqi[1] |= P32XI_CMD;
193 r[6 / 2] = (r[6 / 2] & P32XS_FULL) | (d & (P32XS_68S|P32XS_DMA|P32XS_RV));
198 static void p32x_reg_write16(u32 a, u32 d)
200 u16 *r = Pico32x.regs;
203 // for things like bset on comm port
207 case 0x00: // adapter ctl
208 r[0] = (r[0] & 0x83) | (d & P32XS_FM);
210 case 0x10: // DREQ len
213 case 0x12: // FIFO reg
214 if (!(r[6 / 2] & P32XS_68S)) {
215 elprintf(EL_32X|EL_ANOMALY, "DREQ FIFO w16 without 68S?");
218 if (Pico32x.dmac_ptr < DMAC_FIFO_LEN) {
219 Pico32x.dmac_fifo[Pico32x.dmac_ptr++] = d;
220 if ((Pico32x.dmac_ptr & 3) == 0 && (dmac0->chcr0 & 3) == 1 && (dmac0->dmaor & 1))
222 if (Pico32x.dmac_ptr == DMAC_FIFO_LEN)
223 r[6 / 2] |= P32XS_FULL;
229 if ((a & 0x38) == 0x08) {
234 else if ((a & 0x30) == 0x20 && r[a / 2] != d) {
236 if (p32x_poll_undetect(&sh2_poll[0], 0) || p32x_poll_undetect(&sh2_poll[1], 0))
237 // if some SH2 is busy waiting, it needs to see the result ASAP
242 else if ((a & 0x30) == 0x30) {
243 p32x_pwm_write16(a, d);
247 p32x_reg_write8(a + 1, d);
250 // ------------------------------------------------------------------
252 static u32 p32x_vdp_read16(u32 a)
256 return Pico32x.vdp_regs[a / 2];
259 static void p32x_vdp_write8(u32 a, u32 d)
261 u16 *r = Pico32x.vdp_regs;
264 // for FEN checks between writes
267 // TODO: verify what's writeable
270 // priority inversion is handled in palette
271 if ((r[0] ^ d) & P32XV_PRI)
272 Pico32x.dirty_pal = 1;
273 r[0] = (r[0] & P32XV_nPAL) | (d & 0xff);
277 Pico32x.pending_fb = d;
278 // if we are blanking and FS bit is changing
279 if (((r[0x0a/2] & P32XV_VBLK) || (r[0] & P32XV_Mx) == 0) && ((r[0x0a/2] ^ d) & P32XV_FS)) {
281 Pico32xSwapDRAM(d ^ 1);
282 elprintf(EL_32X, "VDP FS: %d", r[0x0a/2] & P32XV_FS);
288 static void p32x_vdp_write16(u32 a, u32 d)
290 p32x_vdp_write8(a | 1, d);
293 // ------------------------------------------------------------------
296 static u32 p32x_sh2reg_read16(u32 a, int cpuid)
298 u16 *r = Pico32x.regs;
302 case 0x00: // adapter/irq ctl
303 return (r[0] & P32XS_FM) | P32XS2_ADEN | Pico32x.sh2irq_mask[cpuid];
304 case 0x10: // DREQ len
309 if ((a & 0x38) == 0x08)
312 if ((a & 0x30) == 0x20) {
313 if (p32x_poll_detect(&sh2_poll[cpuid], a, sh2_pc(cpuid), 0))
317 if ((a & 0x30) == 0x30) {
318 sh2_poll[cpuid].cnt = 0;
319 return p32x_pwm_read16(a);
325 static void p32x_sh2reg_write8(u32 a, u32 d, int cpuid)
329 Pico32x.sh2irq_mask[cpuid] = d & 0x0f;
334 static void p32x_sh2reg_write16(u32 a, u32 d, int cpuid)
339 if ((a & 0x30) == 0x20 && Pico32x.regs[a/2] != d) {
340 Pico32x.regs[a / 2] = d;
341 p32x_poll_undetect(&m68k_poll, 0);
342 p32x_poll_undetect(&sh2_poll[cpuid ^ 1], 0);
346 else if ((a & 0x30) == 0x30) {
347 p32x_pwm_write16(a, d);
352 case 0x14: Pico32x.sh2irqs &= ~P32XI_VRES; goto irls;
353 case 0x16: Pico32x.sh2irqs &= ~P32XI_VINT; goto irls;
354 case 0x18: Pico32x.sh2irqs &= ~P32XI_HINT; goto irls;
355 case 0x1a: Pico32x.sh2irqi[cpuid] &= ~P32XI_CMD; goto irls;
356 case 0x1c: Pico32x.sh2irqs &= ~P32XI_PWM; goto irls;
359 p32x_sh2reg_write8(a | 1, d, cpuid);
366 static u32 sh2_peripheral_read(u32 a, int id)
370 d = Pico32xMem->sh2_peri_regs[id][a / 4];
372 elprintf(EL_32X, "%csh2 peri r32 [%08x] %08x @%06x", id ? 's' : 'm', a | ~0x1ff, d, sh2_pc(id));
376 static void sh2_peripheral_write(u32 a, u32 d, int id)
378 unsigned int *r = Pico32xMem->sh2_peri_regs[id];
379 elprintf(EL_32X, "%csh2 peri w32 [%08x] %08x @%06x", id ? 's' : 'm', a, d, sh2_pc(id));
386 case 0x104: // DVDNT: divident L, starts divide
387 elprintf(EL_32X, "%csh2 divide %08x / %08x", id ? 's' : 'm', d, r[0x100 / 4]);
389 r[0x118 / 4] = r[0x110 / 4] = d % r[0x100 / 4];
390 r[0x11c / 4] = r[0x114 / 4] = d / r[0x100 / 4];
394 elprintf(EL_32X, "%csh2 divide %08x%08x / %08x @%08x",
395 id ? 's' : 'm', r[0x110 / 4], d, r[0x100 / 4], sh2_pc(id));
397 long long divident = (long long)r[0x110 / 4] << 32 | d;
398 // XXX: undocumented mirroring to 0x118,0x11c?
399 r[0x118 / 4] = r[0x110 / 4] = divident % r[0x100 / 4];
400 r[0x11c / 4] = r[0x114 / 4] = divident / r[0x100 / 4];
405 if ((a == 0x1b0 || a == 0x18c) && (dmac0->chcr0 & 3) == 1 && (dmac0->dmaor & 1)) {
406 elprintf(EL_32X, "sh2 DMA %08x -> %08x, cnt %d, chcr %04x @%06x",
407 dmac0->sar0, dmac0->dar0, dmac0->tcr0, dmac0->chcr0, sh2_pc(id));
408 dmac0->tcr0 &= 0xffffff;
409 // DREQ is only sent after first 4 words are written.
410 // we do multiple of 4 words to avoid messing up alignment
411 if (dmac0->sar0 == 0x20004012 && Pico32x.dmac_ptr && (Pico32x.dmac_ptr & 3) == 0) {
412 elprintf(EL_32X, "68k -> sh2 DMA");
418 // ------------------------------------------------------------------
419 // default 32x handlers
420 u32 PicoRead8_32x(u32 a)
423 if ((a & 0xffc0) == 0x5100) { // a15100
424 d = p32x_reg_read16(a);
428 if (!(Pico32x.regs[0] & 1))
431 if ((a & 0xfff0) == 0x5180) { // a15180
432 d = p32x_vdp_read16(a);
436 if ((a & 0xfe00) == 0x5200) { // a15200
437 d = Pico32xMem->pal[(a & 0x1ff) / 2];
442 if ((a & 0xfffc) == 0x30ec) { // a130ec
447 elprintf(EL_UIO, "m68k unmapped r8 [%06x] @%06x", a, SekPc);
457 elprintf(EL_32X, "m68k 32x r8 [%06x] %02x @%06x", a, d, SekPc);
461 u32 PicoRead16_32x(u32 a)
464 if ((a & 0xffc0) == 0x5100) { // a15100
465 d = p32x_reg_read16(a);
469 if (!(Pico32x.regs[0] & 1))
472 if ((a & 0xfff0) == 0x5180) { // a15180
473 d = p32x_vdp_read16(a);
477 if ((a & 0xfe00) == 0x5200) { // a15200
478 d = Pico32xMem->pal[(a & 0x1ff) / 2];
483 if ((a & 0xfffc) == 0x30ec) { // a130ec
484 d = !(a & 2) ? ('M'<<8)|'A' : ('R'<<8)|'S';
488 elprintf(EL_UIO, "m68k unmapped r16 [%06x] @%06x", a, SekPc);
492 elprintf(EL_32X, "m68k 32x r16 [%06x] %04x @%06x", a, d, SekPc);
496 void PicoWrite8_32x(u32 a, u32 d)
498 if ((a & 0xfc00) == 0x5000)
499 elprintf(EL_32X, "m68k 32x w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
501 if ((a & 0xffc0) == 0x5100) { // a15100
502 p32x_reg_write8(a, d);
506 if (!(Pico32x.regs[0] & 1))
509 if ((a & 0xfff0) == 0x5180) { // a15180
510 p32x_vdp_write8(a, d);
515 if ((a & 0xfe00) == 0x5200) { // a15200
516 elprintf(EL_32X|EL_ANOMALY, "m68k 32x PAL w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
517 ((u8 *)Pico32xMem->pal)[(a & 0x1ff) ^ 1] = d;
518 Pico32x.dirty_pal = 1;
523 elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
526 void PicoWrite16_32x(u32 a, u32 d)
528 if ((a & 0xfc00) == 0x5000)
529 elprintf(EL_UIO, "m68k 32x w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
531 if ((a & 0xffc0) == 0x5100) { // a15100
532 p32x_reg_write16(a, d);
536 if (!(Pico32x.regs[0] & 1))
539 if ((a & 0xfff0) == 0x5180) { // a15180
540 p32x_vdp_write16(a, d);
544 if ((a & 0xfe00) == 0x5200) { // a15200
545 Pico32xMem->pal[(a & 0x1ff) / 2] = d;
546 Pico32x.dirty_pal = 1;
551 elprintf(EL_UIO, "m68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
554 // hint vector is writeable
555 static void PicoWrite8_hint(u32 a, u32 d)
557 if ((a & 0xfffc) == 0x0070) {
558 Pico32xMem->m68k_rom[a ^ 1] = d;
562 elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
565 static void PicoWrite16_hint(u32 a, u32 d)
567 if ((a & 0xfffc) == 0x0070) {
568 ((u16 *)Pico32xMem->m68k_rom)[a/2] = d;
572 elprintf(EL_UIO, "m68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
575 void Pico32xSwapDRAM(int b)
577 cpu68k_map_set(m68k_read8_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0);
578 cpu68k_map_set(m68k_read16_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0);
579 cpu68k_map_set(m68k_write8_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0);
580 cpu68k_map_set(m68k_write16_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0);
583 static void bank_switch(int b)
585 unsigned int rs, bank;
588 if (bank >= Pico.romsize) {
589 elprintf(EL_32X|EL_ANOMALY, "missing bank @ %06x", bank);
593 // 32X ROM (unbanked, XXX: consider mirroring?)
594 rs = (Pico.romsize + M68K_BANK_MASK) & ~M68K_BANK_MASK;
598 cpu68k_map_set(m68k_read8_map, 0x900000, 0x900000 + rs - 1, Pico.rom + bank, 0);
599 cpu68k_map_set(m68k_read16_map, 0x900000, 0x900000 + rs - 1, Pico.rom + bank, 0);
601 elprintf(EL_32X, "bank %06x-%06x -> %06x", 0x900000, 0x900000 + rs - 1, bank);
604 // -----------------------------------------------------------------
606 // -----------------------------------------------------------------
608 u32 p32x_sh2_read8(u32 a, int id)
612 if (id == 0 && a < sizeof(Pico32xMem->sh2_rom_m))
613 return Pico32xMem->sh2_rom_m[a ^ 1];
614 if (id == 1 && a < sizeof(Pico32xMem->sh2_rom_s))
615 return Pico32xMem->sh2_rom_s[a ^ 1];
617 if ((a & 0x0ffc0000) == 0x06000000)
618 return Pico32xMem->sdram[(a & 0x3ffff) ^ 1];
620 if ((a & 0x0fc00000) == 0x02000000)
621 if ((a & 0x003fffff) < Pico.romsize)
622 return Pico.rom[(a & 0x3fffff) ^ 1];
624 if ((a & ~0xfff) == 0xc0000000)
625 return Pico32xMem->data_array[id][(a & 0xfff) ^ 1];
627 if ((a & 0x0ffe0000) == 0x04000000) {
628 u8 *dram = (u8 *)Pico32xMem->dram[(Pico32x.vdp_regs[0x0a/2] & P32XV_FS) ^ 1];
629 return dram[(a & 0x1ffff) ^ 1];
632 if ((a & 0x0fffff00) == 0x4000) {
633 d = p32x_sh2reg_read16(a, id);
637 if ((a & 0x0fffff00) == 0x4100) {
638 d = p32x_vdp_read16(a);
639 if (p32x_poll_detect(&sh2_poll[id], a, sh2_pc(id), 1))
644 if ((a & 0x0fffff00) == 0x4200) {
645 d = Pico32xMem->pal[(a & 0x1ff) / 2];
649 elprintf(EL_UIO, "%csh2 unmapped r8 [%08x] %02x @%06x",
650 id ? 's' : 'm', a, d, sh2_pc(id));
659 elprintf(EL_32X, "%csh2 r8 [%08x] %02x @%06x",
660 id ? 's' : 'm', a, d, sh2_pc(id));
664 u32 p32x_sh2_read16(u32 a, int id)
668 if (id == 0 && a < sizeof(Pico32xMem->sh2_rom_m))
669 return *(u16 *)(Pico32xMem->sh2_rom_m + a);
670 if (id == 1 && a < sizeof(Pico32xMem->sh2_rom_s))
671 return *(u16 *)(Pico32xMem->sh2_rom_s + a);
673 if ((a & 0x0ffc0000) == 0x06000000)
674 return ((u16 *)Pico32xMem->sdram)[(a & 0x3ffff) / 2];
676 if ((a & 0x0fc00000) == 0x02000000)
677 if ((a & 0x003fffff) < Pico.romsize)
678 return ((u16 *)Pico.rom)[(a & 0x3fffff) / 2];
680 if ((a & ~0xfff) == 0xc0000000)
681 return ((u16 *)Pico32xMem->data_array[id])[(a & 0xfff) / 2];
683 if ((a & 0x0ffe0000) == 0x04000000)
684 return Pico32xMem->dram[(Pico32x.vdp_regs[0x0a/2] & P32XV_FS) ^ 1][(a & 0x1ffff) / 2];
686 if ((a & 0x0fffff00) == 0x4000) {
687 d = p32x_sh2reg_read16(a, id);
691 if ((a & 0x0fffff00) == 0x4100) {
692 d = p32x_vdp_read16(a);
693 if (p32x_poll_detect(&sh2_poll[id], a, sh2_pc(id), 1))
698 if ((a & 0x0fffff00) == 0x4200) {
699 d = Pico32xMem->pal[(a & 0x1ff) / 2];
703 elprintf(EL_UIO, "%csh2 unmapped r16 [%08x] %04x @%06x",
704 id ? 's' : 'm', a, d, sh2_pc(id));
708 elprintf(EL_32X, "%csh2 r16 [%08x] %04x @%06x",
709 id ? 's' : 'm', a, d, sh2_pc(id));
713 u32 p32x_sh2_read32(u32 a, int id)
715 if ((a & 0xfffffe00) == 0xfffffe00)
716 return sh2_peripheral_read(a, id);
718 // elprintf(EL_UIO, "sh2 r32 [%08x] %08x @%06x", a, d, ash2_pc());
719 return (p32x_sh2_read16(a, id) << 16) | p32x_sh2_read16(a + 2, id);
722 void p32x_sh2_write8(u32 a, u32 d, int id)
724 if ((a & 0x0ffffc00) == 0x4000)
725 elprintf(EL_32X, "%csh2 w8 [%08x] %02x @%06x",
726 id ? 's' : 'm', a, d & 0xff, sh2_pc(id));
728 if ((a & 0x0ffc0000) == 0x06000000) {
729 Pico32xMem->sdram[(a & 0x3ffff) ^ 1] = d;
733 if ((a & 0x0ffe0000) == 0x04000000) {
734 u8 *dram = (u8 *)Pico32xMem->dram[(Pico32x.vdp_regs[0x0a/2] & P32XV_FS) ^ 1];
735 dram[(a & 0x1ffff) ^ 1] = d;
739 if ((a & ~0xfff) == 0xc0000000) {
740 Pico32xMem->data_array[id][(a & 0xfff) ^ 1] = d;
744 if ((a & 0x0fffff00) == 0x4100) {
745 p32x_vdp_write8(a, d);
749 if ((a & 0x0fffff00) == 0x4000) {
750 p32x_sh2reg_write8(a, d, id);
754 elprintf(EL_UIO, "%csh2 unmapped w8 [%08x] %02x @%06x",
755 id ? 's' : 'm', a, d & 0xff, sh2_pc(id));
758 void p32x_sh2_write16(u32 a, u32 d, int id)
760 if ((a & 0x0ffffc00) == 0x4000)
761 elprintf(EL_32X, "%csh2 w16 [%08x] %04x @%06x",
762 id ? 's' : 'm', a, d & 0xffff, sh2_pc(id));
764 if ((a & 0x0ffc0000) == 0x06000000) {
765 ((u16 *)Pico32xMem->sdram)[(a & 0x3ffff) / 2] = d;
769 if ((a & ~0xfff) == 0xc0000000) {
770 ((u16 *)Pico32xMem->data_array[id])[(a & 0xfff) / 2] = d;
774 if ((a & 0x0ffe0000) == 0x04000000) {
775 Pico32xMem->dram[(Pico32x.vdp_regs[0x0a/2] & P32XV_FS) ^ 1][(a & 0x1ffff) / 2] = d;
779 if ((a & 0x0fffff00) == 0x4100) {
780 p32x_vdp_write16(a, d);
784 if ((a & 0x0ffffe00) == 0x4200) {
785 Pico32xMem->pal[(a & 0x1ff) / 2] = d;
786 Pico32x.dirty_pal = 1;
790 if ((a & 0x0fffff00) == 0x4000) {
791 p32x_sh2reg_write16(a, d, id);
795 elprintf(EL_UIO, "%csh2 unmapped w16 [%08x] %04x @%06x",
796 id ? 's' : 'm', a, d & 0xffff, sh2_pc(id));
799 void p32x_sh2_write32(u32 a, u32 d, int id)
801 if ((a & 0xfffffe00) == 0xfffffe00) {
802 sh2_peripheral_write(a, d, id);
806 p32x_sh2_write16(a, d >> 16, id);
807 p32x_sh2_write16(a + 2, d, id);
810 #define HWSWAP(x) (((x) << 16) | ((x) >> 16))
811 void PicoMemSetup32x(void)
818 Pico32xMem = calloc(1, sizeof(*Pico32xMem));
819 if (Pico32xMem == NULL) {
820 elprintf(EL_STATUS, "OOM");
824 dmac0 = (void *)&Pico32xMem->sh2_peri_regs[0][0x180 / 4];
827 ps = (unsigned short *)Pico32xMem->m68k_rom;
828 pl = (unsigned int *)Pico32xMem->m68k_rom;
829 for (i = 1; i < 0xc0/4; i++)
830 pl[i] = HWSWAP(0x880200 + (i - 1) * 6);
833 for (i = 0xc0/2; i < 0x100/2; i++)
838 ps[0xc2/2] = 0x2700; // move #0x2700,sr
839 ps[0xfe/2] = 0x60fe; // jump to self
841 ps[0xfe/2] = 0x4e75; // rts
844 // fill remaining mem with ROM
845 memcpy(Pico32xMem->m68k_rom + 0x100, Pico.rom + 0x100, sizeof(Pico32xMem->m68k_rom) - 0x100);
850 FILE *f = fopen("32X_M_BIOS.BIN", "rb");
853 printf("missing 32X_M_BIOS.BIN\n");
856 fread(Pico32xMem->sh2_rom_m, 1, sizeof(Pico32xMem->sh2_rom_m), f);
858 f = fopen("32X_S_BIOS.BIN", "rb");
860 printf("missing 32X_S_BIOS.BIN\n");
863 fread(Pico32xMem->sh2_rom_s, 1, sizeof(Pico32xMem->sh2_rom_s), f);
866 for (i = 0; i < sizeof(Pico32xMem->sh2_rom_m); i += 2) {
867 int t = Pico32xMem->sh2_rom_m[i];
868 Pico32xMem->sh2_rom_m[i] = Pico32xMem->sh2_rom_m[i + 1];
869 Pico32xMem->sh2_rom_m[i + 1] = t;
871 for (i = 0; i < sizeof(Pico32xMem->sh2_rom_s); i += 2) {
872 int t = Pico32xMem->sh2_rom_s[i];
873 Pico32xMem->sh2_rom_s[i] = Pico32xMem->sh2_rom_s[i + 1];
874 Pico32xMem->sh2_rom_s[i + 1] = t;
878 // cartridge area becomes unmapped
879 // XXX: we take the easy way and don't unmap ROM,
880 // so that we can avoid handling the RV bit.
881 // m68k_map_unmap(0x000000, 0x3fffff);
884 rs = sizeof(Pico32xMem->m68k_rom);
885 cpu68k_map_set(m68k_read8_map, 0x000000, rs - 1, Pico32xMem->m68k_rom, 0);
886 cpu68k_map_set(m68k_read16_map, 0x000000, rs - 1, Pico32xMem->m68k_rom, 0);
887 cpu68k_map_set(m68k_write8_map, 0x000000, rs - 1, PicoWrite8_hint, 1); // TODO verify
888 cpu68k_map_set(m68k_write16_map, 0x000000, rs - 1, PicoWrite16_hint, 1);
893 // 32X ROM (unbanked, XXX: consider mirroring?)
894 rs = (Pico.romsize + M68K_BANK_MASK) & ~M68K_BANK_MASK;
897 cpu68k_map_set(m68k_read8_map, 0x880000, 0x880000 + rs - 1, Pico.rom, 0);
898 cpu68k_map_set(m68k_read16_map, 0x880000, 0x880000 + rs - 1, Pico.rom, 0);
903 // setup poll detector
904 m68k_poll.flag = P32XF_68KPOLL;
905 sh2_poll[0].flag = P32XF_MSH2POLL;
906 sh2_poll[1].flag = P32XF_SSH2POLL;