pico/cd/LC89510.c

   1 /***********************************************************\r
   2  *                                                         *\r
   3  * This source file was taken from the Gens project        *\r
   4  * Written by Stéphane Dallongeville                       *\r
   5  * Copyright (c) 2002 by Stéphane Dallongeville            *\r
   6  * Modified/adapted for PicoDrive by notaz, 2007           *\r
   7  *                                                         *\r
   8  ***********************************************************/\r
   9 \r
  10 #include "../pico_int.h"\r
  11 \r
  12 #define CDC_DMA_SPEED 256\r
  13 \r
  14 \r
  15 static void CDD_Reset(void)\r
  16 {\r
  17         // Reseting CDD\r
  18 \r
  19         memset(Pico_mcd->s68k_regs+0x34, 0, 2*2); // CDD.Fader, CDD.Control\r
  20         Pico_mcd->cdd.Status = 0;\r
  21         Pico_mcd->cdd.Minute = 0;\r
  22         Pico_mcd->cdd.Seconde = 0;\r
  23         Pico_mcd->cdd.Frame = 0;\r
  24         Pico_mcd->cdd.Ext = 0;\r
  25 \r
  26         // clear receive status and transfer command\r
  27         memset(Pico_mcd->s68k_regs+0x38, 0, 20);\r
  28         Pico_mcd->s68k_regs[0x38+9] = 0xF;              // Default checksum\r
  29 }\r
  30 \r
  31 \r
  32 static void CDC_Reset(void)\r
  33 {\r
  34         // Reseting CDC\r
  35 \r
  36         memset(Pico_mcd->cdc.Buffer, 0, sizeof(Pico_mcd->cdc.Buffer));\r
  37 \r
  38         Pico_mcd->cdc.COMIN = 0;\r
  39         Pico_mcd->cdc.IFSTAT = 0xFF;\r
  40         Pico_mcd->cdc.DAC.N = 0;\r
  41         Pico_mcd->cdc.DBC.N = 0;\r
  42         Pico_mcd->cdc.HEAD.N = 0x01000000;\r
  43         Pico_mcd->cdc.PT.N = 0;\r
  44         Pico_mcd->cdc.WA.N = 2352 * 2;\r
  45         Pico_mcd->cdc.STAT.N = 0x00000080;\r
  46         Pico_mcd->cdc.SBOUT = 0;\r
  47         Pico_mcd->cdc.IFCTRL = 0;\r
  48         Pico_mcd->cdc.CTRL.N = 0;\r
  49 \r
  50         Pico_mcd->cdc.Decode_Reg_Read = 0;\r
  51         Pico_mcd->scd.Status_CDC &= ~0x08;\r
  52 }\r
  53 \r
  54 \r
  55 PICO_INTERNAL void LC89510_Reset(void)\r
  56 {\r
  57         CDD_Reset();\r
  58         CDC_Reset();\r
  59 \r
  60         // clear DMA_Adr & Stop_Watch\r
  61         memset(Pico_mcd->s68k_regs + 0xA, 0, 4);\r
  62 }\r
  63 \r
  64 \r
  65 PICO_INTERNAL void Update_CDC_TRansfer(int which)\r
  66 {\r
  67         unsigned int DMA_Adr, dep, length;\r
  68         unsigned short *dest;\r
  69         unsigned char  *src;\r
  70 \r
  71         if (1) //Pico_mcd->cdc.DBC.N <= (CDC_DMA_SPEED * 2))\r
  72         {\r
  73                 length = (Pico_mcd->cdc.DBC.N + 1) >> 1;\r
  74                 Pico_mcd->scd.Status_CDC &= ~0x08;      // Last transfer\r
  75                 Pico_mcd->s68k_regs[4] |=  0x80;        // End data transfer\r
  76                 Pico_mcd->s68k_regs[4] &= ~0x40;        // no more data ready\r
  77                 Pico_mcd->cdc.IFSTAT |= 0x08;           // No more data transfer in progress\r
  78 \r
  79                 if (Pico_mcd->cdc.IFCTRL & 0x40)        // DTEIEN = Data Trasnfer End Interrupt Enable ?\r
  80                 {\r
  81                         Pico_mcd->cdc.IFSTAT &= ~0x40;\r
  82 \r
  83                         if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN5)\r
  84                         {\r
  85                                 elprintf(EL_INTS, "cdc DTE irq 5");\r
  86                                 SekInterruptS68k(5);\r
  87                         }\r
  88                 }\r
  89         }\r
  90         else length = CDC_DMA_SPEED;\r
  91 \r
  92 \r
  93         // TODO: dst bounds checking?\r
  94         src = Pico_mcd->cdc.Buffer + Pico_mcd->cdc.DAC.N;\r
  95         DMA_Adr = (Pico_mcd->s68k_regs[0xA]<<8) | Pico_mcd->s68k_regs[0xB];\r
  96 \r
  97         if (which == 7) // WORD RAM\r
  98         {\r
  99                 if (Pico_mcd->s68k_regs[3] & 4)\r
 100                 {\r
 101                         // test: Final Fight\r
 102                         int bank = !(Pico_mcd->s68k_regs[3]&1);\r
 103                         dep = ((DMA_Adr & 0x3FFF) << 3);\r
 104                         cdprintf("CD DMA # %04x -> word_ram1M # %06x, len=%i",\r
 105                                         Pico_mcd->cdc.DAC.N, dep, length);\r
 106 \r
 107                         dest = (unsigned short *) (Pico_mcd->word_ram1M[bank] + dep);\r
 108 \r
 109                         memcpy16bswap(dest, src, length);\r
 110 \r
 111                         /*{ // debug\r
 112                                 unsigned char *b1 = Pico_mcd->word_ram1M[bank] + dep;\r
 113                                 unsigned char *b2 = (unsigned char *)(dest+length) - 8;\r
 114                                 dprintf("%02x %02x %02x %02x .. %02x %02x %02x %02x",\r
 115                                         b1[0], b1[1], b1[4], b1[5], b2[0], b2[1], b2[4], b2[5]);\r
 116                         }*/\r
 117                 }\r
 118                 else\r
 119                 {\r
 120                         dep = ((DMA_Adr & 0x7FFF) << 3);\r
 121                         cdprintf("CD DMA # %04x -> word_ram2M # %06x, len=%i",\r
 122                                         Pico_mcd->cdc.DAC.N, dep, length);\r
 123                         dest = (unsigned short *) (Pico_mcd->word_ram2M + dep);\r
 124 \r
 125                         memcpy16bswap(dest, src, length);\r
 126 \r
 127                         /*{ // debug\r
 128                                 unsigned char *b1 = Pico_mcd->word_ram2M + dep;\r
 129                                 unsigned char *b2 = (unsigned char *)(dest+length) - 4;\r
 130                                 dprintf("%02x %02x %02x %02x .. %02x %02x %02x %02x",\r
 131                                         b1[0], b1[1], b1[2], b1[3], b2[0], b2[1], b2[2], b2[3]);\r
 132                         }*/\r
 133                 }\r
 134         }\r
 135         else if (which == 4) // PCM RAM (check: popful Mail)\r
 136         {\r
 137                 dep = (DMA_Adr & 0x03FF) << 2;\r
 138                 cdprintf("CD DMA # %04x -> PCM[%i] # %04x, len=%i",\r
 139                         Pico_mcd->cdc.DAC.N, Pico_mcd->pcm.bank, dep, length);\r
 140                 dest = (unsigned short *) (Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank] + dep);\r
 141 \r
 142                 if (Pico_mcd->cdc.DAC.N & 1) /* unaligned src? */\r
 143                         memcpy(dest, src, length*2);\r
 144                 else    memcpy16(dest, (unsigned short *) src, length);\r
 145         }\r
 146         else if (which == 5) // PRG RAM\r
 147         {\r
 148                 dep = DMA_Adr << 3;\r
 149                 dest = (unsigned short *) (Pico_mcd->prg_ram + dep);\r
 150                 cdprintf("CD DMA # %04x -> prg_ram # %06x, len=%i",\r
 151                                 Pico_mcd->cdc.DAC.N, dep, length);\r
 152 \r
 153                 memcpy16bswap(dest, src, length);\r
 154 \r
 155                 /*{ // debug\r
 156                         unsigned char *b1 = Pico_mcd->prg_ram + dep;\r
 157                         unsigned char *b2 = (unsigned char *)(dest+length) - 4;\r
 158                         dprintf("%02x %02x %02x %02x .. %02x %02x %02x %02x",\r
 159                                 b1[0], b1[1], b1[2], b1[3], b2[0], b2[1], b2[2], b2[3]);\r
 160                 }*/\r
 161         }\r
 162 \r
 163         length <<= 1;\r
 164         Pico_mcd->cdc.DAC.N = (Pico_mcd->cdc.DAC.N + length) & 0xFFFF;\r
 165         if (Pico_mcd->scd.Status_CDC & 0x08) Pico_mcd->cdc.DBC.N -= length;\r
 166         else Pico_mcd->cdc.DBC.N = 0;\r
 167 \r
 168         // update DMA_Adr\r
 169         length >>= 2;\r
 170         if (which != 4) length >>= 1;\r
 171         DMA_Adr += length;\r
 172         Pico_mcd->s68k_regs[0xA] = DMA_Adr >> 8;\r
 173         Pico_mcd->s68k_regs[0xB] = DMA_Adr;\r
 174 }\r
 175 \r
 176 \r
 177 PICO_INTERNAL_ASM unsigned short Read_CDC_Host(int is_sub)\r
 178 {\r
 179         int addr;\r
 180 \r
 181         if (!(Pico_mcd->scd.Status_CDC & 0x08))\r
 182         {\r
 183                 // Transfer data disabled\r
 184                 cdprintf("Read_CDC_Host FIXME: Transfer data disabled");\r
 185                 return 0;\r
 186         }\r
 187 \r
 188         if ((is_sub && (Pico_mcd->s68k_regs[4] & 7) != 3) ||\r
 189                 (!is_sub && (Pico_mcd->s68k_regs[4] & 7) != 2))\r
 190         {\r
 191                 // Wrong setting\r
 192                 cdprintf("Read_CDC_Host FIXME: Wrong setting");\r
 193                 return 0;\r
 194         }\r
 195 \r
 196         Pico_mcd->cdc.DBC.N -= 2;\r
 197 \r
 198         if (Pico_mcd->cdc.DBC.N <= 0)\r
 199         {\r
 200                 Pico_mcd->cdc.DBC.N = 0;\r
 201                 Pico_mcd->scd.Status_CDC &= ~0x08;              // Last transfer\r
 202                 Pico_mcd->s68k_regs[4] |=  0x80;                // End data transfer\r
 203                 Pico_mcd->s68k_regs[4] &= ~0x40;                // no more data ready\r
 204                 Pico_mcd->cdc.IFSTAT |= 0x08;                   // No more data transfer in progress\r
 205 \r
 206                 if (Pico_mcd->cdc.IFCTRL & 0x40)                // DTEIEN = Data Transfer End Interrupt Enable ?\r
 207                 {\r
 208                         Pico_mcd->cdc.IFSTAT &= ~0x40;\r
 209 \r
 210                         if (Pico_mcd->s68k_regs[0x33]&(1<<5)) {\r
 211                                 elprintf(EL_INTS, "m68k: s68k irq 5");\r
 212                                 SekInterruptS68k(5);\r
 213                         }\r
 214 \r
 215                         cdprintf("CDC - DTE interrupt");\r
 216                 }\r
 217         }\r
 218 \r
 219         addr = Pico_mcd->cdc.DAC.N;\r
 220         Pico_mcd->cdc.DAC.N += 2;\r
 221 \r
 222         cdprintf("Read_CDC_Host sub=%i d=%04x dac=%04x dbc=%04x", is_sub,\r
 223                 (Pico_mcd->cdc.Buffer[addr]<<8) | Pico_mcd->cdc.Buffer[addr+1], Pico_mcd->cdc.DAC.N, Pico_mcd->cdc.DBC.N);\r
 224 \r
 225         return (Pico_mcd->cdc.Buffer[addr]<<8) | Pico_mcd->cdc.Buffer[addr+1];\r
 226 }\r
 227 \r
 228 \r
 229 PICO_INTERNAL void CDC_Update_Header(void)\r
 230 {\r
 231         if (Pico_mcd->cdc.CTRL.B.B1 & 0x01)             // Sub-Header wanted ?\r
 232         {\r
 233                 Pico_mcd->cdc.HEAD.B.B0 = 0;\r
 234                 Pico_mcd->cdc.HEAD.B.B1 = 0;\r
 235                 Pico_mcd->cdc.HEAD.B.B2 = 0;\r
 236                 Pico_mcd->cdc.HEAD.B.B3 = 0;\r
 237         }\r
 238         else\r
 239         {\r
 240                 _msf MSF;\r
 241 \r
 242                 LBA_to_MSF(Pico_mcd->scd.Cur_LBA, &MSF);\r
 243 \r
 244                 Pico_mcd->cdc.HEAD.B.B0 = INT_TO_BCDB(MSF.M);\r
 245                 Pico_mcd->cdc.HEAD.B.B1 = INT_TO_BCDB(MSF.S);\r
 246                 Pico_mcd->cdc.HEAD.B.B2 = INT_TO_BCDB(MSF.F);\r
 247                 Pico_mcd->cdc.HEAD.B.B3 = 0x01;\r
 248         }\r
 249 }\r
 250 \r
 251 \r
 252 PICO_INTERNAL unsigned char CDC_Read_Reg(void)\r
 253 {\r
 254         unsigned char ret;\r
 255 \r
 256         switch(Pico_mcd->s68k_regs[5] & 0xF)\r
 257         {\r
 258                 case 0x0: // COMIN\r
 259                         cdprintf("CDC read reg 00 = %.2X", Pico_mcd->cdc.COMIN);\r
 260 \r
 261                         Pico_mcd->s68k_regs[5] = 0x1;\r
 262                         return Pico_mcd->cdc.COMIN;\r
 263 \r
 264                 case 0x1: // IFSTAT\r
 265                         cdprintf("CDC read reg 01 = %.2X", Pico_mcd->cdc.IFSTAT);\r
 266 \r
 267                         Pico_mcd->cdc.Decode_Reg_Read |= (1 << 1);              // Reg 1 (decoding)\r
 268                         Pico_mcd->s68k_regs[5] = 0x2;\r
 269                         return Pico_mcd->cdc.IFSTAT;\r
 270 \r
 271                 case 0x2: // DBCL\r
 272                         cdprintf("CDC read reg 02 = %.2X", Pico_mcd->cdc.DBC.B.L);\r
 273 \r
 274                         Pico_mcd->s68k_regs[5] = 0x3;\r
 275                         return Pico_mcd->cdc.DBC.B.L;\r
 276 \r
 277                 case 0x3: // DBCH\r
 278                         cdprintf("CDC read reg 03 = %.2X", Pico_mcd->cdc.DBC.B.H);\r
 279 \r
 280                         Pico_mcd->s68k_regs[5] = 0x4;\r
 281                         return Pico_mcd->cdc.DBC.B.H;\r
 282 \r
 283                 case 0x4: // HEAD0\r
 284                         cdprintf("CDC read reg 04 = %.2X", Pico_mcd->cdc.HEAD.B.B0);\r
 285 \r
 286                         Pico_mcd->cdc.Decode_Reg_Read |= (1 << 4);              // Reg 4 (decoding)\r
 287                         Pico_mcd->s68k_regs[5] = 0x5;\r
 288                         return Pico_mcd->cdc.HEAD.B.B0;\r
 289 \r
 290                 case 0x5: // HEAD1\r
 291                         cdprintf("CDC read reg 05 = %.2X", Pico_mcd->cdc.HEAD.B.B1);\r
 292 \r
 293                         Pico_mcd->cdc.Decode_Reg_Read |= (1 << 5);              // Reg 5 (decoding)\r
 294                         Pico_mcd->s68k_regs[5] = 0x6;\r
 295                         return Pico_mcd->cdc.HEAD.B.B1;\r
 296 \r
 297                 case 0x6: // HEAD2\r
 298                         cdprintf("CDC read reg 06 = %.2X", Pico_mcd->cdc.HEAD.B.B2);\r
 299 \r
 300                         Pico_mcd->cdc.Decode_Reg_Read |= (1 << 6);              // Reg 6 (decoding)\r
 301                         Pico_mcd->s68k_regs[5] = 0x7;\r
 302                         return Pico_mcd->cdc.HEAD.B.B2;\r
 303 \r
 304                 case 0x7: // HEAD3\r
 305                         cdprintf("CDC read reg 07 = %.2X", Pico_mcd->cdc.HEAD.B.B3);\r
 306 \r
 307                         Pico_mcd->cdc.Decode_Reg_Read |= (1 << 7);              // Reg 7 (decoding)\r
 308                         Pico_mcd->s68k_regs[5] = 0x8;\r
 309                         return Pico_mcd->cdc.HEAD.B.B3;\r
 310 \r
 311                 case 0x8: // PTL\r
 312                         cdprintf("CDC read reg 08 = %.2X", Pico_mcd->cdc.PT.B.L);\r
 313 \r
 314                         Pico_mcd->cdc.Decode_Reg_Read |= (1 << 8);              // Reg 8 (decoding)\r
 315                         Pico_mcd->s68k_regs[5] = 0x9;\r
 316                         return Pico_mcd->cdc.PT.B.L;\r
 317 \r
 318                 case 0x9: // PTH\r
 319                         cdprintf("CDC read reg 09 = %.2X", Pico_mcd->cdc.PT.B.H);\r
 320 \r
 321                         Pico_mcd->cdc.Decode_Reg_Read |= (1 << 9);              // Reg 9 (decoding)\r
 322                         Pico_mcd->s68k_regs[5] = 0xA;\r
 323                         return Pico_mcd->cdc.PT.B.H;\r
 324 \r
 325                 case 0xA: // WAL\r
 326                         cdprintf("CDC read reg 10 = %.2X", Pico_mcd->cdc.WA.B.L);\r
 327 \r
 328                         Pico_mcd->s68k_regs[5] = 0xB;\r
 329                         return Pico_mcd->cdc.WA.B.L;\r
 330 \r
 331                 case 0xB: // WAH\r
 332                         cdprintf("CDC read reg 11 = %.2X", Pico_mcd->cdc.WA.B.H);\r
 333 \r
 334                         Pico_mcd->s68k_regs[5] = 0xC;\r
 335                         return Pico_mcd->cdc.WA.B.H;\r
 336 \r
 337                 case 0xC: // STAT0\r
 338                         cdprintf("CDC read reg 12 = %.2X", Pico_mcd->cdc.STAT.B.B0);\r
 339 \r
 340                         Pico_mcd->cdc.Decode_Reg_Read |= (1 << 12);             // Reg 12 (decoding)\r
 341                         Pico_mcd->s68k_regs[5] = 0xD;\r
 342                         return Pico_mcd->cdc.STAT.B.B0;\r
 343 \r
 344                 case 0xD: // STAT1\r
 345                         cdprintf("CDC read reg 13 = %.2X", Pico_mcd->cdc.STAT.B.B1);\r
 346 \r
 347                         Pico_mcd->cdc.Decode_Reg_Read |= (1 << 13);             // Reg 13 (decoding)\r
 348                         Pico_mcd->s68k_regs[5] = 0xE;\r
 349                         return Pico_mcd->cdc.STAT.B.B1;\r
 350 \r
 351                 case 0xE: // STAT2\r
 352                         cdprintf("CDC read reg 14 = %.2X", Pico_mcd->cdc.STAT.B.B2);\r
 353 \r
 354                         Pico_mcd->cdc.Decode_Reg_Read |= (1 << 14);             // Reg 14 (decoding)\r
 355                         Pico_mcd->s68k_regs[5] = 0xF;\r
 356                         return Pico_mcd->cdc.STAT.B.B2;\r
 357 \r
 358                 case 0xF: // STAT3\r
 359                         cdprintf("CDC read reg 15 = %.2X", Pico_mcd->cdc.STAT.B.B3);\r
 360 \r
 361                         ret = Pico_mcd->cdc.STAT.B.B3;\r
 362                         Pico_mcd->cdc.IFSTAT |= 0x20;                   // decoding interrupt flag cleared\r
 363                         if ((Pico_mcd->cdc.CTRL.B.B0 & 0x80) && (Pico_mcd->cdc.IFCTRL & 0x20))\r
 364                         {\r
 365                                 if ((Pico_mcd->cdc.Decode_Reg_Read & 0x73F2) == 0x73F2)\r
 366                                         Pico_mcd->cdc.STAT.B.B3 = 0x80;\r
 367                         }\r
 368                         return ret;\r
 369         }\r
 370 \r
 371         return 0;\r
 372 }\r
 373 \r
 374 \r
 375 PICO_INTERNAL void CDC_Write_Reg(unsigned char Data)\r
 376 {\r
 377         cdprintf("CDC write reg%02d = %.2X", Pico_mcd->s68k_regs[5] & 0xF, Data);\r
 378 \r
 379         switch (Pico_mcd->s68k_regs[5] & 0xF)\r
 380         {\r
 381                 case 0x0: // SBOUT\r
 382                         Pico_mcd->s68k_regs[5] = 0x1;\r
 383                         Pico_mcd->cdc.SBOUT = Data;\r
 384 \r
 385                         break;\r
 386 \r
 387                 case 0x1: // IFCTRL\r
 388                         Pico_mcd->s68k_regs[5] = 0x2;\r
 389                         Pico_mcd->cdc.IFCTRL = Data;\r
 390 \r
 391                         if ((Pico_mcd->cdc.IFCTRL & 0x02) == 0)         // Stop data transfer\r
 392                         {\r
 393                                 Pico_mcd->cdc.DBC.N = 0;\r
 394                                 Pico_mcd->scd.Status_CDC &= ~0x08;\r
 395                                 Pico_mcd->cdc.IFSTAT |= 0x08;           // No more data transfer in progress\r
 396                         }\r
 397                         break;\r
 398 \r
 399                 case 0x2: // DBCL\r
 400                         Pico_mcd->s68k_regs[5] = 0x3;\r
 401                         Pico_mcd->cdc.DBC.B.L = Data;\r
 402 \r
 403                         break;\r
 404 \r
 405                 case 0x3: // DBCH\r
 406                         Pico_mcd->s68k_regs[5] = 0x4;\r
 407                         Pico_mcd->cdc.DBC.B.H = Data;\r
 408 \r
 409                         break;\r
 410 \r
 411                 case 0x4: // DACL\r
 412                         Pico_mcd->s68k_regs[5] = 0x5;\r
 413                         Pico_mcd->cdc.DAC.B.L = Data;\r
 414 \r
 415                         break;\r
 416 \r
 417                 case 0x5: // DACH\r
 418                         Pico_mcd->s68k_regs[5] = 0x6;\r
 419                         Pico_mcd->cdc.DAC.B.H = Data;\r
 420 \r
 421                         break;\r
 422 \r
 423                 case 0x6: // DTTRG\r
 424                         if (Pico_mcd->cdc.IFCTRL & 0x02)                // Data transfer enable ?\r
 425                         {\r
 426                                 Pico_mcd->cdc.IFSTAT &= ~0x08;          // Data transfer in progress\r
 427                                 Pico_mcd->scd.Status_CDC |= 0x08;       // Data transfer in progress\r
 428                                 Pico_mcd->s68k_regs[4] &= 0x7F;         // A data transfer start\r
 429 \r
 430                                 cdprintf("************** Starting Data Transfer ***********");\r
 431                                 cdprintf("RS0 = %.4X  DAC = %.4X  DBC = %.4X  DMA adr = %.4X\n\n", Pico_mcd->s68k_regs[4]<<8,\r
 432                                         Pico_mcd->cdc.DAC.N, Pico_mcd->cdc.DBC.N, (Pico_mcd->s68k_regs[0xA]<<8) | Pico_mcd->s68k_regs[0xB]);\r
 433 \r
 434                                 // tmp\r
 435                                 {\r
 436                                         int ddx = Pico_mcd->s68k_regs[4] & 7;\r
 437                                         if (ddx <  2) break; // invalid\r
 438                                         if (ddx <  4) {\r
 439                                                 Pico_mcd->s68k_regs[4] |= 0x40; // Data set ready in host port\r
 440                                                 break;\r
 441                                         }\r
 442                                         if (ddx == 6) break; // invalid\r
 443 \r
 444                                         pcd_event_schedule_s68k(PCD_EVENT_DMA, Pico_mcd->cdc.DBC.N / 2);\r
 445                                 }\r
 446                         }\r
 447                         break;\r
 448 \r
 449                 case 0x7: // DTACK\r
 450                         Pico_mcd->cdc.IFSTAT |= 0x40;                   // end data transfer interrupt flag cleared\r
 451                         break;\r
 452 \r
 453                 case 0x8: // WAL\r
 454                         Pico_mcd->s68k_regs[5] = 0x9;\r
 455                         Pico_mcd->cdc.WA.B.L = Data;\r
 456 \r
 457                         break;\r
 458 \r
 459                 case 0x9: // WAH\r
 460                         Pico_mcd->s68k_regs[5] = 0xA;\r
 461                         Pico_mcd->cdc.WA.B.H = Data;\r
 462 \r
 463                         break;\r
 464 \r
 465                 case 0xA: // CTRL0\r
 466                         Pico_mcd->s68k_regs[5] = 0xB;\r
 467                         Pico_mcd->cdc.CTRL.B.B0 = Data;\r
 468 \r
 469                         break;\r
 470 \r
 471                 case 0xB: // CTRL1\r
 472                         Pico_mcd->s68k_regs[5] = 0xC;\r
 473                         Pico_mcd->cdc.CTRL.B.B1 = Data;\r
 474 \r
 475                         break;\r
 476 \r
 477                 case 0xC: // PTL\r
 478                         Pico_mcd->s68k_regs[5] = 0xD;\r
 479                         Pico_mcd->cdc.PT.B.L = Data;\r
 480 \r
 481                         break;\r
 482 \r
 483                 case 0xD: // PTH\r
 484                         Pico_mcd->s68k_regs[5] = 0xE;\r
 485                         Pico_mcd->cdc.PT.B.H = Data;\r
 486 \r
 487                         break;\r
 488 \r
 489                 case 0xE: // CTRL2\r
 490                         Pico_mcd->cdc.CTRL.B.B2 = Data;\r
 491                         break;\r
 492 \r
 493                 case 0xF: // RESET\r
 494                         CDC_Reset();\r
 495                         break;\r
 496         }\r
 497 }\r
 498 \r
 499 \r
 500 static int bswapwrite(int a, unsigned short d)\r
 501 {\r
 502         *(unsigned short *)(Pico_mcd->s68k_regs + a) = (d>>8)|(d<<8);\r
 503         return d + (d >> 8);\r
 504 }\r
 505 \r
 506 PICO_INTERNAL void CDD_Export_Status(void)\r
 507 {\r
 508         unsigned int csum;\r
 509 \r
 510         csum  = bswapwrite( 0x38+0, Pico_mcd->cdd.Status);\r
 511         csum += bswapwrite( 0x38+2, Pico_mcd->cdd.Minute);\r
 512         csum += bswapwrite( 0x38+4, Pico_mcd->cdd.Seconde);\r
 513         csum += bswapwrite( 0x38+6, Pico_mcd->cdd.Frame);\r
 514         Pico_mcd->s68k_regs[0x38+8] = Pico_mcd->cdd.Ext;\r
 515         csum += Pico_mcd->cdd.Ext;\r
 516         Pico_mcd->s68k_regs[0x38+9] = ~csum & 0xf;\r
 517 \r
 518         Pico_mcd->s68k_regs[0x37] &= 3; // CDD.Control\r
 519 \r
 520         if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN4)\r
 521         {\r
 522                 elprintf(EL_INTS, "cdd export irq 4");\r
 523                 SekInterruptS68k(4);\r
 524         }\r
 525 \r
 526 //      cdprintf("CDD exported status\n");\r
 527         cdprintf("out:  Status=%.4X, Minute=%.4X, Second=%.4X, Frame=%.4X  Checksum=%.4X",\r
 528                 (Pico_mcd->s68k_regs[0x38+0] << 8) | Pico_mcd->s68k_regs[0x38+1],\r
 529                 (Pico_mcd->s68k_regs[0x38+2] << 8) | Pico_mcd->s68k_regs[0x38+3],\r
 530                 (Pico_mcd->s68k_regs[0x38+4] << 8) | Pico_mcd->s68k_regs[0x38+5],\r
 531                 (Pico_mcd->s68k_regs[0x38+6] << 8) | Pico_mcd->s68k_regs[0x38+7],\r
 532                 (Pico_mcd->s68k_regs[0x38+8] << 8) | Pico_mcd->s68k_regs[0x38+9]);\r
 533 }\r
 534 \r
 535 \r
 536 PICO_INTERNAL void CDD_Import_Command(void)\r
 537 {\r
 538 //      cdprintf("CDD importing command\n");\r
 539         cdprintf("in:  Command=%.4X, Minute=%.4X, Second=%.4X, Frame=%.4X  Checksum=%.4X",\r
 540                 (Pico_mcd->s68k_regs[0x38+10+0] << 8) | Pico_mcd->s68k_regs[0x38+10+1],\r
 541                 (Pico_mcd->s68k_regs[0x38+10+2] << 8) | Pico_mcd->s68k_regs[0x38+10+3],\r
 542                 (Pico_mcd->s68k_regs[0x38+10+4] << 8) | Pico_mcd->s68k_regs[0x38+10+5],\r
 543                 (Pico_mcd->s68k_regs[0x38+10+6] << 8) | Pico_mcd->s68k_regs[0x38+10+7],\r
 544                 (Pico_mcd->s68k_regs[0x38+10+8] << 8) | Pico_mcd->s68k_regs[0x38+10+9]);\r
 545 \r
 546         switch (Pico_mcd->s68k_regs[0x38+10+0])\r
 547         {\r
 548                 case 0x0:       // STATUS (?)\r
 549                         Get_Status_CDD_c0();\r
 550                         break;\r
 551 \r
 552                 case 0x1:       // STOP ALL (?)\r
 553                         Stop_CDD_c1();\r
 554                         break;\r
 555 \r
 556                 case 0x2:       // GET TOC INFORMATIONS\r
 557                         switch(Pico_mcd->s68k_regs[0x38+10+3])\r
 558                         {\r
 559                                 case 0x0:       // get current position (MSF format)\r
 560                                         Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00);\r
 561                                         Get_Pos_CDD_c20();\r
 562                                         break;\r
 563 \r
 564                                 case 0x1:       // get elapsed time of current track played/scanned (relative MSF format)\r
 565                                         Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00) | 1;\r
 566                                         Get_Track_Pos_CDD_c21();\r
 567                                         break;\r
 568 \r
 569                                 case 0x2:       // get current track in RS2-RS3\r
 570                                         Pico_mcd->cdd.Status =  (Pico_mcd->cdd.Status & 0xFF00) | 2;\r
 571                                         Get_Current_Track_CDD_c22();\r
 572                                         break;\r
 573 \r
 574                                 case 0x3:       // get total length (MSF format)\r
 575                                         Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00) | 3;\r
 576                                         Get_Total_Lenght_CDD_c23();\r
 577                                         break;\r
 578 \r
 579                                 case 0x4:       // first & last track number\r
 580                                         Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00) | 4;\r
 581                                         Get_First_Last_Track_CDD_c24();\r
 582                                         break;\r
 583 \r
 584                                 case 0x5:       // get track addresse (MSF format)\r
 585                                         Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00) | 5;\r
 586                                         Get_Track_Adr_CDD_c25();\r
 587                                         break;\r
 588 \r
 589                                 default :       // invalid, then we return status\r
 590                                         Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00) | 0xF;\r
 591                                         Get_Status_CDD_c0();\r
 592                                         break;\r
 593                         }\r
 594                         break;\r
 595 \r
 596                 case 0x3:       // READ\r
 597                         Play_CDD_c3();\r
 598                         break;\r
 599 \r
 600                 case 0x4:       // SEEK\r
 601                         Seek_CDD_c4();\r
 602                         break;\r
 603 \r
 604                 case 0x6:       // PAUSE/STOP\r
 605                         Pause_CDD_c6();\r
 606                         break;\r
 607 \r
 608                 case 0x7:       // RESUME\r
 609                         Resume_CDD_c7();\r
 610                         break;\r
 611 \r
 612                 case 0x8:       // FAST FOWARD\r
 613                         Fast_Foward_CDD_c8();\r
 614                         break;\r
 615 \r
 616                 case 0x9:       // FAST REWIND\r
 617                         Fast_Rewind_CDD_c9();\r
 618                         break;\r
 619 \r
 620                 case 0xA:       // RECOVER INITIAL STATE (?)\r
 621                         CDD_cA();\r
 622                         break;\r
 623 \r
 624                 case 0xC:       // CLOSE TRAY\r
 625                         Close_Tray_CDD_cC();\r
 626                         break;\r
 627 \r
 628                 case 0xD:       // OPEN TRAY\r
 629                         Open_Tray_CDD_cD();\r
 630                         break;\r
 631 \r
 632                 default:        // UNKNOWN\r
 633                         CDD_Def();\r
 634                         break;\r
 635         }\r
 636 }\r
 637 \r