split memories away from Pico

[picodrive.git] / pico / eeprom.c

diff --git a/pico/eeprom.c b/pico/eeprom.c
index 16f6c05..d727766 100644 (file)
--- a/pico/eeprom.c
+++ b/pico/eeprom.c
@@ -42,14 +42,14 @@ static void EEPROM_write_do(unsigned int d) // ???? ??la (l=SCL, a=SDA)
   {\r
     // we are started and SCL went high - next cycle\r
     scyc++; // pre-increment\r
-    if(SRam.eeprom_type) {\r
+    if(Pico.sv.eeprom_type) {\r
       // X24C02+\r
       if((ssa&1) && scyc == 18) {\r
         scyc = 9;\r
         saddr++; // next address in read mode\r
-        /*if(SRam.eeprom_type==2) saddr&=0xff; else*/ saddr&=0x1fff; // mask\r
+        /*if(Pico.sv.eeprom_type==2) saddr&=0xff; else*/ saddr&=0x1fff; // mask\r
       }\r
-      else if(SRam.eeprom_type == 2 && scyc == 27) scyc = 18;\r
+      else if(Pico.sv.eeprom_type == 2 && scyc == 27) scyc = 18;\r
       else if(scyc == 36) scyc = 27;\r
     } else {\r
       // X24C01\r
@@ -63,29 +63,29 @@ static void EEPROM_write_do(unsigned int d) // ???? ??la (l=SCL, a=SDA)
   else if((sreg & 8) && (sreg & 2) && !(d&2))\r
   {\r
     // we are started and SCL went low (falling edge)\r
-    if(SRam.eeprom_type) {\r
+    if(Pico.sv.eeprom_type) {\r
       // X24C02+\r
       if(scyc == 9 || scyc == 18 || scyc == 27); // ACK cycles\r
-      else if( (SRam.eeprom_type == 3 && scyc > 27) || (SRam.eeprom_type == 2 && scyc > 18) ) {\r
+      else if( (Pico.sv.eeprom_type == 3 && scyc > 27) || (Pico.sv.eeprom_type == 2 && scyc > 18) ) {\r
         if(!(ssa&1)) {\r
           // data write\r
-          unsigned char *pm=SRam.data+saddr;\r
+          unsigned char *pm=Pico.sv.data+saddr;\r
           *pm <<= 1; *pm |= d&1;\r
           if(scyc == 26 || scyc == 35) {\r
             saddr=(saddr&~0xf)|((saddr+1)&0xf); // only 4 (?) lowest bits are incremented\r
             elprintf(EL_EEPROM, "eeprom: write done, addr inc to: %x, last byte=%02x", saddr, *pm);\r
           }\r
-          SRam.changed = 1;\r
+          Pico.sv.changed = 1;\r
         }\r
       } else if(scyc > 9) {\r
         if(!(ssa&1)) {\r
           // we latch another addr bit\r
           saddr<<=1;\r
-          if(SRam.eeprom_type == 2) saddr&=0xff; else saddr&=0x1fff; // mask\r
+          if(Pico.sv.eeprom_type == 2) saddr&=0xff; else saddr&=0x1fff; // mask\r
           saddr|=d&1;\r
           if(scyc==17||scyc==26) {\r
             elprintf(EL_EEPROM, "eeprom: addr reg done: %x", saddr);\r
-            if(scyc==17&&SRam.eeprom_type==2) { saddr&=0xff; saddr|=(ssa<<7)&0x700; } // add device bits too\r
+            if(scyc==17&&Pico.sv.eeprom_type==2) { saddr&=0xff; saddr|=(ssa<<7)&0x700; } // add device bits too\r
           }\r
         }\r
       } else {\r
@@ -99,13 +99,13 @@ static void EEPROM_write_do(unsigned int d) // ???? ??la (l=SCL, a=SDA)
       else if(scyc > 9) {\r
         if(!(saddr&1)) {\r
           // data write\r
-          unsigned char *pm=SRam.data+(saddr>>1);\r
+          unsigned char *pm=Pico.sv.data+(saddr>>1);\r
           *pm <<= 1; *pm |= d&1;\r
           if(scyc == 17) {\r
             saddr=(saddr&0xf9)|((saddr+2)&6); // only 2 lowest bits are incremented\r
             elprintf(EL_EEPROM, "eeprom: write done, addr inc to: %x, last byte=%02x", saddr>>1, *pm);\r
           }\r
-          SRam.changed = 1;\r
+          Pico.sv.changed = 1;\r
         }\r
       } else {\r
         // we latch another addr bit\r
@@ -129,11 +129,11 @@ static void EEPROM_upd_pending(unsigned int d)
   sreg &= ~0xc0;\r
 \r
   // SCL\r
-  d1 = (d >> SRam.eeprom_bit_cl) & 1;\r
+  d1 = (d >> Pico.sv.eeprom_bit_cl) & 1;\r
   sreg |= d1 << 7;\r
 \r
   // SDA in\r
-  d1 = (d >> SRam.eeprom_bit_in) & 1;\r
+  d1 = (d >> Pico.sv.eeprom_bit_in) & 1;\r
   sreg |= d1 << 6;\r
 \r
   Pico.m.eeprom_status = (unsigned char) sreg;\r
@@ -190,23 +190,23 @@ unsigned int EEPROM_read(void)
   } else if (scyc > 9 && scyc < 18) {\r
     // started and first command word received\r
     shift = 17-scyc;\r
-    if (SRam.eeprom_type) {\r
+    if (Pico.sv.eeprom_type) {\r
       // X24C02+\r
       if (ssa&1) {\r
         elprintf(EL_EEPROM, "eeprom: read: addr %02x, cycle %i, reg %02x", saddr, scyc, sreg);\r
-       if (shift==0) elprintf(EL_EEPROM, "eeprom: read done, byte %02x", SRam.data[saddr]);\r
-        d = (SRam.data[saddr]>>shift)&1;\r
+       if (shift==0) elprintf(EL_EEPROM, "eeprom: read done, byte %02x", Pico.sv.data[saddr]);\r
+        d = (Pico.sv.data[saddr]>>shift)&1;\r
       }\r
     } else {\r
       // X24C01\r
       if (saddr&1) {\r
         elprintf(EL_EEPROM, "eeprom: read: addr %02x, cycle %i, reg %02x", saddr>>1, scyc, sreg);\r
-       if (shift==0) elprintf(EL_EEPROM, "eeprom: read done, byte %02x", SRam.data[saddr>>1]);\r
-        d = (SRam.data[saddr>>1]>>shift)&1;\r
+       if (shift==0) elprintf(EL_EEPROM, "eeprom: read done, byte %02x", Pico.sv.data[saddr>>1]);\r
+        d = (Pico.sv.data[saddr>>1]>>shift)&1;\r
       }\r
     }\r
   }\r
 \r
-  return (d << SRam.eeprom_bit_out);\r
+  return (d << Pico.sv.eeprom_bit_out);\r
 }\r
 \r