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asm code updated, Bass Masters fix
[picodrive.git] / Pico / cd / Memory.c
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6cadc2da 1// Memory I/O handlers for Sega/Mega CD.\r
2// Loosely based on Gens code.\r
3// (c) Copyright 2007, Grazvydas "notaz" Ignotas\r
cc68a136 4\r
cc68a136 5\r
cc68a136 6#include "../PicoInt.h"\r
7\r
cc68a136 8#include "../sound/ym2612.h"\r
9#include "../sound/sn76496.h"\r
10\r
cb4a513a 11#include "gfx_cd.h"\r
4f265db7 12#include "pcm.h"\r
cb4a513a 13\r
eff55556 14#ifndef UTYPES_DEFINED\r
cc68a136 15typedef unsigned char u8;\r
16typedef unsigned short u16;\r
17typedef unsigned int u32;\r
eff55556 18#define UTYPES_DEFINED\r
19#endif\r
cc68a136 20\r
b5e5172d 21//#define rdprintf dprintf\r
22#define rdprintf(...)\r
68cba51e 23//#define wrdprintf dprintf\r
913ef4b7 24#define wrdprintf(...)\r
cc68a136 25\r
b5e5172d 26#ifdef EMU_CORE_DEBUG\r
27extern u32 lastread_a, lastread_d[16], lastwrite_cyc_d[16];\r
28extern int lrp_cyc, lwp_cyc;\r
29#undef USE_POLL_DETECT\r
30#endif\r
31\r
cc68a136 32// -----------------------------------------------------------------\r
33\r
7a1f6e45 34// poller detection\r
7a1f6e45 35#define POLL_LIMIT 16\r
36#define POLL_CYCLES 124\r
37// int m68k_poll_addr, m68k_poll_cnt;\r
38unsigned int s68k_poll_adclk, s68k_poll_cnt;\r
cc68a136 39\r
4ff2d527 40#ifndef _ASM_CD_MEMORY_C\r
cb4a513a 41static u32 m68k_reg_read16(u32 a)\r
cc68a136 42{\r
43 u32 d=0;\r
44 a &= 0x3e;\r
672ad671 45 // dprintf("m68k_regs r%2i: [%02x] @%06x", realsize&~1, a+(realsize&1), SekPc);\r
cc68a136 46\r
47 switch (a) {\r
672ad671 48 case 0:\r
c459aefd 49 d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens\r
672ad671 50 goto end;\r
cc68a136 51 case 2:\r
672ad671 52 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);\r
c008977e 53 // the DMNA delay must only be visible on s68k side (Lunar2, Silpheed)\r
54 if (Pico_mcd->m.state_flags&2) { d &= ~1; d |= 2; }\r
55 //printf("m68k_regs r3: %02x @%06x\n", (u8)d, SekPc);\r
cc68a136 56 goto end;\r
c459aefd 57 case 4:\r
58 d = Pico_mcd->s68k_regs[4]<<8;\r
59 goto end;\r
60 case 6:\r
913ef4b7 61 d = *(u16 *)(Pico_mcd->bios + 0x72);\r
c459aefd 62 goto end;\r
cc68a136 63 case 8:\r
cc68a136 64 d = Read_CDC_Host(0);\r
65 goto end;\r
c459aefd 66 case 0xA:\r
ca61ee42 67 elprintf(EL_UIO, "m68k FIXME: reserved read");\r
c459aefd 68 goto end;\r
cc68a136 69 case 0xC:\r
1cd356a3 70 d = Pico_mcd->m.timer_stopwatch >> 16;\r
4ff2d527 71 dprintf("m68k stopwatch timer read (%04x)", d);\r
1cd356a3 72 goto end;\r
cc68a136 73 }\r
74\r
cc68a136 75 if (a < 0x30) {\r
76 // comm flag/cmd/status (0xE-0x2F)\r
77 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r
78 goto end;\r
79 }\r
80\r
ca61ee42 81 elprintf(EL_UIO, "m68k_regs FIXME invalid read @ %02x", a);\r
cc68a136 82\r
83end:\r
84\r
cc68a136 85 return d;\r
86}\r
4ff2d527 87#endif\r
cc68a136 88\r
4ff2d527 89#ifndef _ASM_CD_MEMORY_C\r
90static\r
91#endif\r
92void m68k_reg_write8(u32 a, u32 d)\r
cc68a136 93{\r
94 a &= 0x3f;\r
672ad671 95 // dprintf("m68k_regs w%2i: [%02x] %02x @%06x", realsize, a, d, SekPc);\r
cc68a136 96\r
97 switch (a) {\r
98 case 0:\r
672ad671 99 d &= 1;\r
ca61ee42 100 if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { elprintf(EL_INTS, "m68k: s68k irq 2"); SekInterruptS68k(2); }\r
c459aefd 101 return;\r
cc68a136 102 case 1:\r
672ad671 103 d &= 3;\r
51a902ae 104 if (!(d&1)) Pico_mcd->m.state_flags |= 1; // reset pending, needed to be sure we fetch the right vectors on reset\r
c459aefd 105 if ( (Pico_mcd->m.busreq&1) != (d&1)) dprintf("m68k: s68k reset %i", !(d&1));\r
106 if ( (Pico_mcd->m.busreq&2) != (d&2)) dprintf("m68k: s68k brq %i", (d&2)>>1);\r
51a902ae 107 if ((Pico_mcd->m.state_flags&1) && (d&3)==1) {\r
cc68a136 108 SekResetS68k(); // S68k comes out of RESET or BRQ state\r
4ff2d527 109 Pico_mcd->m.state_flags&=~1;\r
110 dprintf("m68k: resetting s68k, cycles=%i", SekCyclesLeft);\r
cc68a136 111 }\r
c459aefd 112 Pico_mcd->m.busreq = d;\r
113 return;\r
672ad671 114 case 2:\r
721cd396 115 dprintf("m68k: prg wp=%02x", d);\r
672ad671 116 Pico_mcd->s68k_regs[2] = d; // really use s68k side register\r
117 return;\r
66fdc0f0 118 case 3: {\r
119 u32 dold = Pico_mcd->s68k_regs[3]&0x1f;\r
c008977e 120 //printf("m68k_regs w3: %02x @%06x\n", (u8)d, SekPc);\r
672ad671 121 d &= 0xc2;\r
66fdc0f0 122 if ((dold>>6) != ((d>>6)&3))\r
672ad671 123 dprintf("m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));\r
124 //if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);\r
125 //if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :\r
126 // ((d&2) ? "word ram to s68k" : "word ram to m68k"));\r
66fdc0f0 127 if (dold & 4) {\r
128 d ^= 2; // writing 0 to DMNA actually sets it, 1 does nothing\r
129 } else {\r
130 //dold &= ~2; // ??\r
89fa852d 131#if 1\r
132 if ((d & 2) && !(dold & 2)) {\r
133 Pico_mcd->m.state_flags |= 2; // we must delay setting DMNA bit (needed for Silpheed)\r
134 d &= ~2;\r
135 }\r
136#else\r
66fdc0f0 137 if (d & 2) dold &= ~1; // return word RAM to s68k in 2M mode\r
89fa852d 138#endif\r
66fdc0f0 139 }\r
140 Pico_mcd->s68k_regs[3] = d | dold; // really use s68k side register\r
7a1f6e45 141#ifdef USE_POLL_DETECT\r
142 if ((s68k_poll_adclk&0xfe) == 2 && s68k_poll_cnt > POLL_LIMIT) {\r
143 SekSetStopS68k(0); s68k_poll_adclk = 0;\r
8f8fe01e 144 elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r
7a1f6e45 145 }\r
146#endif\r
672ad671 147 return;\r
66fdc0f0 148 }\r
c459aefd 149 case 6:\r
d1df8786 150 Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer\r
c459aefd 151 return;\r
152 case 7:\r
d1df8786 153 Pico_mcd->bios[0x72] = d;\r
913ef4b7 154 dprintf("hint vector set to %08x", PicoRead32(0x70));\r
c459aefd 155 return;\r
7a1f6e45 156 case 0xf:\r
157 d = (d << 1) | ((d >> 7) & 1); // rol8 1 (special case)\r
cc68a136 158 case 0xe:\r
672ad671 159 //dprintf("m68k: comm flag: %02x", d);\r
cc68a136 160 Pico_mcd->s68k_regs[0xe] = d;\r
7a1f6e45 161#ifdef USE_POLL_DETECT\r
162 if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {\r
163 SekSetStopS68k(0); s68k_poll_adclk = 0;\r
8f8fe01e 164 elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r
7a1f6e45 165 }\r
166#endif\r
c459aefd 167 return;\r
672ad671 168 }\r
169\r
170 if ((a&0xf0) == 0x10) {\r
cc68a136 171 Pico_mcd->s68k_regs[a] = d;\r
7a1f6e45 172#ifdef USE_POLL_DETECT\r
173 if ((a&0xfe) == (s68k_poll_adclk&0xfe) && s68k_poll_cnt > POLL_LIMIT) {\r
174 SekSetStopS68k(0); s68k_poll_adclk = 0;\r
8f8fe01e 175 elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r
7a1f6e45 176 }\r
177#endif\r
672ad671 178 return;\r
cc68a136 179 }\r
180\r
ca61ee42 181 elprintf(EL_UIO, "m68k FIXME: invalid write? [%02x] %02x", a, d);\r
cc68a136 182}\r
183\r
2433f409 184#ifndef _ASM_CD_MEMORY_C\r
185static\r
186#endif\r
187u32 s68k_poll_detect(u32 a, u32 d)\r
188{\r
189#ifdef USE_POLL_DETECT\r
ca61ee42 190 // needed mostly for Cyclone, which doesn't always check it's cycle counter\r
191 if (SekIsStoppedS68k()) return d;\r
2433f409 192 // polling detection\r
193 if (a == (s68k_poll_adclk&0xff)) {\r
194 unsigned int clkdiff = SekCyclesDoneS68k() - (s68k_poll_adclk>>8);\r
195 if (clkdiff <= POLL_CYCLES) {\r
196 s68k_poll_cnt++;\r
197 //printf("-- diff: %u, cnt = %i\n", clkdiff, s68k_poll_cnt);\r
198 if (s68k_poll_cnt > POLL_LIMIT) {\r
199 SekSetStopS68k(1);\r
8f8fe01e 200 elprintf(EL_CDPOLL, "s68k poll detected @ %06x, a=%02x", SekPcS68k, a);\r
2433f409 201 }\r
202 s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;\r
203 return d;\r
204 }\r
205 }\r
206 s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;\r
207 s68k_poll_cnt = 0;\r
208#endif\r
209 return d;\r
210}\r
cc68a136 211\r
913ef4b7 212#define READ_FONT_DATA(basemask) \\r
213{ \\r
214 unsigned int fnt = *(unsigned int *)(Pico_mcd->s68k_regs + 0x4c); \\r
215 unsigned int col0 = (fnt >> 8) & 0x0f, col1 = (fnt >> 12) & 0x0f; \\r
216 if (fnt & (basemask << 0)) d = col1 ; else d = col0; \\r
217 if (fnt & (basemask << 1)) d |= col1 << 4; else d |= col0 << 4; \\r
218 if (fnt & (basemask << 2)) d |= col1 << 8; else d |= col0 << 8; \\r
219 if (fnt & (basemask << 3)) d |= col1 << 12; else d |= col0 << 12; \\r
220}\r
221\r
cc68a136 222\r
4ff2d527 223#ifndef _ASM_CD_MEMORY_C\r
224static\r
225#endif\r
226u32 s68k_reg_read16(u32 a)\r
cc68a136 227{\r
228 u32 d=0;\r
cc68a136 229\r
672ad671 230 // dprintf("s68k_regs r%2i: [%02x] @ %06x", realsize&~1, a+(realsize&1), SekPcS68k);\r
cc68a136 231\r
232 switch (a) {\r
233 case 0:\r
7a1f6e45 234 return ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state\r
672ad671 235 case 2:\r
2433f409 236 d = (Pico_mcd->s68k_regs[2]<<8) | (Pico_mcd->s68k_regs[3]&0x1f);\r
c008977e 237 //printf("s68k_regs r3: %02x @%06x\n", (u8)d, SekPcS68k);\r
2433f409 238 return s68k_poll_detect(a, d);\r
cc68a136 239 case 6:\r
7a1f6e45 240 return CDC_Read_Reg();\r
cc68a136 241 case 8:\r
7a1f6e45 242 return Read_CDC_Host(1); // Gens returns 0 here on byte reads\r
cc68a136 243 case 0xC:\r
4f265db7 244 d = Pico_mcd->m.timer_stopwatch >> 16;\r
4ff2d527 245 dprintf("s68k stopwatch timer read (%04x)", d);\r
7a1f6e45 246 return d;\r
d1df8786 247 case 0x30:\r
7a1f6e45 248 dprintf("s68k int3 timer read (%02x)", Pico_mcd->s68k_regs[31]);\r
249 return Pico_mcd->s68k_regs[31];\r
cc68a136 250 case 0x34: // fader\r
7a1f6e45 251 return 0; // no busy bit\r
913ef4b7 252 case 0x50: // font data (check: Lunar 2, Silpheed)\r
253 READ_FONT_DATA(0x00100000);\r
7a1f6e45 254 return d;\r
913ef4b7 255 case 0x52:\r
256 READ_FONT_DATA(0x00010000);\r
7a1f6e45 257 return d;\r
913ef4b7 258 case 0x54:\r
259 READ_FONT_DATA(0x10000000);\r
7a1f6e45 260 return d;\r
913ef4b7 261 case 0x56:\r
262 READ_FONT_DATA(0x01000000);\r
7a1f6e45 263 return d;\r
cc68a136 264 }\r
265\r
266 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r
267\r
2433f409 268 if (a >= 0x0e && a < 0x30)\r
269 return s68k_poll_detect(a, d);\r
7a1f6e45 270\r
cc68a136 271 return d;\r
272}\r
273\r
4ff2d527 274#ifndef _ASM_CD_MEMORY_C\r
275static\r
276#endif\r
277void s68k_reg_write8(u32 a, u32 d)\r
cc68a136 278{\r
672ad671 279 //dprintf("s68k_regs w%2i: [%02x] %02x @ %06x", realsize, a, d, SekPcS68k);\r
cc68a136 280\r
48e8482f 281 // Warning: d might have upper bits set\r
cc68a136 282 switch (a) {\r
672ad671 283 case 2:\r
284 return; // only m68k can change WP\r
fa1e5e29 285 case 3: {\r
286 int dold = Pico_mcd->s68k_regs[3];\r
c008977e 287 //printf("s68k_regs w3: %02x @%06x\n", (u8)d, SekPcS68k);\r
672ad671 288 d &= 0x1d;\r
4ff2d527 289 d |= dold&0xc2;\r
d0d47c5b 290 if (d&4) {\r
4ff2d527 291 if ((d ^ dold) & 5) {\r
292 d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit\r
4ff2d527 293 PicoMemResetCD(d);\r
4ff2d527 294 }\r
48e8482f 295#ifdef _ASM_CD_MEMORY_C\r
296 if ((d ^ dold) & 0x1d)\r
297 PicoMemResetCDdecode(d);\r
298#endif\r
fa1e5e29 299 if (!(dold & 4)) {\r
300 dprintf("wram mode 2M->1M");\r
301 wram_2M_to_1M(Pico_mcd->word_ram2M);\r
4ff2d527 302 }\r
d0d47c5b 303 } else {\r
fa1e5e29 304 if (dold & 4) {\r
305 dprintf("wram mode 1M->2M");\r
4ff2d527 306 if (!(d&1)) { // it didn't set the ret bit, which means it doesn't want to give WRAM to m68k\r
307 d &= ~3;\r
308 d |= (dold&1) ? 2 : 1; // then give it to the one which had bank0 in 1M mode\r
309 }\r
fa1e5e29 310 wram_1M_to_2M(Pico_mcd->word_ram2M);\r
4ff2d527 311 PicoMemResetCD(d);\r
4ff2d527 312 }\r
313 else\r
314 d |= dold&1;\r
315 if (d&1) d &= ~2; // return word RAM to m68k in 2M mode\r
d0d47c5b 316 }\r
672ad671 317 break;\r
fa1e5e29 318 }\r
cc68a136 319 case 4:\r
320 dprintf("s68k CDC dest: %x", d&7);\r
321 Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode\r
322 return;\r
323 case 5:\r
c459aefd 324 //dprintf("s68k CDC reg addr: %x", d&0xf);\r
cc68a136 325 break;\r
326 case 7:\r
327 CDC_Write_Reg(d);\r
328 return;\r
329 case 0xa:\r
330 dprintf("s68k set CDC dma addr");\r
331 break;\r
d1df8786 332 case 0xc:\r
4f265db7 333 case 0xd:\r
d1df8786 334 dprintf("s68k set stopwatch timer");\r
4f265db7 335 Pico_mcd->m.timer_stopwatch = 0;\r
336 return;\r
1cd356a3 337 case 0xe:\r
7a1f6e45 338 Pico_mcd->s68k_regs[0xf] = (d>>1) | (d<<7); // ror8 1, Gens note: Dragons lair\r
1cd356a3 339 return;\r
d1df8786 340 case 0x31:\r
4f265db7 341 dprintf("s68k set int3 timer: %02x", d);\r
48e8482f 342 Pico_mcd->m.timer_int3 = (d & 0xff) << 16;\r
d1df8786 343 break;\r
cc68a136 344 case 0x33: // IRQ mask\r
345 dprintf("s68k irq mask: %02x", d);\r
346 if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) {\r
347 CDD_Export_Status();\r
cc68a136 348 }\r
349 break;\r
350 case 0x34: // fader\r
351 Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;\r
352 return;\r
672ad671 353 case 0x36:\r
354 return; // d/m bit is unsetable\r
355 case 0x37: {\r
356 u32 d_old = Pico_mcd->s68k_regs[0x37];\r
357 Pico_mcd->s68k_regs[0x37] = d&7;\r
358 if ((d&4) && !(d_old&4)) {\r
cc68a136 359 CDD_Export_Status();\r
cc68a136 360 }\r
672ad671 361 return;\r
362 }\r
cc68a136 363 case 0x4b:\r
364 Pico_mcd->s68k_regs[a] = (u8) d;\r
365 CDD_Import_Command();\r
366 return;\r
367 }\r
368\r
1cd356a3 369 if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))\r
cc68a136 370 {\r
ca61ee42 371 elprintf(EL_UIO, "s68k FIXME: invalid write @ %02x?", a);\r
cc68a136 372 return;\r
373 }\r
374\r
375 Pico_mcd->s68k_regs[a] = (u8) d;\r
376}\r
377\r
378\r
fa1e5e29 379static u32 OtherRead16End(u32 a, int realsize)\r
cc68a136 380{\r
381 u32 d=0;\r
382\r
0ffefdb8 383#ifndef _ASM_CD_MEMORY_C\r
672ad671 384 if ((a&0xffffc0)==0xa12000) {\r
cb4a513a 385 d=m68k_reg_read16(a);\r
672ad671 386 goto end;\r
387 }\r
cc68a136 388\r
8022f53d 389 if (a==0x400000) {\r
390 if (SRam.data != NULL) d=3; // 64k cart\r
391 goto end;\r
392 }\r
393\r
394 if ((a&0xfe0000)==0x600000) {\r
395 if (SRam.data != NULL) {\r
396 d=SRam.data[((a>>1)&0xffff)+0x2000];\r
397 if (realsize == 8) d|=d<<8;\r
398 }\r
399 goto end;\r
400 }\r
401\r
402 if (a==0x7ffffe) {\r
403 d=Pico_mcd->m.bcram_reg;\r
404 goto end;\r
405 }\r
0ffefdb8 406#endif\r
8022f53d 407\r
ca61ee42 408 elprintf(EL_UIO, "m68k FIXME: unusual r%i: %06x @%06x", realsize&~1, (a&0xfffffe)+(realsize&1), SekPc);\r
cc68a136 409\r
0ffefdb8 410#ifndef _ASM_CD_MEMORY_C\r
cc68a136 411end:\r
0ffefdb8 412#endif\r
cc68a136 413 return d;\r
414}\r
415\r
cc68a136 416\r
fa1e5e29 417static void OtherWrite8End(u32 a, u32 d, int realsize)\r
cc68a136 418{\r
0ffefdb8 419#ifndef _ASM_CD_MEMORY_C\r
cb4a513a 420 if ((a&0xffffc0)==0xa12000) { m68k_reg_write8(a, d); return; }\r
cc68a136 421\r
8022f53d 422 if ((a&0xfe0000)==0x600000) {\r
423 if (SRam.data != NULL && (Pico_mcd->m.bcram_reg&1)) {\r
424 SRam.data[((a>>1)&0xffff)+0x2000]=d;\r
425 SRam.changed = 1;\r
426 }\r
427 return;\r
428 }\r
429\r
430 if (a==0x7fffff) {\r
431 Pico_mcd->m.bcram_reg=d;\r
432 return;\r
433 }\r
0ffefdb8 434#endif\r
8022f53d 435\r
ca61ee42 436 elprintf(EL_UIO, "m68k FIXME: strange w%i: [%06x], %08x @%06x", realsize, a&0xffffff, d, SekPc);\r
cc68a136 437}\r
438\r
0ffefdb8 439#ifndef _ASM_CD_MEMORY_C\r
69996cb7 440#define _CD_MEMORY_C\r
fa1e5e29 441#undef _ASM_MEMORY_C\r
442#include "../MemoryCmn.c"\r
4ff2d527 443#include "cell_map.c"\r
0ffefdb8 444#endif\r
cc68a136 445\r
2433f409 446\r
cc68a136 447// -----------------------------------------------------------------\r
448// Read Rom and read Ram\r
449\r
4ff2d527 450#ifdef _ASM_CD_MEMORY_C\r
0af33fe0 451u32 PicoReadM68k8(u32 a);\r
4ff2d527 452#else\r
81fda4e8 453u32 PicoReadM68k8(u32 a)\r
cc68a136 454{\r
455 u32 d=0;\r
456\r
cc68a136 457 a&=0xffffff;\r
458\r
b542be46 459 switch (a >> 17)\r
460 {\r
461 case 0x00>>1: // BIOS: 000000 - 020000\r
462 d = *(u8 *)(Pico_mcd->bios+(a^1));\r
463 break;\r
464 case 0x02>>1: // prg RAM\r
465 if ((Pico_mcd->m.busreq&3)!=1) {\r
466 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
467 d = *(prg_bank+((a^1)&0x1ffff));\r
468 }\r
469 break;\r
470 case 0x20>>1: // word RAM: 200000 - 220000\r
471 wrdprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);\r
472 a &= 0x1ffff;\r
473 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
474 int bank = Pico_mcd->s68k_regs[3]&1;\r
475 d = Pico_mcd->word_ram1M[bank][a^1];\r
476 } else {\r
477 // allow access in any mode, like Gens does\r
478 d = Pico_mcd->word_ram2M[a^1];\r
479 }\r
480 wrdprintf("ret = %02x", (u8)d);\r
481 break;\r
482 case 0x22>>1: // word RAM: 220000 - 240000\r
483 wrdprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);\r
484 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
485 int bank = Pico_mcd->s68k_regs[3]&1;\r
486 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged\r
487 d = Pico_mcd->word_ram1M[bank][a^1];\r
488 } else {\r
489 // allow access in any mode, like Gens does\r
490 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];\r
491 }\r
492 wrdprintf("ret = %02x", (u8)d);\r
493 break;\r
494 case 0xc0>>1: case 0xc2>>1: case 0xc4>>1: case 0xc6>>1:\r
495 case 0xc8>>1: case 0xca>>1: case 0xcc>>1: case 0xce>>1:\r
496 case 0xd0>>1: case 0xd2>>1: case 0xd4>>1: case 0xd6>>1:\r
497 case 0xd8>>1: case 0xda>>1: case 0xdc>>1: case 0xde>>1:\r
498 // VDP\r
499 if ((a&0xe700e0)==0xc00000) {\r
500 d=PicoVideoRead(a);\r
501 if ((a&1)==0) d>>=8;\r
502 }\r
503 break;\r
504 case 0xe0>>1: case 0xe2>>1: case 0xe4>>1: case 0xe6>>1:\r
505 case 0xe8>>1: case 0xea>>1: case 0xec>>1: case 0xee>>1:\r
506 case 0xf0>>1: case 0xf2>>1: case 0xf4>>1: case 0xf6>>1:\r
507 case 0xf8>>1: case 0xfa>>1: case 0xfc>>1: case 0xfe>>1:\r
508 // RAM:\r
509 d = *(u8 *)(Pico.ram+((a^1)&0xffff));\r
510 break;\r
511 default:\r
512 if ((a&0xff4000)==0xa00000) { d=z80Read8(a); break; } // Z80 Ram\r
513 if ((a&0xffffc0)==0xa12000)\r
514 rdprintf("m68k_regs r8: [%02x] @%06x", a&0x3f, SekPc);\r
cc68a136 515\r
b542be46 516 d=OtherRead16(a&~1, 8|(a&1)); if ((a&1)==0) d>>=8;\r
cc68a136 517\r
b542be46 518 if ((a&0xffffc0)==0xa12000)\r
519 rdprintf("ret = %02x", (u8)d);\r
520 break;\r
d0d47c5b 521 }\r
522\r
cc68a136 523\r
ca61ee42 524 elprintf(EL_IO, "r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);\r
b5e5172d 525#ifdef EMU_CORE_DEBUG\r
526 if (a>=Pico.romsize) {\r
527 lastread_a = a;\r
528 lastread_d[lrp_cyc++&15] = d;\r
529 }\r
cc68a136 530#endif\r
0af33fe0 531 return d;\r
cc68a136 532}\r
4ff2d527 533#endif\r
cc68a136 534\r
ab0607f7 535\r
4ff2d527 536#ifdef _ASM_CD_MEMORY_C\r
0af33fe0 537u32 PicoReadM68k16(u32 a);\r
4ff2d527 538#else\r
0af33fe0 539static u32 PicoReadM68k16(u32 a)\r
cc68a136 540{\r
0af33fe0 541 u32 d=0;\r
cc68a136 542\r
cc68a136 543 a&=0xfffffe;\r
544\r
b542be46 545 switch (a >> 17)\r
546 {\r
547 case 0x00>>1: // BIOS: 000000 - 020000\r
548 d = *(u16 *)(Pico_mcd->bios+a);\r
549 break;\r
550 case 0x02>>1: // prg RAM\r
551 if ((Pico_mcd->m.busreq&3)!=1) {\r
552 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
553 wrdprintf("m68k_prgram r16: [%i,%06x] @%06x", Pico_mcd->s68k_regs[3]>>6, a, SekPc);\r
554 d = *(u16 *)(prg_bank+(a&0x1fffe));\r
555 wrdprintf("ret = %04x", d);\r
556 }\r
557 break;\r
558 case 0x20>>1: // word RAM: 200000 - 220000\r
559 wrdprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);\r
560 a &= 0x1fffe;\r
561 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
562 int bank = Pico_mcd->s68k_regs[3]&1;\r
563 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a);\r
564 } else {\r
565 // allow access in any mode, like Gens does\r
566 d = *(u16 *)(Pico_mcd->word_ram2M+a);\r
567 }\r
568 wrdprintf("ret = %04x", d);\r
569 break;\r
570 case 0x22>>1: // word RAM: 220000 - 240000\r
571 wrdprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);\r
572 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
573 int bank = Pico_mcd->s68k_regs[3]&1;\r
574 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged\r
575 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a);\r
576 } else {\r
577 // allow access in any mode, like Gens does\r
578 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
579 }\r
580 wrdprintf("ret = %04x", d);\r
581 break;\r
582 case 0xc0>>1: case 0xc2>>1: case 0xc4>>1: case 0xc6>>1:\r
583 case 0xc8>>1: case 0xca>>1: case 0xcc>>1: case 0xce>>1:\r
584 case 0xd0>>1: case 0xd2>>1: case 0xd4>>1: case 0xd6>>1:\r
585 case 0xd8>>1: case 0xda>>1: case 0xdc>>1: case 0xde>>1:\r
586 // VDP\r
587 if ((a&0xe700e0)==0xc00000)\r
588 d=PicoVideoRead(a);\r
589 break;\r
590 case 0xe0>>1: case 0xe2>>1: case 0xe4>>1: case 0xe6>>1:\r
591 case 0xe8>>1: case 0xea>>1: case 0xec>>1: case 0xee>>1:\r
592 case 0xf0>>1: case 0xf2>>1: case 0xf4>>1: case 0xf6>>1:\r
593 case 0xf8>>1: case 0xfa>>1: case 0xfc>>1: case 0xfe>>1:\r
594 // RAM:\r
595 d=*(u16 *)(Pico.ram+(a&0xfffe));\r
596 break;\r
597 default:\r
598 if ((a&0xffffc0)==0xa12000)\r
599 rdprintf("m68k_regs r16: [%02x] @%06x", a&0x3f, SekPc);\r
cc68a136 600\r
b542be46 601 d = OtherRead16(a, 16);\r
cc68a136 602\r
b542be46 603 if ((a&0xffffc0)==0xa12000)\r
604 rdprintf("ret = %04x", d);\r
605 break;\r
d0d47c5b 606 }\r
607\r
cc68a136 608\r
ca61ee42 609 elprintf(EL_IO, "r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
b5e5172d 610#ifdef EMU_CORE_DEBUG\r
611 if (a>=Pico.romsize) {\r
612 lastread_a = a;\r
613 lastread_d[lrp_cyc++&15] = d;\r
614 }\r
cc68a136 615#endif\r
616 return d;\r
617}\r
4ff2d527 618#endif\r
cc68a136 619\r
ab0607f7 620\r
4ff2d527 621#ifdef _ASM_CD_MEMORY_C\r
622u32 PicoReadM68k32(u32 a);\r
623#else\r
624static u32 PicoReadM68k32(u32 a)\r
cc68a136 625{\r
626 u32 d=0;\r
627\r
cc68a136 628 a&=0xfffffe;\r
629\r
b542be46 630 switch (a >> 17)\r
631 {\r
632 case 0x00>>1: { // BIOS: 000000 - 020000\r
633 u16 *pm=(u16 *)(Pico_mcd->bios+a);\r
634 d = (pm[0]<<16)|pm[1];\r
635 break;\r
636 }\r
637 case 0x02>>1: // prg RAM\r
638 if ((Pico_mcd->m.busreq&3)!=1) {\r
639 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
640 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));\r
641 d = (pm[0]<<16)|pm[1];\r
642 }\r
643 break;\r
644 case 0x20>>1: // word RAM: 200000 - 220000\r
645 wrdprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);\r
646 a&=0x1fffe;\r
647 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
648 int bank = Pico_mcd->s68k_regs[3]&1;\r
649 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+a);\r
650 d = (pm[0]<<16)|pm[1];\r
651 } else {\r
652 // allow access in any mode, like Gens does\r
653 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+a);\r
654 d = (pm[0]<<16)|pm[1];\r
655 }\r
656 wrdprintf("ret = %08x", d);\r
657 break;\r
658 case 0x22>>1: // word RAM: 220000 - 240000\r
659 wrdprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);\r
660 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode, cell arranged?\r
fa1e5e29 661 u32 a1, a2;\r
b542be46 662 int bank = Pico_mcd->s68k_regs[3]&1;\r
fa1e5e29 663 a1 = (a&2) | (cell_map(a >> 2) << 2);\r
4ff2d527 664 if (a&2) a2 = cell_map((a+2) >> 2) << 2;\r
665 else a2 = a1 + 2;\r
666 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) << 16;\r
667 d |= *(u16 *)(Pico_mcd->word_ram1M[bank]+a2);\r
bf098bc5 668 } else {\r
b542be46 669 // allow access in any mode, like Gens does\r
670 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
671 d = (pm[0]<<16)|pm[1];\r
bf098bc5 672 }\r
b542be46 673 wrdprintf("ret = %08x", d);\r
674 break;\r
675 case 0xc0>>1: case 0xc2>>1: case 0xc4>>1: case 0xc6>>1:\r
676 case 0xc8>>1: case 0xca>>1: case 0xcc>>1: case 0xce>>1:\r
677 case 0xd0>>1: case 0xd2>>1: case 0xd4>>1: case 0xd6>>1:\r
678 case 0xd8>>1: case 0xda>>1: case 0xdc>>1: case 0xde>>1:\r
679 // VDP\r
680 d = (PicoVideoRead(a)<<16)|PicoVideoRead(a+2);\r
681 break;\r
682 case 0xe0>>1: case 0xe2>>1: case 0xe4>>1: case 0xe6>>1:\r
683 case 0xe8>>1: case 0xea>>1: case 0xec>>1: case 0xee>>1:\r
684 case 0xf0>>1: case 0xf2>>1: case 0xf4>>1: case 0xf6>>1:\r
685 case 0xf8>>1: case 0xfa>>1: case 0xfc>>1: case 0xfe>>1: {\r
686 // RAM:\r
687 u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));\r
688 d = (pm[0]<<16)|pm[1];\r
689 break;\r
d0d47c5b 690 }\r
b542be46 691 default:\r
692 if ((a&0xffffc0)==0xa12000)\r
693 rdprintf("m68k_regs r32: [%02x] @%06x", a&0x3f, SekPc);\r
d0d47c5b 694\r
b542be46 695 d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);\r
672ad671 696\r
b542be46 697 if ((a&0xffffc0)==0xa12000)\r
698 rdprintf("ret = %08x", d);\r
699 break;\r
700 }\r
cc68a136 701\r
672ad671 702\r
ca61ee42 703 elprintf(EL_IO, "r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r
b5e5172d 704#ifdef EMU_CORE_DEBUG\r
705 if (a>=Pico.romsize) {\r
706 lastread_a = a;\r
707 lastread_d[lrp_cyc++&15] = d;\r
708 }\r
cc68a136 709#endif\r
710 return d;\r
711}\r
4ff2d527 712#endif\r
cc68a136 713\r
ab0607f7 714\r
cc68a136 715// -----------------------------------------------------------------\r
cc68a136 716\r
4ff2d527 717#ifdef _ASM_CD_MEMORY_C\r
718void PicoWriteM68k8(u32 a,u8 d);\r
719#else\r
81fda4e8 720void PicoWriteM68k8(u32 a,u8 d)\r
cc68a136 721{\r
ca61ee42 722 elprintf(EL_IO, "w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
b5e5172d 723#ifdef EMU_CORE_DEBUG\r
724 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
725#endif\r
cc68a136 726\r
ab0607f7 727 if ((a&0xe00000)==0xe00000) { // Ram\r
728 *(u8 *)(Pico.ram+((a^1)&0xffff)) = d;\r
729 return;\r
730 }\r
cc68a136 731\r
cc68a136 732 // prg RAM\r
721cd396 733 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {\r
672ad671 734 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
bf098bc5 735 *(u8 *)(prg_bank+((a^1)&0x1ffff))=d;\r
cc68a136 736 return;\r
737 }\r
738\r
b542be46 739 a&=0xffffff;\r
740\r
d0d47c5b 741 // word RAM\r
742 if ((a&0xfc0000)==0x200000) {\r
913ef4b7 743 wrdprintf("m68k_wram w8: [%06x] %02x @%06x", a, d, SekPc);\r
d0d47c5b 744 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
fa1e5e29 745 int bank = Pico_mcd->s68k_regs[3]&1;\r
746 if (a >= 0x220000)\r
747 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged\r
748 else a &= 0x1ffff;\r
749 *(u8 *)(Pico_mcd->word_ram1M[bank]+(a^1))=d;\r
d0d47c5b 750 } else {\r
751 // allow access in any mode, like Gens does\r
fa1e5e29 752 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;\r
d0d47c5b 753 }\r
754 return;\r
755 }\r
756\r
2433f409 757 if ((a&0xffffc0)==0xa12000) {\r
c459aefd 758 rdprintf("m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);\r
2433f409 759 m68k_reg_write8(a, d);\r
760 return;\r
761 }\r
672ad671 762\r
fb9bec94 763 OtherWrite8(a,d);\r
cc68a136 764}\r
4ff2d527 765#endif\r
cc68a136 766\r
ab0607f7 767\r
4ff2d527 768#ifdef _ASM_CD_MEMORY_C\r
769void PicoWriteM68k16(u32 a,u16 d);\r
770#else\r
771static void PicoWriteM68k16(u32 a,u16 d)\r
cc68a136 772{\r
ca61ee42 773 elprintf(EL_IO, "w16: %06x, %04x", a&0xffffff, d);\r
b5e5172d 774#ifdef EMU_CORE_DEBUG\r
775 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
776#endif\r
cc68a136 777\r
ab0607f7 778 if ((a&0xe00000)==0xe00000) { // Ram\r
779 *(u16 *)(Pico.ram+(a&0xfffe))=d;\r
780 return;\r
781 }\r
cc68a136 782\r
cc68a136 783 // prg RAM\r
721cd396 784 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {\r
672ad671 785 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
c008977e 786 wrdprintf("m68k_prgram w16: [%i,%06x] %04x @%06x", Pico_mcd->s68k_regs[3]>>6, a, d, SekPc);\r
cc68a136 787 *(u16 *)(prg_bank+(a&0x1fffe))=d;\r
788 return;\r
789 }\r
790\r
b542be46 791 a&=0xfffffe;\r
792\r
d0d47c5b 793 // word RAM\r
794 if ((a&0xfc0000)==0x200000) {\r
913ef4b7 795 wrdprintf("m68k_wram w16: [%06x] %04x @%06x", a, d, SekPc);\r
d0d47c5b 796 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
fa1e5e29 797 int bank = Pico_mcd->s68k_regs[3]&1;\r
798 if (a >= 0x220000)\r
799 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged\r
800 else a &= 0x1fffe;\r
801 *(u16 *)(Pico_mcd->word_ram1M[bank]+a)=d;\r
d0d47c5b 802 } else {\r
803 // allow access in any mode, like Gens does\r
fa1e5e29 804 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;\r
d0d47c5b 805 }\r
806 return;\r
807 }\r
808\r
7a1f6e45 809 // regs\r
810 if ((a&0xffffc0)==0xa12000) {\r
c459aefd 811 rdprintf("m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);\r
7a1f6e45 812 if (a == 0xe) { // special case, 2 byte writes would be handled differently\r
813 Pico_mcd->s68k_regs[0xe] = d >> 8;\r
814#ifdef USE_POLL_DETECT\r
815 if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {\r
6cadc2da 816 SekSetStopS68k(0); s68k_poll_adclk = 0;\r
8f8fe01e 817 elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r
7a1f6e45 818 }\r
819#endif\r
820 return;\r
821 }\r
822 m68k_reg_write8(a, d>>8);\r
823 m68k_reg_write8(a+1,d&0xff);\r
824 return;\r
825 }\r
cc68a136 826\r
b542be46 827 // VDP\r
828 if ((a&0xe700e0)==0xc00000) {\r
829 PicoVideoWrite(a,(u16)d);\r
830 return;\r
831 }\r
832\r
cc68a136 833 OtherWrite16(a,d);\r
834}\r
4ff2d527 835#endif\r
cc68a136 836\r
ab0607f7 837\r
4ff2d527 838#ifdef _ASM_CD_MEMORY_C\r
839void PicoWriteM68k32(u32 a,u32 d);\r
840#else\r
841static void PicoWriteM68k32(u32 a,u32 d)\r
cc68a136 842{\r
ca61ee42 843 elprintf(EL_IO, "w32: %06x, %08x", a&0xffffff, d);\r
b5e5172d 844#ifdef EMU_CORE_DEBUG\r
845 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
846#endif\r
cc68a136 847\r
848 if ((a&0xe00000)==0xe00000)\r
849 {\r
850 // Ram:\r
851 u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));\r
852 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
853 return;\r
854 }\r
855\r
cc68a136 856 // prg RAM\r
721cd396 857 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {\r
672ad671 858 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
cc68a136 859 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));\r
860 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
861 return;\r
862 }\r
863\r
b542be46 864 a&=0xfffffe;\r
865\r
672ad671 866 // word RAM\r
d0d47c5b 867 if ((a&0xfc0000)==0x200000) {\r
868 if (d != 0) // don't log clears\r
913ef4b7 869 wrdprintf("m68k_wram w32: [%06x] %08x @%06x", a, d, SekPc);\r
d0d47c5b 870 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
fa1e5e29 871 int bank = Pico_mcd->s68k_regs[3]&1;\r
872 if (a >= 0x220000) { // cell arranged\r
873 u32 a1, a2;\r
874 a1 = (a&2) | (cell_map(a >> 2) << 2);\r
4ff2d527 875 if (a&2) a2 = cell_map((a+2) >> 2) << 2;\r
876 else a2 = a1 + 2;\r
877 *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) = d >> 16;\r
878 *(u16 *)(Pico_mcd->word_ram1M[bank]+a2) = d;\r
bf098bc5 879 } else {\r
fa1e5e29 880 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
881 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
bf098bc5 882 }\r
d0d47c5b 883 } else {\r
884 // allow access in any mode, like Gens does\r
fa1e5e29 885 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
d0d47c5b 886 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
887 }\r
672ad671 888 return;\r
d0d47c5b 889 }\r
672ad671 890\r
2433f409 891 if ((a&0xffffc0)==0xa12000) {\r
c459aefd 892 rdprintf("m68k_regs w32: [%02x] %08x @%06x", a&0x3f, d, SekPc);\r
2433f409 893 if ((a&0x3e) == 0xe) dprintf("m68k FIXME: w32 [%02x]", a&0x3f);\r
894 }\r
cc68a136 895\r
b542be46 896 // VDP\r
897 if ((a&0xe700e0)==0xc00000)\r
898 {\r
899 PicoVideoWrite(a, (u16)(d>>16));\r
900 PicoVideoWrite(a+2,(u16)d);\r
901 return;\r
902 }\r
903\r
cc68a136 904 OtherWrite16(a, (u16)(d>>16));\r
905 OtherWrite16(a+2,(u16)d);\r
906}\r
4ff2d527 907#endif\r
cc68a136 908\r
909\r
721cd396 910// -----------------------------------------------------------------\r
911// S68k\r
cc68a136 912// -----------------------------------------------------------------\r
913\r
4ff2d527 914#ifdef _ASM_CD_MEMORY_C\r
0af33fe0 915u32 PicoReadS68k8(u32 a);\r
4ff2d527 916#else\r
0af33fe0 917static u32 PicoReadS68k8(u32 a)\r
cc68a136 918{\r
919 u32 d=0;\r
920\r
b5e5172d 921#ifdef EMU_CORE_DEBUG\r
922 u32 ab=a&0xfffffe;\r
923#endif\r
cc68a136 924 a&=0xffffff;\r
925\r
926 // prg RAM\r
927 if (a < 0x80000) {\r
928 d = *(Pico_mcd->prg_ram+(a^1));\r
929 goto end;\r
930 }\r
931\r
932 // regs\r
933 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 934 a &= 0x1ff;\r
935 rdprintf("s68k_regs r8: [%02x] @ %06x", a, SekPcS68k);\r
2433f409 936 if (a >= 0x0e && a < 0x30) {\r
937 d = Pico_mcd->s68k_regs[a];\r
938 s68k_poll_detect(a, d);\r
939 rdprintf("ret = %02x", (u8)d);\r
940 goto end;\r
941 }\r
942 else if (a >= 0x58 && a < 0x68)\r
cb4a513a 943 d = gfx_cd_read(a&~1);\r
944 else d = s68k_reg_read16(a&~1);\r
945 if ((a&1)==0) d>>=8;\r
c459aefd 946 rdprintf("ret = %02x", (u8)d);\r
cc68a136 947 goto end;\r
948 }\r
949\r
d0d47c5b 950 // word RAM (2M area)\r
951 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
fa1e5e29 952 // test: batman returns\r
913ef4b7 953 wrdprintf("s68k_wram2M r8: [%06x] @%06x", a, SekPcS68k);\r
fa1e5e29 954 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
3aa1e148 955 int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 956 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];\r
957 if (a&1) d &= 0x0f;\r
958 else d >>= 4;\r
d0d47c5b 959 } else {\r
960 // allow access in any mode, like Gens does\r
fa1e5e29 961 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];\r
d0d47c5b 962 }\r
913ef4b7 963 wrdprintf("ret = %02x", (u8)d);\r
d0d47c5b 964 goto end;\r
965 }\r
966\r
967 // word RAM (1M area)\r
68cba51e 968 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
fa1e5e29 969 int bank;\r
913ef4b7 970 wrdprintf("s68k_wram1M r8: [%06x] @%06x", a, SekPcS68k);\r
68cba51e 971// if (!(Pico_mcd->s68k_regs[3]&4))\r
972// dprintf("s68k_wram1M FIXME: wrong mode");\r
3aa1e148 973 bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 974 d = Pico_mcd->word_ram1M[bank][(a^1)&0x1ffff];\r
913ef4b7 975 wrdprintf("ret = %02x", (u8)d);\r
d0d47c5b 976 goto end;\r
977 }\r
978\r
4f265db7 979 // PCM\r
980 if ((a&0xff8000)==0xff0000) {\r
ca61ee42 981 elprintf(EL_IO, "s68k_pcm r8: [%06x] @%06x", a, SekPcS68k);\r
4f265db7 982 a &= 0x7fff;\r
983 if (a >= 0x2000)\r
984 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];\r
985 else if (a >= 0x20) {\r
986 a &= 0x1e;\r
987 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r
988 if (a & 2) d >>= 8;\r
989 }\r
ca61ee42 990 elprintf(EL_IO, "ret = %02x", (u8)d);\r
4f265db7 991 goto end;\r
992 }\r
993\r
ab0607f7 994 // bram\r
995 if ((a&0xff0000)==0xfe0000) {\r
996 d = Pico_mcd->bram[(a>>1)&0x1fff];\r
997 goto end;\r
998 }\r
999\r
ca61ee42 1000 elprintf(EL_UIO, "s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);\r
cc68a136 1001\r
1002 end:\r
1003\r
ca61ee42 1004 elprintf(EL_IO, "s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);\r
b5e5172d 1005#ifdef EMU_CORE_DEBUG\r
1006 lastread_a = ab;\r
1007 lastread_d[lrp_cyc++&15] = d;\r
cc68a136 1008#endif\r
0af33fe0 1009 return d;\r
cc68a136 1010}\r
4ff2d527 1011#endif\r
cc68a136 1012\r
ab0607f7 1013\r
4ff2d527 1014#ifdef _ASM_CD_MEMORY_C\r
0af33fe0 1015u32 PicoReadS68k16(u32 a);\r
4ff2d527 1016#else\r
0af33fe0 1017static u32 PicoReadS68k16(u32 a)\r
cc68a136 1018{\r
4f265db7 1019 u32 d=0;\r
cc68a136 1020\r
b5e5172d 1021#ifdef EMU_CORE_DEBUG\r
1022 u32 ab=a&0xfffffe;\r
1023#endif\r
cc68a136 1024 a&=0xfffffe;\r
1025\r
1026 // prg RAM\r
1027 if (a < 0x80000) {\r
c008977e 1028 wrdprintf("s68k_prgram r16: [%06x] @%06x", a, SekPcS68k);\r
cc68a136 1029 d = *(u16 *)(Pico_mcd->prg_ram+a);\r
c008977e 1030 wrdprintf("ret = %04x", d);\r
cc68a136 1031 goto end;\r
1032 }\r
1033\r
1034 // regs\r
1035 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 1036 a &= 0x1fe;\r
1037 rdprintf("s68k_regs r16: [%02x] @ %06x", a, SekPcS68k);\r
913ef4b7 1038 if (a >= 0x58 && a < 0x68)\r
cb4a513a 1039 d = gfx_cd_read(a);\r
1040 else d = s68k_reg_read16(a);\r
c459aefd 1041 rdprintf("ret = %04x", d);\r
cc68a136 1042 goto end;\r
1043 }\r
1044\r
d0d47c5b 1045 // word RAM (2M area)\r
1046 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
913ef4b7 1047 wrdprintf("s68k_wram2M r16: [%06x] @%06x", a, SekPcS68k);\r
fa1e5e29 1048 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
3aa1e148 1049 int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1050 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];\r
1051 d |= d << 4; d &= ~0xf0;\r
d0d47c5b 1052 } else {\r
1053 // allow access in any mode, like Gens does\r
fa1e5e29 1054 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
d0d47c5b 1055 }\r
913ef4b7 1056 wrdprintf("ret = %04x", d);\r
d0d47c5b 1057 goto end;\r
1058 }\r
1059\r
1060 // word RAM (1M area)\r
68cba51e 1061 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
fa1e5e29 1062 int bank;\r
913ef4b7 1063 wrdprintf("s68k_wram1M r16: [%06x] @%06x", a, SekPcS68k);\r
68cba51e 1064// if (!(Pico_mcd->s68k_regs[3]&4))\r
1065// dprintf("s68k_wram1M FIXME: wrong mode");\r
3aa1e148 1066 bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1067 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
913ef4b7 1068 wrdprintf("ret = %04x", d);\r
ab0607f7 1069 goto end;\r
1070 }\r
1071\r
1072 // bram\r
1073 if ((a&0xff0000)==0xfe0000) {\r
4ff2d527 1074 dprintf("FIXME: s68k_bram r16: [%06x] @%06x", a, SekPcS68k);\r
ab0607f7 1075 a = (a>>1)&0x1fff;\r
4f265db7 1076 d = Pico_mcd->bram[a++]; // Gens does little endian here, and so do we..\r
4ff2d527 1077 d|= Pico_mcd->bram[a++] << 8; // This is most likely wrong\r
ab0607f7 1078 dprintf("ret = %04x", d);\r
d0d47c5b 1079 goto end;\r
1080 }\r
1081\r
4f265db7 1082 // PCM\r
1083 if ((a&0xff8000)==0xff0000) {\r
4ff2d527 1084 dprintf("FIXME: s68k_pcm r16: [%06x] @%06x", a, SekPcS68k);\r
4f265db7 1085 a &= 0x7fff;\r
1086 if (a >= 0x2000)\r
1087 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];\r
1088 else if (a >= 0x20) {\r
1089 a &= 0x1e;\r
1090 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r
1091 if (a & 2) d >>= 8;\r
1092 }\r
1093 dprintf("ret = %04x", d);\r
1094 goto end;\r
1095 }\r
1096\r
ca61ee42 1097 elprintf(EL_UIO, "s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
cc68a136 1098\r
1099 end:\r
1100\r
ca61ee42 1101 elprintf(EL_IO, "s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
b5e5172d 1102#ifdef EMU_CORE_DEBUG\r
1103 lastread_a = ab;\r
1104 lastread_d[lrp_cyc++&15] = d;\r
cc68a136 1105#endif\r
1106 return d;\r
1107}\r
4ff2d527 1108#endif\r
cc68a136 1109\r
ab0607f7 1110\r
4ff2d527 1111#ifdef _ASM_CD_MEMORY_C\r
1112u32 PicoReadS68k32(u32 a);\r
1113#else\r
1114static u32 PicoReadS68k32(u32 a)\r
cc68a136 1115{\r
1116 u32 d=0;\r
1117\r
b5e5172d 1118#ifdef EMU_CORE_DEBUG\r
1119 u32 ab=a&0xfffffe;\r
1120#endif\r
cc68a136 1121 a&=0xfffffe;\r
1122\r
1123 // prg RAM\r
1124 if (a < 0x80000) {\r
1125 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);\r
1126 d = (pm[0]<<16)|pm[1];\r
1127 goto end;\r
1128 }\r
1129\r
1130 // regs\r
1131 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 1132 a &= 0x1fe;\r
1133 rdprintf("s68k_regs r32: [%02x] @ %06x", a, SekPcS68k);\r
913ef4b7 1134 if (a >= 0x58 && a < 0x68)\r
cb4a513a 1135 d = (gfx_cd_read(a)<<16)|gfx_cd_read(a+2);\r
1136 else d = (s68k_reg_read16(a)<<16)|s68k_reg_read16(a+2);\r
c459aefd 1137 rdprintf("ret = %08x", d);\r
cc68a136 1138 goto end;\r
1139 }\r
1140\r
d0d47c5b 1141 // word RAM (2M area)\r
1142 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
913ef4b7 1143 wrdprintf("s68k_wram2M r32: [%06x] @%06x", a, SekPcS68k);\r
fa1e5e29 1144 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
3aa1e148 1145 int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1146 a >>= 1;\r
1147 d = Pico_mcd->word_ram1M[bank][((a+0)^1)&0x1ffff] << 16;\r
1148 d |= Pico_mcd->word_ram1M[bank][((a+1)^1)&0x1ffff];\r
1149 d |= d << 4; d &= 0x0f0f0f0f;\r
d0d47c5b 1150 } else {\r
1151 // allow access in any mode, like Gens does\r
fa1e5e29 1152 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];\r
d0d47c5b 1153 }\r
913ef4b7 1154 wrdprintf("ret = %08x", d);\r
d0d47c5b 1155 goto end;\r
1156 }\r
1157\r
1158 // word RAM (1M area)\r
68cba51e 1159 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
fa1e5e29 1160 int bank;\r
913ef4b7 1161 wrdprintf("s68k_wram1M r32: [%06x] @%06x", a, SekPcS68k);\r
68cba51e 1162// if (!(Pico_mcd->s68k_regs[3]&4))\r
1163// dprintf("s68k_wram1M FIXME: wrong mode");\r
3aa1e148 1164 bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1165 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];\r
913ef4b7 1166 wrdprintf("ret = %08x", d);\r
ab0607f7 1167 goto end;\r
1168 }\r
1169\r
4f265db7 1170 // PCM\r
1171 if ((a&0xff8000)==0xff0000) {\r
2433f409 1172 dprintf("s68k_pcm r32: [%06x] @%06x", a, SekPcS68k);\r
4f265db7 1173 a &= 0x7fff;\r
1174 if (a >= 0x2000) {\r
1175 a >>= 1;\r
1176 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] << 16;\r
1177 d |= Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff];\r
1178 } else if (a >= 0x20) {\r
1179 a &= 0x1e;\r
1180 if (a & 2) {\r
1181 a >>= 2;\r
1182 d = (Pico_mcd->pcm.ch[a].addr >> (PCM_STEP_SHIFT-8)) & 0xff0000;\r
1183 d |= (Pico_mcd->pcm.ch[(a+1)&7].addr >> PCM_STEP_SHIFT) & 0xff;\r
1184 } else {\r
1185 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r
1186 d = ((d<<16)&0xff0000) | ((d>>8)&0xff); // PCM chip is LE\r
1187 }\r
1188 }\r
1189 dprintf("ret = %08x", d);\r
1190 goto end;\r
1191 }\r
1192\r
ab0607f7 1193 // bram\r
1194 if ((a&0xff0000)==0xfe0000) {\r
4ff2d527 1195 dprintf("FIXME: s68k_bram r32: [%06x] @%06x", a, SekPcS68k);\r
ab0607f7 1196 a = (a>>1)&0x1fff;\r
1197 d = Pico_mcd->bram[a++] << 16; // middle endian? TODO: verify against Fusion..\r
1198 d|= Pico_mcd->bram[a++] << 24;\r
1199 d|= Pico_mcd->bram[a++];\r
1200 d|= Pico_mcd->bram[a++] << 8;\r
1201 dprintf("ret = %08x", d);\r
d0d47c5b 1202 goto end;\r
1203 }\r
1204\r
ca61ee42 1205 elprintf(EL_UIO, "s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
cc68a136 1206\r
1207 end:\r
1208\r
ca61ee42 1209 elprintf(EL_IO, "s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
b5e5172d 1210#ifdef EMU_CORE_DEBUG\r
1211 if (ab > 0x78) { // not vectors and stuff\r
1212 lastread_a = ab;\r
1213 lastread_d[lrp_cyc++&15] = d;\r
1214 }\r
cc68a136 1215#endif\r
1216 return d;\r
1217}\r
4ff2d527 1218#endif\r
cc68a136 1219\r
ab0607f7 1220\r
a4030801 1221#ifndef _ASM_CD_MEMORY_C\r
0a051f55 1222/* check: jaguar xj 220 (draws entire world using decode) */\r
1223static void decode_write8(u32 a, u8 d, int r3)\r
1224{\r
3aa1e148 1225 u8 *pd = Pico_mcd->word_ram1M[(r3 & 1)^1] + (((a>>1)^1)&0x1ffff);\r
0a051f55 1226 u8 oldmask = (a&1) ? 0xf0 : 0x0f;\r
1227\r
0a051f55 1228 r3 &= 0x18;\r
1229 d &= 0x0f;\r
1230 if (!(a&1)) d <<= 4;\r
1231\r
0a051f55 1232 if (r3 == 8) {\r
1233 if ((!(*pd & (~oldmask))) && d) goto do_it;\r
1234 } else if (r3 > 8) {\r
1235 if (d) goto do_it;\r
1236 } else {\r
1237 goto do_it;\r
1238 }\r
1239\r
1240 return;\r
1241do_it:\r
1242 *pd = d | (*pd & oldmask);\r
1243}\r
1244\r
1245\r
1246static void decode_write16(u32 a, u16 d, int r3)\r
1247{\r
3aa1e148 1248 u8 *pd = Pico_mcd->word_ram1M[(r3 & 1)^1] + (((a>>1)^1)&0x1ffff);\r
0a051f55 1249\r
1250 //if ((a & 0x3ffff) < 0x28000) return;\r
1251\r
1252 r3 &= 0x18;\r
1253 d &= 0x0f0f;\r
1254 d |= d >> 4;\r
1255\r
1256 if (r3 == 8) {\r
1257 u8 dold = *pd;\r
1258 if (!(dold & 0xf0)) dold |= d & 0xf0;\r
1259 if (!(dold & 0x0f)) dold |= d & 0x0f;\r
1260 *pd = dold;\r
1261 } else if (r3 > 8) {\r
1262 u8 dold = *pd;\r
1263 if (!(d & 0xf0)) d |= dold & 0xf0;\r
1264 if (!(d & 0x0f)) d |= dold & 0x0f;\r
1265 *pd = d;\r
1266 } else {\r
1267 *pd = d;\r
1268 }\r
0a051f55 1269}\r
a4030801 1270#endif\r
0a051f55 1271\r
cc68a136 1272// -----------------------------------------------------------------\r
1273\r
4ff2d527 1274#ifdef _ASM_CD_MEMORY_C\r
1275void PicoWriteS68k8(u32 a,u8 d);\r
1276#else\r
1277static void PicoWriteS68k8(u32 a,u8 d)\r
cc68a136 1278{\r
ca61ee42 1279 elprintf(EL_IO, "s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);\r
cc68a136 1280\r
1281 a&=0xffffff;\r
1282\r
b5e5172d 1283#ifdef EMU_CORE_DEBUG\r
1284 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
1285#endif\r
1286\r
cc68a136 1287 // prg RAM\r
1288 if (a < 0x80000) {\r
1289 u8 *pm=(u8 *)(Pico_mcd->prg_ram+(a^1));\r
721cd396 1290 if (a >= (Pico_mcd->s68k_regs[2]<<8)) *pm=d;\r
cc68a136 1291 return;\r
1292 }\r
1293\r
1294 // regs\r
1295 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 1296 a &= 0x1ff;\r
1297 rdprintf("s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k);\r
913ef4b7 1298 if (a >= 0x58 && a < 0x68)\r
48e8482f 1299 gfx_cd_write16(a&~1, (d<<8)|d);\r
cb4a513a 1300 else s68k_reg_write8(a,d);\r
cc68a136 1301 return;\r
1302 }\r
1303\r
d0d47c5b 1304 // word RAM (2M area)\r
1305 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
0a051f55 1306 int r3 = Pico_mcd->s68k_regs[3];\r
913ef4b7 1307 wrdprintf("s68k_wram2M w8: [%06x] %02x @%06x", a, d, SekPcS68k);\r
0a051f55 1308 if (r3 & 4) { // 1M decode mode?\r
1309 decode_write8(a, d, r3);\r
d0d47c5b 1310 } else {\r
1311 // allow access in any mode, like Gens does\r
fa1e5e29 1312 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;\r
d0d47c5b 1313 }\r
1314 return;\r
1315 }\r
1316\r
1317 // word RAM (1M area)\r
68cba51e 1318 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
1319 // Wing Commander tries to write here in wrong mode\r
fa1e5e29 1320 int bank;\r
d0d47c5b 1321 if (d)\r
913ef4b7 1322 wrdprintf("s68k_wram1M w8: [%06x] %02x @%06x", a, d, SekPcS68k);\r
68cba51e 1323// if (!(Pico_mcd->s68k_regs[3]&4))\r
1324// dprintf("s68k_wram1M FIXME: wrong mode");\r
3aa1e148 1325 bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1326 *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff))=d;\r
d0d47c5b 1327 return;\r
1328 }\r
1329\r
4f265db7 1330 // PCM\r
1331 if ((a&0xff8000)==0xff0000) {\r
1332 a &= 0x7fff;\r
1333 if (a >= 0x2000)\r
1334 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;\r
1335 else if (a < 0x12)\r
1336 pcm_write(a>>1, d);\r
1337 return;\r
1338 }\r
1339\r
ab0607f7 1340 // bram\r
1341 if ((a&0xff0000)==0xfe0000) {\r
1342 Pico_mcd->bram[(a>>1)&0x1fff] = d;\r
1343 SRam.changed = 1;\r
1344 return;\r
1345 }\r
1346\r
ca61ee42 1347 elprintf(EL_UIO, "s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);\r
cc68a136 1348}\r
4ff2d527 1349#endif\r
cc68a136 1350\r
ab0607f7 1351\r
4ff2d527 1352#ifdef _ASM_CD_MEMORY_C\r
1353void PicoWriteS68k16(u32 a,u16 d);\r
1354#else\r
1355static void PicoWriteS68k16(u32 a,u16 d)\r
cc68a136 1356{\r
ca61ee42 1357 elprintf(EL_IO, "s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
cc68a136 1358\r
1359 a&=0xfffffe;\r
1360\r
b5e5172d 1361#ifdef EMU_CORE_DEBUG\r
1362 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
1363#endif\r
1364\r
cc68a136 1365 // prg RAM\r
1366 if (a < 0x80000) {\r
c008977e 1367 wrdprintf("s68k_prgram w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
721cd396 1368 if (a >= (Pico_mcd->s68k_regs[2]<<8)) // needed for Dungeon Explorer\r
1369 *(u16 *)(Pico_mcd->prg_ram+a)=d;\r
cc68a136 1370 return;\r
1371 }\r
1372\r
1373 // regs\r
1374 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 1375 a &= 0x1fe;\r
1376 rdprintf("s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k);\r
913ef4b7 1377 if (a >= 0x58 && a < 0x68)\r
48e8482f 1378 gfx_cd_write16(a, d);\r
cb4a513a 1379 else {\r
1cd356a3 1380 if (a == 0xe) { // special case, 2 byte writes would be handled differently\r
1381 Pico_mcd->s68k_regs[0xf] = d;\r
4ff2d527 1382 return;\r
1cd356a3 1383 }\r
cb4a513a 1384 s68k_reg_write8(a, d>>8);\r
1385 s68k_reg_write8(a+1,d&0xff);\r
1386 }\r
cc68a136 1387 return;\r
1388 }\r
1389\r
d0d47c5b 1390 // word RAM (2M area)\r
1391 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
0a051f55 1392 int r3 = Pico_mcd->s68k_regs[3];\r
913ef4b7 1393 wrdprintf("s68k_wram2M w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
0a051f55 1394 if (r3 & 4) { // 1M decode mode?\r
1395 decode_write16(a, d, r3);\r
d0d47c5b 1396 } else {\r
1397 // allow access in any mode, like Gens does\r
fa1e5e29 1398 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;\r
d0d47c5b 1399 }\r
1400 return;\r
1401 }\r
1402\r
1403 // word RAM (1M area)\r
68cba51e 1404 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
fa1e5e29 1405 int bank;\r
d0d47c5b 1406 if (d)\r
913ef4b7 1407 wrdprintf("s68k_wram1M w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
68cba51e 1408// if (!(Pico_mcd->s68k_regs[3]&4))\r
1409// dprintf("s68k_wram1M FIXME: wrong mode");\r
3aa1e148 1410 bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1411 *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe))=d;\r
d0d47c5b 1412 return;\r
1413 }\r
1414\r
4f265db7 1415 // PCM\r
1416 if ((a&0xff8000)==0xff0000) {\r
1417 a &= 0x7fff;\r
1418 if (a >= 0x2000)\r
1419 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;\r
1420 else if (a < 0x12)\r
1421 pcm_write(a>>1, d & 0xff);\r
1422 return;\r
1423 }\r
1424\r
ab0607f7 1425 // bram\r
1426 if ((a&0xff0000)==0xfe0000) {\r
1cd356a3 1427 dprintf("s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
ab0607f7 1428 a = (a>>1)&0x1fff;\r
1429 Pico_mcd->bram[a++] = d; // Gens does little endian here, an so do we..\r
1430 Pico_mcd->bram[a++] = d >> 8;\r
1431 SRam.changed = 1;\r
1432 return;\r
1433 }\r
1434\r
ca61ee42 1435 elprintf(EL_UIO, "s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
cc68a136 1436}\r
4ff2d527 1437#endif\r
cc68a136 1438\r
ab0607f7 1439\r
4ff2d527 1440#ifdef _ASM_CD_MEMORY_C\r
1441void PicoWriteS68k32(u32 a,u32 d);\r
1442#else\r
1443static void PicoWriteS68k32(u32 a,u32 d)\r
cc68a136 1444{\r
ca61ee42 1445 elprintf(EL_IO, "s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
cc68a136 1446\r
1447 a&=0xfffffe;\r
1448\r
b5e5172d 1449#ifdef EMU_CORE_DEBUG\r
1450 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
1451#endif\r
1452\r
cc68a136 1453 // prg RAM\r
1454 if (a < 0x80000) {\r
721cd396 1455 if (a >= (Pico_mcd->s68k_regs[2]<<8)) {\r
1456 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);\r
1457 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
1458 }\r
cc68a136 1459 return;\r
1460 }\r
1461\r
1462 // regs\r
1463 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 1464 a &= 0x1fe;\r
1465 rdprintf("s68k_regs w32: [%02x] %08x @ %06x", a, d, SekPcS68k);\r
913ef4b7 1466 if (a >= 0x58 && a < 0x68) {\r
48e8482f 1467 gfx_cd_write16(a, d>>16);\r
1468 gfx_cd_write16(a+2, d&0xffff);\r
cb4a513a 1469 } else {\r
2433f409 1470 if ((a&0x1fe) == 0xe) dprintf("s68k FIXME: w32 [%02x]", a&0x3f);\r
cb4a513a 1471 s68k_reg_write8(a, d>>24);\r
1472 s68k_reg_write8(a+1,(d>>16)&0xff);\r
1473 s68k_reg_write8(a+2,(d>>8) &0xff);\r
1474 s68k_reg_write8(a+3, d &0xff);\r
1475 }\r
cc68a136 1476 return;\r
1477 }\r
1478\r
d0d47c5b 1479 // word RAM (2M area)\r
1480 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
0a051f55 1481 int r3 = Pico_mcd->s68k_regs[3];\r
913ef4b7 1482 wrdprintf("s68k_wram2M w32: [%06x] %08x @%06x", a, d, SekPcS68k);\r
0a051f55 1483 if (r3 & 4) { // 1M decode mode?\r
1484 decode_write16(a , d >> 16, r3);\r
1485 decode_write16(a+2, d , r3);\r
d0d47c5b 1486 } else {\r
1487 // allow access in any mode, like Gens does\r
fa1e5e29 1488 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
d0d47c5b 1489 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
1490 }\r
1491 return;\r
1492 }\r
1493\r
1494 // word RAM (1M area)\r
68cba51e 1495 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
fa1e5e29 1496 int bank;\r
1497 u16 *pm;\r
d0d47c5b 1498 if (d)\r
913ef4b7 1499 wrdprintf("s68k_wram1M w32: [%06x] %08x @%06x", a, d, SekPcS68k);\r
68cba51e 1500// if (!(Pico_mcd->s68k_regs[3]&4))\r
1501// dprintf("s68k_wram1M FIXME: wrong mode");\r
3aa1e148 1502 bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1503 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1504 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
d0d47c5b 1505 return;\r
1506 }\r
ab0607f7 1507\r
4f265db7 1508 // PCM\r
1509 if ((a&0xff8000)==0xff0000) {\r
1510 a &= 0x7fff;\r
1511 if (a >= 0x2000) {\r
1512 a >>= 1;\r
1513 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] = (d >> 16);\r
1514 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff] = d;\r
1515 } else if (a < 0x12) {\r
1516 a >>= 1;\r
1517 pcm_write(a, (d>>16) & 0xff);\r
1518 pcm_write(a+1, d & 0xff);\r
1519 }\r
1520 return;\r
1521 }\r
1522\r
ab0607f7 1523 // bram\r
1524 if ((a&0xff0000)==0xfe0000) {\r
1cd356a3 1525 dprintf("s68k_bram w32: [%06x] %08x @%06x", a, d, SekPcS68k);\r
ab0607f7 1526 a = (a>>1)&0x1fff;\r
1527 Pico_mcd->bram[a++] = d >> 16; // middle endian? verify?\r
1528 Pico_mcd->bram[a++] = d >> 24;\r
1529 Pico_mcd->bram[a++] = d;\r
1530 Pico_mcd->bram[a++] = d >> 8;\r
1531 SRam.changed = 1;\r
1532 return;\r
1533 }\r
1534\r
ca61ee42 1535 elprintf(EL_UIO, "s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
cc68a136 1536}\r
4ff2d527 1537#endif\r
cc68a136 1538\r
1539\r
1540// -----------------------------------------------------------------\r
1541\r
b837b69b 1542\r
3aa1e148 1543#ifdef EMU_C68K\r
b837b69b 1544static __inline int PicoMemBaseM68k(u32 pc)\r
1545{\r
fa1e5e29 1546 if ((pc&0xe00000)==0xe00000)\r
1547 return (int)Pico.ram-(pc&0xff0000); // Program Counter in Ram\r
b837b69b 1548\r
1549 if (pc < 0x20000)\r
fa1e5e29 1550 return (int)Pico_mcd->bios; // Program Counter in BIOS\r
1551\r
1552 if ((pc&0xfc0000)==0x200000)\r
b837b69b 1553 {\r
fa1e5e29 1554 if (!(Pico_mcd->s68k_regs[3]&4))\r
1555 return (int)Pico_mcd->word_ram2M - 0x200000; // Program Counter in Word Ram\r
1556 if (pc < 0x220000) {\r
3aa1e148 1557 int bank = Pico_mcd->s68k_regs[3]&1;\r
fa1e5e29 1558 return (int)Pico_mcd->word_ram1M[bank] - 0x200000;\r
1559 }\r
b837b69b 1560 }\r
1561\r
fa1e5e29 1562 // Error - Program Counter is invalid\r
ca61ee42 1563 elprintf(EL_ANOMALY, "m68k FIXME: unhandled jump to %06x", pc);\r
fa1e5e29 1564\r
1565 return (int)Pico_mcd->bios;\r
b837b69b 1566}\r
1567\r
1568\r
1569static u32 PicoCheckPcM68k(u32 pc)\r
1570{\r
3aa1e148 1571 pc-=PicoCpuCM68k.membase; // Get real pc\r
b837b69b 1572 pc&=0xfffffe;\r
1573\r
3aa1e148 1574 PicoCpuCM68k.membase=PicoMemBaseM68k(pc);\r
b837b69b 1575\r
3aa1e148 1576 return PicoCpuCM68k.membase+pc;\r
b837b69b 1577}\r
1578\r
1579\r
1580static __inline int PicoMemBaseS68k(u32 pc)\r
1581{\r
fa1e5e29 1582 if (pc < 0x80000) // PRG RAM\r
1583 return (int)Pico_mcd->prg_ram;\r
b837b69b 1584\r
fa1e5e29 1585 if ((pc&0xfc0000)==0x080000) // WORD RAM 2M area (assume we are in the right mode..)\r
1586 return (int)Pico_mcd->word_ram2M - 0x080000;\r
1587\r
1588 if ((pc&0xfe0000)==0x0c0000) { // word RAM 1M area\r
3aa1e148 1589 int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1590 return (int)Pico_mcd->word_ram1M[bank] - 0x0c0000;\r
b837b69b 1591 }\r
1592\r
fa1e5e29 1593 // Error - Program Counter is invalid\r
ca61ee42 1594 elprintf(EL_ANOMALY, "s68k FIXME: unhandled jump to %06x", pc);\r
fa1e5e29 1595\r
1596 return (int)Pico_mcd->prg_ram;\r
b837b69b 1597}\r
1598\r
1599\r
1600static u32 PicoCheckPcS68k(u32 pc)\r
1601{\r
3aa1e148 1602 pc-=PicoCpuCS68k.membase; // Get real pc\r
b837b69b 1603 pc&=0xfffffe;\r
1604\r
3aa1e148 1605 PicoCpuCS68k.membase=PicoMemBaseS68k(pc);\r
b837b69b 1606\r
3aa1e148 1607 return PicoCpuCS68k.membase+pc;\r
b837b69b 1608}\r
1609#endif\r
1610\r
3aa1e148 1611#ifndef _ASM_CD_MEMORY_C\r
1612void PicoMemResetCD(int r3)\r
1613{\r
1614#ifdef EMU_F68K\r
1615 // update fetchmap..\r
1616 int i;\r
1617 if (!(r3 & 4))\r
1618 {\r
1619 for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x240000; i++)\r
1620 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram2M - 0x200000;\r
1621 }\r
1622 else\r
1623 {\r
1624 for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x220000; i++)\r
1625 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram1M[r3 & 1] - 0x200000;\r
1626 for (i = M68K_FETCHBANK1*0x0c/0x100; (i<<(24-FAMEC_FETCHBITS)) < 0x0e0000; i++)\r
1627 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram1M[(r3&1)^1] - 0x0c0000;\r
1628 }\r
1629#endif\r
1630}\r
1631#endif\r
b837b69b 1632\r
eff55556 1633PICO_INTERNAL void PicoMemSetupCD(void)\r
b837b69b 1634{\r
f53f286a 1635 // additional handlers for common code\r
1636 PicoRead16Hook = OtherRead16End;\r
1637 PicoWrite8Hook = OtherWrite8End;\r
1638\r
b837b69b 1639#ifdef EMU_C68K\r
1640 // Setup m68k memory callbacks:\r
3aa1e148 1641 PicoCpuCM68k.checkpc=PicoCheckPcM68k;\r
1642 PicoCpuCM68k.fetch8 =PicoCpuCM68k.read8 =PicoReadM68k8;\r
1643 PicoCpuCM68k.fetch16=PicoCpuCM68k.read16=PicoReadM68k16;\r
1644 PicoCpuCM68k.fetch32=PicoCpuCM68k.read32=PicoReadM68k32;\r
1645 PicoCpuCM68k.write8 =PicoWriteM68k8;\r
1646 PicoCpuCM68k.write16=PicoWriteM68k16;\r
1647 PicoCpuCM68k.write32=PicoWriteM68k32;\r
b837b69b 1648 // s68k\r
3aa1e148 1649 PicoCpuCS68k.checkpc=PicoCheckPcS68k;\r
1650 PicoCpuCS68k.fetch8 =PicoCpuCS68k.read8 =PicoReadS68k8;\r
1651 PicoCpuCS68k.fetch16=PicoCpuCS68k.read16=PicoReadS68k16;\r
1652 PicoCpuCS68k.fetch32=PicoCpuCS68k.read32=PicoReadS68k32;\r
1653 PicoCpuCS68k.write8 =PicoWriteS68k8;\r
1654 PicoCpuCS68k.write16=PicoWriteS68k16;\r
1655 PicoCpuCS68k.write32=PicoWriteS68k32;\r
b837b69b 1656#endif\r
3aa1e148 1657#ifdef EMU_F68K\r
1658 // m68k\r
1659 PicoCpuFM68k.read_byte =PicoReadM68k8;\r
1660 PicoCpuFM68k.read_word =PicoReadM68k16;\r
1661 PicoCpuFM68k.read_long =PicoReadM68k32;\r
1662 PicoCpuFM68k.write_byte=PicoWriteM68k8;\r
1663 PicoCpuFM68k.write_word=PicoWriteM68k16;\r
1664 PicoCpuFM68k.write_long=PicoWriteM68k32;\r
1665 // s68k\r
1666 PicoCpuFS68k.read_byte =PicoReadS68k8;\r
1667 PicoCpuFS68k.read_word =PicoReadS68k16;\r
1668 PicoCpuFS68k.read_long =PicoReadS68k32;\r
1669 PicoCpuFS68k.write_byte=PicoWriteS68k8;\r
1670 PicoCpuFS68k.write_word=PicoWriteS68k16;\r
1671 PicoCpuFS68k.write_long=PicoWriteS68k32;\r
1672\r
1673 // setup FAME fetchmap\r
1674 {\r
1675 int i;\r
1676 // M68k\r
1677 // by default, point everything to fitst 64k of ROM (BIOS)\r
1678 for (i = 0; i < M68K_FETCHBANK1; i++)\r
1679 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r
1680 // now real ROM (BIOS)\r
1681 for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)\r
1682 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom;\r
1683 // .. and RAM\r
1684 for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)\r
1685 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.ram - (i<<(24-FAMEC_FETCHBITS));\r
1686 // S68k\r
1687 // PRG RAM is default\r
1688 for (i = 0; i < M68K_FETCHBANK1; i++)\r
1689 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->prg_ram - (i<<(24-FAMEC_FETCHBITS));\r
1690 // real PRG RAM\r
1691 for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0x80000; i++)\r
1692 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->prg_ram;\r
1693 // WORD RAM 2M area\r
1694 for (i = M68K_FETCHBANK1*0x08/0x100; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0xc0000; i++)\r
1695 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram2M - 0x80000;\r
1696 // PicoMemResetCD() will setup word ram for both\r
1697 }\r
1698#endif\r
1699\r
7a1f6e45 1700 // m68k_poll_addr = m68k_poll_cnt = 0;\r
1701 s68k_poll_adclk = s68k_poll_cnt = 0;\r
b837b69b 1702}\r
1703\r
1704\r
cc68a136 1705#ifdef EMU_M68K\r
1706unsigned char PicoReadCD8w (unsigned int a) {\r
3aa1e148 1707 return m68ki_cpu_p == &PicoCpuMS68k ? PicoReadS68k8(a) : PicoReadM68k8(a);\r
cc68a136 1708}\r
1709unsigned short PicoReadCD16w(unsigned int a) {\r
3aa1e148 1710 return m68ki_cpu_p == &PicoCpuMS68k ? PicoReadS68k16(a) : PicoReadM68k16(a);\r
cc68a136 1711}\r
1712unsigned int PicoReadCD32w(unsigned int a) {\r
3aa1e148 1713 return m68ki_cpu_p == &PicoCpuMS68k ? PicoReadS68k32(a) : PicoReadM68k32(a);\r
cc68a136 1714}\r
1715void PicoWriteCD8w (unsigned int a, unsigned char d) {\r
3aa1e148 1716 if (m68ki_cpu_p == &PicoCpuMS68k) PicoWriteS68k8(a, d); else PicoWriteM68k8(a, d);\r
cc68a136 1717}\r
1718void PicoWriteCD16w(unsigned int a, unsigned short d) {\r
3aa1e148 1719 if (m68ki_cpu_p == &PicoCpuMS68k) PicoWriteS68k16(a, d); else PicoWriteM68k16(a, d);\r
cc68a136 1720}\r
1721void PicoWriteCD32w(unsigned int a, unsigned int d) {\r
3aa1e148 1722 if (m68ki_cpu_p == &PicoCpuMS68k) PicoWriteS68k32(a, d); else PicoWriteM68k32(a, d);\r
cc68a136 1723}\r
1724\r
1725// these are allowed to access RAM\r
b5e5172d 1726unsigned int m68k_read_pcrelative_CD8 (unsigned int a)\r
1727{\r
cc68a136 1728 a&=0xffffff;\r
3aa1e148 1729 if(m68ki_cpu_p == &PicoCpuMS68k) {\r
cc68a136 1730 if (a < 0x80000) return *(u8 *)(Pico_mcd->prg_ram+(a^1)); // PRG Ram\r
fa1e5e29 1731 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)\r
1732 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));\r
1733 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)\r
3aa1e148 1734 int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1735 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));\r
1736 }\r
ca61ee42 1737 elprintf(EL_ANOMALY, "s68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);\r
cc68a136 1738 } else {\r
cc68a136 1739 if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram\r
fa1e5e29 1740 if(a<0x20000) return *(u8 *)(Pico.rom+(a^1)); // Bios\r
1741 if((a&0xfc0000)==0x200000) { // word RAM\r
1742 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?\r
1743 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));\r
1744 else if (a < 0x220000) {\r
1745 int bank = Pico_mcd->s68k_regs[3]&1;\r
1746 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));\r
1747 }\r
1748 }\r
ca61ee42 1749 elprintf(EL_ANOMALY, "m68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);\r
cc68a136 1750 }\r
1751 return 0;//(u8) lastread_d;\r
1752}\r
b5e5172d 1753unsigned int m68k_read_pcrelative_CD16(unsigned int a)\r
1754{\r
cc68a136 1755 a&=0xffffff;\r
3aa1e148 1756 if(m68ki_cpu_p == &PicoCpuMS68k) {\r
cc68a136 1757 if (a < 0x80000) return *(u16 *)(Pico_mcd->prg_ram+(a&~1)); // PRG Ram\r
fa1e5e29 1758 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)\r
1759 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
1760 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)\r
3aa1e148 1761 int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1762 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1763 }\r
ca61ee42 1764 elprintf(EL_ANOMALY, "s68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);\r
cc68a136 1765 } else {\r
cc68a136 1766 if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram\r
fa1e5e29 1767 if(a<0x20000) return *(u16 *)(Pico.rom+(a&~1)); // Bios\r
1768 if((a&0xfc0000)==0x200000) { // word RAM\r
1769 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?\r
1770 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
1771 else if (a < 0x220000) {\r
1772 int bank = Pico_mcd->s68k_regs[3]&1;\r
1773 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1774 }\r
1775 }\r
ca61ee42 1776 elprintf(EL_ANOMALY, "m68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);\r
cc68a136 1777 }\r
b837b69b 1778 return 0;\r
cc68a136 1779}\r
b5e5172d 1780unsigned int m68k_read_pcrelative_CD32(unsigned int a)\r
1781{\r
fa1e5e29 1782 u16 *pm;\r
cc68a136 1783 a&=0xffffff;\r
3aa1e148 1784 if(m68ki_cpu_p == &PicoCpuMS68k) {\r
cc68a136 1785 if (a < 0x80000) { u16 *pm=(u16 *)(Pico_mcd->prg_ram+(a&~1)); return (pm[0]<<16)|pm[1]; } // PRG Ram\r
fa1e5e29 1786 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)\r
1787 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }\r
1788 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)\r
3aa1e148 1789 int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1790 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1791 return (pm[0]<<16)|pm[1];\r
1792 }\r
ca61ee42 1793 elprintf(EL_ANOMALY, "s68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);\r
cc68a136 1794 } else {\r
cc68a136 1795 if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram\r
fa1e5e29 1796 if(a<0x20000) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }\r
1797 if((a&0xfc0000)==0x200000) { // word RAM\r
1798 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?\r
1799 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }\r
1800 else if (a < 0x220000) {\r
1801 int bank = Pico_mcd->s68k_regs[3]&1;\r
1802 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1803 return (pm[0]<<16)|pm[1];\r
1804 }\r
1805 }\r
ca61ee42 1806 elprintf(EL_ANOMALY, "m68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);\r
cc68a136 1807 }\r
b837b69b 1808 return 0;\r
cc68a136 1809}\r
1810#endif // EMU_M68K\r
1811\r
fast MegaDrive/MegaCD/32X emulator