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bugfix for 68k core on save load
[picodrive.git] / Pico / cd / Memory.c
CommitLineData
6cadc2da 1// Memory I/O handlers for Sega/Mega CD.\r
2// Loosely based on Gens code.\r
3// (c) Copyright 2007, Grazvydas "notaz" Ignotas\r
cc68a136 4\r
cc68a136 5\r
cc68a136 6#include "../PicoInt.h"\r
7\r
cc68a136 8#include "../sound/ym2612.h"\r
9#include "../sound/sn76496.h"\r
10\r
cb4a513a 11#include "gfx_cd.h"\r
4f265db7 12#include "pcm.h"\r
cb4a513a 13\r
eff55556 14#ifndef UTYPES_DEFINED\r
cc68a136 15typedef unsigned char u8;\r
16typedef unsigned short u16;\r
17typedef unsigned int u32;\r
eff55556 18#define UTYPES_DEFINED\r
19#endif\r
cc68a136 20\r
dca310c4 21#ifdef _MSC_VER\r
22#define rdprintf\r
23#define wrdprintf\r
24#else\r
b5e5172d 25//#define rdprintf dprintf\r
26#define rdprintf(...)\r
68cba51e 27//#define wrdprintf dprintf\r
913ef4b7 28#define wrdprintf(...)\r
dca310c4 29#endif\r
cc68a136 30\r
b5e5172d 31#ifdef EMU_CORE_DEBUG\r
32extern u32 lastread_a, lastread_d[16], lastwrite_cyc_d[16];\r
33extern int lrp_cyc, lwp_cyc;\r
34#undef USE_POLL_DETECT\r
35#endif\r
36\r
cc68a136 37// -----------------------------------------------------------------\r
38\r
7a1f6e45 39// poller detection\r
7a1f6e45 40#define POLL_LIMIT 16\r
41#define POLL_CYCLES 124\r
42// int m68k_poll_addr, m68k_poll_cnt;\r
43unsigned int s68k_poll_adclk, s68k_poll_cnt;\r
cc68a136 44\r
4ff2d527 45#ifndef _ASM_CD_MEMORY_C\r
cb4a513a 46static u32 m68k_reg_read16(u32 a)\r
cc68a136 47{\r
48 u32 d=0;\r
49 a &= 0x3e;\r
672ad671 50 // dprintf("m68k_regs r%2i: [%02x] @%06x", realsize&~1, a+(realsize&1), SekPc);\r
cc68a136 51\r
52 switch (a) {\r
672ad671 53 case 0:\r
c459aefd 54 d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens\r
672ad671 55 goto end;\r
cc68a136 56 case 2:\r
672ad671 57 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);\r
c008977e 58 // the DMNA delay must only be visible on s68k side (Lunar2, Silpheed)\r
59 if (Pico_mcd->m.state_flags&2) { d &= ~1; d |= 2; }\r
60 //printf("m68k_regs r3: %02x @%06x\n", (u8)d, SekPc);\r
cc68a136 61 goto end;\r
c459aefd 62 case 4:\r
63 d = Pico_mcd->s68k_regs[4]<<8;\r
64 goto end;\r
65 case 6:\r
913ef4b7 66 d = *(u16 *)(Pico_mcd->bios + 0x72);\r
c459aefd 67 goto end;\r
cc68a136 68 case 8:\r
cc68a136 69 d = Read_CDC_Host(0);\r
70 goto end;\r
c459aefd 71 case 0xA:\r
ca61ee42 72 elprintf(EL_UIO, "m68k FIXME: reserved read");\r
c459aefd 73 goto end;\r
cc68a136 74 case 0xC:\r
1cd356a3 75 d = Pico_mcd->m.timer_stopwatch >> 16;\r
4ff2d527 76 dprintf("m68k stopwatch timer read (%04x)", d);\r
1cd356a3 77 goto end;\r
cc68a136 78 }\r
79\r
cc68a136 80 if (a < 0x30) {\r
81 // comm flag/cmd/status (0xE-0x2F)\r
82 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r
83 goto end;\r
84 }\r
85\r
ca61ee42 86 elprintf(EL_UIO, "m68k_regs FIXME invalid read @ %02x", a);\r
cc68a136 87\r
88end:\r
89\r
cc68a136 90 return d;\r
91}\r
4ff2d527 92#endif\r
cc68a136 93\r
4ff2d527 94#ifndef _ASM_CD_MEMORY_C\r
95static\r
96#endif\r
97void m68k_reg_write8(u32 a, u32 d)\r
cc68a136 98{\r
99 a &= 0x3f;\r
672ad671 100 // dprintf("m68k_regs w%2i: [%02x] %02x @%06x", realsize, a, d, SekPc);\r
cc68a136 101\r
102 switch (a) {\r
103 case 0:\r
672ad671 104 d &= 1;\r
ca61ee42 105 if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { elprintf(EL_INTS, "m68k: s68k irq 2"); SekInterruptS68k(2); }\r
c459aefd 106 return;\r
cc68a136 107 case 1:\r
672ad671 108 d &= 3;\r
51a902ae 109 if (!(d&1)) Pico_mcd->m.state_flags |= 1; // reset pending, needed to be sure we fetch the right vectors on reset\r
c459aefd 110 if ( (Pico_mcd->m.busreq&1) != (d&1)) dprintf("m68k: s68k reset %i", !(d&1));\r
111 if ( (Pico_mcd->m.busreq&2) != (d&2)) dprintf("m68k: s68k brq %i", (d&2)>>1);\r
51a902ae 112 if ((Pico_mcd->m.state_flags&1) && (d&3)==1) {\r
cc68a136 113 SekResetS68k(); // S68k comes out of RESET or BRQ state\r
4ff2d527 114 Pico_mcd->m.state_flags&=~1;\r
115 dprintf("m68k: resetting s68k, cycles=%i", SekCyclesLeft);\r
cc68a136 116 }\r
c459aefd 117 Pico_mcd->m.busreq = d;\r
118 return;\r
672ad671 119 case 2:\r
721cd396 120 dprintf("m68k: prg wp=%02x", d);\r
672ad671 121 Pico_mcd->s68k_regs[2] = d; // really use s68k side register\r
122 return;\r
66fdc0f0 123 case 3: {\r
124 u32 dold = Pico_mcd->s68k_regs[3]&0x1f;\r
c008977e 125 //printf("m68k_regs w3: %02x @%06x\n", (u8)d, SekPc);\r
672ad671 126 d &= 0xc2;\r
66fdc0f0 127 if ((dold>>6) != ((d>>6)&3))\r
672ad671 128 dprintf("m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));\r
129 //if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);\r
130 //if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :\r
131 // ((d&2) ? "word ram to s68k" : "word ram to m68k"));\r
66fdc0f0 132 if (dold & 4) {\r
133 d ^= 2; // writing 0 to DMNA actually sets it, 1 does nothing\r
134 } else {\r
135 //dold &= ~2; // ??\r
89fa852d 136#if 1\r
137 if ((d & 2) && !(dold & 2)) {\r
138 Pico_mcd->m.state_flags |= 2; // we must delay setting DMNA bit (needed for Silpheed)\r
139 d &= ~2;\r
140 }\r
141#else\r
66fdc0f0 142 if (d & 2) dold &= ~1; // return word RAM to s68k in 2M mode\r
89fa852d 143#endif\r
66fdc0f0 144 }\r
145 Pico_mcd->s68k_regs[3] = d | dold; // really use s68k side register\r
7a1f6e45 146#ifdef USE_POLL_DETECT\r
147 if ((s68k_poll_adclk&0xfe) == 2 && s68k_poll_cnt > POLL_LIMIT) {\r
148 SekSetStopS68k(0); s68k_poll_adclk = 0;\r
8f8fe01e 149 elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r
7a1f6e45 150 }\r
151#endif\r
672ad671 152 return;\r
66fdc0f0 153 }\r
c459aefd 154 case 6:\r
d1df8786 155 Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer\r
c459aefd 156 return;\r
157 case 7:\r
d1df8786 158 Pico_mcd->bios[0x72] = d;\r
913ef4b7 159 dprintf("hint vector set to %08x", PicoRead32(0x70));\r
c459aefd 160 return;\r
7a1f6e45 161 case 0xf:\r
162 d = (d << 1) | ((d >> 7) & 1); // rol8 1 (special case)\r
cc68a136 163 case 0xe:\r
672ad671 164 //dprintf("m68k: comm flag: %02x", d);\r
cc68a136 165 Pico_mcd->s68k_regs[0xe] = d;\r
7a1f6e45 166#ifdef USE_POLL_DETECT\r
167 if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {\r
168 SekSetStopS68k(0); s68k_poll_adclk = 0;\r
8f8fe01e 169 elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r
7a1f6e45 170 }\r
171#endif\r
c459aefd 172 return;\r
672ad671 173 }\r
174\r
175 if ((a&0xf0) == 0x10) {\r
cc68a136 176 Pico_mcd->s68k_regs[a] = d;\r
7a1f6e45 177#ifdef USE_POLL_DETECT\r
178 if ((a&0xfe) == (s68k_poll_adclk&0xfe) && s68k_poll_cnt > POLL_LIMIT) {\r
179 SekSetStopS68k(0); s68k_poll_adclk = 0;\r
8f8fe01e 180 elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r
7a1f6e45 181 }\r
182#endif\r
672ad671 183 return;\r
cc68a136 184 }\r
185\r
ca61ee42 186 elprintf(EL_UIO, "m68k FIXME: invalid write? [%02x] %02x", a, d);\r
cc68a136 187}\r
188\r
2433f409 189#ifndef _ASM_CD_MEMORY_C\r
190static\r
191#endif\r
192u32 s68k_poll_detect(u32 a, u32 d)\r
193{\r
194#ifdef USE_POLL_DETECT\r
ca61ee42 195 // needed mostly for Cyclone, which doesn't always check it's cycle counter\r
196 if (SekIsStoppedS68k()) return d;\r
2433f409 197 // polling detection\r
198 if (a == (s68k_poll_adclk&0xff)) {\r
199 unsigned int clkdiff = SekCyclesDoneS68k() - (s68k_poll_adclk>>8);\r
200 if (clkdiff <= POLL_CYCLES) {\r
201 s68k_poll_cnt++;\r
202 //printf("-- diff: %u, cnt = %i\n", clkdiff, s68k_poll_cnt);\r
203 if (s68k_poll_cnt > POLL_LIMIT) {\r
204 SekSetStopS68k(1);\r
8f8fe01e 205 elprintf(EL_CDPOLL, "s68k poll detected @ %06x, a=%02x", SekPcS68k, a);\r
2433f409 206 }\r
207 s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;\r
208 return d;\r
209 }\r
210 }\r
211 s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;\r
212 s68k_poll_cnt = 0;\r
213#endif\r
214 return d;\r
215}\r
cc68a136 216\r
913ef4b7 217#define READ_FONT_DATA(basemask) \\r
218{ \\r
219 unsigned int fnt = *(unsigned int *)(Pico_mcd->s68k_regs + 0x4c); \\r
220 unsigned int col0 = (fnt >> 8) & 0x0f, col1 = (fnt >> 12) & 0x0f; \\r
221 if (fnt & (basemask << 0)) d = col1 ; else d = col0; \\r
222 if (fnt & (basemask << 1)) d |= col1 << 4; else d |= col0 << 4; \\r
223 if (fnt & (basemask << 2)) d |= col1 << 8; else d |= col0 << 8; \\r
224 if (fnt & (basemask << 3)) d |= col1 << 12; else d |= col0 << 12; \\r
225}\r
226\r
cc68a136 227\r
4ff2d527 228#ifndef _ASM_CD_MEMORY_C\r
229static\r
230#endif\r
231u32 s68k_reg_read16(u32 a)\r
cc68a136 232{\r
233 u32 d=0;\r
cc68a136 234\r
672ad671 235 // dprintf("s68k_regs r%2i: [%02x] @ %06x", realsize&~1, a+(realsize&1), SekPcS68k);\r
cc68a136 236\r
237 switch (a) {\r
238 case 0:\r
7a1f6e45 239 return ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state\r
672ad671 240 case 2:\r
2433f409 241 d = (Pico_mcd->s68k_regs[2]<<8) | (Pico_mcd->s68k_regs[3]&0x1f);\r
c008977e 242 //printf("s68k_regs r3: %02x @%06x\n", (u8)d, SekPcS68k);\r
2433f409 243 return s68k_poll_detect(a, d);\r
cc68a136 244 case 6:\r
7a1f6e45 245 return CDC_Read_Reg();\r
cc68a136 246 case 8:\r
7a1f6e45 247 return Read_CDC_Host(1); // Gens returns 0 here on byte reads\r
cc68a136 248 case 0xC:\r
4f265db7 249 d = Pico_mcd->m.timer_stopwatch >> 16;\r
4ff2d527 250 dprintf("s68k stopwatch timer read (%04x)", d);\r
7a1f6e45 251 return d;\r
d1df8786 252 case 0x30:\r
7a1f6e45 253 dprintf("s68k int3 timer read (%02x)", Pico_mcd->s68k_regs[31]);\r
254 return Pico_mcd->s68k_regs[31];\r
cc68a136 255 case 0x34: // fader\r
7a1f6e45 256 return 0; // no busy bit\r
913ef4b7 257 case 0x50: // font data (check: Lunar 2, Silpheed)\r
258 READ_FONT_DATA(0x00100000);\r
7a1f6e45 259 return d;\r
913ef4b7 260 case 0x52:\r
261 READ_FONT_DATA(0x00010000);\r
7a1f6e45 262 return d;\r
913ef4b7 263 case 0x54:\r
264 READ_FONT_DATA(0x10000000);\r
7a1f6e45 265 return d;\r
913ef4b7 266 case 0x56:\r
267 READ_FONT_DATA(0x01000000);\r
7a1f6e45 268 return d;\r
cc68a136 269 }\r
270\r
271 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r
272\r
2433f409 273 if (a >= 0x0e && a < 0x30)\r
274 return s68k_poll_detect(a, d);\r
7a1f6e45 275\r
cc68a136 276 return d;\r
277}\r
278\r
4ff2d527 279#ifndef _ASM_CD_MEMORY_C\r
280static\r
281#endif\r
282void s68k_reg_write8(u32 a, u32 d)\r
cc68a136 283{\r
672ad671 284 //dprintf("s68k_regs w%2i: [%02x] %02x @ %06x", realsize, a, d, SekPcS68k);\r
cc68a136 285\r
48e8482f 286 // Warning: d might have upper bits set\r
cc68a136 287 switch (a) {\r
672ad671 288 case 2:\r
289 return; // only m68k can change WP\r
fa1e5e29 290 case 3: {\r
291 int dold = Pico_mcd->s68k_regs[3];\r
374498bc 292 //elprintf(EL_STATUS, "s68k_regs w3: %02x s@%06x", (u8)d, SekPcS68k);\r
672ad671 293 d &= 0x1d;\r
4ff2d527 294 d |= dold&0xc2;\r
d0d47c5b 295 if (d&4) {\r
4ff2d527 296 if ((d ^ dold) & 5) {\r
297 d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit\r
4ff2d527 298 PicoMemResetCD(d);\r
4ff2d527 299 }\r
48e8482f 300#ifdef _ASM_CD_MEMORY_C\r
301 if ((d ^ dold) & 0x1d)\r
302 PicoMemResetCDdecode(d);\r
303#endif\r
fa1e5e29 304 if (!(dold & 4)) {\r
305 dprintf("wram mode 2M->1M");\r
306 wram_2M_to_1M(Pico_mcd->word_ram2M);\r
4ff2d527 307 }\r
d0d47c5b 308 } else {\r
fa1e5e29 309 if (dold & 4) {\r
310 dprintf("wram mode 1M->2M");\r
4ff2d527 311 if (!(d&1)) { // it didn't set the ret bit, which means it doesn't want to give WRAM to m68k\r
312 d &= ~3;\r
313 d |= (dold&1) ? 2 : 1; // then give it to the one which had bank0 in 1M mode\r
314 }\r
fa1e5e29 315 wram_1M_to_2M(Pico_mcd->word_ram2M);\r
4ff2d527 316 PicoMemResetCD(d);\r
4ff2d527 317 }\r
318 else\r
319 d |= dold&1;\r
320 if (d&1) d &= ~2; // return word RAM to m68k in 2M mode\r
d0d47c5b 321 }\r
672ad671 322 break;\r
fa1e5e29 323 }\r
cc68a136 324 case 4:\r
325 dprintf("s68k CDC dest: %x", d&7);\r
326 Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode\r
327 return;\r
328 case 5:\r
c459aefd 329 //dprintf("s68k CDC reg addr: %x", d&0xf);\r
cc68a136 330 break;\r
331 case 7:\r
332 CDC_Write_Reg(d);\r
333 return;\r
334 case 0xa:\r
335 dprintf("s68k set CDC dma addr");\r
336 break;\r
d1df8786 337 case 0xc:\r
4f265db7 338 case 0xd:\r
d1df8786 339 dprintf("s68k set stopwatch timer");\r
4f265db7 340 Pico_mcd->m.timer_stopwatch = 0;\r
341 return;\r
1cd356a3 342 case 0xe:\r
7a1f6e45 343 Pico_mcd->s68k_regs[0xf] = (d>>1) | (d<<7); // ror8 1, Gens note: Dragons lair\r
1cd356a3 344 return;\r
d1df8786 345 case 0x31:\r
4f265db7 346 dprintf("s68k set int3 timer: %02x", d);\r
48e8482f 347 Pico_mcd->m.timer_int3 = (d & 0xff) << 16;\r
d1df8786 348 break;\r
cc68a136 349 case 0x33: // IRQ mask\r
350 dprintf("s68k irq mask: %02x", d);\r
351 if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) {\r
352 CDD_Export_Status();\r
cc68a136 353 }\r
354 break;\r
355 case 0x34: // fader\r
356 Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;\r
357 return;\r
672ad671 358 case 0x36:\r
359 return; // d/m bit is unsetable\r
360 case 0x37: {\r
361 u32 d_old = Pico_mcd->s68k_regs[0x37];\r
362 Pico_mcd->s68k_regs[0x37] = d&7;\r
363 if ((d&4) && !(d_old&4)) {\r
cc68a136 364 CDD_Export_Status();\r
cc68a136 365 }\r
672ad671 366 return;\r
367 }\r
cc68a136 368 case 0x4b:\r
369 Pico_mcd->s68k_regs[a] = (u8) d;\r
370 CDD_Import_Command();\r
371 return;\r
372 }\r
373\r
1cd356a3 374 if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))\r
cc68a136 375 {\r
ca61ee42 376 elprintf(EL_UIO, "s68k FIXME: invalid write @ %02x?", a);\r
cc68a136 377 return;\r
378 }\r
379\r
380 Pico_mcd->s68k_regs[a] = (u8) d;\r
381}\r
382\r
383\r
fa1e5e29 384static u32 OtherRead16End(u32 a, int realsize)\r
cc68a136 385{\r
386 u32 d=0;\r
387\r
0ffefdb8 388#ifndef _ASM_CD_MEMORY_C\r
672ad671 389 if ((a&0xffffc0)==0xa12000) {\r
cb4a513a 390 d=m68k_reg_read16(a);\r
672ad671 391 goto end;\r
392 }\r
cc68a136 393\r
8022f53d 394 if (a==0x400000) {\r
395 if (SRam.data != NULL) d=3; // 64k cart\r
396 goto end;\r
397 }\r
398\r
399 if ((a&0xfe0000)==0x600000) {\r
400 if (SRam.data != NULL) {\r
401 d=SRam.data[((a>>1)&0xffff)+0x2000];\r
402 if (realsize == 8) d|=d<<8;\r
403 }\r
404 goto end;\r
405 }\r
406\r
407 if (a==0x7ffffe) {\r
408 d=Pico_mcd->m.bcram_reg;\r
409 goto end;\r
410 }\r
0ffefdb8 411#endif\r
8022f53d 412\r
ca61ee42 413 elprintf(EL_UIO, "m68k FIXME: unusual r%i: %06x @%06x", realsize&~1, (a&0xfffffe)+(realsize&1), SekPc);\r
cc68a136 414\r
0ffefdb8 415#ifndef _ASM_CD_MEMORY_C\r
cc68a136 416end:\r
0ffefdb8 417#endif\r
cc68a136 418 return d;\r
419}\r
420\r
cc68a136 421\r
fa1e5e29 422static void OtherWrite8End(u32 a, u32 d, int realsize)\r
cc68a136 423{\r
0ffefdb8 424#ifndef _ASM_CD_MEMORY_C\r
cb4a513a 425 if ((a&0xffffc0)==0xa12000) { m68k_reg_write8(a, d); return; }\r
cc68a136 426\r
8022f53d 427 if ((a&0xfe0000)==0x600000) {\r
428 if (SRam.data != NULL && (Pico_mcd->m.bcram_reg&1)) {\r
429 SRam.data[((a>>1)&0xffff)+0x2000]=d;\r
430 SRam.changed = 1;\r
431 }\r
432 return;\r
433 }\r
434\r
435 if (a==0x7fffff) {\r
436 Pico_mcd->m.bcram_reg=d;\r
437 return;\r
438 }\r
0ffefdb8 439#endif\r
8022f53d 440\r
ca61ee42 441 elprintf(EL_UIO, "m68k FIXME: strange w%i: [%06x], %08x @%06x", realsize, a&0xffffff, d, SekPc);\r
cc68a136 442}\r
443\r
0ffefdb8 444#ifndef _ASM_CD_MEMORY_C\r
69996cb7 445#define _CD_MEMORY_C\r
fa1e5e29 446#undef _ASM_MEMORY_C\r
447#include "../MemoryCmn.c"\r
4ff2d527 448#include "cell_map.c"\r
0ffefdb8 449#endif\r
cc68a136 450\r
2433f409 451\r
cc68a136 452// -----------------------------------------------------------------\r
453// Read Rom and read Ram\r
454\r
4ff2d527 455#ifdef _ASM_CD_MEMORY_C\r
0af33fe0 456u32 PicoReadM68k8(u32 a);\r
4ff2d527 457#else\r
81fda4e8 458u32 PicoReadM68k8(u32 a)\r
cc68a136 459{\r
460 u32 d=0;\r
461\r
cc68a136 462 a&=0xffffff;\r
463\r
b542be46 464 switch (a >> 17)\r
465 {\r
466 case 0x00>>1: // BIOS: 000000 - 020000\r
467 d = *(u8 *)(Pico_mcd->bios+(a^1));\r
468 break;\r
469 case 0x02>>1: // prg RAM\r
470 if ((Pico_mcd->m.busreq&3)!=1) {\r
471 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
472 d = *(prg_bank+((a^1)&0x1ffff));\r
473 }\r
474 break;\r
475 case 0x20>>1: // word RAM: 200000 - 220000\r
476 wrdprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);\r
477 a &= 0x1ffff;\r
478 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
479 int bank = Pico_mcd->s68k_regs[3]&1;\r
480 d = Pico_mcd->word_ram1M[bank][a^1];\r
481 } else {\r
482 // allow access in any mode, like Gens does\r
483 d = Pico_mcd->word_ram2M[a^1];\r
484 }\r
485 wrdprintf("ret = %02x", (u8)d);\r
486 break;\r
487 case 0x22>>1: // word RAM: 220000 - 240000\r
488 wrdprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);\r
489 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
490 int bank = Pico_mcd->s68k_regs[3]&1;\r
491 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged\r
492 d = Pico_mcd->word_ram1M[bank][a^1];\r
493 } else {\r
494 // allow access in any mode, like Gens does\r
495 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];\r
496 }\r
497 wrdprintf("ret = %02x", (u8)d);\r
498 break;\r
499 case 0xc0>>1: case 0xc2>>1: case 0xc4>>1: case 0xc6>>1:\r
500 case 0xc8>>1: case 0xca>>1: case 0xcc>>1: case 0xce>>1:\r
501 case 0xd0>>1: case 0xd2>>1: case 0xd4>>1: case 0xd6>>1:\r
502 case 0xd8>>1: case 0xda>>1: case 0xdc>>1: case 0xde>>1:\r
503 // VDP\r
9761a7d0 504 if ((a&0xe700e0)==0xc00000)\r
505 d=PicoVideoRead8(a);\r
b542be46 506 break;\r
507 case 0xe0>>1: case 0xe2>>1: case 0xe4>>1: case 0xe6>>1:\r
508 case 0xe8>>1: case 0xea>>1: case 0xec>>1: case 0xee>>1:\r
509 case 0xf0>>1: case 0xf2>>1: case 0xf4>>1: case 0xf6>>1:\r
510 case 0xf8>>1: case 0xfa>>1: case 0xfc>>1: case 0xfe>>1:\r
511 // RAM:\r
512 d = *(u8 *)(Pico.ram+((a^1)&0xffff));\r
513 break;\r
514 default:\r
515 if ((a&0xff4000)==0xa00000) { d=z80Read8(a); break; } // Z80 Ram\r
516 if ((a&0xffffc0)==0xa12000)\r
517 rdprintf("m68k_regs r8: [%02x] @%06x", a&0x3f, SekPc);\r
cc68a136 518\r
b542be46 519 d=OtherRead16(a&~1, 8|(a&1)); if ((a&1)==0) d>>=8;\r
cc68a136 520\r
b542be46 521 if ((a&0xffffc0)==0xa12000)\r
522 rdprintf("ret = %02x", (u8)d);\r
523 break;\r
d0d47c5b 524 }\r
525\r
cc68a136 526\r
ca61ee42 527 elprintf(EL_IO, "r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);\r
b5e5172d 528#ifdef EMU_CORE_DEBUG\r
529 if (a>=Pico.romsize) {\r
530 lastread_a = a;\r
531 lastread_d[lrp_cyc++&15] = d;\r
532 }\r
cc68a136 533#endif\r
0af33fe0 534 return d;\r
cc68a136 535}\r
4ff2d527 536#endif\r
cc68a136 537\r
ab0607f7 538\r
4ff2d527 539#ifdef _ASM_CD_MEMORY_C\r
0af33fe0 540u32 PicoReadM68k16(u32 a);\r
4ff2d527 541#else\r
0af33fe0 542static u32 PicoReadM68k16(u32 a)\r
cc68a136 543{\r
0af33fe0 544 u32 d=0;\r
cc68a136 545\r
cc68a136 546 a&=0xfffffe;\r
547\r
b542be46 548 switch (a >> 17)\r
549 {\r
550 case 0x00>>1: // BIOS: 000000 - 020000\r
551 d = *(u16 *)(Pico_mcd->bios+a);\r
552 break;\r
553 case 0x02>>1: // prg RAM\r
554 if ((Pico_mcd->m.busreq&3)!=1) {\r
555 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
556 wrdprintf("m68k_prgram r16: [%i,%06x] @%06x", Pico_mcd->s68k_regs[3]>>6, a, SekPc);\r
557 d = *(u16 *)(prg_bank+(a&0x1fffe));\r
558 wrdprintf("ret = %04x", d);\r
559 }\r
560 break;\r
561 case 0x20>>1: // word RAM: 200000 - 220000\r
562 wrdprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);\r
563 a &= 0x1fffe;\r
564 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
565 int bank = Pico_mcd->s68k_regs[3]&1;\r
566 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a);\r
567 } else {\r
568 // allow access in any mode, like Gens does\r
569 d = *(u16 *)(Pico_mcd->word_ram2M+a);\r
570 }\r
571 wrdprintf("ret = %04x", d);\r
572 break;\r
573 case 0x22>>1: // word RAM: 220000 - 240000\r
574 wrdprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);\r
575 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
576 int bank = Pico_mcd->s68k_regs[3]&1;\r
577 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged\r
578 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a);\r
579 } else {\r
580 // allow access in any mode, like Gens does\r
581 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
582 }\r
583 wrdprintf("ret = %04x", d);\r
584 break;\r
585 case 0xc0>>1: case 0xc2>>1: case 0xc4>>1: case 0xc6>>1:\r
586 case 0xc8>>1: case 0xca>>1: case 0xcc>>1: case 0xce>>1:\r
587 case 0xd0>>1: case 0xd2>>1: case 0xd4>>1: case 0xd6>>1:\r
588 case 0xd8>>1: case 0xda>>1: case 0xdc>>1: case 0xde>>1:\r
589 // VDP\r
590 if ((a&0xe700e0)==0xc00000)\r
591 d=PicoVideoRead(a);\r
592 break;\r
593 case 0xe0>>1: case 0xe2>>1: case 0xe4>>1: case 0xe6>>1:\r
594 case 0xe8>>1: case 0xea>>1: case 0xec>>1: case 0xee>>1:\r
595 case 0xf0>>1: case 0xf2>>1: case 0xf4>>1: case 0xf6>>1:\r
596 case 0xf8>>1: case 0xfa>>1: case 0xfc>>1: case 0xfe>>1:\r
597 // RAM:\r
598 d=*(u16 *)(Pico.ram+(a&0xfffe));\r
599 break;\r
600 default:\r
601 if ((a&0xffffc0)==0xa12000)\r
602 rdprintf("m68k_regs r16: [%02x] @%06x", a&0x3f, SekPc);\r
cc68a136 603\r
b542be46 604 d = OtherRead16(a, 16);\r
cc68a136 605\r
b542be46 606 if ((a&0xffffc0)==0xa12000)\r
607 rdprintf("ret = %04x", d);\r
608 break;\r
d0d47c5b 609 }\r
610\r
cc68a136 611\r
ca61ee42 612 elprintf(EL_IO, "r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
b5e5172d 613#ifdef EMU_CORE_DEBUG\r
614 if (a>=Pico.romsize) {\r
615 lastread_a = a;\r
616 lastread_d[lrp_cyc++&15] = d;\r
617 }\r
cc68a136 618#endif\r
619 return d;\r
620}\r
4ff2d527 621#endif\r
cc68a136 622\r
ab0607f7 623\r
4ff2d527 624#ifdef _ASM_CD_MEMORY_C\r
625u32 PicoReadM68k32(u32 a);\r
626#else\r
627static u32 PicoReadM68k32(u32 a)\r
cc68a136 628{\r
629 u32 d=0;\r
630\r
cc68a136 631 a&=0xfffffe;\r
632\r
b542be46 633 switch (a >> 17)\r
634 {\r
635 case 0x00>>1: { // BIOS: 000000 - 020000\r
636 u16 *pm=(u16 *)(Pico_mcd->bios+a);\r
637 d = (pm[0]<<16)|pm[1];\r
638 break;\r
639 }\r
640 case 0x02>>1: // prg RAM\r
641 if ((Pico_mcd->m.busreq&3)!=1) {\r
642 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
643 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));\r
644 d = (pm[0]<<16)|pm[1];\r
645 }\r
646 break;\r
647 case 0x20>>1: // word RAM: 200000 - 220000\r
648 wrdprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);\r
649 a&=0x1fffe;\r
650 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
651 int bank = Pico_mcd->s68k_regs[3]&1;\r
652 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+a);\r
653 d = (pm[0]<<16)|pm[1];\r
654 } else {\r
655 // allow access in any mode, like Gens does\r
656 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+a);\r
657 d = (pm[0]<<16)|pm[1];\r
658 }\r
659 wrdprintf("ret = %08x", d);\r
660 break;\r
661 case 0x22>>1: // word RAM: 220000 - 240000\r
662 wrdprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);\r
663 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode, cell arranged?\r
fa1e5e29 664 u32 a1, a2;\r
b542be46 665 int bank = Pico_mcd->s68k_regs[3]&1;\r
fa1e5e29 666 a1 = (a&2) | (cell_map(a >> 2) << 2);\r
4ff2d527 667 if (a&2) a2 = cell_map((a+2) >> 2) << 2;\r
668 else a2 = a1 + 2;\r
669 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) << 16;\r
670 d |= *(u16 *)(Pico_mcd->word_ram1M[bank]+a2);\r
bf098bc5 671 } else {\r
b542be46 672 // allow access in any mode, like Gens does\r
673 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
674 d = (pm[0]<<16)|pm[1];\r
bf098bc5 675 }\r
b542be46 676 wrdprintf("ret = %08x", d);\r
677 break;\r
678 case 0xc0>>1: case 0xc2>>1: case 0xc4>>1: case 0xc6>>1:\r
679 case 0xc8>>1: case 0xca>>1: case 0xcc>>1: case 0xce>>1:\r
680 case 0xd0>>1: case 0xd2>>1: case 0xd4>>1: case 0xd6>>1:\r
681 case 0xd8>>1: case 0xda>>1: case 0xdc>>1: case 0xde>>1:\r
682 // VDP\r
683 d = (PicoVideoRead(a)<<16)|PicoVideoRead(a+2);\r
684 break;\r
685 case 0xe0>>1: case 0xe2>>1: case 0xe4>>1: case 0xe6>>1:\r
686 case 0xe8>>1: case 0xea>>1: case 0xec>>1: case 0xee>>1:\r
687 case 0xf0>>1: case 0xf2>>1: case 0xf4>>1: case 0xf6>>1:\r
688 case 0xf8>>1: case 0xfa>>1: case 0xfc>>1: case 0xfe>>1: {\r
689 // RAM:\r
690 u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));\r
691 d = (pm[0]<<16)|pm[1];\r
692 break;\r
d0d47c5b 693 }\r
b542be46 694 default:\r
695 if ((a&0xffffc0)==0xa12000)\r
696 rdprintf("m68k_regs r32: [%02x] @%06x", a&0x3f, SekPc);\r
d0d47c5b 697\r
b542be46 698 d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);\r
672ad671 699\r
b542be46 700 if ((a&0xffffc0)==0xa12000)\r
701 rdprintf("ret = %08x", d);\r
702 break;\r
703 }\r
cc68a136 704\r
672ad671 705\r
ca61ee42 706 elprintf(EL_IO, "r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r
b5e5172d 707#ifdef EMU_CORE_DEBUG\r
708 if (a>=Pico.romsize) {\r
709 lastread_a = a;\r
710 lastread_d[lrp_cyc++&15] = d;\r
711 }\r
cc68a136 712#endif\r
713 return d;\r
714}\r
4ff2d527 715#endif\r
cc68a136 716\r
ab0607f7 717\r
cc68a136 718// -----------------------------------------------------------------\r
cc68a136 719\r
4ff2d527 720#ifdef _ASM_CD_MEMORY_C\r
721void PicoWriteM68k8(u32 a,u8 d);\r
722#else\r
81fda4e8 723void PicoWriteM68k8(u32 a,u8 d)\r
cc68a136 724{\r
ca61ee42 725 elprintf(EL_IO, "w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
b5e5172d 726#ifdef EMU_CORE_DEBUG\r
727 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
728#endif\r
cc68a136 729\r
ab0607f7 730 if ((a&0xe00000)==0xe00000) { // Ram\r
731 *(u8 *)(Pico.ram+((a^1)&0xffff)) = d;\r
732 return;\r
733 }\r
cc68a136 734\r
cc68a136 735 // prg RAM\r
721cd396 736 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {\r
672ad671 737 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
bf098bc5 738 *(u8 *)(prg_bank+((a^1)&0x1ffff))=d;\r
cc68a136 739 return;\r
740 }\r
741\r
b542be46 742 a&=0xffffff;\r
743\r
d0d47c5b 744 // word RAM\r
745 if ((a&0xfc0000)==0x200000) {\r
913ef4b7 746 wrdprintf("m68k_wram w8: [%06x] %02x @%06x", a, d, SekPc);\r
d0d47c5b 747 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
fa1e5e29 748 int bank = Pico_mcd->s68k_regs[3]&1;\r
749 if (a >= 0x220000)\r
750 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged\r
751 else a &= 0x1ffff;\r
752 *(u8 *)(Pico_mcd->word_ram1M[bank]+(a^1))=d;\r
d0d47c5b 753 } else {\r
754 // allow access in any mode, like Gens does\r
fa1e5e29 755 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;\r
d0d47c5b 756 }\r
757 return;\r
758 }\r
759\r
2433f409 760 if ((a&0xffffc0)==0xa12000) {\r
c459aefd 761 rdprintf("m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);\r
2433f409 762 m68k_reg_write8(a, d);\r
763 return;\r
764 }\r
672ad671 765\r
fb9bec94 766 OtherWrite8(a,d);\r
cc68a136 767}\r
4ff2d527 768#endif\r
cc68a136 769\r
ab0607f7 770\r
4ff2d527 771#ifdef _ASM_CD_MEMORY_C\r
772void PicoWriteM68k16(u32 a,u16 d);\r
773#else\r
774static void PicoWriteM68k16(u32 a,u16 d)\r
cc68a136 775{\r
ca61ee42 776 elprintf(EL_IO, "w16: %06x, %04x", a&0xffffff, d);\r
b5e5172d 777#ifdef EMU_CORE_DEBUG\r
778 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
779#endif\r
cc68a136 780\r
ab0607f7 781 if ((a&0xe00000)==0xe00000) { // Ram\r
782 *(u16 *)(Pico.ram+(a&0xfffe))=d;\r
783 return;\r
784 }\r
cc68a136 785\r
cc68a136 786 // prg RAM\r
721cd396 787 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {\r
672ad671 788 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
c008977e 789 wrdprintf("m68k_prgram w16: [%i,%06x] %04x @%06x", Pico_mcd->s68k_regs[3]>>6, a, d, SekPc);\r
cc68a136 790 *(u16 *)(prg_bank+(a&0x1fffe))=d;\r
791 return;\r
792 }\r
793\r
b542be46 794 a&=0xfffffe;\r
795\r
d0d47c5b 796 // word RAM\r
797 if ((a&0xfc0000)==0x200000) {\r
913ef4b7 798 wrdprintf("m68k_wram w16: [%06x] %04x @%06x", a, d, SekPc);\r
d0d47c5b 799 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
fa1e5e29 800 int bank = Pico_mcd->s68k_regs[3]&1;\r
801 if (a >= 0x220000)\r
802 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged\r
803 else a &= 0x1fffe;\r
804 *(u16 *)(Pico_mcd->word_ram1M[bank]+a)=d;\r
d0d47c5b 805 } else {\r
806 // allow access in any mode, like Gens does\r
fa1e5e29 807 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;\r
d0d47c5b 808 }\r
809 return;\r
810 }\r
811\r
7a1f6e45 812 // regs\r
813 if ((a&0xffffc0)==0xa12000) {\r
c459aefd 814 rdprintf("m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);\r
7a1f6e45 815 if (a == 0xe) { // special case, 2 byte writes would be handled differently\r
816 Pico_mcd->s68k_regs[0xe] = d >> 8;\r
817#ifdef USE_POLL_DETECT\r
818 if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {\r
6cadc2da 819 SekSetStopS68k(0); s68k_poll_adclk = 0;\r
8f8fe01e 820 elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r
7a1f6e45 821 }\r
822#endif\r
823 return;\r
824 }\r
825 m68k_reg_write8(a, d>>8);\r
826 m68k_reg_write8(a+1,d&0xff);\r
827 return;\r
828 }\r
cc68a136 829\r
b542be46 830 // VDP\r
831 if ((a&0xe700e0)==0xc00000) {\r
832 PicoVideoWrite(a,(u16)d);\r
833 return;\r
834 }\r
835\r
cc68a136 836 OtherWrite16(a,d);\r
837}\r
4ff2d527 838#endif\r
cc68a136 839\r
ab0607f7 840\r
4ff2d527 841#ifdef _ASM_CD_MEMORY_C\r
842void PicoWriteM68k32(u32 a,u32 d);\r
843#else\r
844static void PicoWriteM68k32(u32 a,u32 d)\r
cc68a136 845{\r
ca61ee42 846 elprintf(EL_IO, "w32: %06x, %08x", a&0xffffff, d);\r
b5e5172d 847#ifdef EMU_CORE_DEBUG\r
848 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
849#endif\r
cc68a136 850\r
851 if ((a&0xe00000)==0xe00000)\r
852 {\r
853 // Ram:\r
854 u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));\r
855 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
856 return;\r
857 }\r
858\r
cc68a136 859 // prg RAM\r
721cd396 860 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {\r
672ad671 861 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
cc68a136 862 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));\r
863 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
864 return;\r
865 }\r
866\r
b542be46 867 a&=0xfffffe;\r
868\r
672ad671 869 // word RAM\r
d0d47c5b 870 if ((a&0xfc0000)==0x200000) {\r
871 if (d != 0) // don't log clears\r
913ef4b7 872 wrdprintf("m68k_wram w32: [%06x] %08x @%06x", a, d, SekPc);\r
d0d47c5b 873 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
fa1e5e29 874 int bank = Pico_mcd->s68k_regs[3]&1;\r
875 if (a >= 0x220000) { // cell arranged\r
876 u32 a1, a2;\r
877 a1 = (a&2) | (cell_map(a >> 2) << 2);\r
4ff2d527 878 if (a&2) a2 = cell_map((a+2) >> 2) << 2;\r
879 else a2 = a1 + 2;\r
880 *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) = d >> 16;\r
881 *(u16 *)(Pico_mcd->word_ram1M[bank]+a2) = d;\r
bf098bc5 882 } else {\r
fa1e5e29 883 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
884 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
bf098bc5 885 }\r
d0d47c5b 886 } else {\r
887 // allow access in any mode, like Gens does\r
fa1e5e29 888 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
d0d47c5b 889 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
890 }\r
672ad671 891 return;\r
d0d47c5b 892 }\r
672ad671 893\r
2433f409 894 if ((a&0xffffc0)==0xa12000) {\r
c459aefd 895 rdprintf("m68k_regs w32: [%02x] %08x @%06x", a&0x3f, d, SekPc);\r
2433f409 896 if ((a&0x3e) == 0xe) dprintf("m68k FIXME: w32 [%02x]", a&0x3f);\r
897 }\r
cc68a136 898\r
b542be46 899 // VDP\r
900 if ((a&0xe700e0)==0xc00000)\r
901 {\r
902 PicoVideoWrite(a, (u16)(d>>16));\r
903 PicoVideoWrite(a+2,(u16)d);\r
904 return;\r
905 }\r
906\r
cc68a136 907 OtherWrite16(a, (u16)(d>>16));\r
908 OtherWrite16(a+2,(u16)d);\r
909}\r
4ff2d527 910#endif\r
cc68a136 911\r
912\r
721cd396 913// -----------------------------------------------------------------\r
914// S68k\r
cc68a136 915// -----------------------------------------------------------------\r
916\r
4ff2d527 917#ifdef _ASM_CD_MEMORY_C\r
0af33fe0 918u32 PicoReadS68k8(u32 a);\r
4ff2d527 919#else\r
0af33fe0 920static u32 PicoReadS68k8(u32 a)\r
cc68a136 921{\r
922 u32 d=0;\r
923\r
b5e5172d 924#ifdef EMU_CORE_DEBUG\r
925 u32 ab=a&0xfffffe;\r
926#endif\r
cc68a136 927 a&=0xffffff;\r
928\r
929 // prg RAM\r
930 if (a < 0x80000) {\r
931 d = *(Pico_mcd->prg_ram+(a^1));\r
932 goto end;\r
933 }\r
934\r
935 // regs\r
936 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 937 a &= 0x1ff;\r
938 rdprintf("s68k_regs r8: [%02x] @ %06x", a, SekPcS68k);\r
2433f409 939 if (a >= 0x0e && a < 0x30) {\r
940 d = Pico_mcd->s68k_regs[a];\r
941 s68k_poll_detect(a, d);\r
942 rdprintf("ret = %02x", (u8)d);\r
943 goto end;\r
944 }\r
945 else if (a >= 0x58 && a < 0x68)\r
cb4a513a 946 d = gfx_cd_read(a&~1);\r
947 else d = s68k_reg_read16(a&~1);\r
948 if ((a&1)==0) d>>=8;\r
c459aefd 949 rdprintf("ret = %02x", (u8)d);\r
cc68a136 950 goto end;\r
951 }\r
952\r
d0d47c5b 953 // word RAM (2M area)\r
954 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
fa1e5e29 955 // test: batman returns\r
913ef4b7 956 wrdprintf("s68k_wram2M r8: [%06x] @%06x", a, SekPcS68k);\r
fa1e5e29 957 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
3aa1e148 958 int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 959 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];\r
960 if (a&1) d &= 0x0f;\r
961 else d >>= 4;\r
d0d47c5b 962 } else {\r
963 // allow access in any mode, like Gens does\r
fa1e5e29 964 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];\r
d0d47c5b 965 }\r
913ef4b7 966 wrdprintf("ret = %02x", (u8)d);\r
d0d47c5b 967 goto end;\r
968 }\r
969\r
970 // word RAM (1M area)\r
68cba51e 971 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
fa1e5e29 972 int bank;\r
913ef4b7 973 wrdprintf("s68k_wram1M r8: [%06x] @%06x", a, SekPcS68k);\r
68cba51e 974// if (!(Pico_mcd->s68k_regs[3]&4))\r
975// dprintf("s68k_wram1M FIXME: wrong mode");\r
3aa1e148 976 bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 977 d = Pico_mcd->word_ram1M[bank][(a^1)&0x1ffff];\r
913ef4b7 978 wrdprintf("ret = %02x", (u8)d);\r
d0d47c5b 979 goto end;\r
980 }\r
981\r
4f265db7 982 // PCM\r
983 if ((a&0xff8000)==0xff0000) {\r
ca61ee42 984 elprintf(EL_IO, "s68k_pcm r8: [%06x] @%06x", a, SekPcS68k);\r
4f265db7 985 a &= 0x7fff;\r
986 if (a >= 0x2000)\r
987 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];\r
988 else if (a >= 0x20) {\r
989 a &= 0x1e;\r
990 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r
991 if (a & 2) d >>= 8;\r
992 }\r
ca61ee42 993 elprintf(EL_IO, "ret = %02x", (u8)d);\r
4f265db7 994 goto end;\r
995 }\r
996\r
ab0607f7 997 // bram\r
998 if ((a&0xff0000)==0xfe0000) {\r
999 d = Pico_mcd->bram[(a>>1)&0x1fff];\r
1000 goto end;\r
1001 }\r
1002\r
ca61ee42 1003 elprintf(EL_UIO, "s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);\r
cc68a136 1004\r
1005 end:\r
1006\r
ca61ee42 1007 elprintf(EL_IO, "s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);\r
b5e5172d 1008#ifdef EMU_CORE_DEBUG\r
1009 lastread_a = ab;\r
1010 lastread_d[lrp_cyc++&15] = d;\r
cc68a136 1011#endif\r
0af33fe0 1012 return d;\r
cc68a136 1013}\r
4ff2d527 1014#endif\r
cc68a136 1015\r
ab0607f7 1016\r
4ff2d527 1017#ifdef _ASM_CD_MEMORY_C\r
0af33fe0 1018u32 PicoReadS68k16(u32 a);\r
4ff2d527 1019#else\r
0af33fe0 1020static u32 PicoReadS68k16(u32 a)\r
cc68a136 1021{\r
4f265db7 1022 u32 d=0;\r
cc68a136 1023\r
b5e5172d 1024#ifdef EMU_CORE_DEBUG\r
1025 u32 ab=a&0xfffffe;\r
1026#endif\r
cc68a136 1027 a&=0xfffffe;\r
1028\r
1029 // prg RAM\r
1030 if (a < 0x80000) {\r
c008977e 1031 wrdprintf("s68k_prgram r16: [%06x] @%06x", a, SekPcS68k);\r
cc68a136 1032 d = *(u16 *)(Pico_mcd->prg_ram+a);\r
c008977e 1033 wrdprintf("ret = %04x", d);\r
cc68a136 1034 goto end;\r
1035 }\r
1036\r
1037 // regs\r
1038 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 1039 a &= 0x1fe;\r
1040 rdprintf("s68k_regs r16: [%02x] @ %06x", a, SekPcS68k);\r
913ef4b7 1041 if (a >= 0x58 && a < 0x68)\r
cb4a513a 1042 d = gfx_cd_read(a);\r
1043 else d = s68k_reg_read16(a);\r
c459aefd 1044 rdprintf("ret = %04x", d);\r
cc68a136 1045 goto end;\r
1046 }\r
1047\r
d0d47c5b 1048 // word RAM (2M area)\r
1049 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
913ef4b7 1050 wrdprintf("s68k_wram2M r16: [%06x] @%06x", a, SekPcS68k);\r
fa1e5e29 1051 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
3aa1e148 1052 int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1053 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];\r
1054 d |= d << 4; d &= ~0xf0;\r
d0d47c5b 1055 } else {\r
1056 // allow access in any mode, like Gens does\r
fa1e5e29 1057 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
d0d47c5b 1058 }\r
913ef4b7 1059 wrdprintf("ret = %04x", d);\r
d0d47c5b 1060 goto end;\r
1061 }\r
1062\r
1063 // word RAM (1M area)\r
68cba51e 1064 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
fa1e5e29 1065 int bank;\r
913ef4b7 1066 wrdprintf("s68k_wram1M r16: [%06x] @%06x", a, SekPcS68k);\r
68cba51e 1067// if (!(Pico_mcd->s68k_regs[3]&4))\r
1068// dprintf("s68k_wram1M FIXME: wrong mode");\r
3aa1e148 1069 bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1070 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
913ef4b7 1071 wrdprintf("ret = %04x", d);\r
ab0607f7 1072 goto end;\r
1073 }\r
1074\r
1075 // bram\r
1076 if ((a&0xff0000)==0xfe0000) {\r
4ff2d527 1077 dprintf("FIXME: s68k_bram r16: [%06x] @%06x", a, SekPcS68k);\r
ab0607f7 1078 a = (a>>1)&0x1fff;\r
4f265db7 1079 d = Pico_mcd->bram[a++]; // Gens does little endian here, and so do we..\r
4ff2d527 1080 d|= Pico_mcd->bram[a++] << 8; // This is most likely wrong\r
ab0607f7 1081 dprintf("ret = %04x", d);\r
d0d47c5b 1082 goto end;\r
1083 }\r
1084\r
4f265db7 1085 // PCM\r
1086 if ((a&0xff8000)==0xff0000) {\r
4ff2d527 1087 dprintf("FIXME: s68k_pcm r16: [%06x] @%06x", a, SekPcS68k);\r
4f265db7 1088 a &= 0x7fff;\r
1089 if (a >= 0x2000)\r
1090 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];\r
1091 else if (a >= 0x20) {\r
1092 a &= 0x1e;\r
1093 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r
1094 if (a & 2) d >>= 8;\r
1095 }\r
1096 dprintf("ret = %04x", d);\r
1097 goto end;\r
1098 }\r
1099\r
ca61ee42 1100 elprintf(EL_UIO, "s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
cc68a136 1101\r
1102 end:\r
1103\r
ca61ee42 1104 elprintf(EL_IO, "s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
b5e5172d 1105#ifdef EMU_CORE_DEBUG\r
1106 lastread_a = ab;\r
1107 lastread_d[lrp_cyc++&15] = d;\r
cc68a136 1108#endif\r
1109 return d;\r
1110}\r
4ff2d527 1111#endif\r
cc68a136 1112\r
ab0607f7 1113\r
4ff2d527 1114#ifdef _ASM_CD_MEMORY_C\r
1115u32 PicoReadS68k32(u32 a);\r
1116#else\r
1117static u32 PicoReadS68k32(u32 a)\r
cc68a136 1118{\r
1119 u32 d=0;\r
1120\r
b5e5172d 1121#ifdef EMU_CORE_DEBUG\r
1122 u32 ab=a&0xfffffe;\r
1123#endif\r
cc68a136 1124 a&=0xfffffe;\r
1125\r
1126 // prg RAM\r
1127 if (a < 0x80000) {\r
1128 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);\r
1129 d = (pm[0]<<16)|pm[1];\r
1130 goto end;\r
1131 }\r
1132\r
1133 // regs\r
1134 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 1135 a &= 0x1fe;\r
1136 rdprintf("s68k_regs r32: [%02x] @ %06x", a, SekPcS68k);\r
913ef4b7 1137 if (a >= 0x58 && a < 0x68)\r
cb4a513a 1138 d = (gfx_cd_read(a)<<16)|gfx_cd_read(a+2);\r
1139 else d = (s68k_reg_read16(a)<<16)|s68k_reg_read16(a+2);\r
c459aefd 1140 rdprintf("ret = %08x", d);\r
cc68a136 1141 goto end;\r
1142 }\r
1143\r
d0d47c5b 1144 // word RAM (2M area)\r
1145 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
913ef4b7 1146 wrdprintf("s68k_wram2M r32: [%06x] @%06x", a, SekPcS68k);\r
fa1e5e29 1147 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
3aa1e148 1148 int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1149 a >>= 1;\r
1150 d = Pico_mcd->word_ram1M[bank][((a+0)^1)&0x1ffff] << 16;\r
1151 d |= Pico_mcd->word_ram1M[bank][((a+1)^1)&0x1ffff];\r
1152 d |= d << 4; d &= 0x0f0f0f0f;\r
d0d47c5b 1153 } else {\r
1154 // allow access in any mode, like Gens does\r
fa1e5e29 1155 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];\r
d0d47c5b 1156 }\r
913ef4b7 1157 wrdprintf("ret = %08x", d);\r
d0d47c5b 1158 goto end;\r
1159 }\r
1160\r
1161 // word RAM (1M area)\r
68cba51e 1162 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
fa1e5e29 1163 int bank;\r
dca310c4 1164 u16 *pm;\r
913ef4b7 1165 wrdprintf("s68k_wram1M r32: [%06x] @%06x", a, SekPcS68k);\r
68cba51e 1166// if (!(Pico_mcd->s68k_regs[3]&4))\r
1167// dprintf("s68k_wram1M FIXME: wrong mode");\r
3aa1e148 1168 bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
dca310c4 1169 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];\r
913ef4b7 1170 wrdprintf("ret = %08x", d);\r
ab0607f7 1171 goto end;\r
1172 }\r
1173\r
4f265db7 1174 // PCM\r
1175 if ((a&0xff8000)==0xff0000) {\r
2433f409 1176 dprintf("s68k_pcm r32: [%06x] @%06x", a, SekPcS68k);\r
4f265db7 1177 a &= 0x7fff;\r
1178 if (a >= 0x2000) {\r
1179 a >>= 1;\r
1180 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] << 16;\r
1181 d |= Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff];\r
1182 } else if (a >= 0x20) {\r
1183 a &= 0x1e;\r
1184 if (a & 2) {\r
1185 a >>= 2;\r
1186 d = (Pico_mcd->pcm.ch[a].addr >> (PCM_STEP_SHIFT-8)) & 0xff0000;\r
1187 d |= (Pico_mcd->pcm.ch[(a+1)&7].addr >> PCM_STEP_SHIFT) & 0xff;\r
1188 } else {\r
1189 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r
1190 d = ((d<<16)&0xff0000) | ((d>>8)&0xff); // PCM chip is LE\r
1191 }\r
1192 }\r
1193 dprintf("ret = %08x", d);\r
1194 goto end;\r
1195 }\r
1196\r
ab0607f7 1197 // bram\r
1198 if ((a&0xff0000)==0xfe0000) {\r
4ff2d527 1199 dprintf("FIXME: s68k_bram r32: [%06x] @%06x", a, SekPcS68k);\r
ab0607f7 1200 a = (a>>1)&0x1fff;\r
1201 d = Pico_mcd->bram[a++] << 16; // middle endian? TODO: verify against Fusion..\r
1202 d|= Pico_mcd->bram[a++] << 24;\r
1203 d|= Pico_mcd->bram[a++];\r
1204 d|= Pico_mcd->bram[a++] << 8;\r
1205 dprintf("ret = %08x", d);\r
d0d47c5b 1206 goto end;\r
1207 }\r
1208\r
ca61ee42 1209 elprintf(EL_UIO, "s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
cc68a136 1210\r
1211 end:\r
1212\r
ca61ee42 1213 elprintf(EL_IO, "s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
b5e5172d 1214#ifdef EMU_CORE_DEBUG\r
1215 if (ab > 0x78) { // not vectors and stuff\r
1216 lastread_a = ab;\r
1217 lastread_d[lrp_cyc++&15] = d;\r
1218 }\r
cc68a136 1219#endif\r
1220 return d;\r
1221}\r
4ff2d527 1222#endif\r
cc68a136 1223\r
ab0607f7 1224\r
a4030801 1225#ifndef _ASM_CD_MEMORY_C\r
0a051f55 1226/* check: jaguar xj 220 (draws entire world using decode) */\r
1227static void decode_write8(u32 a, u8 d, int r3)\r
1228{\r
3aa1e148 1229 u8 *pd = Pico_mcd->word_ram1M[(r3 & 1)^1] + (((a>>1)^1)&0x1ffff);\r
0a051f55 1230 u8 oldmask = (a&1) ? 0xf0 : 0x0f;\r
1231\r
0a051f55 1232 r3 &= 0x18;\r
1233 d &= 0x0f;\r
1234 if (!(a&1)) d <<= 4;\r
1235\r
0a051f55 1236 if (r3 == 8) {\r
1237 if ((!(*pd & (~oldmask))) && d) goto do_it;\r
1238 } else if (r3 > 8) {\r
1239 if (d) goto do_it;\r
1240 } else {\r
1241 goto do_it;\r
1242 }\r
1243\r
1244 return;\r
1245do_it:\r
1246 *pd = d | (*pd & oldmask);\r
1247}\r
1248\r
1249\r
1250static void decode_write16(u32 a, u16 d, int r3)\r
1251{\r
3aa1e148 1252 u8 *pd = Pico_mcd->word_ram1M[(r3 & 1)^1] + (((a>>1)^1)&0x1ffff);\r
0a051f55 1253\r
1254 //if ((a & 0x3ffff) < 0x28000) return;\r
1255\r
1256 r3 &= 0x18;\r
1257 d &= 0x0f0f;\r
1258 d |= d >> 4;\r
1259\r
1260 if (r3 == 8) {\r
1261 u8 dold = *pd;\r
1262 if (!(dold & 0xf0)) dold |= d & 0xf0;\r
1263 if (!(dold & 0x0f)) dold |= d & 0x0f;\r
1264 *pd = dold;\r
1265 } else if (r3 > 8) {\r
1266 u8 dold = *pd;\r
1267 if (!(d & 0xf0)) d |= dold & 0xf0;\r
1268 if (!(d & 0x0f)) d |= dold & 0x0f;\r
1269 *pd = d;\r
1270 } else {\r
1271 *pd = d;\r
1272 }\r
0a051f55 1273}\r
a4030801 1274#endif\r
0a051f55 1275\r
cc68a136 1276// -----------------------------------------------------------------\r
1277\r
4ff2d527 1278#ifdef _ASM_CD_MEMORY_C\r
1279void PicoWriteS68k8(u32 a,u8 d);\r
1280#else\r
1281static void PicoWriteS68k8(u32 a,u8 d)\r
cc68a136 1282{\r
ca61ee42 1283 elprintf(EL_IO, "s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);\r
cc68a136 1284\r
1285 a&=0xffffff;\r
1286\r
b5e5172d 1287#ifdef EMU_CORE_DEBUG\r
1288 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
1289#endif\r
1290\r
cc68a136 1291 // prg RAM\r
1292 if (a < 0x80000) {\r
1293 u8 *pm=(u8 *)(Pico_mcd->prg_ram+(a^1));\r
721cd396 1294 if (a >= (Pico_mcd->s68k_regs[2]<<8)) *pm=d;\r
cc68a136 1295 return;\r
1296 }\r
1297\r
1298 // regs\r
1299 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 1300 a &= 0x1ff;\r
1301 rdprintf("s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k);\r
913ef4b7 1302 if (a >= 0x58 && a < 0x68)\r
48e8482f 1303 gfx_cd_write16(a&~1, (d<<8)|d);\r
cb4a513a 1304 else s68k_reg_write8(a,d);\r
cc68a136 1305 return;\r
1306 }\r
1307\r
d0d47c5b 1308 // word RAM (2M area)\r
1309 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
0a051f55 1310 int r3 = Pico_mcd->s68k_regs[3];\r
913ef4b7 1311 wrdprintf("s68k_wram2M w8: [%06x] %02x @%06x", a, d, SekPcS68k);\r
0a051f55 1312 if (r3 & 4) { // 1M decode mode?\r
1313 decode_write8(a, d, r3);\r
d0d47c5b 1314 } else {\r
1315 // allow access in any mode, like Gens does\r
fa1e5e29 1316 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;\r
d0d47c5b 1317 }\r
1318 return;\r
1319 }\r
1320\r
1321 // word RAM (1M area)\r
68cba51e 1322 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
1323 // Wing Commander tries to write here in wrong mode\r
fa1e5e29 1324 int bank;\r
d0d47c5b 1325 if (d)\r
913ef4b7 1326 wrdprintf("s68k_wram1M w8: [%06x] %02x @%06x", a, d, SekPcS68k);\r
68cba51e 1327// if (!(Pico_mcd->s68k_regs[3]&4))\r
1328// dprintf("s68k_wram1M FIXME: wrong mode");\r
3aa1e148 1329 bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1330 *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff))=d;\r
d0d47c5b 1331 return;\r
1332 }\r
1333\r
4f265db7 1334 // PCM\r
1335 if ((a&0xff8000)==0xff0000) {\r
1336 a &= 0x7fff;\r
1337 if (a >= 0x2000)\r
1338 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;\r
1339 else if (a < 0x12)\r
1340 pcm_write(a>>1, d);\r
1341 return;\r
1342 }\r
1343\r
ab0607f7 1344 // bram\r
1345 if ((a&0xff0000)==0xfe0000) {\r
1346 Pico_mcd->bram[(a>>1)&0x1fff] = d;\r
1347 SRam.changed = 1;\r
1348 return;\r
1349 }\r
1350\r
ca61ee42 1351 elprintf(EL_UIO, "s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);\r
cc68a136 1352}\r
4ff2d527 1353#endif\r
cc68a136 1354\r
ab0607f7 1355\r
4ff2d527 1356#ifdef _ASM_CD_MEMORY_C\r
1357void PicoWriteS68k16(u32 a,u16 d);\r
1358#else\r
1359static void PicoWriteS68k16(u32 a,u16 d)\r
cc68a136 1360{\r
ca61ee42 1361 elprintf(EL_IO, "s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
cc68a136 1362\r
1363 a&=0xfffffe;\r
1364\r
b5e5172d 1365#ifdef EMU_CORE_DEBUG\r
1366 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
1367#endif\r
1368\r
cc68a136 1369 // prg RAM\r
1370 if (a < 0x80000) {\r
c008977e 1371 wrdprintf("s68k_prgram w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
721cd396 1372 if (a >= (Pico_mcd->s68k_regs[2]<<8)) // needed for Dungeon Explorer\r
1373 *(u16 *)(Pico_mcd->prg_ram+a)=d;\r
cc68a136 1374 return;\r
1375 }\r
1376\r
1377 // regs\r
1378 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 1379 a &= 0x1fe;\r
1380 rdprintf("s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k);\r
913ef4b7 1381 if (a >= 0x58 && a < 0x68)\r
48e8482f 1382 gfx_cd_write16(a, d);\r
cb4a513a 1383 else {\r
1cd356a3 1384 if (a == 0xe) { // special case, 2 byte writes would be handled differently\r
1385 Pico_mcd->s68k_regs[0xf] = d;\r
4ff2d527 1386 return;\r
1cd356a3 1387 }\r
cb4a513a 1388 s68k_reg_write8(a, d>>8);\r
1389 s68k_reg_write8(a+1,d&0xff);\r
1390 }\r
cc68a136 1391 return;\r
1392 }\r
1393\r
d0d47c5b 1394 // word RAM (2M area)\r
1395 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
0a051f55 1396 int r3 = Pico_mcd->s68k_regs[3];\r
913ef4b7 1397 wrdprintf("s68k_wram2M w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
0a051f55 1398 if (r3 & 4) { // 1M decode mode?\r
1399 decode_write16(a, d, r3);\r
d0d47c5b 1400 } else {\r
1401 // allow access in any mode, like Gens does\r
fa1e5e29 1402 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;\r
d0d47c5b 1403 }\r
1404 return;\r
1405 }\r
1406\r
1407 // word RAM (1M area)\r
68cba51e 1408 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
fa1e5e29 1409 int bank;\r
d0d47c5b 1410 if (d)\r
913ef4b7 1411 wrdprintf("s68k_wram1M w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
68cba51e 1412// if (!(Pico_mcd->s68k_regs[3]&4))\r
1413// dprintf("s68k_wram1M FIXME: wrong mode");\r
3aa1e148 1414 bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1415 *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe))=d;\r
d0d47c5b 1416 return;\r
1417 }\r
1418\r
4f265db7 1419 // PCM\r
1420 if ((a&0xff8000)==0xff0000) {\r
1421 a &= 0x7fff;\r
1422 if (a >= 0x2000)\r
1423 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;\r
1424 else if (a < 0x12)\r
1425 pcm_write(a>>1, d & 0xff);\r
1426 return;\r
1427 }\r
1428\r
ab0607f7 1429 // bram\r
1430 if ((a&0xff0000)==0xfe0000) {\r
1cd356a3 1431 dprintf("s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
ab0607f7 1432 a = (a>>1)&0x1fff;\r
1433 Pico_mcd->bram[a++] = d; // Gens does little endian here, an so do we..\r
1434 Pico_mcd->bram[a++] = d >> 8;\r
1435 SRam.changed = 1;\r
1436 return;\r
1437 }\r
1438\r
ca61ee42 1439 elprintf(EL_UIO, "s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
cc68a136 1440}\r
4ff2d527 1441#endif\r
cc68a136 1442\r
ab0607f7 1443\r
4ff2d527 1444#ifdef _ASM_CD_MEMORY_C\r
1445void PicoWriteS68k32(u32 a,u32 d);\r
1446#else\r
1447static void PicoWriteS68k32(u32 a,u32 d)\r
cc68a136 1448{\r
ca61ee42 1449 elprintf(EL_IO, "s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
cc68a136 1450\r
1451 a&=0xfffffe;\r
1452\r
b5e5172d 1453#ifdef EMU_CORE_DEBUG\r
1454 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
1455#endif\r
1456\r
cc68a136 1457 // prg RAM\r
1458 if (a < 0x80000) {\r
721cd396 1459 if (a >= (Pico_mcd->s68k_regs[2]<<8)) {\r
1460 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);\r
1461 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
1462 }\r
cc68a136 1463 return;\r
1464 }\r
1465\r
1466 // regs\r
1467 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 1468 a &= 0x1fe;\r
1469 rdprintf("s68k_regs w32: [%02x] %08x @ %06x", a, d, SekPcS68k);\r
913ef4b7 1470 if (a >= 0x58 && a < 0x68) {\r
48e8482f 1471 gfx_cd_write16(a, d>>16);\r
1472 gfx_cd_write16(a+2, d&0xffff);\r
cb4a513a 1473 } else {\r
2433f409 1474 if ((a&0x1fe) == 0xe) dprintf("s68k FIXME: w32 [%02x]", a&0x3f);\r
cb4a513a 1475 s68k_reg_write8(a, d>>24);\r
1476 s68k_reg_write8(a+1,(d>>16)&0xff);\r
1477 s68k_reg_write8(a+2,(d>>8) &0xff);\r
1478 s68k_reg_write8(a+3, d &0xff);\r
1479 }\r
cc68a136 1480 return;\r
1481 }\r
1482\r
d0d47c5b 1483 // word RAM (2M area)\r
1484 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
0a051f55 1485 int r3 = Pico_mcd->s68k_regs[3];\r
913ef4b7 1486 wrdprintf("s68k_wram2M w32: [%06x] %08x @%06x", a, d, SekPcS68k);\r
0a051f55 1487 if (r3 & 4) { // 1M decode mode?\r
1488 decode_write16(a , d >> 16, r3);\r
1489 decode_write16(a+2, d , r3);\r
d0d47c5b 1490 } else {\r
1491 // allow access in any mode, like Gens does\r
fa1e5e29 1492 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
d0d47c5b 1493 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
1494 }\r
1495 return;\r
1496 }\r
1497\r
1498 // word RAM (1M area)\r
68cba51e 1499 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
fa1e5e29 1500 int bank;\r
1501 u16 *pm;\r
d0d47c5b 1502 if (d)\r
913ef4b7 1503 wrdprintf("s68k_wram1M w32: [%06x] %08x @%06x", a, d, SekPcS68k);\r
68cba51e 1504// if (!(Pico_mcd->s68k_regs[3]&4))\r
1505// dprintf("s68k_wram1M FIXME: wrong mode");\r
3aa1e148 1506 bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1507 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1508 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
d0d47c5b 1509 return;\r
1510 }\r
ab0607f7 1511\r
4f265db7 1512 // PCM\r
1513 if ((a&0xff8000)==0xff0000) {\r
1514 a &= 0x7fff;\r
1515 if (a >= 0x2000) {\r
1516 a >>= 1;\r
1517 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] = (d >> 16);\r
1518 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff] = d;\r
1519 } else if (a < 0x12) {\r
1520 a >>= 1;\r
1521 pcm_write(a, (d>>16) & 0xff);\r
1522 pcm_write(a+1, d & 0xff);\r
1523 }\r
1524 return;\r
1525 }\r
1526\r
ab0607f7 1527 // bram\r
1528 if ((a&0xff0000)==0xfe0000) {\r
1cd356a3 1529 dprintf("s68k_bram w32: [%06x] %08x @%06x", a, d, SekPcS68k);\r
ab0607f7 1530 a = (a>>1)&0x1fff;\r
1531 Pico_mcd->bram[a++] = d >> 16; // middle endian? verify?\r
1532 Pico_mcd->bram[a++] = d >> 24;\r
1533 Pico_mcd->bram[a++] = d;\r
1534 Pico_mcd->bram[a++] = d >> 8;\r
1535 SRam.changed = 1;\r
1536 return;\r
1537 }\r
1538\r
ca61ee42 1539 elprintf(EL_UIO, "s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
cc68a136 1540}\r
4ff2d527 1541#endif\r
cc68a136 1542\r
1543\r
1544// -----------------------------------------------------------------\r
1545\r
b837b69b 1546\r
3aa1e148 1547#ifdef EMU_C68K\r
b837b69b 1548static __inline int PicoMemBaseM68k(u32 pc)\r
1549{\r
fa1e5e29 1550 if ((pc&0xe00000)==0xe00000)\r
1551 return (int)Pico.ram-(pc&0xff0000); // Program Counter in Ram\r
b837b69b 1552\r
1553 if (pc < 0x20000)\r
fa1e5e29 1554 return (int)Pico_mcd->bios; // Program Counter in BIOS\r
1555\r
1556 if ((pc&0xfc0000)==0x200000)\r
b837b69b 1557 {\r
fa1e5e29 1558 if (!(Pico_mcd->s68k_regs[3]&4))\r
1559 return (int)Pico_mcd->word_ram2M - 0x200000; // Program Counter in Word Ram\r
1560 if (pc < 0x220000) {\r
3aa1e148 1561 int bank = Pico_mcd->s68k_regs[3]&1;\r
fa1e5e29 1562 return (int)Pico_mcd->word_ram1M[bank] - 0x200000;\r
1563 }\r
b837b69b 1564 }\r
1565\r
fa1e5e29 1566 // Error - Program Counter is invalid\r
ca61ee42 1567 elprintf(EL_ANOMALY, "m68k FIXME: unhandled jump to %06x", pc);\r
fa1e5e29 1568\r
1569 return (int)Pico_mcd->bios;\r
b837b69b 1570}\r
1571\r
1572\r
1573static u32 PicoCheckPcM68k(u32 pc)\r
1574{\r
3aa1e148 1575 pc-=PicoCpuCM68k.membase; // Get real pc\r
b837b69b 1576 pc&=0xfffffe;\r
1577\r
3aa1e148 1578 PicoCpuCM68k.membase=PicoMemBaseM68k(pc);\r
b837b69b 1579\r
3aa1e148 1580 return PicoCpuCM68k.membase+pc;\r
b837b69b 1581}\r
1582\r
1583\r
1584static __inline int PicoMemBaseS68k(u32 pc)\r
1585{\r
fa1e5e29 1586 if (pc < 0x80000) // PRG RAM\r
1587 return (int)Pico_mcd->prg_ram;\r
b837b69b 1588\r
fa1e5e29 1589 if ((pc&0xfc0000)==0x080000) // WORD RAM 2M area (assume we are in the right mode..)\r
1590 return (int)Pico_mcd->word_ram2M - 0x080000;\r
1591\r
1592 if ((pc&0xfe0000)==0x0c0000) { // word RAM 1M area\r
3aa1e148 1593 int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1594 return (int)Pico_mcd->word_ram1M[bank] - 0x0c0000;\r
b837b69b 1595 }\r
1596\r
fa1e5e29 1597 // Error - Program Counter is invalid\r
ca61ee42 1598 elprintf(EL_ANOMALY, "s68k FIXME: unhandled jump to %06x", pc);\r
fa1e5e29 1599\r
1600 return (int)Pico_mcd->prg_ram;\r
b837b69b 1601}\r
1602\r
1603\r
1604static u32 PicoCheckPcS68k(u32 pc)\r
1605{\r
3aa1e148 1606 pc-=PicoCpuCS68k.membase; // Get real pc\r
b837b69b 1607 pc&=0xfffffe;\r
1608\r
3aa1e148 1609 PicoCpuCS68k.membase=PicoMemBaseS68k(pc);\r
b837b69b 1610\r
3aa1e148 1611 return PicoCpuCS68k.membase+pc;\r
b837b69b 1612}\r
1613#endif\r
1614\r
3aa1e148 1615#ifndef _ASM_CD_MEMORY_C\r
1616void PicoMemResetCD(int r3)\r
1617{\r
1618#ifdef EMU_F68K\r
1619 // update fetchmap..\r
1620 int i;\r
1621 if (!(r3 & 4))\r
1622 {\r
1623 for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x240000; i++)\r
1624 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram2M - 0x200000;\r
1625 }\r
1626 else\r
1627 {\r
1628 for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x220000; i++)\r
1629 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram1M[r3 & 1] - 0x200000;\r
1630 for (i = M68K_FETCHBANK1*0x0c/0x100; (i<<(24-FAMEC_FETCHBITS)) < 0x0e0000; i++)\r
1631 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram1M[(r3&1)^1] - 0x0c0000;\r
1632 }\r
1633#endif\r
1634}\r
1635#endif\r
b837b69b 1636\r
9037e45d 1637#ifdef EMU_M68K\r
1638static void m68k_mem_setup_cd(void);\r
1639#endif\r
1640\r
eff55556 1641PICO_INTERNAL void PicoMemSetupCD(void)\r
b837b69b 1642{\r
f53f286a 1643 // additional handlers for common code\r
1644 PicoRead16Hook = OtherRead16End;\r
1645 PicoWrite8Hook = OtherWrite8End;\r
1646\r
b837b69b 1647#ifdef EMU_C68K\r
1648 // Setup m68k memory callbacks:\r
3aa1e148 1649 PicoCpuCM68k.checkpc=PicoCheckPcM68k;\r
1650 PicoCpuCM68k.fetch8 =PicoCpuCM68k.read8 =PicoReadM68k8;\r
1651 PicoCpuCM68k.fetch16=PicoCpuCM68k.read16=PicoReadM68k16;\r
1652 PicoCpuCM68k.fetch32=PicoCpuCM68k.read32=PicoReadM68k32;\r
1653 PicoCpuCM68k.write8 =PicoWriteM68k8;\r
1654 PicoCpuCM68k.write16=PicoWriteM68k16;\r
1655 PicoCpuCM68k.write32=PicoWriteM68k32;\r
b837b69b 1656 // s68k\r
3aa1e148 1657 PicoCpuCS68k.checkpc=PicoCheckPcS68k;\r
1658 PicoCpuCS68k.fetch8 =PicoCpuCS68k.read8 =PicoReadS68k8;\r
1659 PicoCpuCS68k.fetch16=PicoCpuCS68k.read16=PicoReadS68k16;\r
1660 PicoCpuCS68k.fetch32=PicoCpuCS68k.read32=PicoReadS68k32;\r
1661 PicoCpuCS68k.write8 =PicoWriteS68k8;\r
1662 PicoCpuCS68k.write16=PicoWriteS68k16;\r
1663 PicoCpuCS68k.write32=PicoWriteS68k32;\r
b837b69b 1664#endif\r
3aa1e148 1665#ifdef EMU_F68K\r
1666 // m68k\r
1667 PicoCpuFM68k.read_byte =PicoReadM68k8;\r
1668 PicoCpuFM68k.read_word =PicoReadM68k16;\r
1669 PicoCpuFM68k.read_long =PicoReadM68k32;\r
1670 PicoCpuFM68k.write_byte=PicoWriteM68k8;\r
1671 PicoCpuFM68k.write_word=PicoWriteM68k16;\r
1672 PicoCpuFM68k.write_long=PicoWriteM68k32;\r
1673 // s68k\r
1674 PicoCpuFS68k.read_byte =PicoReadS68k8;\r
1675 PicoCpuFS68k.read_word =PicoReadS68k16;\r
1676 PicoCpuFS68k.read_long =PicoReadS68k32;\r
1677 PicoCpuFS68k.write_byte=PicoWriteS68k8;\r
1678 PicoCpuFS68k.write_word=PicoWriteS68k16;\r
1679 PicoCpuFS68k.write_long=PicoWriteS68k32;\r
1680\r
1681 // setup FAME fetchmap\r
1682 {\r
1683 int i;\r
1684 // M68k\r
1685 // by default, point everything to fitst 64k of ROM (BIOS)\r
1686 for (i = 0; i < M68K_FETCHBANK1; i++)\r
1687 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r
1688 // now real ROM (BIOS)\r
1689 for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)\r
1690 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom;\r
1691 // .. and RAM\r
1692 for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)\r
1693 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.ram - (i<<(24-FAMEC_FETCHBITS));\r
1694 // S68k\r
1695 // PRG RAM is default\r
1696 for (i = 0; i < M68K_FETCHBANK1; i++)\r
1697 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->prg_ram - (i<<(24-FAMEC_FETCHBITS));\r
1698 // real PRG RAM\r
1699 for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0x80000; i++)\r
1700 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->prg_ram;\r
1701 // WORD RAM 2M area\r
1702 for (i = M68K_FETCHBANK1*0x08/0x100; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0xc0000; i++)\r
1703 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram2M - 0x80000;\r
1704 // PicoMemResetCD() will setup word ram for both\r
1705 }\r
1706#endif\r
9037e45d 1707#ifdef EMU_M68K\r
1708 m68k_mem_setup_cd();\r
1709#endif\r
3aa1e148 1710\r
7a1f6e45 1711 // m68k_poll_addr = m68k_poll_cnt = 0;\r
1712 s68k_poll_adclk = s68k_poll_cnt = 0;\r
b837b69b 1713}\r
1714\r
1715\r
cc68a136 1716#ifdef EMU_M68K\r
9037e45d 1717static unsigned int PicoReadCD8w (unsigned int a) {\r
3aa1e148 1718 return m68ki_cpu_p == &PicoCpuMS68k ? PicoReadS68k8(a) : PicoReadM68k8(a);\r
cc68a136 1719}\r
9037e45d 1720static unsigned int PicoReadCD16w(unsigned int a) {\r
3aa1e148 1721 return m68ki_cpu_p == &PicoCpuMS68k ? PicoReadS68k16(a) : PicoReadM68k16(a);\r
cc68a136 1722}\r
9037e45d 1723static unsigned int PicoReadCD32w(unsigned int a) {\r
3aa1e148 1724 return m68ki_cpu_p == &PicoCpuMS68k ? PicoReadS68k32(a) : PicoReadM68k32(a);\r
cc68a136 1725}\r
9037e45d 1726static void PicoWriteCD8w (unsigned int a, unsigned char d) {\r
3aa1e148 1727 if (m68ki_cpu_p == &PicoCpuMS68k) PicoWriteS68k8(a, d); else PicoWriteM68k8(a, d);\r
cc68a136 1728}\r
9037e45d 1729static void PicoWriteCD16w(unsigned int a, unsigned short d) {\r
3aa1e148 1730 if (m68ki_cpu_p == &PicoCpuMS68k) PicoWriteS68k16(a, d); else PicoWriteM68k16(a, d);\r
cc68a136 1731}\r
9037e45d 1732static void PicoWriteCD32w(unsigned int a, unsigned int d) {\r
3aa1e148 1733 if (m68ki_cpu_p == &PicoCpuMS68k) PicoWriteS68k32(a, d); else PicoWriteM68k32(a, d);\r
cc68a136 1734}\r
1735\r
1736// these are allowed to access RAM\r
9037e45d 1737static unsigned int m68k_read_pcrelative_CD8 (unsigned int a)\r
b5e5172d 1738{\r
cc68a136 1739 a&=0xffffff;\r
3aa1e148 1740 if(m68ki_cpu_p == &PicoCpuMS68k) {\r
cc68a136 1741 if (a < 0x80000) return *(u8 *)(Pico_mcd->prg_ram+(a^1)); // PRG Ram\r
fa1e5e29 1742 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)\r
1743 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));\r
1744 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)\r
3aa1e148 1745 int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1746 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));\r
1747 }\r
ca61ee42 1748 elprintf(EL_ANOMALY, "s68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);\r
cc68a136 1749 } else {\r
cc68a136 1750 if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram\r
fa1e5e29 1751 if(a<0x20000) return *(u8 *)(Pico.rom+(a^1)); // Bios\r
1752 if((a&0xfc0000)==0x200000) { // word RAM\r
1753 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?\r
1754 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));\r
1755 else if (a < 0x220000) {\r
1756 int bank = Pico_mcd->s68k_regs[3]&1;\r
1757 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));\r
1758 }\r
1759 }\r
ca61ee42 1760 elprintf(EL_ANOMALY, "m68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);\r
cc68a136 1761 }\r
1762 return 0;//(u8) lastread_d;\r
1763}\r
9037e45d 1764static unsigned int m68k_read_pcrelative_CD16(unsigned int a)\r
b5e5172d 1765{\r
cc68a136 1766 a&=0xffffff;\r
3aa1e148 1767 if(m68ki_cpu_p == &PicoCpuMS68k) {\r
cc68a136 1768 if (a < 0x80000) return *(u16 *)(Pico_mcd->prg_ram+(a&~1)); // PRG Ram\r
fa1e5e29 1769 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)\r
1770 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
1771 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)\r
3aa1e148 1772 int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1773 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1774 }\r
ca61ee42 1775 elprintf(EL_ANOMALY, "s68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);\r
cc68a136 1776 } else {\r
cc68a136 1777 if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram\r
fa1e5e29 1778 if(a<0x20000) return *(u16 *)(Pico.rom+(a&~1)); // Bios\r
1779 if((a&0xfc0000)==0x200000) { // word RAM\r
1780 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?\r
1781 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
1782 else if (a < 0x220000) {\r
1783 int bank = Pico_mcd->s68k_regs[3]&1;\r
1784 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1785 }\r
1786 }\r
ca61ee42 1787 elprintf(EL_ANOMALY, "m68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);\r
cc68a136 1788 }\r
b837b69b 1789 return 0;\r
cc68a136 1790}\r
9037e45d 1791static unsigned int m68k_read_pcrelative_CD32(unsigned int a)\r
b5e5172d 1792{\r
fa1e5e29 1793 u16 *pm;\r
cc68a136 1794 a&=0xffffff;\r
3aa1e148 1795 if(m68ki_cpu_p == &PicoCpuMS68k) {\r
cc68a136 1796 if (a < 0x80000) { u16 *pm=(u16 *)(Pico_mcd->prg_ram+(a&~1)); return (pm[0]<<16)|pm[1]; } // PRG Ram\r
fa1e5e29 1797 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)\r
1798 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }\r
1799 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)\r
3aa1e148 1800 int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1801 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1802 return (pm[0]<<16)|pm[1];\r
1803 }\r
ca61ee42 1804 elprintf(EL_ANOMALY, "s68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);\r
cc68a136 1805 } else {\r
cc68a136 1806 if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram\r
fa1e5e29 1807 if(a<0x20000) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }\r
1808 if((a&0xfc0000)==0x200000) { // word RAM\r
1809 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?\r
1810 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }\r
1811 else if (a < 0x220000) {\r
1812 int bank = Pico_mcd->s68k_regs[3]&1;\r
1813 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1814 return (pm[0]<<16)|pm[1];\r
1815 }\r
1816 }\r
ca61ee42 1817 elprintf(EL_ANOMALY, "m68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);\r
cc68a136 1818 }\r
b837b69b 1819 return 0;\r
cc68a136 1820}\r
9037e45d 1821\r
1822extern unsigned int (*pm68k_read_memory_8) (unsigned int address);\r
1823extern unsigned int (*pm68k_read_memory_16)(unsigned int address);\r
1824extern unsigned int (*pm68k_read_memory_32)(unsigned int address);\r
1825extern void (*pm68k_write_memory_8) (unsigned int address, unsigned char value);\r
1826extern void (*pm68k_write_memory_16)(unsigned int address, unsigned short value);\r
1827extern void (*pm68k_write_memory_32)(unsigned int address, unsigned int value);\r
1828extern unsigned int (*pm68k_read_memory_pcr_8) (unsigned int address);\r
1829extern unsigned int (*pm68k_read_memory_pcr_16)(unsigned int address);\r
1830extern unsigned int (*pm68k_read_memory_pcr_32)(unsigned int address);\r
1831\r
1832static void m68k_mem_setup_cd(void)\r
1833{\r
1834 pm68k_read_memory_8 = PicoReadCD8w;\r
1835 pm68k_read_memory_16 = PicoReadCD16w;\r
1836 pm68k_read_memory_32 = PicoReadCD32w;\r
1837 pm68k_write_memory_8 = PicoWriteCD8w;\r
1838 pm68k_write_memory_16 = PicoWriteCD16w;\r
1839 pm68k_write_memory_32 = PicoWriteCD32w;\r
1840 pm68k_read_memory_pcr_8 = m68k_read_pcrelative_CD8;\r
1841 pm68k_read_memory_pcr_16 = m68k_read_pcrelative_CD16;\r
1842 pm68k_read_memory_pcr_32 = m68k_read_pcrelative_CD32;\r
1843}\r
cc68a136 1844#endif // EMU_M68K\r
1845\r
fast MegaDrive/MegaCD/32X emulator