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.cue support, Pico stubs
[picodrive.git] / Pico / cd / Memory.c
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6cadc2da 1// Memory I/O handlers for Sega/Mega CD.\r
2// Loosely based on Gens code.\r
3// (c) Copyright 2007, Grazvydas "notaz" Ignotas\r
cc68a136 4\r
cc68a136 5\r
cc68a136 6#include "../PicoInt.h"\r
7\r
cc68a136 8#include "../sound/ym2612.h"\r
9#include "../sound/sn76496.h"\r
10\r
cb4a513a 11#include "gfx_cd.h"\r
4f265db7 12#include "pcm.h"\r
cb4a513a 13\r
eff55556 14#ifndef UTYPES_DEFINED\r
cc68a136 15typedef unsigned char u8;\r
16typedef unsigned short u16;\r
17typedef unsigned int u32;\r
eff55556 18#define UTYPES_DEFINED\r
19#endif\r
cc68a136 20\r
dca310c4 21#ifdef _MSC_VER\r
22#define rdprintf\r
23#define wrdprintf\r
24#else\r
b5e5172d 25//#define rdprintf dprintf\r
26#define rdprintf(...)\r
68cba51e 27//#define wrdprintf dprintf\r
913ef4b7 28#define wrdprintf(...)\r
dca310c4 29#endif\r
cc68a136 30\r
b5e5172d 31#ifdef EMU_CORE_DEBUG\r
32extern u32 lastread_a, lastread_d[16], lastwrite_cyc_d[16];\r
33extern int lrp_cyc, lwp_cyc;\r
34#undef USE_POLL_DETECT\r
35#endif\r
36\r
cc68a136 37// -----------------------------------------------------------------\r
38\r
7a1f6e45 39// poller detection\r
7a1f6e45 40#define POLL_LIMIT 16\r
41#define POLL_CYCLES 124\r
42// int m68k_poll_addr, m68k_poll_cnt;\r
43unsigned int s68k_poll_adclk, s68k_poll_cnt;\r
cc68a136 44\r
4ff2d527 45#ifndef _ASM_CD_MEMORY_C\r
cb4a513a 46static u32 m68k_reg_read16(u32 a)\r
cc68a136 47{\r
48 u32 d=0;\r
49 a &= 0x3e;\r
672ad671 50 // dprintf("m68k_regs r%2i: [%02x] @%06x", realsize&~1, a+(realsize&1), SekPc);\r
cc68a136 51\r
52 switch (a) {\r
672ad671 53 case 0:\r
c459aefd 54 d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens\r
672ad671 55 goto end;\r
cc68a136 56 case 2:\r
672ad671 57 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);\r
c008977e 58 // the DMNA delay must only be visible on s68k side (Lunar2, Silpheed)\r
59 if (Pico_mcd->m.state_flags&2) { d &= ~1; d |= 2; }\r
60 //printf("m68k_regs r3: %02x @%06x\n", (u8)d, SekPc);\r
cc68a136 61 goto end;\r
c459aefd 62 case 4:\r
63 d = Pico_mcd->s68k_regs[4]<<8;\r
64 goto end;\r
65 case 6:\r
913ef4b7 66 d = *(u16 *)(Pico_mcd->bios + 0x72);\r
c459aefd 67 goto end;\r
cc68a136 68 case 8:\r
cc68a136 69 d = Read_CDC_Host(0);\r
70 goto end;\r
c459aefd 71 case 0xA:\r
ca61ee42 72 elprintf(EL_UIO, "m68k FIXME: reserved read");\r
c459aefd 73 goto end;\r
cc68a136 74 case 0xC:\r
1cd356a3 75 d = Pico_mcd->m.timer_stopwatch >> 16;\r
4ff2d527 76 dprintf("m68k stopwatch timer read (%04x)", d);\r
1cd356a3 77 goto end;\r
cc68a136 78 }\r
79\r
cc68a136 80 if (a < 0x30) {\r
81 // comm flag/cmd/status (0xE-0x2F)\r
82 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r
83 goto end;\r
84 }\r
85\r
ca61ee42 86 elprintf(EL_UIO, "m68k_regs FIXME invalid read @ %02x", a);\r
cc68a136 87\r
88end:\r
89\r
cc68a136 90 return d;\r
91}\r
4ff2d527 92#endif\r
cc68a136 93\r
4ff2d527 94#ifndef _ASM_CD_MEMORY_C\r
95static\r
96#endif\r
97void m68k_reg_write8(u32 a, u32 d)\r
cc68a136 98{\r
99 a &= 0x3f;\r
672ad671 100 // dprintf("m68k_regs w%2i: [%02x] %02x @%06x", realsize, a, d, SekPc);\r
cc68a136 101\r
102 switch (a) {\r
103 case 0:\r
672ad671 104 d &= 1;\r
ca61ee42 105 if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { elprintf(EL_INTS, "m68k: s68k irq 2"); SekInterruptS68k(2); }\r
c459aefd 106 return;\r
cc68a136 107 case 1:\r
672ad671 108 d &= 3;\r
51a902ae 109 if (!(d&1)) Pico_mcd->m.state_flags |= 1; // reset pending, needed to be sure we fetch the right vectors on reset\r
c459aefd 110 if ( (Pico_mcd->m.busreq&1) != (d&1)) dprintf("m68k: s68k reset %i", !(d&1));\r
111 if ( (Pico_mcd->m.busreq&2) != (d&2)) dprintf("m68k: s68k brq %i", (d&2)>>1);\r
51a902ae 112 if ((Pico_mcd->m.state_flags&1) && (d&3)==1) {\r
cc68a136 113 SekResetS68k(); // S68k comes out of RESET or BRQ state\r
4ff2d527 114 Pico_mcd->m.state_flags&=~1;\r
115 dprintf("m68k: resetting s68k, cycles=%i", SekCyclesLeft);\r
cc68a136 116 }\r
c459aefd 117 Pico_mcd->m.busreq = d;\r
118 return;\r
672ad671 119 case 2:\r
721cd396 120 dprintf("m68k: prg wp=%02x", d);\r
672ad671 121 Pico_mcd->s68k_regs[2] = d; // really use s68k side register\r
122 return;\r
66fdc0f0 123 case 3: {\r
124 u32 dold = Pico_mcd->s68k_regs[3]&0x1f;\r
c008977e 125 //printf("m68k_regs w3: %02x @%06x\n", (u8)d, SekPc);\r
672ad671 126 d &= 0xc2;\r
66fdc0f0 127 if ((dold>>6) != ((d>>6)&3))\r
672ad671 128 dprintf("m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));\r
129 //if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);\r
130 //if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :\r
131 // ((d&2) ? "word ram to s68k" : "word ram to m68k"));\r
66fdc0f0 132 if (dold & 4) {\r
133 d ^= 2; // writing 0 to DMNA actually sets it, 1 does nothing\r
134 } else {\r
135 //dold &= ~2; // ??\r
89fa852d 136#if 1\r
137 if ((d & 2) && !(dold & 2)) {\r
138 Pico_mcd->m.state_flags |= 2; // we must delay setting DMNA bit (needed for Silpheed)\r
139 d &= ~2;\r
140 }\r
141#else\r
66fdc0f0 142 if (d & 2) dold &= ~1; // return word RAM to s68k in 2M mode\r
89fa852d 143#endif\r
66fdc0f0 144 }\r
145 Pico_mcd->s68k_regs[3] = d | dold; // really use s68k side register\r
7a1f6e45 146#ifdef USE_POLL_DETECT\r
147 if ((s68k_poll_adclk&0xfe) == 2 && s68k_poll_cnt > POLL_LIMIT) {\r
148 SekSetStopS68k(0); s68k_poll_adclk = 0;\r
8f8fe01e 149 elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r
7a1f6e45 150 }\r
151#endif\r
672ad671 152 return;\r
66fdc0f0 153 }\r
c459aefd 154 case 6:\r
d1df8786 155 Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer\r
c459aefd 156 return;\r
157 case 7:\r
d1df8786 158 Pico_mcd->bios[0x72] = d;\r
913ef4b7 159 dprintf("hint vector set to %08x", PicoRead32(0x70));\r
c459aefd 160 return;\r
7a1f6e45 161 case 0xf:\r
162 d = (d << 1) | ((d >> 7) & 1); // rol8 1 (special case)\r
cc68a136 163 case 0xe:\r
672ad671 164 //dprintf("m68k: comm flag: %02x", d);\r
cc68a136 165 Pico_mcd->s68k_regs[0xe] = d;\r
7a1f6e45 166#ifdef USE_POLL_DETECT\r
167 if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {\r
168 SekSetStopS68k(0); s68k_poll_adclk = 0;\r
8f8fe01e 169 elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r
7a1f6e45 170 }\r
171#endif\r
c459aefd 172 return;\r
672ad671 173 }\r
174\r
175 if ((a&0xf0) == 0x10) {\r
cc68a136 176 Pico_mcd->s68k_regs[a] = d;\r
7a1f6e45 177#ifdef USE_POLL_DETECT\r
178 if ((a&0xfe) == (s68k_poll_adclk&0xfe) && s68k_poll_cnt > POLL_LIMIT) {\r
179 SekSetStopS68k(0); s68k_poll_adclk = 0;\r
8f8fe01e 180 elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r
7a1f6e45 181 }\r
182#endif\r
672ad671 183 return;\r
cc68a136 184 }\r
185\r
ca61ee42 186 elprintf(EL_UIO, "m68k FIXME: invalid write? [%02x] %02x", a, d);\r
cc68a136 187}\r
188\r
2433f409 189#ifndef _ASM_CD_MEMORY_C\r
190static\r
191#endif\r
192u32 s68k_poll_detect(u32 a, u32 d)\r
193{\r
194#ifdef USE_POLL_DETECT\r
ca61ee42 195 // needed mostly for Cyclone, which doesn't always check it's cycle counter\r
196 if (SekIsStoppedS68k()) return d;\r
2433f409 197 // polling detection\r
198 if (a == (s68k_poll_adclk&0xff)) {\r
199 unsigned int clkdiff = SekCyclesDoneS68k() - (s68k_poll_adclk>>8);\r
200 if (clkdiff <= POLL_CYCLES) {\r
201 s68k_poll_cnt++;\r
202 //printf("-- diff: %u, cnt = %i\n", clkdiff, s68k_poll_cnt);\r
203 if (s68k_poll_cnt > POLL_LIMIT) {\r
204 SekSetStopS68k(1);\r
8f8fe01e 205 elprintf(EL_CDPOLL, "s68k poll detected @ %06x, a=%02x", SekPcS68k, a);\r
2433f409 206 }\r
207 s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;\r
208 return d;\r
209 }\r
210 }\r
211 s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;\r
212 s68k_poll_cnt = 0;\r
213#endif\r
214 return d;\r
215}\r
cc68a136 216\r
913ef4b7 217#define READ_FONT_DATA(basemask) \\r
218{ \\r
219 unsigned int fnt = *(unsigned int *)(Pico_mcd->s68k_regs + 0x4c); \\r
220 unsigned int col0 = (fnt >> 8) & 0x0f, col1 = (fnt >> 12) & 0x0f; \\r
221 if (fnt & (basemask << 0)) d = col1 ; else d = col0; \\r
222 if (fnt & (basemask << 1)) d |= col1 << 4; else d |= col0 << 4; \\r
223 if (fnt & (basemask << 2)) d |= col1 << 8; else d |= col0 << 8; \\r
224 if (fnt & (basemask << 3)) d |= col1 << 12; else d |= col0 << 12; \\r
225}\r
226\r
cc68a136 227\r
4ff2d527 228#ifndef _ASM_CD_MEMORY_C\r
229static\r
230#endif\r
231u32 s68k_reg_read16(u32 a)\r
cc68a136 232{\r
233 u32 d=0;\r
cc68a136 234\r
672ad671 235 // dprintf("s68k_regs r%2i: [%02x] @ %06x", realsize&~1, a+(realsize&1), SekPcS68k);\r
cc68a136 236\r
237 switch (a) {\r
238 case 0:\r
7a1f6e45 239 return ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state\r
672ad671 240 case 2:\r
2433f409 241 d = (Pico_mcd->s68k_regs[2]<<8) | (Pico_mcd->s68k_regs[3]&0x1f);\r
c008977e 242 //printf("s68k_regs r3: %02x @%06x\n", (u8)d, SekPcS68k);\r
2433f409 243 return s68k_poll_detect(a, d);\r
cc68a136 244 case 6:\r
7a1f6e45 245 return CDC_Read_Reg();\r
cc68a136 246 case 8:\r
7a1f6e45 247 return Read_CDC_Host(1); // Gens returns 0 here on byte reads\r
cc68a136 248 case 0xC:\r
4f265db7 249 d = Pico_mcd->m.timer_stopwatch >> 16;\r
4ff2d527 250 dprintf("s68k stopwatch timer read (%04x)", d);\r
7a1f6e45 251 return d;\r
d1df8786 252 case 0x30:\r
7a1f6e45 253 dprintf("s68k int3 timer read (%02x)", Pico_mcd->s68k_regs[31]);\r
254 return Pico_mcd->s68k_regs[31];\r
cc68a136 255 case 0x34: // fader\r
7a1f6e45 256 return 0; // no busy bit\r
913ef4b7 257 case 0x50: // font data (check: Lunar 2, Silpheed)\r
258 READ_FONT_DATA(0x00100000);\r
7a1f6e45 259 return d;\r
913ef4b7 260 case 0x52:\r
261 READ_FONT_DATA(0x00010000);\r
7a1f6e45 262 return d;\r
913ef4b7 263 case 0x54:\r
264 READ_FONT_DATA(0x10000000);\r
7a1f6e45 265 return d;\r
913ef4b7 266 case 0x56:\r
267 READ_FONT_DATA(0x01000000);\r
7a1f6e45 268 return d;\r
cc68a136 269 }\r
270\r
271 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r
272\r
2433f409 273 if (a >= 0x0e && a < 0x30)\r
274 return s68k_poll_detect(a, d);\r
7a1f6e45 275\r
cc68a136 276 return d;\r
277}\r
278\r
4ff2d527 279#ifndef _ASM_CD_MEMORY_C\r
280static\r
281#endif\r
282void s68k_reg_write8(u32 a, u32 d)\r
cc68a136 283{\r
672ad671 284 //dprintf("s68k_regs w%2i: [%02x] %02x @ %06x", realsize, a, d, SekPcS68k);\r
cc68a136 285\r
48e8482f 286 // Warning: d might have upper bits set\r
cc68a136 287 switch (a) {\r
672ad671 288 case 2:\r
289 return; // only m68k can change WP\r
fa1e5e29 290 case 3: {\r
291 int dold = Pico_mcd->s68k_regs[3];\r
c008977e 292 //printf("s68k_regs w3: %02x @%06x\n", (u8)d, SekPcS68k);\r
672ad671 293 d &= 0x1d;\r
4ff2d527 294 d |= dold&0xc2;\r
d0d47c5b 295 if (d&4) {\r
4ff2d527 296 if ((d ^ dold) & 5) {\r
297 d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit\r
4ff2d527 298 PicoMemResetCD(d);\r
4ff2d527 299 }\r
48e8482f 300#ifdef _ASM_CD_MEMORY_C\r
301 if ((d ^ dold) & 0x1d)\r
302 PicoMemResetCDdecode(d);\r
303#endif\r
fa1e5e29 304 if (!(dold & 4)) {\r
305 dprintf("wram mode 2M->1M");\r
306 wram_2M_to_1M(Pico_mcd->word_ram2M);\r
4ff2d527 307 }\r
d0d47c5b 308 } else {\r
fa1e5e29 309 if (dold & 4) {\r
310 dprintf("wram mode 1M->2M");\r
4ff2d527 311 if (!(d&1)) { // it didn't set the ret bit, which means it doesn't want to give WRAM to m68k\r
312 d &= ~3;\r
313 d |= (dold&1) ? 2 : 1; // then give it to the one which had bank0 in 1M mode\r
314 }\r
fa1e5e29 315 wram_1M_to_2M(Pico_mcd->word_ram2M);\r
4ff2d527 316 PicoMemResetCD(d);\r
4ff2d527 317 }\r
318 else\r
319 d |= dold&1;\r
320 if (d&1) d &= ~2; // return word RAM to m68k in 2M mode\r
d0d47c5b 321 }\r
672ad671 322 break;\r
fa1e5e29 323 }\r
cc68a136 324 case 4:\r
325 dprintf("s68k CDC dest: %x", d&7);\r
326 Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode\r
327 return;\r
328 case 5:\r
c459aefd 329 //dprintf("s68k CDC reg addr: %x", d&0xf);\r
cc68a136 330 break;\r
331 case 7:\r
332 CDC_Write_Reg(d);\r
333 return;\r
334 case 0xa:\r
335 dprintf("s68k set CDC dma addr");\r
336 break;\r
d1df8786 337 case 0xc:\r
4f265db7 338 case 0xd:\r
d1df8786 339 dprintf("s68k set stopwatch timer");\r
4f265db7 340 Pico_mcd->m.timer_stopwatch = 0;\r
341 return;\r
1cd356a3 342 case 0xe:\r
7a1f6e45 343 Pico_mcd->s68k_regs[0xf] = (d>>1) | (d<<7); // ror8 1, Gens note: Dragons lair\r
1cd356a3 344 return;\r
d1df8786 345 case 0x31:\r
4f265db7 346 dprintf("s68k set int3 timer: %02x", d);\r
48e8482f 347 Pico_mcd->m.timer_int3 = (d & 0xff) << 16;\r
d1df8786 348 break;\r
cc68a136 349 case 0x33: // IRQ mask\r
350 dprintf("s68k irq mask: %02x", d);\r
351 if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) {\r
352 CDD_Export_Status();\r
cc68a136 353 }\r
354 break;\r
355 case 0x34: // fader\r
356 Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;\r
357 return;\r
672ad671 358 case 0x36:\r
359 return; // d/m bit is unsetable\r
360 case 0x37: {\r
361 u32 d_old = Pico_mcd->s68k_regs[0x37];\r
362 Pico_mcd->s68k_regs[0x37] = d&7;\r
363 if ((d&4) && !(d_old&4)) {\r
cc68a136 364 CDD_Export_Status();\r
cc68a136 365 }\r
672ad671 366 return;\r
367 }\r
cc68a136 368 case 0x4b:\r
369 Pico_mcd->s68k_regs[a] = (u8) d;\r
370 CDD_Import_Command();\r
371 return;\r
372 }\r
373\r
1cd356a3 374 if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))\r
cc68a136 375 {\r
ca61ee42 376 elprintf(EL_UIO, "s68k FIXME: invalid write @ %02x?", a);\r
cc68a136 377 return;\r
378 }\r
379\r
380 Pico_mcd->s68k_regs[a] = (u8) d;\r
381}\r
382\r
383\r
fa1e5e29 384static u32 OtherRead16End(u32 a, int realsize)\r
cc68a136 385{\r
386 u32 d=0;\r
387\r
0ffefdb8 388#ifndef _ASM_CD_MEMORY_C\r
672ad671 389 if ((a&0xffffc0)==0xa12000) {\r
cb4a513a 390 d=m68k_reg_read16(a);\r
672ad671 391 goto end;\r
392 }\r
cc68a136 393\r
8022f53d 394 if (a==0x400000) {\r
395 if (SRam.data != NULL) d=3; // 64k cart\r
396 goto end;\r
397 }\r
398\r
399 if ((a&0xfe0000)==0x600000) {\r
400 if (SRam.data != NULL) {\r
401 d=SRam.data[((a>>1)&0xffff)+0x2000];\r
402 if (realsize == 8) d|=d<<8;\r
403 }\r
404 goto end;\r
405 }\r
406\r
407 if (a==0x7ffffe) {\r
408 d=Pico_mcd->m.bcram_reg;\r
409 goto end;\r
410 }\r
0ffefdb8 411#endif\r
8022f53d 412\r
ca61ee42 413 elprintf(EL_UIO, "m68k FIXME: unusual r%i: %06x @%06x", realsize&~1, (a&0xfffffe)+(realsize&1), SekPc);\r
cc68a136 414\r
0ffefdb8 415#ifndef _ASM_CD_MEMORY_C\r
cc68a136 416end:\r
0ffefdb8 417#endif\r
cc68a136 418 return d;\r
419}\r
420\r
cc68a136 421\r
fa1e5e29 422static void OtherWrite8End(u32 a, u32 d, int realsize)\r
cc68a136 423{\r
0ffefdb8 424#ifndef _ASM_CD_MEMORY_C\r
cb4a513a 425 if ((a&0xffffc0)==0xa12000) { m68k_reg_write8(a, d); return; }\r
cc68a136 426\r
8022f53d 427 if ((a&0xfe0000)==0x600000) {\r
428 if (SRam.data != NULL && (Pico_mcd->m.bcram_reg&1)) {\r
429 SRam.data[((a>>1)&0xffff)+0x2000]=d;\r
430 SRam.changed = 1;\r
431 }\r
432 return;\r
433 }\r
434\r
435 if (a==0x7fffff) {\r
436 Pico_mcd->m.bcram_reg=d;\r
437 return;\r
438 }\r
0ffefdb8 439#endif\r
8022f53d 440\r
ca61ee42 441 elprintf(EL_UIO, "m68k FIXME: strange w%i: [%06x], %08x @%06x", realsize, a&0xffffff, d, SekPc);\r
cc68a136 442}\r
443\r
0ffefdb8 444#ifndef _ASM_CD_MEMORY_C\r
69996cb7 445#define _CD_MEMORY_C\r
fa1e5e29 446#undef _ASM_MEMORY_C\r
447#include "../MemoryCmn.c"\r
4ff2d527 448#include "cell_map.c"\r
0ffefdb8 449#endif\r
cc68a136 450\r
2433f409 451\r
cc68a136 452// -----------------------------------------------------------------\r
453// Read Rom and read Ram\r
454\r
4ff2d527 455#ifdef _ASM_CD_MEMORY_C\r
0af33fe0 456u32 PicoReadM68k8(u32 a);\r
4ff2d527 457#else\r
81fda4e8 458u32 PicoReadM68k8(u32 a)\r
cc68a136 459{\r
460 u32 d=0;\r
461\r
cc68a136 462 a&=0xffffff;\r
463\r
b542be46 464 switch (a >> 17)\r
465 {\r
466 case 0x00>>1: // BIOS: 000000 - 020000\r
467 d = *(u8 *)(Pico_mcd->bios+(a^1));\r
468 break;\r
469 case 0x02>>1: // prg RAM\r
470 if ((Pico_mcd->m.busreq&3)!=1) {\r
471 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
472 d = *(prg_bank+((a^1)&0x1ffff));\r
473 }\r
474 break;\r
475 case 0x20>>1: // word RAM: 200000 - 220000\r
476 wrdprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);\r
477 a &= 0x1ffff;\r
478 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
479 int bank = Pico_mcd->s68k_regs[3]&1;\r
480 d = Pico_mcd->word_ram1M[bank][a^1];\r
481 } else {\r
482 // allow access in any mode, like Gens does\r
483 d = Pico_mcd->word_ram2M[a^1];\r
484 }\r
485 wrdprintf("ret = %02x", (u8)d);\r
486 break;\r
487 case 0x22>>1: // word RAM: 220000 - 240000\r
488 wrdprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);\r
489 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
490 int bank = Pico_mcd->s68k_regs[3]&1;\r
491 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged\r
492 d = Pico_mcd->word_ram1M[bank][a^1];\r
493 } else {\r
494 // allow access in any mode, like Gens does\r
495 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];\r
496 }\r
497 wrdprintf("ret = %02x", (u8)d);\r
498 break;\r
499 case 0xc0>>1: case 0xc2>>1: case 0xc4>>1: case 0xc6>>1:\r
500 case 0xc8>>1: case 0xca>>1: case 0xcc>>1: case 0xce>>1:\r
501 case 0xd0>>1: case 0xd2>>1: case 0xd4>>1: case 0xd6>>1:\r
502 case 0xd8>>1: case 0xda>>1: case 0xdc>>1: case 0xde>>1:\r
503 // VDP\r
504 if ((a&0xe700e0)==0xc00000) {\r
505 d=PicoVideoRead(a);\r
506 if ((a&1)==0) d>>=8;\r
507 }\r
508 break;\r
509 case 0xe0>>1: case 0xe2>>1: case 0xe4>>1: case 0xe6>>1:\r
510 case 0xe8>>1: case 0xea>>1: case 0xec>>1: case 0xee>>1:\r
511 case 0xf0>>1: case 0xf2>>1: case 0xf4>>1: case 0xf6>>1:\r
512 case 0xf8>>1: case 0xfa>>1: case 0xfc>>1: case 0xfe>>1:\r
513 // RAM:\r
514 d = *(u8 *)(Pico.ram+((a^1)&0xffff));\r
515 break;\r
516 default:\r
517 if ((a&0xff4000)==0xa00000) { d=z80Read8(a); break; } // Z80 Ram\r
518 if ((a&0xffffc0)==0xa12000)\r
519 rdprintf("m68k_regs r8: [%02x] @%06x", a&0x3f, SekPc);\r
cc68a136 520\r
b542be46 521 d=OtherRead16(a&~1, 8|(a&1)); if ((a&1)==0) d>>=8;\r
cc68a136 522\r
b542be46 523 if ((a&0xffffc0)==0xa12000)\r
524 rdprintf("ret = %02x", (u8)d);\r
525 break;\r
d0d47c5b 526 }\r
527\r
cc68a136 528\r
ca61ee42 529 elprintf(EL_IO, "r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);\r
b5e5172d 530#ifdef EMU_CORE_DEBUG\r
531 if (a>=Pico.romsize) {\r
532 lastread_a = a;\r
533 lastread_d[lrp_cyc++&15] = d;\r
534 }\r
cc68a136 535#endif\r
0af33fe0 536 return d;\r
cc68a136 537}\r
4ff2d527 538#endif\r
cc68a136 539\r
ab0607f7 540\r
4ff2d527 541#ifdef _ASM_CD_MEMORY_C\r
0af33fe0 542u32 PicoReadM68k16(u32 a);\r
4ff2d527 543#else\r
0af33fe0 544static u32 PicoReadM68k16(u32 a)\r
cc68a136 545{\r
0af33fe0 546 u32 d=0;\r
cc68a136 547\r
cc68a136 548 a&=0xfffffe;\r
549\r
b542be46 550 switch (a >> 17)\r
551 {\r
552 case 0x00>>1: // BIOS: 000000 - 020000\r
553 d = *(u16 *)(Pico_mcd->bios+a);\r
554 break;\r
555 case 0x02>>1: // prg RAM\r
556 if ((Pico_mcd->m.busreq&3)!=1) {\r
557 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
558 wrdprintf("m68k_prgram r16: [%i,%06x] @%06x", Pico_mcd->s68k_regs[3]>>6, a, SekPc);\r
559 d = *(u16 *)(prg_bank+(a&0x1fffe));\r
560 wrdprintf("ret = %04x", d);\r
561 }\r
562 break;\r
563 case 0x20>>1: // word RAM: 200000 - 220000\r
564 wrdprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);\r
565 a &= 0x1fffe;\r
566 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
567 int bank = Pico_mcd->s68k_regs[3]&1;\r
568 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a);\r
569 } else {\r
570 // allow access in any mode, like Gens does\r
571 d = *(u16 *)(Pico_mcd->word_ram2M+a);\r
572 }\r
573 wrdprintf("ret = %04x", d);\r
574 break;\r
575 case 0x22>>1: // word RAM: 220000 - 240000\r
576 wrdprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);\r
577 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
578 int bank = Pico_mcd->s68k_regs[3]&1;\r
579 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged\r
580 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a);\r
581 } else {\r
582 // allow access in any mode, like Gens does\r
583 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
584 }\r
585 wrdprintf("ret = %04x", d);\r
586 break;\r
587 case 0xc0>>1: case 0xc2>>1: case 0xc4>>1: case 0xc6>>1:\r
588 case 0xc8>>1: case 0xca>>1: case 0xcc>>1: case 0xce>>1:\r
589 case 0xd0>>1: case 0xd2>>1: case 0xd4>>1: case 0xd6>>1:\r
590 case 0xd8>>1: case 0xda>>1: case 0xdc>>1: case 0xde>>1:\r
591 // VDP\r
592 if ((a&0xe700e0)==0xc00000)\r
593 d=PicoVideoRead(a);\r
594 break;\r
595 case 0xe0>>1: case 0xe2>>1: case 0xe4>>1: case 0xe6>>1:\r
596 case 0xe8>>1: case 0xea>>1: case 0xec>>1: case 0xee>>1:\r
597 case 0xf0>>1: case 0xf2>>1: case 0xf4>>1: case 0xf6>>1:\r
598 case 0xf8>>1: case 0xfa>>1: case 0xfc>>1: case 0xfe>>1:\r
599 // RAM:\r
600 d=*(u16 *)(Pico.ram+(a&0xfffe));\r
601 break;\r
602 default:\r
603 if ((a&0xffffc0)==0xa12000)\r
604 rdprintf("m68k_regs r16: [%02x] @%06x", a&0x3f, SekPc);\r
cc68a136 605\r
b542be46 606 d = OtherRead16(a, 16);\r
cc68a136 607\r
b542be46 608 if ((a&0xffffc0)==0xa12000)\r
609 rdprintf("ret = %04x", d);\r
610 break;\r
d0d47c5b 611 }\r
612\r
cc68a136 613\r
ca61ee42 614 elprintf(EL_IO, "r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
b5e5172d 615#ifdef EMU_CORE_DEBUG\r
616 if (a>=Pico.romsize) {\r
617 lastread_a = a;\r
618 lastread_d[lrp_cyc++&15] = d;\r
619 }\r
cc68a136 620#endif\r
621 return d;\r
622}\r
4ff2d527 623#endif\r
cc68a136 624\r
ab0607f7 625\r
4ff2d527 626#ifdef _ASM_CD_MEMORY_C\r
627u32 PicoReadM68k32(u32 a);\r
628#else\r
629static u32 PicoReadM68k32(u32 a)\r
cc68a136 630{\r
631 u32 d=0;\r
632\r
cc68a136 633 a&=0xfffffe;\r
634\r
b542be46 635 switch (a >> 17)\r
636 {\r
637 case 0x00>>1: { // BIOS: 000000 - 020000\r
638 u16 *pm=(u16 *)(Pico_mcd->bios+a);\r
639 d = (pm[0]<<16)|pm[1];\r
640 break;\r
641 }\r
642 case 0x02>>1: // prg RAM\r
643 if ((Pico_mcd->m.busreq&3)!=1) {\r
644 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
645 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));\r
646 d = (pm[0]<<16)|pm[1];\r
647 }\r
648 break;\r
649 case 0x20>>1: // word RAM: 200000 - 220000\r
650 wrdprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);\r
651 a&=0x1fffe;\r
652 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
653 int bank = Pico_mcd->s68k_regs[3]&1;\r
654 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+a);\r
655 d = (pm[0]<<16)|pm[1];\r
656 } else {\r
657 // allow access in any mode, like Gens does\r
658 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+a);\r
659 d = (pm[0]<<16)|pm[1];\r
660 }\r
661 wrdprintf("ret = %08x", d);\r
662 break;\r
663 case 0x22>>1: // word RAM: 220000 - 240000\r
664 wrdprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);\r
665 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode, cell arranged?\r
fa1e5e29 666 u32 a1, a2;\r
b542be46 667 int bank = Pico_mcd->s68k_regs[3]&1;\r
fa1e5e29 668 a1 = (a&2) | (cell_map(a >> 2) << 2);\r
4ff2d527 669 if (a&2) a2 = cell_map((a+2) >> 2) << 2;\r
670 else a2 = a1 + 2;\r
671 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) << 16;\r
672 d |= *(u16 *)(Pico_mcd->word_ram1M[bank]+a2);\r
bf098bc5 673 } else {\r
b542be46 674 // allow access in any mode, like Gens does\r
675 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
676 d = (pm[0]<<16)|pm[1];\r
bf098bc5 677 }\r
b542be46 678 wrdprintf("ret = %08x", d);\r
679 break;\r
680 case 0xc0>>1: case 0xc2>>1: case 0xc4>>1: case 0xc6>>1:\r
681 case 0xc8>>1: case 0xca>>1: case 0xcc>>1: case 0xce>>1:\r
682 case 0xd0>>1: case 0xd2>>1: case 0xd4>>1: case 0xd6>>1:\r
683 case 0xd8>>1: case 0xda>>1: case 0xdc>>1: case 0xde>>1:\r
684 // VDP\r
685 d = (PicoVideoRead(a)<<16)|PicoVideoRead(a+2);\r
686 break;\r
687 case 0xe0>>1: case 0xe2>>1: case 0xe4>>1: case 0xe6>>1:\r
688 case 0xe8>>1: case 0xea>>1: case 0xec>>1: case 0xee>>1:\r
689 case 0xf0>>1: case 0xf2>>1: case 0xf4>>1: case 0xf6>>1:\r
690 case 0xf8>>1: case 0xfa>>1: case 0xfc>>1: case 0xfe>>1: {\r
691 // RAM:\r
692 u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));\r
693 d = (pm[0]<<16)|pm[1];\r
694 break;\r
d0d47c5b 695 }\r
b542be46 696 default:\r
697 if ((a&0xffffc0)==0xa12000)\r
698 rdprintf("m68k_regs r32: [%02x] @%06x", a&0x3f, SekPc);\r
d0d47c5b 699\r
b542be46 700 d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);\r
672ad671 701\r
b542be46 702 if ((a&0xffffc0)==0xa12000)\r
703 rdprintf("ret = %08x", d);\r
704 break;\r
705 }\r
cc68a136 706\r
672ad671 707\r
ca61ee42 708 elprintf(EL_IO, "r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r
b5e5172d 709#ifdef EMU_CORE_DEBUG\r
710 if (a>=Pico.romsize) {\r
711 lastread_a = a;\r
712 lastread_d[lrp_cyc++&15] = d;\r
713 }\r
cc68a136 714#endif\r
715 return d;\r
716}\r
4ff2d527 717#endif\r
cc68a136 718\r
ab0607f7 719\r
cc68a136 720// -----------------------------------------------------------------\r
cc68a136 721\r
4ff2d527 722#ifdef _ASM_CD_MEMORY_C\r
723void PicoWriteM68k8(u32 a,u8 d);\r
724#else\r
81fda4e8 725void PicoWriteM68k8(u32 a,u8 d)\r
cc68a136 726{\r
ca61ee42 727 elprintf(EL_IO, "w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
b5e5172d 728#ifdef EMU_CORE_DEBUG\r
729 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
730#endif\r
cc68a136 731\r
ab0607f7 732 if ((a&0xe00000)==0xe00000) { // Ram\r
733 *(u8 *)(Pico.ram+((a^1)&0xffff)) = d;\r
734 return;\r
735 }\r
cc68a136 736\r
cc68a136 737 // prg RAM\r
721cd396 738 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {\r
672ad671 739 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
bf098bc5 740 *(u8 *)(prg_bank+((a^1)&0x1ffff))=d;\r
cc68a136 741 return;\r
742 }\r
743\r
b542be46 744 a&=0xffffff;\r
745\r
d0d47c5b 746 // word RAM\r
747 if ((a&0xfc0000)==0x200000) {\r
913ef4b7 748 wrdprintf("m68k_wram w8: [%06x] %02x @%06x", a, d, SekPc);\r
d0d47c5b 749 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
fa1e5e29 750 int bank = Pico_mcd->s68k_regs[3]&1;\r
751 if (a >= 0x220000)\r
752 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged\r
753 else a &= 0x1ffff;\r
754 *(u8 *)(Pico_mcd->word_ram1M[bank]+(a^1))=d;\r
d0d47c5b 755 } else {\r
756 // allow access in any mode, like Gens does\r
fa1e5e29 757 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;\r
d0d47c5b 758 }\r
759 return;\r
760 }\r
761\r
2433f409 762 if ((a&0xffffc0)==0xa12000) {\r
c459aefd 763 rdprintf("m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);\r
2433f409 764 m68k_reg_write8(a, d);\r
765 return;\r
766 }\r
672ad671 767\r
fb9bec94 768 OtherWrite8(a,d);\r
cc68a136 769}\r
4ff2d527 770#endif\r
cc68a136 771\r
ab0607f7 772\r
4ff2d527 773#ifdef _ASM_CD_MEMORY_C\r
774void PicoWriteM68k16(u32 a,u16 d);\r
775#else\r
776static void PicoWriteM68k16(u32 a,u16 d)\r
cc68a136 777{\r
ca61ee42 778 elprintf(EL_IO, "w16: %06x, %04x", a&0xffffff, d);\r
b5e5172d 779#ifdef EMU_CORE_DEBUG\r
780 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
781#endif\r
cc68a136 782\r
ab0607f7 783 if ((a&0xe00000)==0xe00000) { // Ram\r
784 *(u16 *)(Pico.ram+(a&0xfffe))=d;\r
785 return;\r
786 }\r
cc68a136 787\r
cc68a136 788 // prg RAM\r
721cd396 789 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {\r
672ad671 790 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
c008977e 791 wrdprintf("m68k_prgram w16: [%i,%06x] %04x @%06x", Pico_mcd->s68k_regs[3]>>6, a, d, SekPc);\r
cc68a136 792 *(u16 *)(prg_bank+(a&0x1fffe))=d;\r
793 return;\r
794 }\r
795\r
b542be46 796 a&=0xfffffe;\r
797\r
d0d47c5b 798 // word RAM\r
799 if ((a&0xfc0000)==0x200000) {\r
913ef4b7 800 wrdprintf("m68k_wram w16: [%06x] %04x @%06x", a, d, SekPc);\r
d0d47c5b 801 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
fa1e5e29 802 int bank = Pico_mcd->s68k_regs[3]&1;\r
803 if (a >= 0x220000)\r
804 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged\r
805 else a &= 0x1fffe;\r
806 *(u16 *)(Pico_mcd->word_ram1M[bank]+a)=d;\r
d0d47c5b 807 } else {\r
808 // allow access in any mode, like Gens does\r
fa1e5e29 809 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;\r
d0d47c5b 810 }\r
811 return;\r
812 }\r
813\r
7a1f6e45 814 // regs\r
815 if ((a&0xffffc0)==0xa12000) {\r
c459aefd 816 rdprintf("m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);\r
7a1f6e45 817 if (a == 0xe) { // special case, 2 byte writes would be handled differently\r
818 Pico_mcd->s68k_regs[0xe] = d >> 8;\r
819#ifdef USE_POLL_DETECT\r
820 if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {\r
6cadc2da 821 SekSetStopS68k(0); s68k_poll_adclk = 0;\r
8f8fe01e 822 elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r
7a1f6e45 823 }\r
824#endif\r
825 return;\r
826 }\r
827 m68k_reg_write8(a, d>>8);\r
828 m68k_reg_write8(a+1,d&0xff);\r
829 return;\r
830 }\r
cc68a136 831\r
b542be46 832 // VDP\r
833 if ((a&0xe700e0)==0xc00000) {\r
834 PicoVideoWrite(a,(u16)d);\r
835 return;\r
836 }\r
837\r
cc68a136 838 OtherWrite16(a,d);\r
839}\r
4ff2d527 840#endif\r
cc68a136 841\r
ab0607f7 842\r
4ff2d527 843#ifdef _ASM_CD_MEMORY_C\r
844void PicoWriteM68k32(u32 a,u32 d);\r
845#else\r
846static void PicoWriteM68k32(u32 a,u32 d)\r
cc68a136 847{\r
ca61ee42 848 elprintf(EL_IO, "w32: %06x, %08x", a&0xffffff, d);\r
b5e5172d 849#ifdef EMU_CORE_DEBUG\r
850 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
851#endif\r
cc68a136 852\r
853 if ((a&0xe00000)==0xe00000)\r
854 {\r
855 // Ram:\r
856 u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));\r
857 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
858 return;\r
859 }\r
860\r
cc68a136 861 // prg RAM\r
721cd396 862 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {\r
672ad671 863 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
cc68a136 864 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));\r
865 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
866 return;\r
867 }\r
868\r
b542be46 869 a&=0xfffffe;\r
870\r
672ad671 871 // word RAM\r
d0d47c5b 872 if ((a&0xfc0000)==0x200000) {\r
873 if (d != 0) // don't log clears\r
913ef4b7 874 wrdprintf("m68k_wram w32: [%06x] %08x @%06x", a, d, SekPc);\r
d0d47c5b 875 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
fa1e5e29 876 int bank = Pico_mcd->s68k_regs[3]&1;\r
877 if (a >= 0x220000) { // cell arranged\r
878 u32 a1, a2;\r
879 a1 = (a&2) | (cell_map(a >> 2) << 2);\r
4ff2d527 880 if (a&2) a2 = cell_map((a+2) >> 2) << 2;\r
881 else a2 = a1 + 2;\r
882 *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) = d >> 16;\r
883 *(u16 *)(Pico_mcd->word_ram1M[bank]+a2) = d;\r
bf098bc5 884 } else {\r
fa1e5e29 885 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
886 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
bf098bc5 887 }\r
d0d47c5b 888 } else {\r
889 // allow access in any mode, like Gens does\r
fa1e5e29 890 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
d0d47c5b 891 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
892 }\r
672ad671 893 return;\r
d0d47c5b 894 }\r
672ad671 895\r
2433f409 896 if ((a&0xffffc0)==0xa12000) {\r
c459aefd 897 rdprintf("m68k_regs w32: [%02x] %08x @%06x", a&0x3f, d, SekPc);\r
2433f409 898 if ((a&0x3e) == 0xe) dprintf("m68k FIXME: w32 [%02x]", a&0x3f);\r
899 }\r
cc68a136 900\r
b542be46 901 // VDP\r
902 if ((a&0xe700e0)==0xc00000)\r
903 {\r
904 PicoVideoWrite(a, (u16)(d>>16));\r
905 PicoVideoWrite(a+2,(u16)d);\r
906 return;\r
907 }\r
908\r
cc68a136 909 OtherWrite16(a, (u16)(d>>16));\r
910 OtherWrite16(a+2,(u16)d);\r
911}\r
4ff2d527 912#endif\r
cc68a136 913\r
914\r
721cd396 915// -----------------------------------------------------------------\r
916// S68k\r
cc68a136 917// -----------------------------------------------------------------\r
918\r
4ff2d527 919#ifdef _ASM_CD_MEMORY_C\r
0af33fe0 920u32 PicoReadS68k8(u32 a);\r
4ff2d527 921#else\r
0af33fe0 922static u32 PicoReadS68k8(u32 a)\r
cc68a136 923{\r
924 u32 d=0;\r
925\r
b5e5172d 926#ifdef EMU_CORE_DEBUG\r
927 u32 ab=a&0xfffffe;\r
928#endif\r
cc68a136 929 a&=0xffffff;\r
930\r
931 // prg RAM\r
932 if (a < 0x80000) {\r
933 d = *(Pico_mcd->prg_ram+(a^1));\r
934 goto end;\r
935 }\r
936\r
937 // regs\r
938 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 939 a &= 0x1ff;\r
940 rdprintf("s68k_regs r8: [%02x] @ %06x", a, SekPcS68k);\r
2433f409 941 if (a >= 0x0e && a < 0x30) {\r
942 d = Pico_mcd->s68k_regs[a];\r
943 s68k_poll_detect(a, d);\r
944 rdprintf("ret = %02x", (u8)d);\r
945 goto end;\r
946 }\r
947 else if (a >= 0x58 && a < 0x68)\r
cb4a513a 948 d = gfx_cd_read(a&~1);\r
949 else d = s68k_reg_read16(a&~1);\r
950 if ((a&1)==0) d>>=8;\r
c459aefd 951 rdprintf("ret = %02x", (u8)d);\r
cc68a136 952 goto end;\r
953 }\r
954\r
d0d47c5b 955 // word RAM (2M area)\r
956 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
fa1e5e29 957 // test: batman returns\r
913ef4b7 958 wrdprintf("s68k_wram2M r8: [%06x] @%06x", a, SekPcS68k);\r
fa1e5e29 959 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
3aa1e148 960 int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 961 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];\r
962 if (a&1) d &= 0x0f;\r
963 else d >>= 4;\r
d0d47c5b 964 } else {\r
965 // allow access in any mode, like Gens does\r
fa1e5e29 966 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];\r
d0d47c5b 967 }\r
913ef4b7 968 wrdprintf("ret = %02x", (u8)d);\r
d0d47c5b 969 goto end;\r
970 }\r
971\r
972 // word RAM (1M area)\r
68cba51e 973 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
fa1e5e29 974 int bank;\r
913ef4b7 975 wrdprintf("s68k_wram1M r8: [%06x] @%06x", a, SekPcS68k);\r
68cba51e 976// if (!(Pico_mcd->s68k_regs[3]&4))\r
977// dprintf("s68k_wram1M FIXME: wrong mode");\r
3aa1e148 978 bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 979 d = Pico_mcd->word_ram1M[bank][(a^1)&0x1ffff];\r
913ef4b7 980 wrdprintf("ret = %02x", (u8)d);\r
d0d47c5b 981 goto end;\r
982 }\r
983\r
4f265db7 984 // PCM\r
985 if ((a&0xff8000)==0xff0000) {\r
ca61ee42 986 elprintf(EL_IO, "s68k_pcm r8: [%06x] @%06x", a, SekPcS68k);\r
4f265db7 987 a &= 0x7fff;\r
988 if (a >= 0x2000)\r
989 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];\r
990 else if (a >= 0x20) {\r
991 a &= 0x1e;\r
992 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r
993 if (a & 2) d >>= 8;\r
994 }\r
ca61ee42 995 elprintf(EL_IO, "ret = %02x", (u8)d);\r
4f265db7 996 goto end;\r
997 }\r
998\r
ab0607f7 999 // bram\r
1000 if ((a&0xff0000)==0xfe0000) {\r
1001 d = Pico_mcd->bram[(a>>1)&0x1fff];\r
1002 goto end;\r
1003 }\r
1004\r
ca61ee42 1005 elprintf(EL_UIO, "s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);\r
cc68a136 1006\r
1007 end:\r
1008\r
ca61ee42 1009 elprintf(EL_IO, "s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);\r
b5e5172d 1010#ifdef EMU_CORE_DEBUG\r
1011 lastread_a = ab;\r
1012 lastread_d[lrp_cyc++&15] = d;\r
cc68a136 1013#endif\r
0af33fe0 1014 return d;\r
cc68a136 1015}\r
4ff2d527 1016#endif\r
cc68a136 1017\r
ab0607f7 1018\r
4ff2d527 1019#ifdef _ASM_CD_MEMORY_C\r
0af33fe0 1020u32 PicoReadS68k16(u32 a);\r
4ff2d527 1021#else\r
0af33fe0 1022static u32 PicoReadS68k16(u32 a)\r
cc68a136 1023{\r
4f265db7 1024 u32 d=0;\r
cc68a136 1025\r
b5e5172d 1026#ifdef EMU_CORE_DEBUG\r
1027 u32 ab=a&0xfffffe;\r
1028#endif\r
cc68a136 1029 a&=0xfffffe;\r
1030\r
1031 // prg RAM\r
1032 if (a < 0x80000) {\r
c008977e 1033 wrdprintf("s68k_prgram r16: [%06x] @%06x", a, SekPcS68k);\r
cc68a136 1034 d = *(u16 *)(Pico_mcd->prg_ram+a);\r
c008977e 1035 wrdprintf("ret = %04x", d);\r
cc68a136 1036 goto end;\r
1037 }\r
1038\r
1039 // regs\r
1040 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 1041 a &= 0x1fe;\r
1042 rdprintf("s68k_regs r16: [%02x] @ %06x", a, SekPcS68k);\r
913ef4b7 1043 if (a >= 0x58 && a < 0x68)\r
cb4a513a 1044 d = gfx_cd_read(a);\r
1045 else d = s68k_reg_read16(a);\r
c459aefd 1046 rdprintf("ret = %04x", d);\r
cc68a136 1047 goto end;\r
1048 }\r
1049\r
d0d47c5b 1050 // word RAM (2M area)\r
1051 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
913ef4b7 1052 wrdprintf("s68k_wram2M r16: [%06x] @%06x", a, SekPcS68k);\r
fa1e5e29 1053 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
3aa1e148 1054 int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1055 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];\r
1056 d |= d << 4; d &= ~0xf0;\r
d0d47c5b 1057 } else {\r
1058 // allow access in any mode, like Gens does\r
fa1e5e29 1059 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
d0d47c5b 1060 }\r
913ef4b7 1061 wrdprintf("ret = %04x", d);\r
d0d47c5b 1062 goto end;\r
1063 }\r
1064\r
1065 // word RAM (1M area)\r
68cba51e 1066 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
fa1e5e29 1067 int bank;\r
913ef4b7 1068 wrdprintf("s68k_wram1M r16: [%06x] @%06x", a, SekPcS68k);\r
68cba51e 1069// if (!(Pico_mcd->s68k_regs[3]&4))\r
1070// dprintf("s68k_wram1M FIXME: wrong mode");\r
3aa1e148 1071 bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1072 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
913ef4b7 1073 wrdprintf("ret = %04x", d);\r
ab0607f7 1074 goto end;\r
1075 }\r
1076\r
1077 // bram\r
1078 if ((a&0xff0000)==0xfe0000) {\r
4ff2d527 1079 dprintf("FIXME: s68k_bram r16: [%06x] @%06x", a, SekPcS68k);\r
ab0607f7 1080 a = (a>>1)&0x1fff;\r
4f265db7 1081 d = Pico_mcd->bram[a++]; // Gens does little endian here, and so do we..\r
4ff2d527 1082 d|= Pico_mcd->bram[a++] << 8; // This is most likely wrong\r
ab0607f7 1083 dprintf("ret = %04x", d);\r
d0d47c5b 1084 goto end;\r
1085 }\r
1086\r
4f265db7 1087 // PCM\r
1088 if ((a&0xff8000)==0xff0000) {\r
4ff2d527 1089 dprintf("FIXME: s68k_pcm r16: [%06x] @%06x", a, SekPcS68k);\r
4f265db7 1090 a &= 0x7fff;\r
1091 if (a >= 0x2000)\r
1092 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];\r
1093 else if (a >= 0x20) {\r
1094 a &= 0x1e;\r
1095 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r
1096 if (a & 2) d >>= 8;\r
1097 }\r
1098 dprintf("ret = %04x", d);\r
1099 goto end;\r
1100 }\r
1101\r
ca61ee42 1102 elprintf(EL_UIO, "s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
cc68a136 1103\r
1104 end:\r
1105\r
ca61ee42 1106 elprintf(EL_IO, "s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
b5e5172d 1107#ifdef EMU_CORE_DEBUG\r
1108 lastread_a = ab;\r
1109 lastread_d[lrp_cyc++&15] = d;\r
cc68a136 1110#endif\r
1111 return d;\r
1112}\r
4ff2d527 1113#endif\r
cc68a136 1114\r
ab0607f7 1115\r
4ff2d527 1116#ifdef _ASM_CD_MEMORY_C\r
1117u32 PicoReadS68k32(u32 a);\r
1118#else\r
1119static u32 PicoReadS68k32(u32 a)\r
cc68a136 1120{\r
1121 u32 d=0;\r
1122\r
b5e5172d 1123#ifdef EMU_CORE_DEBUG\r
1124 u32 ab=a&0xfffffe;\r
1125#endif\r
cc68a136 1126 a&=0xfffffe;\r
1127\r
1128 // prg RAM\r
1129 if (a < 0x80000) {\r
1130 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);\r
1131 d = (pm[0]<<16)|pm[1];\r
1132 goto end;\r
1133 }\r
1134\r
1135 // regs\r
1136 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 1137 a &= 0x1fe;\r
1138 rdprintf("s68k_regs r32: [%02x] @ %06x", a, SekPcS68k);\r
913ef4b7 1139 if (a >= 0x58 && a < 0x68)\r
cb4a513a 1140 d = (gfx_cd_read(a)<<16)|gfx_cd_read(a+2);\r
1141 else d = (s68k_reg_read16(a)<<16)|s68k_reg_read16(a+2);\r
c459aefd 1142 rdprintf("ret = %08x", d);\r
cc68a136 1143 goto end;\r
1144 }\r
1145\r
d0d47c5b 1146 // word RAM (2M area)\r
1147 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
913ef4b7 1148 wrdprintf("s68k_wram2M r32: [%06x] @%06x", a, SekPcS68k);\r
fa1e5e29 1149 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
3aa1e148 1150 int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1151 a >>= 1;\r
1152 d = Pico_mcd->word_ram1M[bank][((a+0)^1)&0x1ffff] << 16;\r
1153 d |= Pico_mcd->word_ram1M[bank][((a+1)^1)&0x1ffff];\r
1154 d |= d << 4; d &= 0x0f0f0f0f;\r
d0d47c5b 1155 } else {\r
1156 // allow access in any mode, like Gens does\r
fa1e5e29 1157 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];\r
d0d47c5b 1158 }\r
913ef4b7 1159 wrdprintf("ret = %08x", d);\r
d0d47c5b 1160 goto end;\r
1161 }\r
1162\r
1163 // word RAM (1M area)\r
68cba51e 1164 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
fa1e5e29 1165 int bank;\r
dca310c4 1166 u16 *pm;\r
913ef4b7 1167 wrdprintf("s68k_wram1M r32: [%06x] @%06x", a, SekPcS68k);\r
68cba51e 1168// if (!(Pico_mcd->s68k_regs[3]&4))\r
1169// dprintf("s68k_wram1M FIXME: wrong mode");\r
3aa1e148 1170 bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
dca310c4 1171 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];\r
913ef4b7 1172 wrdprintf("ret = %08x", d);\r
ab0607f7 1173 goto end;\r
1174 }\r
1175\r
4f265db7 1176 // PCM\r
1177 if ((a&0xff8000)==0xff0000) {\r
2433f409 1178 dprintf("s68k_pcm r32: [%06x] @%06x", a, SekPcS68k);\r
4f265db7 1179 a &= 0x7fff;\r
1180 if (a >= 0x2000) {\r
1181 a >>= 1;\r
1182 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] << 16;\r
1183 d |= Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff];\r
1184 } else if (a >= 0x20) {\r
1185 a &= 0x1e;\r
1186 if (a & 2) {\r
1187 a >>= 2;\r
1188 d = (Pico_mcd->pcm.ch[a].addr >> (PCM_STEP_SHIFT-8)) & 0xff0000;\r
1189 d |= (Pico_mcd->pcm.ch[(a+1)&7].addr >> PCM_STEP_SHIFT) & 0xff;\r
1190 } else {\r
1191 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r
1192 d = ((d<<16)&0xff0000) | ((d>>8)&0xff); // PCM chip is LE\r
1193 }\r
1194 }\r
1195 dprintf("ret = %08x", d);\r
1196 goto end;\r
1197 }\r
1198\r
ab0607f7 1199 // bram\r
1200 if ((a&0xff0000)==0xfe0000) {\r
4ff2d527 1201 dprintf("FIXME: s68k_bram r32: [%06x] @%06x", a, SekPcS68k);\r
ab0607f7 1202 a = (a>>1)&0x1fff;\r
1203 d = Pico_mcd->bram[a++] << 16; // middle endian? TODO: verify against Fusion..\r
1204 d|= Pico_mcd->bram[a++] << 24;\r
1205 d|= Pico_mcd->bram[a++];\r
1206 d|= Pico_mcd->bram[a++] << 8;\r
1207 dprintf("ret = %08x", d);\r
d0d47c5b 1208 goto end;\r
1209 }\r
1210\r
ca61ee42 1211 elprintf(EL_UIO, "s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
cc68a136 1212\r
1213 end:\r
1214\r
ca61ee42 1215 elprintf(EL_IO, "s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
b5e5172d 1216#ifdef EMU_CORE_DEBUG\r
1217 if (ab > 0x78) { // not vectors and stuff\r
1218 lastread_a = ab;\r
1219 lastread_d[lrp_cyc++&15] = d;\r
1220 }\r
cc68a136 1221#endif\r
1222 return d;\r
1223}\r
4ff2d527 1224#endif\r
cc68a136 1225\r
ab0607f7 1226\r
a4030801 1227#ifndef _ASM_CD_MEMORY_C\r
0a051f55 1228/* check: jaguar xj 220 (draws entire world using decode) */\r
1229static void decode_write8(u32 a, u8 d, int r3)\r
1230{\r
3aa1e148 1231 u8 *pd = Pico_mcd->word_ram1M[(r3 & 1)^1] + (((a>>1)^1)&0x1ffff);\r
0a051f55 1232 u8 oldmask = (a&1) ? 0xf0 : 0x0f;\r
1233\r
0a051f55 1234 r3 &= 0x18;\r
1235 d &= 0x0f;\r
1236 if (!(a&1)) d <<= 4;\r
1237\r
0a051f55 1238 if (r3 == 8) {\r
1239 if ((!(*pd & (~oldmask))) && d) goto do_it;\r
1240 } else if (r3 > 8) {\r
1241 if (d) goto do_it;\r
1242 } else {\r
1243 goto do_it;\r
1244 }\r
1245\r
1246 return;\r
1247do_it:\r
1248 *pd = d | (*pd & oldmask);\r
1249}\r
1250\r
1251\r
1252static void decode_write16(u32 a, u16 d, int r3)\r
1253{\r
3aa1e148 1254 u8 *pd = Pico_mcd->word_ram1M[(r3 & 1)^1] + (((a>>1)^1)&0x1ffff);\r
0a051f55 1255\r
1256 //if ((a & 0x3ffff) < 0x28000) return;\r
1257\r
1258 r3 &= 0x18;\r
1259 d &= 0x0f0f;\r
1260 d |= d >> 4;\r
1261\r
1262 if (r3 == 8) {\r
1263 u8 dold = *pd;\r
1264 if (!(dold & 0xf0)) dold |= d & 0xf0;\r
1265 if (!(dold & 0x0f)) dold |= d & 0x0f;\r
1266 *pd = dold;\r
1267 } else if (r3 > 8) {\r
1268 u8 dold = *pd;\r
1269 if (!(d & 0xf0)) d |= dold & 0xf0;\r
1270 if (!(d & 0x0f)) d |= dold & 0x0f;\r
1271 *pd = d;\r
1272 } else {\r
1273 *pd = d;\r
1274 }\r
0a051f55 1275}\r
a4030801 1276#endif\r
0a051f55 1277\r
cc68a136 1278// -----------------------------------------------------------------\r
1279\r
4ff2d527 1280#ifdef _ASM_CD_MEMORY_C\r
1281void PicoWriteS68k8(u32 a,u8 d);\r
1282#else\r
1283static void PicoWriteS68k8(u32 a,u8 d)\r
cc68a136 1284{\r
ca61ee42 1285 elprintf(EL_IO, "s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);\r
cc68a136 1286\r
1287 a&=0xffffff;\r
1288\r
b5e5172d 1289#ifdef EMU_CORE_DEBUG\r
1290 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
1291#endif\r
1292\r
cc68a136 1293 // prg RAM\r
1294 if (a < 0x80000) {\r
1295 u8 *pm=(u8 *)(Pico_mcd->prg_ram+(a^1));\r
721cd396 1296 if (a >= (Pico_mcd->s68k_regs[2]<<8)) *pm=d;\r
cc68a136 1297 return;\r
1298 }\r
1299\r
1300 // regs\r
1301 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 1302 a &= 0x1ff;\r
1303 rdprintf("s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k);\r
913ef4b7 1304 if (a >= 0x58 && a < 0x68)\r
48e8482f 1305 gfx_cd_write16(a&~1, (d<<8)|d);\r
cb4a513a 1306 else s68k_reg_write8(a,d);\r
cc68a136 1307 return;\r
1308 }\r
1309\r
d0d47c5b 1310 // word RAM (2M area)\r
1311 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
0a051f55 1312 int r3 = Pico_mcd->s68k_regs[3];\r
913ef4b7 1313 wrdprintf("s68k_wram2M w8: [%06x] %02x @%06x", a, d, SekPcS68k);\r
0a051f55 1314 if (r3 & 4) { // 1M decode mode?\r
1315 decode_write8(a, d, r3);\r
d0d47c5b 1316 } else {\r
1317 // allow access in any mode, like Gens does\r
fa1e5e29 1318 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;\r
d0d47c5b 1319 }\r
1320 return;\r
1321 }\r
1322\r
1323 // word RAM (1M area)\r
68cba51e 1324 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
1325 // Wing Commander tries to write here in wrong mode\r
fa1e5e29 1326 int bank;\r
d0d47c5b 1327 if (d)\r
913ef4b7 1328 wrdprintf("s68k_wram1M w8: [%06x] %02x @%06x", a, d, SekPcS68k);\r
68cba51e 1329// if (!(Pico_mcd->s68k_regs[3]&4))\r
1330// dprintf("s68k_wram1M FIXME: wrong mode");\r
3aa1e148 1331 bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1332 *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff))=d;\r
d0d47c5b 1333 return;\r
1334 }\r
1335\r
4f265db7 1336 // PCM\r
1337 if ((a&0xff8000)==0xff0000) {\r
1338 a &= 0x7fff;\r
1339 if (a >= 0x2000)\r
1340 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;\r
1341 else if (a < 0x12)\r
1342 pcm_write(a>>1, d);\r
1343 return;\r
1344 }\r
1345\r
ab0607f7 1346 // bram\r
1347 if ((a&0xff0000)==0xfe0000) {\r
1348 Pico_mcd->bram[(a>>1)&0x1fff] = d;\r
1349 SRam.changed = 1;\r
1350 return;\r
1351 }\r
1352\r
ca61ee42 1353 elprintf(EL_UIO, "s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);\r
cc68a136 1354}\r
4ff2d527 1355#endif\r
cc68a136 1356\r
ab0607f7 1357\r
4ff2d527 1358#ifdef _ASM_CD_MEMORY_C\r
1359void PicoWriteS68k16(u32 a,u16 d);\r
1360#else\r
1361static void PicoWriteS68k16(u32 a,u16 d)\r
cc68a136 1362{\r
ca61ee42 1363 elprintf(EL_IO, "s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
cc68a136 1364\r
1365 a&=0xfffffe;\r
1366\r
b5e5172d 1367#ifdef EMU_CORE_DEBUG\r
1368 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
1369#endif\r
1370\r
cc68a136 1371 // prg RAM\r
1372 if (a < 0x80000) {\r
c008977e 1373 wrdprintf("s68k_prgram w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
721cd396 1374 if (a >= (Pico_mcd->s68k_regs[2]<<8)) // needed for Dungeon Explorer\r
1375 *(u16 *)(Pico_mcd->prg_ram+a)=d;\r
cc68a136 1376 return;\r
1377 }\r
1378\r
1379 // regs\r
1380 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 1381 a &= 0x1fe;\r
1382 rdprintf("s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k);\r
913ef4b7 1383 if (a >= 0x58 && a < 0x68)\r
48e8482f 1384 gfx_cd_write16(a, d);\r
cb4a513a 1385 else {\r
1cd356a3 1386 if (a == 0xe) { // special case, 2 byte writes would be handled differently\r
1387 Pico_mcd->s68k_regs[0xf] = d;\r
4ff2d527 1388 return;\r
1cd356a3 1389 }\r
cb4a513a 1390 s68k_reg_write8(a, d>>8);\r
1391 s68k_reg_write8(a+1,d&0xff);\r
1392 }\r
cc68a136 1393 return;\r
1394 }\r
1395\r
d0d47c5b 1396 // word RAM (2M area)\r
1397 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
0a051f55 1398 int r3 = Pico_mcd->s68k_regs[3];\r
913ef4b7 1399 wrdprintf("s68k_wram2M w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
0a051f55 1400 if (r3 & 4) { // 1M decode mode?\r
1401 decode_write16(a, d, r3);\r
d0d47c5b 1402 } else {\r
1403 // allow access in any mode, like Gens does\r
fa1e5e29 1404 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;\r
d0d47c5b 1405 }\r
1406 return;\r
1407 }\r
1408\r
1409 // word RAM (1M area)\r
68cba51e 1410 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
fa1e5e29 1411 int bank;\r
d0d47c5b 1412 if (d)\r
913ef4b7 1413 wrdprintf("s68k_wram1M w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
68cba51e 1414// if (!(Pico_mcd->s68k_regs[3]&4))\r
1415// dprintf("s68k_wram1M FIXME: wrong mode");\r
3aa1e148 1416 bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1417 *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe))=d;\r
d0d47c5b 1418 return;\r
1419 }\r
1420\r
4f265db7 1421 // PCM\r
1422 if ((a&0xff8000)==0xff0000) {\r
1423 a &= 0x7fff;\r
1424 if (a >= 0x2000)\r
1425 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;\r
1426 else if (a < 0x12)\r
1427 pcm_write(a>>1, d & 0xff);\r
1428 return;\r
1429 }\r
1430\r
ab0607f7 1431 // bram\r
1432 if ((a&0xff0000)==0xfe0000) {\r
1cd356a3 1433 dprintf("s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
ab0607f7 1434 a = (a>>1)&0x1fff;\r
1435 Pico_mcd->bram[a++] = d; // Gens does little endian here, an so do we..\r
1436 Pico_mcd->bram[a++] = d >> 8;\r
1437 SRam.changed = 1;\r
1438 return;\r
1439 }\r
1440\r
ca61ee42 1441 elprintf(EL_UIO, "s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
cc68a136 1442}\r
4ff2d527 1443#endif\r
cc68a136 1444\r
ab0607f7 1445\r
4ff2d527 1446#ifdef _ASM_CD_MEMORY_C\r
1447void PicoWriteS68k32(u32 a,u32 d);\r
1448#else\r
1449static void PicoWriteS68k32(u32 a,u32 d)\r
cc68a136 1450{\r
ca61ee42 1451 elprintf(EL_IO, "s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
cc68a136 1452\r
1453 a&=0xfffffe;\r
1454\r
b5e5172d 1455#ifdef EMU_CORE_DEBUG\r
1456 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
1457#endif\r
1458\r
cc68a136 1459 // prg RAM\r
1460 if (a < 0x80000) {\r
721cd396 1461 if (a >= (Pico_mcd->s68k_regs[2]<<8)) {\r
1462 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);\r
1463 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
1464 }\r
cc68a136 1465 return;\r
1466 }\r
1467\r
1468 // regs\r
1469 if ((a&0xfffe00) == 0xff8000) {\r
cb4a513a 1470 a &= 0x1fe;\r
1471 rdprintf("s68k_regs w32: [%02x] %08x @ %06x", a, d, SekPcS68k);\r
913ef4b7 1472 if (a >= 0x58 && a < 0x68) {\r
48e8482f 1473 gfx_cd_write16(a, d>>16);\r
1474 gfx_cd_write16(a+2, d&0xffff);\r
cb4a513a 1475 } else {\r
2433f409 1476 if ((a&0x1fe) == 0xe) dprintf("s68k FIXME: w32 [%02x]", a&0x3f);\r
cb4a513a 1477 s68k_reg_write8(a, d>>24);\r
1478 s68k_reg_write8(a+1,(d>>16)&0xff);\r
1479 s68k_reg_write8(a+2,(d>>8) &0xff);\r
1480 s68k_reg_write8(a+3, d &0xff);\r
1481 }\r
cc68a136 1482 return;\r
1483 }\r
1484\r
d0d47c5b 1485 // word RAM (2M area)\r
1486 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
0a051f55 1487 int r3 = Pico_mcd->s68k_regs[3];\r
913ef4b7 1488 wrdprintf("s68k_wram2M w32: [%06x] %08x @%06x", a, d, SekPcS68k);\r
0a051f55 1489 if (r3 & 4) { // 1M decode mode?\r
1490 decode_write16(a , d >> 16, r3);\r
1491 decode_write16(a+2, d , r3);\r
d0d47c5b 1492 } else {\r
1493 // allow access in any mode, like Gens does\r
fa1e5e29 1494 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
d0d47c5b 1495 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
1496 }\r
1497 return;\r
1498 }\r
1499\r
1500 // word RAM (1M area)\r
68cba51e 1501 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
fa1e5e29 1502 int bank;\r
1503 u16 *pm;\r
d0d47c5b 1504 if (d)\r
913ef4b7 1505 wrdprintf("s68k_wram1M w32: [%06x] %08x @%06x", a, d, SekPcS68k);\r
68cba51e 1506// if (!(Pico_mcd->s68k_regs[3]&4))\r
1507// dprintf("s68k_wram1M FIXME: wrong mode");\r
3aa1e148 1508 bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1509 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1510 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
d0d47c5b 1511 return;\r
1512 }\r
ab0607f7 1513\r
4f265db7 1514 // PCM\r
1515 if ((a&0xff8000)==0xff0000) {\r
1516 a &= 0x7fff;\r
1517 if (a >= 0x2000) {\r
1518 a >>= 1;\r
1519 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] = (d >> 16);\r
1520 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff] = d;\r
1521 } else if (a < 0x12) {\r
1522 a >>= 1;\r
1523 pcm_write(a, (d>>16) & 0xff);\r
1524 pcm_write(a+1, d & 0xff);\r
1525 }\r
1526 return;\r
1527 }\r
1528\r
ab0607f7 1529 // bram\r
1530 if ((a&0xff0000)==0xfe0000) {\r
1cd356a3 1531 dprintf("s68k_bram w32: [%06x] %08x @%06x", a, d, SekPcS68k);\r
ab0607f7 1532 a = (a>>1)&0x1fff;\r
1533 Pico_mcd->bram[a++] = d >> 16; // middle endian? verify?\r
1534 Pico_mcd->bram[a++] = d >> 24;\r
1535 Pico_mcd->bram[a++] = d;\r
1536 Pico_mcd->bram[a++] = d >> 8;\r
1537 SRam.changed = 1;\r
1538 return;\r
1539 }\r
1540\r
ca61ee42 1541 elprintf(EL_UIO, "s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
cc68a136 1542}\r
4ff2d527 1543#endif\r
cc68a136 1544\r
1545\r
1546// -----------------------------------------------------------------\r
1547\r
b837b69b 1548\r
3aa1e148 1549#ifdef EMU_C68K\r
b837b69b 1550static __inline int PicoMemBaseM68k(u32 pc)\r
1551{\r
fa1e5e29 1552 if ((pc&0xe00000)==0xe00000)\r
1553 return (int)Pico.ram-(pc&0xff0000); // Program Counter in Ram\r
b837b69b 1554\r
1555 if (pc < 0x20000)\r
fa1e5e29 1556 return (int)Pico_mcd->bios; // Program Counter in BIOS\r
1557\r
1558 if ((pc&0xfc0000)==0x200000)\r
b837b69b 1559 {\r
fa1e5e29 1560 if (!(Pico_mcd->s68k_regs[3]&4))\r
1561 return (int)Pico_mcd->word_ram2M - 0x200000; // Program Counter in Word Ram\r
1562 if (pc < 0x220000) {\r
3aa1e148 1563 int bank = Pico_mcd->s68k_regs[3]&1;\r
fa1e5e29 1564 return (int)Pico_mcd->word_ram1M[bank] - 0x200000;\r
1565 }\r
b837b69b 1566 }\r
1567\r
fa1e5e29 1568 // Error - Program Counter is invalid\r
ca61ee42 1569 elprintf(EL_ANOMALY, "m68k FIXME: unhandled jump to %06x", pc);\r
fa1e5e29 1570\r
1571 return (int)Pico_mcd->bios;\r
b837b69b 1572}\r
1573\r
1574\r
1575static u32 PicoCheckPcM68k(u32 pc)\r
1576{\r
3aa1e148 1577 pc-=PicoCpuCM68k.membase; // Get real pc\r
b837b69b 1578 pc&=0xfffffe;\r
1579\r
3aa1e148 1580 PicoCpuCM68k.membase=PicoMemBaseM68k(pc);\r
b837b69b 1581\r
3aa1e148 1582 return PicoCpuCM68k.membase+pc;\r
b837b69b 1583}\r
1584\r
1585\r
1586static __inline int PicoMemBaseS68k(u32 pc)\r
1587{\r
fa1e5e29 1588 if (pc < 0x80000) // PRG RAM\r
1589 return (int)Pico_mcd->prg_ram;\r
b837b69b 1590\r
fa1e5e29 1591 if ((pc&0xfc0000)==0x080000) // WORD RAM 2M area (assume we are in the right mode..)\r
1592 return (int)Pico_mcd->word_ram2M - 0x080000;\r
1593\r
1594 if ((pc&0xfe0000)==0x0c0000) { // word RAM 1M area\r
3aa1e148 1595 int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1596 return (int)Pico_mcd->word_ram1M[bank] - 0x0c0000;\r
b837b69b 1597 }\r
1598\r
fa1e5e29 1599 // Error - Program Counter is invalid\r
ca61ee42 1600 elprintf(EL_ANOMALY, "s68k FIXME: unhandled jump to %06x", pc);\r
fa1e5e29 1601\r
1602 return (int)Pico_mcd->prg_ram;\r
b837b69b 1603}\r
1604\r
1605\r
1606static u32 PicoCheckPcS68k(u32 pc)\r
1607{\r
3aa1e148 1608 pc-=PicoCpuCS68k.membase; // Get real pc\r
b837b69b 1609 pc&=0xfffffe;\r
1610\r
3aa1e148 1611 PicoCpuCS68k.membase=PicoMemBaseS68k(pc);\r
b837b69b 1612\r
3aa1e148 1613 return PicoCpuCS68k.membase+pc;\r
b837b69b 1614}\r
1615#endif\r
1616\r
3aa1e148 1617#ifndef _ASM_CD_MEMORY_C\r
1618void PicoMemResetCD(int r3)\r
1619{\r
1620#ifdef EMU_F68K\r
1621 // update fetchmap..\r
1622 int i;\r
1623 if (!(r3 & 4))\r
1624 {\r
1625 for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x240000; i++)\r
1626 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram2M - 0x200000;\r
1627 }\r
1628 else\r
1629 {\r
1630 for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x220000; i++)\r
1631 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram1M[r3 & 1] - 0x200000;\r
1632 for (i = M68K_FETCHBANK1*0x0c/0x100; (i<<(24-FAMEC_FETCHBITS)) < 0x0e0000; i++)\r
1633 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram1M[(r3&1)^1] - 0x0c0000;\r
1634 }\r
1635#endif\r
1636}\r
1637#endif\r
b837b69b 1638\r
9037e45d 1639#ifdef EMU_M68K\r
1640static void m68k_mem_setup_cd(void);\r
1641#endif\r
1642\r
eff55556 1643PICO_INTERNAL void PicoMemSetupCD(void)\r
b837b69b 1644{\r
f53f286a 1645 // additional handlers for common code\r
1646 PicoRead16Hook = OtherRead16End;\r
1647 PicoWrite8Hook = OtherWrite8End;\r
1648\r
b837b69b 1649#ifdef EMU_C68K\r
1650 // Setup m68k memory callbacks:\r
3aa1e148 1651 PicoCpuCM68k.checkpc=PicoCheckPcM68k;\r
1652 PicoCpuCM68k.fetch8 =PicoCpuCM68k.read8 =PicoReadM68k8;\r
1653 PicoCpuCM68k.fetch16=PicoCpuCM68k.read16=PicoReadM68k16;\r
1654 PicoCpuCM68k.fetch32=PicoCpuCM68k.read32=PicoReadM68k32;\r
1655 PicoCpuCM68k.write8 =PicoWriteM68k8;\r
1656 PicoCpuCM68k.write16=PicoWriteM68k16;\r
1657 PicoCpuCM68k.write32=PicoWriteM68k32;\r
b837b69b 1658 // s68k\r
3aa1e148 1659 PicoCpuCS68k.checkpc=PicoCheckPcS68k;\r
1660 PicoCpuCS68k.fetch8 =PicoCpuCS68k.read8 =PicoReadS68k8;\r
1661 PicoCpuCS68k.fetch16=PicoCpuCS68k.read16=PicoReadS68k16;\r
1662 PicoCpuCS68k.fetch32=PicoCpuCS68k.read32=PicoReadS68k32;\r
1663 PicoCpuCS68k.write8 =PicoWriteS68k8;\r
1664 PicoCpuCS68k.write16=PicoWriteS68k16;\r
1665 PicoCpuCS68k.write32=PicoWriteS68k32;\r
b837b69b 1666#endif\r
3aa1e148 1667#ifdef EMU_F68K\r
1668 // m68k\r
1669 PicoCpuFM68k.read_byte =PicoReadM68k8;\r
1670 PicoCpuFM68k.read_word =PicoReadM68k16;\r
1671 PicoCpuFM68k.read_long =PicoReadM68k32;\r
1672 PicoCpuFM68k.write_byte=PicoWriteM68k8;\r
1673 PicoCpuFM68k.write_word=PicoWriteM68k16;\r
1674 PicoCpuFM68k.write_long=PicoWriteM68k32;\r
1675 // s68k\r
1676 PicoCpuFS68k.read_byte =PicoReadS68k8;\r
1677 PicoCpuFS68k.read_word =PicoReadS68k16;\r
1678 PicoCpuFS68k.read_long =PicoReadS68k32;\r
1679 PicoCpuFS68k.write_byte=PicoWriteS68k8;\r
1680 PicoCpuFS68k.write_word=PicoWriteS68k16;\r
1681 PicoCpuFS68k.write_long=PicoWriteS68k32;\r
1682\r
1683 // setup FAME fetchmap\r
1684 {\r
1685 int i;\r
1686 // M68k\r
1687 // by default, point everything to fitst 64k of ROM (BIOS)\r
1688 for (i = 0; i < M68K_FETCHBANK1; i++)\r
1689 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r
1690 // now real ROM (BIOS)\r
1691 for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)\r
1692 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom;\r
1693 // .. and RAM\r
1694 for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)\r
1695 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.ram - (i<<(24-FAMEC_FETCHBITS));\r
1696 // S68k\r
1697 // PRG RAM is default\r
1698 for (i = 0; i < M68K_FETCHBANK1; i++)\r
1699 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->prg_ram - (i<<(24-FAMEC_FETCHBITS));\r
1700 // real PRG RAM\r
1701 for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0x80000; i++)\r
1702 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->prg_ram;\r
1703 // WORD RAM 2M area\r
1704 for (i = M68K_FETCHBANK1*0x08/0x100; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0xc0000; i++)\r
1705 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram2M - 0x80000;\r
1706 // PicoMemResetCD() will setup word ram for both\r
1707 }\r
1708#endif\r
9037e45d 1709#ifdef EMU_M68K\r
1710 m68k_mem_setup_cd();\r
1711#endif\r
3aa1e148 1712\r
7a1f6e45 1713 // m68k_poll_addr = m68k_poll_cnt = 0;\r
1714 s68k_poll_adclk = s68k_poll_cnt = 0;\r
b837b69b 1715}\r
1716\r
1717\r
cc68a136 1718#ifdef EMU_M68K\r
9037e45d 1719static unsigned int PicoReadCD8w (unsigned int a) {\r
3aa1e148 1720 return m68ki_cpu_p == &PicoCpuMS68k ? PicoReadS68k8(a) : PicoReadM68k8(a);\r
cc68a136 1721}\r
9037e45d 1722static unsigned int PicoReadCD16w(unsigned int a) {\r
3aa1e148 1723 return m68ki_cpu_p == &PicoCpuMS68k ? PicoReadS68k16(a) : PicoReadM68k16(a);\r
cc68a136 1724}\r
9037e45d 1725static unsigned int PicoReadCD32w(unsigned int a) {\r
3aa1e148 1726 return m68ki_cpu_p == &PicoCpuMS68k ? PicoReadS68k32(a) : PicoReadM68k32(a);\r
cc68a136 1727}\r
9037e45d 1728static void PicoWriteCD8w (unsigned int a, unsigned char d) {\r
3aa1e148 1729 if (m68ki_cpu_p == &PicoCpuMS68k) PicoWriteS68k8(a, d); else PicoWriteM68k8(a, d);\r
cc68a136 1730}\r
9037e45d 1731static void PicoWriteCD16w(unsigned int a, unsigned short d) {\r
3aa1e148 1732 if (m68ki_cpu_p == &PicoCpuMS68k) PicoWriteS68k16(a, d); else PicoWriteM68k16(a, d);\r
cc68a136 1733}\r
9037e45d 1734static void PicoWriteCD32w(unsigned int a, unsigned int d) {\r
3aa1e148 1735 if (m68ki_cpu_p == &PicoCpuMS68k) PicoWriteS68k32(a, d); else PicoWriteM68k32(a, d);\r
cc68a136 1736}\r
1737\r
1738// these are allowed to access RAM\r
9037e45d 1739static unsigned int m68k_read_pcrelative_CD8 (unsigned int a)\r
b5e5172d 1740{\r
cc68a136 1741 a&=0xffffff;\r
3aa1e148 1742 if(m68ki_cpu_p == &PicoCpuMS68k) {\r
cc68a136 1743 if (a < 0x80000) return *(u8 *)(Pico_mcd->prg_ram+(a^1)); // PRG Ram\r
fa1e5e29 1744 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)\r
1745 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));\r
1746 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)\r
3aa1e148 1747 int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1748 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));\r
1749 }\r
ca61ee42 1750 elprintf(EL_ANOMALY, "s68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);\r
cc68a136 1751 } else {\r
cc68a136 1752 if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram\r
fa1e5e29 1753 if(a<0x20000) return *(u8 *)(Pico.rom+(a^1)); // Bios\r
1754 if((a&0xfc0000)==0x200000) { // word RAM\r
1755 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?\r
1756 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));\r
1757 else if (a < 0x220000) {\r
1758 int bank = Pico_mcd->s68k_regs[3]&1;\r
1759 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));\r
1760 }\r
1761 }\r
ca61ee42 1762 elprintf(EL_ANOMALY, "m68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);\r
cc68a136 1763 }\r
1764 return 0;//(u8) lastread_d;\r
1765}\r
9037e45d 1766static unsigned int m68k_read_pcrelative_CD16(unsigned int a)\r
b5e5172d 1767{\r
cc68a136 1768 a&=0xffffff;\r
3aa1e148 1769 if(m68ki_cpu_p == &PicoCpuMS68k) {\r
cc68a136 1770 if (a < 0x80000) return *(u16 *)(Pico_mcd->prg_ram+(a&~1)); // PRG Ram\r
fa1e5e29 1771 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)\r
1772 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
1773 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)\r
3aa1e148 1774 int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1775 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1776 }\r
ca61ee42 1777 elprintf(EL_ANOMALY, "s68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);\r
cc68a136 1778 } else {\r
cc68a136 1779 if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram\r
fa1e5e29 1780 if(a<0x20000) return *(u16 *)(Pico.rom+(a&~1)); // Bios\r
1781 if((a&0xfc0000)==0x200000) { // word RAM\r
1782 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?\r
1783 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
1784 else if (a < 0x220000) {\r
1785 int bank = Pico_mcd->s68k_regs[3]&1;\r
1786 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1787 }\r
1788 }\r
ca61ee42 1789 elprintf(EL_ANOMALY, "m68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);\r
cc68a136 1790 }\r
b837b69b 1791 return 0;\r
cc68a136 1792}\r
9037e45d 1793static unsigned int m68k_read_pcrelative_CD32(unsigned int a)\r
b5e5172d 1794{\r
fa1e5e29 1795 u16 *pm;\r
cc68a136 1796 a&=0xffffff;\r
3aa1e148 1797 if(m68ki_cpu_p == &PicoCpuMS68k) {\r
cc68a136 1798 if (a < 0x80000) { u16 *pm=(u16 *)(Pico_mcd->prg_ram+(a&~1)); return (pm[0]<<16)|pm[1]; } // PRG Ram\r
fa1e5e29 1799 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)\r
1800 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }\r
1801 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)\r
3aa1e148 1802 int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
fa1e5e29 1803 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1804 return (pm[0]<<16)|pm[1];\r
1805 }\r
ca61ee42 1806 elprintf(EL_ANOMALY, "s68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);\r
cc68a136 1807 } else {\r
cc68a136 1808 if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram\r
fa1e5e29 1809 if(a<0x20000) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }\r
1810 if((a&0xfc0000)==0x200000) { // word RAM\r
1811 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?\r
1812 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }\r
1813 else if (a < 0x220000) {\r
1814 int bank = Pico_mcd->s68k_regs[3]&1;\r
1815 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1816 return (pm[0]<<16)|pm[1];\r
1817 }\r
1818 }\r
ca61ee42 1819 elprintf(EL_ANOMALY, "m68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);\r
cc68a136 1820 }\r
b837b69b 1821 return 0;\r
cc68a136 1822}\r
9037e45d 1823\r
1824extern unsigned int (*pm68k_read_memory_8) (unsigned int address);\r
1825extern unsigned int (*pm68k_read_memory_16)(unsigned int address);\r
1826extern unsigned int (*pm68k_read_memory_32)(unsigned int address);\r
1827extern void (*pm68k_write_memory_8) (unsigned int address, unsigned char value);\r
1828extern void (*pm68k_write_memory_16)(unsigned int address, unsigned short value);\r
1829extern void (*pm68k_write_memory_32)(unsigned int address, unsigned int value);\r
1830extern unsigned int (*pm68k_read_memory_pcr_8) (unsigned int address);\r
1831extern unsigned int (*pm68k_read_memory_pcr_16)(unsigned int address);\r
1832extern unsigned int (*pm68k_read_memory_pcr_32)(unsigned int address);\r
1833\r
1834static void m68k_mem_setup_cd(void)\r
1835{\r
1836 pm68k_read_memory_8 = PicoReadCD8w;\r
1837 pm68k_read_memory_16 = PicoReadCD16w;\r
1838 pm68k_read_memory_32 = PicoReadCD32w;\r
1839 pm68k_write_memory_8 = PicoWriteCD8w;\r
1840 pm68k_write_memory_16 = PicoWriteCD16w;\r
1841 pm68k_write_memory_32 = PicoWriteCD32w;\r
1842 pm68k_read_memory_pcr_8 = m68k_read_pcrelative_CD8;\r
1843 pm68k_read_memory_pcr_16 = m68k_read_pcrelative_CD16;\r
1844 pm68k_read_memory_pcr_32 = m68k_read_pcrelative_CD32;\r
1845}\r
cc68a136 1846#endif // EMU_M68K\r
1847\r
fast MegaDrive/MegaCD/32X emulator