6ab2f79c |
1 | // Code for communication with ARM940 and control of it.\r |
2 | // (c) Copyright 2007, Grazvydas "notaz" Ignotas\r |
3 | \r |
720ee7f6 |
4 | #include <stdio.h>\r |
5 | #include <stdlib.h>\r |
6 | #include <string.h>\r |
7 | #include <unistd.h>\r |
8 | #include <sys/mman.h>\r |
9 | #include <sys/ioctl.h>\r |
10 | #include <fcntl.h>\r |
11 | #include <errno.h>\r |
12 | \r |
b30a8e67 |
13 | #include "code940/940shared.h"\r |
720ee7f6 |
14 | #include "gp2x.h"\r |
15 | #include "emu.h"\r |
16 | #include "menu.h"\r |
edbb82f8 |
17 | #include "mp3.h"\r |
c7a4ff64 |
18 | #include "../common/arm_utils.h"\r |
19 | #include "../common/menu.h"\r |
598e7c06 |
20 | #include "../../Pico/PicoInt.h"\r |
31a77bde |
21 | #include "../../Pico/sound/ym2612.h"\r |
49fe50f0 |
22 | #include "../../Pico/sound/mix.h"\r |
23 | \r |
720ee7f6 |
24 | /* we will need some gp2x internals here */\r |
25 | extern volatile unsigned short *gp2x_memregs; /* from minimal library rlyeh */\r |
26 | extern volatile unsigned long *gp2x_memregl;\r |
27 | \r |
8f1b51ef |
28 | extern int reset_timing;\r |
720ee7f6 |
29 | static unsigned char *shared_mem = 0;\r |
30 | static _940_data_t *shared_data = 0;\r |
edbb82f8 |
31 | _940_ctl_t *shared_ctl = 0;\r |
32 | unsigned char *mp3_mem = 0;\r |
598e7c06 |
33 | \r |
60b4b403 |
34 | #define MP3_SIZE_MAX (0x400000 + 0x800000) // 12M\r |
95151aea |
35 | #define CODE940_FILE "pico940.bin"\r |
720ee7f6 |
36 | \r |
37 | int crashed_940 = 0;\r |
38 | \r |
979ba09f |
39 | static FILE *loaded_mp3 = 0;\r |
720ee7f6 |
40 | \r |
41 | /***********************************************************/\r |
42 | \r |
43 | #define MAXOUT (+32767)\r |
44 | #define MINOUT (-32768)\r |
45 | \r |
46 | /* limitter */\r |
47 | #define Limit(val, max,min) { \\r |
48 | if ( val > max ) val = max; \\r |
49 | else if ( val < min ) val = min; \\r |
50 | }\r |
51 | \r |
52 | /* these will be managed locally on our side */\r |
53 | extern int *ym2612_dacen;\r |
54 | extern INT32 *ym2612_dacout;\r |
720ee7f6 |
55 | static UINT8 *REGS = 0; /* we will also keep local copy of regs for savestates and such */\r |
31a77bde |
56 | static INT32 *addr_A1; /* address line A1 */\r |
57 | \r |
58 | static int dacen;\r |
720ee7f6 |
59 | static INT32 dacout;\r |
60 | static UINT8 ST_address; /* address register */\r |
61 | static UINT8 ST_status; /* status flag */\r |
62 | static UINT8 ST_mode; /* mode CSM / 3SLOT */\r |
63 | static int ST_TA; /* timer a */\r |
64 | static int ST_TAC; /* timer a maxval */\r |
65 | static int ST_TAT; /* timer a ticker */\r |
66 | static UINT8 ST_TB; /* timer b */\r |
67 | static int ST_TBC; /* timer b maxval */\r |
68 | static int ST_TBT; /* timer b ticker */\r |
69 | \r |
70 | static int writebuff_ptr = 0;\r |
71 | \r |
72 | \r |
73 | /* OPN Mode Register Write */\r |
79cad122 |
74 | static int set_timers( int v )\r |
720ee7f6 |
75 | {\r |
79cad122 |
76 | int change;\r |
77 | \r |
720ee7f6 |
78 | /* b7 = CSM MODE */\r |
79 | /* b6 = 3 slot mode */\r |
80 | /* b5 = reset b */\r |
81 | /* b4 = reset a */\r |
82 | /* b3 = timer enable b */\r |
83 | /* b2 = timer enable a */\r |
84 | /* b1 = load b */\r |
85 | /* b0 = load a */\r |
79cad122 |
86 | change = (ST_mode ^ v) & 0xc0;\r |
720ee7f6 |
87 | ST_mode = v;\r |
88 | \r |
89 | /* reset Timer b flag */\r |
90 | if( v & 0x20 )\r |
91 | ST_status &= ~2;\r |
92 | \r |
93 | /* reset Timer a flag */\r |
94 | if( v & 0x10 )\r |
95 | ST_status &= ~1;\r |
79cad122 |
96 | \r |
97 | return change;\r |
720ee7f6 |
98 | }\r |
99 | \r |
100 | /* YM2612 write */\r |
101 | /* a = address */\r |
102 | /* v = value */\r |
103 | /* returns 1 if sample affecting state changed */\r |
104 | int YM2612Write_940(unsigned int a, unsigned int v)\r |
105 | {\r |
79cad122 |
106 | int addr;\r |
107 | int upd = 1; /* the write affects sample generation */\r |
720ee7f6 |
108 | \r |
109 | v &= 0xff; /* adjust to 8 bit bus */\r |
110 | a &= 3;\r |
111 | \r |
79cad122 |
112 | //printf("%05i:%03i: ym w ([%i] %02x)\n", Pico.m.frame_count, Pico.m.scanline, a, v);\r |
113 | \r |
720ee7f6 |
114 | switch( a ) {\r |
115 | case 0: /* address port 0 */\r |
31a77bde |
116 | if (!*addr_A1 && ST_address == v)\r |
d032c15a |
117 | return 0; /* address already selected, don't send this command to 940 */\r |
720ee7f6 |
118 | ST_address = v;\r |
d032c15a |
119 | /* don't send DAC or timer related address changes to 940 */\r |
31a77bde |
120 | if (!*addr_A1 && (v & 0xf0) == 0x20 &&\r |
d032c15a |
121 | (v == 0x24 || v == 0x25 || v == 0x26 || v == 0x2a))\r |
122 | return 0;\r |
31a77bde |
123 | *addr_A1 = 0;\r |
79cad122 |
124 | upd = 0;\r |
720ee7f6 |
125 | break;\r |
126 | \r |
127 | case 1: /* data port 0 */\r |
31a77bde |
128 | if (*addr_A1 != 0) {\r |
720ee7f6 |
129 | return 0; /* verified on real YM2608 */\r |
130 | }\r |
131 | \r |
132 | addr = ST_address;\r |
133 | REGS[addr] = v;\r |
134 | \r |
135 | switch( addr & 0xf0 )\r |
136 | {\r |
137 | case 0x20: /* 0x20-0x2f Mode */\r |
138 | switch( addr )\r |
139 | {\r |
140 | case 0x24: { // timer A High 8\r |
141 | int TAnew = (ST_TA & 0x03)|(((int)v)<<2);\r |
142 | if(ST_TA != TAnew) {\r |
143 | // we should reset ticker only if new value is written. Outrun requires this.\r |
144 | ST_TA = TAnew;\r |
145 | ST_TAC = (1024-TAnew)*18;\r |
146 | ST_TAT = 0;\r |
147 | }\r |
148 | return 0;\r |
149 | }\r |
150 | case 0x25: { // timer A Low 2\r |
151 | int TAnew = (ST_TA & 0x3fc)|(v&3);\r |
152 | if(ST_TA != TAnew) {\r |
153 | ST_TA = TAnew;\r |
154 | ST_TAC = (1024-TAnew)*18;\r |
155 | ST_TAT = 0;\r |
156 | }\r |
157 | return 0;\r |
158 | }\r |
159 | case 0x26: // timer B\r |
160 | if(ST_TB != v) {\r |
161 | ST_TB = v;\r |
162 | ST_TBC = (256-v)<<4;\r |
163 | ST_TBC *= 18;\r |
164 | ST_TBT = 0;\r |
165 | }\r |
166 | return 0;\r |
167 | case 0x27: /* mode, timer control */\r |
79cad122 |
168 | if (set_timers( v ))\r |
169 | break; // other side needs ST.mode for 3slot mode\r |
170 | return 0;\r |
720ee7f6 |
171 | case 0x2a: /* DAC data (YM2612) */\r |
172 | dacout = ((int)v - 0x80) << 6; /* level unknown (notaz: 8 seems to be too much) */\r |
173 | return 0;\r |
174 | case 0x2b: /* DAC Sel (YM2612) */\r |
175 | /* b7 = dac enable */\r |
176 | dacen = v & 0x80;\r |
79cad122 |
177 | upd = 0;\r |
720ee7f6 |
178 | break; // other side has to know this\r |
179 | default:\r |
180 | break;\r |
181 | }\r |
182 | break;\r |
183 | }\r |
184 | break;\r |
185 | \r |
186 | case 2: /* address port 1 */\r |
31a77bde |
187 | if (*addr_A1 && ST_address == v)\r |
d032c15a |
188 | return 0;\r |
720ee7f6 |
189 | ST_address = v;\r |
31a77bde |
190 | *addr_A1 = 1;\r |
79cad122 |
191 | upd = 0;\r |
720ee7f6 |
192 | break;\r |
193 | \r |
194 | case 3: /* data port 1 */\r |
31a77bde |
195 | if (*addr_A1 != 1) {\r |
720ee7f6 |
196 | return 0; /* verified on real YM2608 */\r |
197 | }\r |
198 | \r |
199 | addr = ST_address | 0x100;\r |
200 | REGS[addr] = v;\r |
201 | break;\r |
202 | }\r |
203 | \r |
79cad122 |
204 | //printf("ym pass\n");\r |
205 | \r |
720ee7f6 |
206 | if(currentConfig.EmuOpt & 4) {\r |
79cad122 |
207 | UINT16 *writebuff = shared_ctl->writebuffsel ? shared_ctl->writebuff0 : shared_ctl->writebuff1;\r |
208 | \r |
209 | /* detect rapid ym updates */\r |
210 | if (upd && !(writebuff_ptr & 0x80000000) && Pico.m.scanline < 224) {\r |
211 | int mid = Pico.m.pal ? 68 : 93;\r |
212 | if (Pico.m.scanline > mid) {\r |
213 | //printf("%05i:%03i: rapid ym\n", Pico.m.frame_count, Pico.m.scanline);\r |
214 | writebuff[writebuff_ptr++ & 0xffff] = 0xfffe;\r |
215 | writebuff_ptr |= 0x80000000;\r |
216 | //printf("%05i:%03i: ym w ([%02x] %02x, upd=%i)\n", Pico.m.frame_count, Pico.m.scanline, addr, v, upd);\r |
720ee7f6 |
217 | }\r |
79cad122 |
218 | }\r |
219 | \r |
220 | /* queue this write for 940 */\r |
221 | if ((writebuff_ptr&0xffff) < 2047) {\r |
222 | writebuff[writebuff_ptr++ & 0xffff] = (a<<8)|v;\r |
720ee7f6 |
223 | } else {\r |
d032c15a |
224 | printf("warning: writebuff_ptr > 2047 ([%i] %02x)\n", a, v);\r |
720ee7f6 |
225 | }\r |
226 | }\r |
227 | \r |
228 | return 0; // cause the engine to do updates once per frame only\r |
229 | }\r |
230 | \r |
231 | UINT8 YM2612Read_940(void)\r |
232 | {\r |
233 | return ST_status;\r |
234 | }\r |
235 | \r |
236 | \r |
237 | int YM2612PicoTick_940(int n)\r |
238 | {\r |
239 | //int ret = 0;\r |
240 | \r |
241 | // timer A\r |
242 | if(ST_mode & 0x01 && (ST_TAT+=64*n) >= ST_TAC) {\r |
243 | ST_TAT -= ST_TAC;\r |
244 | if(ST_mode & 0x04) ST_status |= 1;\r |
245 | // CSM mode total level latch and auto key on\r |
246 | /* FIXME\r |
247 | if(ST_mode & 0x80) {\r |
248 | CSMKeyControll( &(ym2612_940->CH[2]) ); // Vectorman2, etc.\r |
249 | ret = 1;\r |
250 | }\r |
251 | */\r |
252 | }\r |
253 | \r |
254 | // timer B\r |
255 | if(ST_mode & 0x02 && (ST_TBT+=64*n) >= ST_TBC) {\r |
256 | ST_TBT -= ST_TBC;\r |
257 | if(ST_mode & 0x08) ST_status |= 2;\r |
258 | }\r |
259 | \r |
260 | return 0;\r |
261 | }\r |
262 | \r |
263 | \r |
edbb82f8 |
264 | #define CHECK_BUSY(job) \\r |
265 | (gp2x_memregs[0x3b46>>1] & (1<<(job-1)))\r |
266 | \r |
267 | static void wait_busy_940(int job)\r |
720ee7f6 |
268 | {\r |
269 | int i;\r |
720ee7f6 |
270 | \r |
edbb82f8 |
271 | job--;\r |
272 | for (i = 0; (gp2x_memregs[0x3b46>>1] & (1<<job)) && i < 0x10000; i++)\r |
b30a8e67 |
273 | spend_cycles(8*1024); // tested to be best for mp3 dec\r |
720ee7f6 |
274 | if (i < 0x10000) return;\r |
275 | \r |
276 | /* 940 crashed */\r |
b30a8e67 |
277 | printf("940 crashed (cnt: %i, ve: ", shared_ctl->loopc);\r |
720ee7f6 |
278 | for (i = 0; i < 8; i++)\r |
279 | printf("%i ", shared_ctl->vstarts[i]);\r |
280 | printf(")\n");\r |
edbb82f8 |
281 | printf("irq pending flags: DUALCPU %04x, SRCPND %08lx (see 26), INTPND %08lx\n",\r |
49fe50f0 |
282 | gp2x_memregs[0x3b46>>1], gp2x_memregl[0x4500>>2], gp2x_memregl[0x4510>>2]);\r |
edbb82f8 |
283 | printf("last lr: %08x, lastjob: %i\n", shared_ctl->last_lr, shared_ctl->lastjob);\r |
49fe50f0 |
284 | printf("trying to interrupt..\n");\r |
285 | gp2x_memregs[0x3B3E>>1] = 0xffff;\r |
edbb82f8 |
286 | for (i = 0; gp2x_memregs[0x3b46>>1] && i < 0x10000; i++)\r |
49fe50f0 |
287 | spend_cycles(8*1024);\r |
288 | printf("i = 0x%x\n", i);\r |
edbb82f8 |
289 | printf("irq pending flags: DUALCPU %04x, SRCPND %08lx (see 26), INTPND %08lx\n",\r |
49fe50f0 |
290 | gp2x_memregs[0x3b46>>1], gp2x_memregl[0x4500>>2], gp2x_memregl[0x4510>>2]);\r |
edbb82f8 |
291 | printf("last lr: %08x, lastjob: %i\n", shared_ctl->last_lr, shared_ctl->lastjob);\r |
49fe50f0 |
292 | \r |
6ab2f79c |
293 | strcpy(menuErrorMsg, "940 crashed, too much overclock?");\r |
720ee7f6 |
294 | engineState = PGS_Menu;\r |
295 | crashed_940 = 1;\r |
720ee7f6 |
296 | }\r |
297 | \r |
298 | \r |
edbb82f8 |
299 | static void add_job_940(int job)\r |
720ee7f6 |
300 | {\r |
edbb82f8 |
301 | if (job <= 0 || job > 16) {\r |
302 | printf("add_job_940: bad job: %i\n", job);\r |
303 | return;\r |
49fe50f0 |
304 | }\r |
edbb82f8 |
305 | \r |
306 | // generate interrupt for this job\r |
307 | job--;\r |
308 | gp2x_memregs[(0x3B20+job*2)>>1] = 1;\r |
309 | \r |
310 | // printf("added %i, pending %04x\n", job+1, gp2x_memregs[0x3b46>>1]);\r |
720ee7f6 |
311 | }\r |
312 | \r |
313 | \r |
314 | void YM2612PicoStateLoad_940(void)\r |
315 | {\r |
31a77bde |
316 | int i, old_A1 = *addr_A1;\r |
720ee7f6 |
317 | \r |
fb88e614 |
318 | /* make sure JOB940_PICOSTATELOAD gets done before next JOB940_YM2612UPDATEONE */\r |
319 | add_job_940(JOB940_PICOSTATELOAD);\r |
320 | if (CHECK_BUSY(JOB940_PICOSTATELOAD)) wait_busy_940(JOB940_PICOSTATELOAD);\r |
321 | \r |
322 | writebuff_ptr = 0;\r |
323 | \r |
720ee7f6 |
324 | // feed all the registers and update internal state\r |
325 | for(i = 0; i < 0x100; i++) {\r |
326 | YM2612Write_940(0, i);\r |
327 | YM2612Write_940(1, REGS[i]);\r |
328 | }\r |
329 | for(i = 0; i < 0x100; i++) {\r |
330 | YM2612Write_940(2, i);\r |
331 | YM2612Write_940(3, REGS[i|0x100]);\r |
332 | }\r |
333 | \r |
31a77bde |
334 | *addr_A1 = old_A1;\r |
720ee7f6 |
335 | }\r |
336 | \r |
337 | \r |
338 | static void internal_reset(void)\r |
339 | {\r |
340 | writebuff_ptr = 0;\r |
341 | ST_mode = 0;\r |
342 | ST_status = 0; /* normal mode */\r |
343 | ST_TA = 0;\r |
344 | ST_TAC = 0;\r |
345 | ST_TB = 0;\r |
346 | ST_TBC = 0;\r |
31a77bde |
347 | dacen = 0;\r |
348 | dacout = 0;\r |
349 | ST_address= 0;\r |
720ee7f6 |
350 | }\r |
351 | \r |
352 | \r |
52d3dd5f |
353 | /* this must be called after mmu hack, the allocated regions must not get cached */\r |
354 | void sharedmem_init(void)\r |
355 | {\r |
356 | if (shared_mem != NULL) return;\r |
357 | \r |
358 | shared_mem = (unsigned char *) mmap(0, 0x210000, PROT_READ|PROT_WRITE, MAP_SHARED, memdev, 0x2000000);\r |
359 | if(shared_mem == MAP_FAILED)\r |
360 | {\r |
361 | printf("mmap(shared_data) failed with %i\n", errno);\r |
362 | exit(1);\r |
363 | }\r |
364 | shared_data = (_940_data_t *) (shared_mem+0x100000);\r |
365 | /* this area must not get buffered on either side */\r |
366 | shared_ctl = (_940_ctl_t *) (shared_mem+0x200000);\r |
60b4b403 |
367 | mp3_mem = (unsigned char *) mmap(0, MP3_SIZE_MAX, PROT_READ|PROT_WRITE, MAP_SHARED, memdev, 0x2400000);\r |
52d3dd5f |
368 | if (mp3_mem == MAP_FAILED)\r |
369 | {\r |
370 | printf("mmap(mp3_mem) failed with %i\n", errno);\r |
371 | exit(1);\r |
372 | }\r |
373 | crashed_940 = 1;\r |
374 | }\r |
375 | \r |
376 | \r |
4dfd9f42 |
377 | void sharedmem_deinit(void)\r |
378 | {\r |
379 | munmap(shared_mem, 0x210000);\r |
380 | munmap(mp3_mem, MP3_SIZE_MAX);\r |
381 | shared_mem = mp3_mem = NULL;\r |
382 | shared_data = NULL;\r |
383 | shared_ctl = NULL;\r |
384 | }\r |
385 | \r |
386 | \r |
720ee7f6 |
387 | extern char **g_argv;\r |
388 | \r |
389 | /* none of the functions in this file should be called before this one */\r |
390 | void YM2612Init_940(int baseclock, int rate)\r |
391 | {\r |
392 | printf("YM2612Init_940()\n");\r |
8dfb9fd5 |
393 | printf("Mem usage: shared_data: %i, shared_ctl: %i\n", sizeof(*shared_data), sizeof(*shared_ctl));\r |
720ee7f6 |
394 | \r |
8dfb9fd5 |
395 | Reset940(1, 2);\r |
720ee7f6 |
396 | Pause940(1);\r |
397 | \r |
49fe50f0 |
398 | gp2x_memregs[0x3B40>>1] = 0; // disable DUALCPU interrupts for 920\r |
399 | gp2x_memregs[0x3B42>>1] = 1; // enable DUALCPU interrupts for 940\r |
720ee7f6 |
400 | \r |
edbb82f8 |
401 | gp2x_memregl[0x4504>>2] = 0; // make sure no FIQs will be generated\r |
402 | gp2x_memregl[0x4508>>2] = ~(1<<26); // unmask DUALCPU ints in the undocumented 940's interrupt controller\r |
403 | \r |
404 | \r |
720ee7f6 |
405 | if (crashed_940)\r |
406 | {\r |
407 | unsigned char ucData[1024];\r |
408 | int nRead, i, nLen = 0;\r |
409 | char binpath[1024];\r |
410 | FILE *fp;\r |
411 | \r |
412 | strncpy(binpath, g_argv[0], 1023);\r |
413 | binpath[1023] = 0;\r |
414 | for (i = strlen(binpath); i > 0; i--)\r |
415 | if (binpath[i] == '/') { binpath[i] = 0; break; }\r |
95151aea |
416 | strcat(binpath, "/" CODE940_FILE);\r |
720ee7f6 |
417 | \r |
418 | fp = fopen(binpath, "rb");\r |
419 | if(!fp)\r |
420 | {\r |
13059a60 |
421 | memset(gp2x_screen, 0, 320*240*2);\r |
422 | text_out16(10, 100, "failed to open required file:");\r |
423 | text_out16(10, 110, CODE940_FILE);\r |
424 | gp2x_video_flip2();\r |
720ee7f6 |
425 | printf("failed to open %s\n", binpath);\r |
426 | exit(1);\r |
427 | }\r |
428 | \r |
429 | while(1)\r |
430 | {\r |
431 | nRead = fread(ucData, 1, 1024, fp);\r |
432 | if(nRead <= 0)\r |
433 | break;\r |
434 | memcpy(shared_mem + nLen, ucData, nRead);\r |
435 | nLen += nRead;\r |
436 | }\r |
437 | fclose(fp);\r |
438 | crashed_940 = 0;\r |
439 | }\r |
440 | \r |
441 | memset(shared_data, 0, sizeof(*shared_data));\r |
442 | memset(shared_ctl, 0, sizeof(*shared_ctl));\r |
443 | \r |
31a77bde |
444 | /* cause local ym2612 to init REGS */\r |
445 | YM2612Init_(baseclock, rate);\r |
446 | \r |
720ee7f6 |
447 | REGS = YM2612GetRegs();\r |
31a77bde |
448 | addr_A1 = (INT32 *) (REGS + 0x200);\r |
720ee7f6 |
449 | \r |
450 | ym2612_dacen = &dacen;\r |
451 | ym2612_dacout = &dacout;\r |
452 | \r |
453 | internal_reset();\r |
454 | \r |
979ba09f |
455 | loaded_mp3 = 0;\r |
456 | \r |
49fe50f0 |
457 | gp2x_memregs[0x3B46>>1] = 0xffff; // clear pending DUALCPU interrupts for 940\r |
edbb82f8 |
458 | gp2x_memregl[0x4500>>2] = 0xffffffff; // clear pending IRQs in SRCPND\r |
459 | gp2x_memregl[0x4510>>2] = 0xffffffff; // clear pending IRQs in INTPND\r |
720ee7f6 |
460 | \r |
461 | /* start the 940 */\r |
8dfb9fd5 |
462 | Reset940(0, 2);\r |
720ee7f6 |
463 | Pause940(0);\r |
464 | \r |
465 | // YM2612ResetChip_940(); // will be done on JOB940_YM2612INIT\r |
edbb82f8 |
466 | \r |
467 | /* now cause 940 to init it's ym2612 stuff */\r |
468 | shared_ctl->baseclock = baseclock;\r |
469 | shared_ctl->rate = rate;\r |
470 | add_job_940(JOB940_INITALL);\r |
720ee7f6 |
471 | }\r |
472 | \r |
473 | \r |
474 | void YM2612ResetChip_940(void)\r |
475 | {\r |
476 | printf("YM2612ResetChip_940()\n");\r |
477 | if (shared_data == NULL) {\r |
478 | printf("YM2612ResetChip_940: reset before init?\n");\r |
479 | return;\r |
480 | }\r |
481 | \r |
720ee7f6 |
482 | internal_reset();\r |
483 | \r |
edbb82f8 |
484 | add_job_940(JOB940_YM2612RESETCHIP);\r |
720ee7f6 |
485 | }\r |
486 | \r |
487 | \r |
edbb82f8 |
488 | int YM2612UpdateOne_940(int *buffer, int length, int stereo, int is_buf_empty)\r |
598e7c06 |
489 | {\r |
edbb82f8 |
490 | int *ym_buf = shared_data->ym_buffer;\r |
4dfd9f42 |
491 | int ym_active_chs;\r |
49fe50f0 |
492 | \r |
edbb82f8 |
493 | //printf("YM2612UpdateOne_940()\n");\r |
494 | \r |
495 | if (CHECK_BUSY(JOB940_YM2612UPDATEONE)) wait_busy_940(JOB940_YM2612UPDATEONE);\r |
496 | \r |
4dfd9f42 |
497 | ym_active_chs = shared_ctl->ym_active_chs;\r |
edbb82f8 |
498 | \r |
4dfd9f42 |
499 | // mix in ym buffer. is_buf_empty means nobody mixed there anything yet and it may contain trash\r |
500 | if (is_buf_empty && ym_active_chs) memcpy32(buffer, ym_buf, length<<stereo);\r |
501 | else memset32(buffer, 0, length<<stereo);\r |
edbb82f8 |
502 | \r |
503 | if (shared_ctl->writebuffsel == 1) {\r |
79cad122 |
504 | shared_ctl->writebuff0[writebuff_ptr & 0xffff] = 0xffff;\r |
49fe50f0 |
505 | } else {\r |
79cad122 |
506 | shared_ctl->writebuff1[writebuff_ptr & 0xffff] = 0xffff;\r |
598e7c06 |
507 | }\r |
edbb82f8 |
508 | writebuff_ptr = 0;\r |
509 | \r |
510 | /* predict sample counter for next frame */\r |
511 | if (PsndLen_exc_add) {\r |
512 | if (PsndLen_exc_cnt + PsndLen_exc_add >= 0x10000) length = PsndLen + 1;\r |
513 | else length = PsndLen;\r |
514 | }\r |
515 | \r |
516 | /* give 940 ym job */\r |
517 | shared_ctl->writebuffsel ^= 1;\r |
518 | shared_ctl->length = length;\r |
519 | shared_ctl->stereo = stereo;\r |
520 | \r |
521 | add_job_940(JOB940_YM2612UPDATEONE);\r |
522 | \r |
4dfd9f42 |
523 | return ym_active_chs;\r |
598e7c06 |
524 | }\r |
598e7c06 |
525 | \r |
598e7c06 |
526 | \r |
979ba09f |
527 | static int mp3_samples_ready = 0, mp3_buffer_offs = 0;\r |
edbb82f8 |
528 | static int mp3_play_bufsel = 0, mp3_job_started = 0;\r |
598e7c06 |
529 | \r |
edbb82f8 |
530 | void mp3_update(int *buffer, int length, int stereo)\r |
720ee7f6 |
531 | {\r |
edbb82f8 |
532 | int length_mp3;\r |
533 | int cdda_on;\r |
49fe50f0 |
534 | \r |
edbb82f8 |
535 | // not data track, CDC is reading, playback was started, track not ended\r |
536 | cdda_on = !(Pico_mcd->s68k_regs[0x36] & 1) && (Pico_mcd->scd.Status_CDC & 1) &&\r |
537 | loaded_mp3 && shared_ctl->mp3_offs < shared_ctl->mp3_len;\r |
720ee7f6 |
538 | \r |
edbb82f8 |
539 | if (!cdda_on) return;\r |
720ee7f6 |
540 | \r |
edbb82f8 |
541 | if (!(PicoOpt&0x200)) {\r |
542 | mp3_update_local(buffer, length, stereo);\r |
543 | return;\r |
544 | }\r |
720ee7f6 |
545 | \r |
edbb82f8 |
546 | length_mp3 = length;\r |
547 | if (PsndRate == 22050) length_mp3 <<= 1; // mp3s are locked to 44100Hz stereo\r |
548 | else if (PsndRate == 11025) length_mp3 <<= 2; // so make length 44100ish\r |
49fe50f0 |
549 | \r |
edbb82f8 |
550 | /* do we have to wait? */\r |
551 | if (mp3_job_started && mp3_samples_ready < length_mp3) {\r |
552 | if (CHECK_BUSY(JOB940_MP3DECODE)) wait_busy_940(JOB940_MP3DECODE);\r |
553 | mp3_job_started = 0;\r |
554 | mp3_samples_ready += 1152;\r |
555 | }\r |
598e7c06 |
556 | \r |
49fe50f0 |
557 | /* mix mp3 data, only stereo */\r |
edbb82f8 |
558 | if (mp3_samples_ready >= length_mp3)\r |
598e7c06 |
559 | {\r |
49fe50f0 |
560 | int shr = 0;\r |
561 | void (*mix_samples)(int *dest_buf, short *mp3_buf, int count) = mix_16h_to_32;\r |
562 | if (PsndRate == 22050) { mix_samples = mix_16h_to_32_s1; shr = 1; }\r |
563 | else if (PsndRate == 11025) { mix_samples = mix_16h_to_32_s2; shr = 2; }\r |
598e7c06 |
564 | \r |
49fe50f0 |
565 | if (1152 - mp3_buffer_offs >= length_mp3) {\r |
edbb82f8 |
566 | mix_samples(buffer, shared_data->mp3_buffer[mp3_play_bufsel] + mp3_buffer_offs*2, length<<1);\r |
49fe50f0 |
567 | \r |
568 | mp3_buffer_offs += length_mp3;\r |
598e7c06 |
569 | } else {\r |
edbb82f8 |
570 | // collect samples from both buffers..\r |
598e7c06 |
571 | int left = 1152 - mp3_buffer_offs;\r |
49fe50f0 |
572 | if (mp3_play_bufsel == 0)\r |
573 | {\r |
edbb82f8 |
574 | mix_samples(buffer, shared_data->mp3_buffer[0] + mp3_buffer_offs*2, length<<1);\r |
49fe50f0 |
575 | mp3_buffer_offs = length_mp3 - left;\r |
576 | mp3_play_bufsel = 1;\r |
577 | } else {\r |
578 | mix_samples(buffer, shared_data->mp3_buffer[1] + mp3_buffer_offs*2, (left>>shr)<<1);\r |
579 | mp3_buffer_offs = length_mp3 - left;\r |
580 | mix_samples(buffer + ((left>>shr)<<1),\r |
581 | shared_data->mp3_buffer[0], (mp3_buffer_offs>>shr)<<1);\r |
582 | mp3_play_bufsel = 0;\r |
583 | }\r |
720ee7f6 |
584 | }\r |
49fe50f0 |
585 | mp3_samples_ready -= length_mp3;\r |
720ee7f6 |
586 | }\r |
587 | \r |
edbb82f8 |
588 | // ask to decode more if we already can\r |
589 | if (!mp3_job_started)\r |
598e7c06 |
590 | {\r |
edbb82f8 |
591 | mp3_job_started = 1;\r |
598e7c06 |
592 | shared_ctl->mp3_buffsel ^= 1;\r |
edbb82f8 |
593 | add_job_940(JOB940_MP3DECODE);\r |
598e7c06 |
594 | }\r |
720ee7f6 |
595 | }\r |
598e7c06 |
596 | \r |
597 | \r |
598 | /***********************************************************/\r |
599 | \r |
600 | void mp3_start_play(FILE *f, int pos) // pos is 0-1023\r |
601 | {\r |
602 | int byte_offs = 0;\r |
603 | \r |
7bc9cd7f |
604 | if (!(PicoOpt&0x800)) { // cdda disabled?\r |
598e7c06 |
605 | return;\r |
606 | }\r |
607 | \r |
608 | if (loaded_mp3 != f)\r |
609 | {\r |
dfa4c846 |
610 | if (PicoMessage != NULL)\r |
611 | {\r |
612 | fseek(f, 0, SEEK_END);\r |
613 | if (ftell(f) > 2*1024*1024)\r |
614 | PicoMessage("Loading MP3...");\r |
615 | }\r |
598e7c06 |
616 | fseek(f, 0, SEEK_SET);\r |
617 | fread(mp3_mem, 1, MP3_SIZE_MAX, f);\r |
60b4b403 |
618 | if (!feof(f)) printf("Warning: mp3 was too large, not all data loaded.\n");\r |
598e7c06 |
619 | shared_ctl->mp3_len = ftell(f);\r |
620 | loaded_mp3 = f;\r |
edbb82f8 |
621 | \r |
622 | if (PicoOpt&0x200) {\r |
623 | // as we are going to change 940's cacheable area, we must invalidate it's cache..\r |
624 | if (CHECK_BUSY(JOB940_MP3DECODE)) wait_busy_940(JOB940_MP3DECODE);\r |
625 | add_job_940(JOB940_INVALIDATE_DCACHE);\r |
626 | }\r |
8f1b51ef |
627 | reset_timing = 1;\r |
598e7c06 |
628 | }\r |
629 | \r |
630 | // seek..\r |
631 | if (pos) {\r |
632 | byte_offs = (shared_ctl->mp3_len << 6) >> 10;\r |
633 | byte_offs *= pos;\r |
634 | byte_offs >>= 6;\r |
635 | }\r |
49fe50f0 |
636 | // printf("mp3 pos1024: %i, byte_offs %i/%i\n", pos, byte_offs, shared_ctl->mp3_len);\r |
598e7c06 |
637 | \r |
638 | shared_ctl->mp3_offs = byte_offs;\r |
979ba09f |
639 | \r |
edbb82f8 |
640 | // reset buffer pointers and stuff..\r |
979ba09f |
641 | mp3_samples_ready = mp3_buffer_offs = mp3_play_bufsel = 0;\r |
edbb82f8 |
642 | mp3_job_started = 0;\r |
979ba09f |
643 | shared_ctl->mp3_buffsel = 1; // will change to 0 on first decode\r |
edbb82f8 |
644 | \r |
645 | if (!(PicoOpt&0x200)) mp3_start_local();\r |
598e7c06 |
646 | }\r |
647 | \r |
648 | \r |
98c9d8d9 |
649 | int mp3_get_offset(void)\r |
650 | {\r |
651 | int offs1024 = 0;\r |
652 | int cdda_on;\r |
653 | \r |
7bc9cd7f |
654 | cdda_on = (PicoMCD & 1) && (PicoOpt&0x800) && !(Pico_mcd->s68k_regs[0x36] & 1) &&\r |
edbb82f8 |
655 | (Pico_mcd->scd.Status_CDC & 1) && loaded_mp3;\r |
98c9d8d9 |
656 | \r |
657 | if (cdda_on) {\r |
658 | offs1024 = shared_ctl->mp3_offs << 7;\r |
659 | offs1024 /= shared_ctl->mp3_len;\r |
660 | offs1024 <<= 3;\r |
661 | }\r |
662 | printf("offs1024=%i (%i/%i)\n", offs1024, shared_ctl->mp3_offs, shared_ctl->mp3_len);\r |
663 | \r |
664 | return offs1024;\r |
665 | }\r |
666 | \r |
667 | \r |