[pcsx_rearmed.git] / libpcsxcore / r3000a.h

/***************************************************************************
 *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
 *                                                                         *
 *   This program is free software; you can redistribute it and/or modify  *
 *   it under the terms of the GNU General Public License as published by  *
 *   the Free Software Foundation; either version 2 of the License, or     *
 *   (at your option) any later version.                                   *
 *                                                                         *
 *   This program is distributed in the hope that it will be useful,       *
 *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
 *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
 *   GNU General Public License for more details.                          *
 *                                                                         *
 *   You should have received a copy of the GNU General Public License     *
 *   along with this program; if not, write to the                         *
 *   Free Software Foundation, Inc.,                                       *
 *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
 ***************************************************************************/

#ifndef __R3000A_H__
#define __R3000A_H__

#ifdef __cplusplus
extern "C" {
#endif

#include "psxcommon.h"

enum R3000Aexception {
	R3000E_Int = 0,      // Interrupt
	R3000E_AdEL = 4,     // Address error (on load/I-fetch)
	R3000E_AdES = 5,     // Address error (on store)
	R3000E_IBE = 6,      // Bus error (instruction fetch)
	R3000E_DBE = 7,      // Bus error (data load/store)
	R3000E_Syscall = 8,  // syscall instruction
	R3000E_Bp = 9,       // Breakpoint - a break instruction
	R3000E_RI = 10,      // reserved instruction
	R3000E_CpU = 11,     // Co-Processor unusable
	R3000E_Ov = 12       // arithmetic overflow
};

enum R3000Anote {
	R3000ACPU_NOTIFY_CACHE_ISOLATED = 0,
	R3000ACPU_NOTIFY_CACHE_UNISOLATED = 1,
	R3000ACPU_NOTIFY_BEFORE_SAVE,  // data arg - hle if non-null
	R3000ACPU_NOTIFY_AFTER_LOAD,
};

enum blockExecCaller {
	EXEC_CALLER_BOOT,
	EXEC_CALLER_HLE,
	EXEC_CALLER_OTHER,
};

struct psxRegisters;

typedef struct {
	int  (*Init)();
	void (*Reset)();
	void (*Execute)(struct psxRegisters *regs);
	/* executes up to a jump */
	void (*ExecuteBlock)(struct psxRegisters *regs, enum blockExecCaller caller);
	void (*Clear)(u32 Addr, u32 Size);
	void (*Notify)(enum R3000Anote note, void *data);
	void (*ApplyConfig)();
	void (*Shutdown)();
} R3000Acpu;

extern R3000Acpu *psxCpu;
extern R3000Acpu psxInt;
extern R3000Acpu psxRec;

typedef union {
#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
	struct { u8 h3, h2, h, l; } b;
	struct { s8 h3, h2, h, l; } sb;
	struct { u16 h, l; } w;
	struct { s16 h, l; } sw;
#else
	struct { u8 l, h, h2, h3; } b;
	struct { u16 l, h; } w;
	struct { s8 l, h, h2, h3; } sb;
	struct { s16 l, h; } sw;
#endif
} PAIR;

typedef union {
	struct {
		u32   r0, at, v0, v1, a0, a1, a2, a3,
						t0, t1, t2, t3, t4, t5, t6, t7,
						s0, s1, s2, s3, s4, s5, s6, s7,
						t8, t9, k0, k1, gp, sp, fp, ra, lo, hi;
	} n;
	u32 r[34]; /* Lo, Hi in r[32] and r[33] */
	PAIR p[34];
} psxGPRRegs;

typedef union psxCP0Regs_ {
	struct {
		u32 Reserved0, Reserved1, Reserved2,  BPC,
		    Reserved4, BDA,       Target,     DCIC,
		    BadVAddr,  BDAM,      Reserved10, BPCM,
		    SR,        Cause,     EPC,        PRid,
		    Reserved16[16];
	} n;
	u32 r[32];
	PAIR p[32];
} psxCP0Regs;

typedef struct {
	short x, y;
} SVector2D;

typedef struct {
	short z, pad;
} SVector2Dz;

typedef struct {
	short x, y, z, pad;
} SVector3D;

typedef struct {
	short x, y, z, pad;
} LVector3D;

typedef struct {
	unsigned char r, g, b, c;
} CBGR;

typedef struct {
	short m11, m12, m13, m21, m22, m23, m31, m32, m33, pad;
} SMatrix3D;

typedef union {
	struct {
		SVector3D     v0, v1, v2;
		CBGR          rgb;
		s32          otz;
		s32          ir0, ir1, ir2, ir3;
		SVector2D     sxy0, sxy1, sxy2, sxyp;
		SVector2Dz    sz0, sz1, sz2, sz3;
		CBGR          rgb0, rgb1, rgb2;
		s32          reserved;
		s32          mac0, mac1, mac2, mac3;
		u32 irgb, orgb;
		s32          lzcs, lzcr;
	} n;
	u32 r[32];
	PAIR p[32];
} psxCP2Data;

typedef union {
	struct {
		SMatrix3D rMatrix;
		s32      trX, trY, trZ;
		SMatrix3D lMatrix;
		s32      rbk, gbk, bbk;
		SMatrix3D cMatrix;
		s32      rfc, gfc, bfc;
		s32      ofx, ofy;
		s32      h;
		s32      dqa, dqb;
		s32      zsf3, zsf4;
		s32      flag;
	} n;
	u32 r[32];
	PAIR p[32];
} psxCP2Ctrl;

enum R3000Abdt {
	// corresponds to bits 31,30 of Cause reg
	R3000A_BRANCH_TAKEN = 3,
	R3000A_BRANCH_NOT_TAKEN = 2,
	// none or tells that there was an exception in DS back to doBranch
	R3000A_BRANCH_NONE_OR_EXCEPTION = 0,
};

typedef struct psxCP2Regs {
	psxCP2Data CP2D; 	/* Cop2 data registers */
	psxCP2Ctrl CP2C; 	/* Cop2 control registers */
} psxCP2Regs;

typedef struct psxRegisters {
	// note: some cores like lightrec don't keep their data here,
	// so use R3000ACPU_NOTIFY_BEFORE_SAVE to sync
	psxGPRRegs GPR;		/* General Purpose Registers */
	psxCP0Regs CP0;		/* Coprocessor0 Registers */
	union {
		struct {
			psxCP2Data CP2D; 	/* Cop2 data registers */
			psxCP2Ctrl CP2C; 	/* Cop2 control registers */
		};
		psxCP2Regs CP2;
	};
	u32 pc;				/* Program counter */
	u32 code;			/* The instruction */
	u32 cycle;
	u32 interrupt;
	struct { u32 sCycle, cycle; } intCycle[20];
	u32 event_cycles[20];
	u32 psxNextCounter;
	u32 psxNextsCounter;
	u32 next_interupt;  /* cycle */
	u32 unused;
	u32 gteBusyCycle;
	u32 muldivBusyCycle;
	u32 subCycle;       /* interpreter cycle counting */
	u32 subCycleStep;
	u32 biuReg;
	u8  stop;
	u8  branchSeen;     /* interp. */
	u8  branching;      /* interp. R3000A_BRANCH_TAKEN / not, 0 if not branch */
	u8  dloadSel;       /* interp. delay load state */
	u8  dloadReg[2];
	u8  unused2[2];
	u32 dloadVal[2];
	u32 biosBranchCheck;
	u32 cpuInRecursion;
	u32 gpuIdleAfter;
	u32 unused3[2];
	// warning: changing anything in psxRegisters requires update of all
	// asm in libpcsxcore/new_dynarec/ and may break savestates
} psxRegisters;

extern psxRegisters psxRegs;

/* new_dynarec stuff */
void ndrc_freeze(void *f, int mode);
void ndrc_clear_full(void);

int  psxInit();
void psxReset();
void psxShutdown();
void psxException(u32 code, enum R3000Abdt bdt, psxCP0Regs *cp0);
void psxBranchTest();
void psxExecuteBios();
int  psxExecuteBiosEnded(void);
void psxJumpTest();

void irq10Interrupt();
void psxScheduleIrq10(int irq_count, int x_cycles, int y);

#ifdef __cplusplus
}
#endif
#endif
Commit	Line	Data
ef79bbde P	1	/***************************************************************************
	2	* Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team *
	3	* *
	4	* This program is free software; you can redistribute it and/or modify *
	5	* it under the terms of the GNU General Public License as published by *
	6	* the Free Software Foundation; either version 2 of the License, or *
	7	* (at your option) any later version. *
	8	* *
	9	* This program is distributed in the hope that it will be useful, *
	10	* but WITHOUT ANY WARRANTY; without even the implied warranty of *
	11	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
	12	* GNU General Public License for more details. *
	13	* *
	14	* You should have received a copy of the GNU General Public License *
	15	* along with this program; if not, write to the *
	16	* Free Software Foundation, Inc., *
	17	* 51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA. *
	18	***************************************************************************/
	19
	20	#ifndef __R3000A_H__
	21	#define __R3000A_H__
	22
	23	#ifdef __cplusplus
	24	extern "C" {
	25	#endif
	26
	27	#include "psxcommon.h"
ef79bbde	28
905b7c25	29	enum R3000Aexception {
	30	R3000E_Int = 0, // Interrupt
	31	R3000E_AdEL = 4, // Address error (on load/I-fetch)
	32	R3000E_AdES = 5, // Address error (on store)
	33	R3000E_IBE = 6, // Bus error (instruction fetch)
bc7c5acb	34	R3000E_DBE = 7, // Bus error (data load/store)
905b7c25	35	R3000E_Syscall = 8, // syscall instruction
	36	R3000E_Bp = 9, // Breakpoint - a break instruction
	37	R3000E_RI = 10, // reserved instruction
	38	R3000E_CpU = 11, // Co-Processor unusable
	39	R3000E_Ov = 12 // arithmetic overflow
	40	};
	41
980f7a58	42	enum R3000Anote {
943a507a	43	R3000ACPU_NOTIFY_CACHE_ISOLATED = 0,
943a507a	44	R3000ACPU_NOTIFY_CACHE_UNISOLATED = 1,
1da9b9ae	45	R3000ACPU_NOTIFY_BEFORE_SAVE, // data arg - hle if non-null
980f7a58	46	R3000ACPU_NOTIFY_AFTER_LOAD,
943a507a	47	};
943a507a	48
da65071f	49	enum blockExecCaller {
	50	EXEC_CALLER_BOOT,
	51	EXEC_CALLER_HLE,
0b1633d7	52	EXEC_CALLER_OTHER,
da65071f	53	};
da65071f	54
c87406ff	55	struct psxRegisters;
c87406ff	56
ef79bbde P	57	typedef struct {
	58	int (*Init)();
	59	void (*Reset)();
c87406ff	60	void (Execute)(struct psxRegisters regs);
	61	/* executes up to a jump */
	62	void (ExecuteBlock)(struct psxRegisters regs, enum blockExecCaller caller);
ef79bbde	63	void (*Clear)(u32 Addr, u32 Size);
980f7a58	64	void (Notify)(enum R3000Anote note, void data);
32631e6a	65	void (*ApplyConfig)();
ef79bbde P	66	void (*Shutdown)();
	67	} R3000Acpu;
	68
	69	extern R3000Acpu *psxCpu;
	70	extern R3000Acpu psxInt;
ef79bbde	71	extern R3000Acpu psxRec;
ef79bbde P	72
ef79bbde P	73	typedef union {
04bd10b1	74	#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
ef79bbde P	75	struct { u8 h3, h2, h, l; } b;
	76	struct { s8 h3, h2, h, l; } sb;
	77	struct { u16 h, l; } w;
	78	struct { s16 h, l; } sw;
	79	#else
	80	struct { u8 l, h, h2, h3; } b;
	81	struct { u16 l, h; } w;
	82	struct { s8 l, h, h2, h3; } sb;
	83	struct { s16 l, h; } sw;
	84	#endif
	85	} PAIR;
	86
	87	typedef union {
	88	struct {
	89	u32 r0, at, v0, v1, a0, a1, a2, a3,
	90	t0, t1, t2, t3, t4, t5, t6, t7,
	91	s0, s1, s2, s3, s4, s5, s6, s7,
14b3bd95	92	t8, t9, k0, k1, gp, sp, fp, ra, lo, hi;
ef79bbde P	93	} n;
	94	u32 r[34]; /* Lo, Hi in r[32] and r[33] */
	95	PAIR p[34];
	96	} psxGPRRegs;
	97
6d75addf	98	typedef union psxCP0Regs_ {
ef79bbde	99	struct {
bc7c5acb	100	u32 Reserved0, Reserved1, Reserved2, BPC,
	101	Reserved4, BDA, Target, DCIC,
	102	BadVAddr, BDAM, Reserved10, BPCM,
	103	SR, Cause, EPC, PRid,
	104	Reserved16[16];
ef79bbde P	105	} n;
	106	u32 r[32];
	107	PAIR p[32];
	108	} psxCP0Regs;
	109
	110	typedef struct {
	111	short x, y;
	112	} SVector2D;
	113
	114	typedef struct {
	115	short z, pad;
	116	} SVector2Dz;
	117
	118	typedef struct {
	119	short x, y, z, pad;
	120	} SVector3D;
	121
	122	typedef struct {
	123	short x, y, z, pad;
	124	} LVector3D;
	125
	126	typedef struct {
	127	unsigned char r, g, b, c;
	128	} CBGR;
	129
	130	typedef struct {
	131	short m11, m12, m13, m21, m22, m23, m31, m32, m33, pad;
	132	} SMatrix3D;
	133
	134	typedef union {
	135	struct {
	136	SVector3D v0, v1, v2;
	137	CBGR rgb;
	138	s32 otz;
	139	s32 ir0, ir1, ir2, ir3;
	140	SVector2D sxy0, sxy1, sxy2, sxyp;
	141	SVector2Dz sz0, sz1, sz2, sz3;
	142	CBGR rgb0, rgb1, rgb2;
	143	s32 reserved;
	144	s32 mac0, mac1, mac2, mac3;
	145	u32 irgb, orgb;
	146	s32 lzcs, lzcr;
	147	} n;
	148	u32 r[32];
	149	PAIR p[32];
	150	} psxCP2Data;
	151
	152	typedef union {
	153	struct {
	154	SMatrix3D rMatrix;
	155	s32 trX, trY, trZ;
	156	SMatrix3D lMatrix;
	157	s32 rbk, gbk, bbk;
	158	SMatrix3D cMatrix;
	159	s32 rfc, gfc, bfc;
	160	s32 ofx, ofy;
	161	s32 h;
	162	s32 dqa, dqb;
	163	s32 zsf3, zsf4;
	164	s32 flag;
	165	} n;
	166	u32 r[32];
	167	PAIR p[32];
	168	} psxCP2Ctrl;
169
bc7c5acb	170	enum R3000Abdt {
	171	// corresponds to bits 31,30 of Cause reg
	172	R3000A_BRANCH_TAKEN = 3,
	173	R3000A_BRANCH_NOT_TAKEN = 2,
	174	// none or tells that there was an exception in DS back to doBranch
	175	R3000A_BRANCH_NONE_OR_EXCEPTION = 0,
	176	};
	177
eac38522	178	typedef struct psxCP2Regs {
	179	psxCP2Data CP2D; /* Cop2 data registers */
	180	psxCP2Ctrl CP2C; /* Cop2 control registers */
	181	} psxCP2Regs;
	182
c87406ff	183	typedef struct psxRegisters {
6d75addf	184	// note: some cores like lightrec don't keep their data here,
6d75addf	185	// so use R3000ACPU_NOTIFY_BEFORE_SAVE to sync
ef79bbde P	186	psxGPRRegs GPR; /* General Purpose Registers */
ef79bbde P	187	psxCP0Regs CP0; /* Coprocessor0 Registers */
eac38522	188	union {
	189	struct {
	190	psxCP2Data CP2D; /* Cop2 data registers */
	191	psxCP2Ctrl CP2C; /* Cop2 control registers */
	192	};
	193	psxCP2Regs CP2;
	194	};
6d75addf	195	u32 pc; /* Program counter */
6d75addf	196	u32 code; /* The instruction */
ef79bbde P	197	u32 cycle;
ef79bbde P	198	u32 interrupt;
92dc6b2f	199	struct { u32 sCycle, cycle; } intCycle[20];
	200	u32 event_cycles[20];
	201	u32 psxNextCounter;
	202	u32 psxNextsCounter;
c87406ff	203	u32 next_interupt; /* cycle */
c87406ff	204	u32 unused;
81dbbf4c	205	u32 gteBusyCycle;
32631e6a	206	u32 muldivBusyCycle;
bc7c5acb	207	u32 subCycle; /* interpreter cycle counting */
d5aeda23	208	u32 subCycleStep;
679d5ee3	209	u32 biuReg;
c87406ff	210	u8 stop;
c87406ff	211	u8 branchSeen; /* interp. */
bc7c5acb	212	u8 branching; /* interp. R3000A_BRANCH_TAKEN / not, 0 if not branch */
bc7c5acb	213	u8 dloadSel; /* interp. delay load state */
f9ae4f29	214	u8 dloadReg[2];
c87406ff	215	u8 unused2[2];
f9ae4f29	216	u32 dloadVal[2];
de74f599	217	u32 biosBranchCheck;
65722e04	218	u32 cpuInRecursion;
f8896d18	219	u32 gpuIdleAfter;
22346d41	220	u32 unused3[2];
81dbbf4c	221	// warning: changing anything in psxRegisters requires update of all
c87406ff	222	// asm in libpcsxcore/new_dynarec/ and may break savestates
ef79bbde P	223	} psxRegisters;
	224
	225	extern psxRegisters psxRegs;
	226
d28b54b1	227	/* new_dynarec stuff */
0b1633d7	228	void ndrc_freeze(void *f, int mode);
0b1633d7	229	void ndrc_clear_full(void);
52082bc1	230
ef79bbde P	231	int psxInit();
	232	void psxReset();
	233	void psxShutdown();
bc7c5acb	234	void psxException(u32 code, enum R3000Abdt bdt, psxCP0Regs *cp0);
ef79bbde P	235	void psxBranchTest();
ef79bbde P	236	void psxExecuteBios();
60afad47	237	int psxExecuteBiosEnded(void);
ef79bbde P	238	void psxJumpTest();
ef79bbde P	239
11d23573	240	void irq10Interrupt();
	241	void psxScheduleIrq10(int irq_count, int x_cycles, int y);
	242
ef79bbde P	243	#ifdef __cplusplus
	244	}
	245	#endif
	246	#endif