be2c4208 |
1 | #include "../pico_int.h" |
2 | #include "../memory.h" |
3 | |
4 | static const char str_mars[] = "MARS"; |
5 | |
974fdb5b |
6 | struct Pico32xMem *Pico32xMem; |
7 | |
5e49c3a8 |
8 | static void bank_switch(int b); |
9 | |
acd35d4c |
10 | #define MSB8(x) ((x) >> 8) |
11 | |
266c6afa |
12 | // poll detection |
4ea707e1 |
13 | #define POLL_THRESHOLD 6 |
14 | |
266c6afa |
15 | struct poll_det { |
b78efee2 |
16 | int addr, pc, cnt, flag; |
266c6afa |
17 | }; |
b78efee2 |
18 | static struct poll_det m68k_poll, sh2_poll[2]; |
266c6afa |
19 | |
b78efee2 |
20 | static int p32x_poll_detect(struct poll_det *pd, u32 a, u32 pc, int is_vdp) |
266c6afa |
21 | { |
b78efee2 |
22 | int ret = 0, flag = pd->flag; |
23 | |
24 | if (is_vdp) |
25 | flag <<= 3; |
266c6afa |
26 | |
27 | if (a - 2 <= pd->addr && pd->addr <= a + 2 && pd->pc == pc) { |
28 | pd->cnt++; |
29 | if (pd->cnt > POLL_THRESHOLD) { |
30 | if (!(Pico32x.emu_flags & flag)) { |
31 | elprintf(EL_32X, "%s poll addr %08x @ %06x", |
32 | flag == P32XF_68KPOLL ? "m68k" : (flag == P32XF_MSH2POLL ? "msh2" : "ssh2"), a, pc); |
33 | ret = 1; |
34 | } |
35 | Pico32x.emu_flags |= flag; |
36 | } |
37 | } |
38 | else |
39 | pd->cnt = 0; |
40 | pd->addr = a; |
41 | pd->pc = pc; |
42 | |
43 | return ret; |
44 | } |
45 | |
b78efee2 |
46 | static int p32x_poll_undetect(struct poll_det *pd, int is_vdp) |
266c6afa |
47 | { |
b78efee2 |
48 | int ret = 0, flag = pd->flag; |
49 | if (is_vdp) |
50 | flag <<= 3; |
266c6afa |
51 | if (pd->cnt > POLL_THRESHOLD) |
52 | ret = 1; |
53 | pd->addr = pd->cnt = 0; |
54 | Pico32x.emu_flags &= ~flag; |
55 | return ret; |
56 | } |
57 | |
4ea707e1 |
58 | void p32x_poll_event(int is_vdp) |
59 | { |
b78efee2 |
60 | p32x_poll_undetect(&sh2_poll[0], is_vdp); |
61 | p32x_poll_undetect(&sh2_poll[1], is_vdp); |
4ea707e1 |
62 | } |
63 | |
974fdb5b |
64 | // SH2 faking |
b78efee2 |
65 | //#define FAKE_SH2 |
acd35d4c |
66 | int p32x_csum_faked; |
67 | #ifdef FAKE_SH2 |
974fdb5b |
68 | static const u16 comm_fakevals[] = { |
69 | 0x4d5f, 0x4f4b, // M_OK |
70 | 0x535f, 0x4f4b, // S_OK |
5e49c3a8 |
71 | 0x4D41, 0x5346, // MASF - Brutal Unleashed |
72 | 0x5331, 0x4d31, // Darxide |
73 | 0x5332, 0x4d32, |
74 | 0x5333, 0x4d33, |
75 | 0x0000, 0x0000, // eq for doom |
974fdb5b |
76 | 0x0002, // Mortal Kombat |
acd35d4c |
77 | // 0, // pad |
be2c4208 |
78 | }; |
acd35d4c |
79 | |
80 | static u32 sh2_comm_faker(u32 a) |
81 | { |
82 | static int f = 0; |
83 | if (a == 0x28 && !p32x_csum_faked) { |
84 | p32x_csum_faked = 1; |
85 | return *(unsigned short *)(Pico.rom + 0x18e); |
86 | } |
87 | if (f >= sizeof(comm_fakevals) / sizeof(comm_fakevals[0])) |
88 | f = 0; |
89 | return comm_fakevals[f++]; |
90 | } |
91 | #endif |
be2c4208 |
92 | |
4ea707e1 |
93 | // DMAC handling |
94 | static struct { |
95 | unsigned int sar0, dar0, tcr0; // src addr, dst addr, transfer count |
96 | unsigned int chcr0; // chan ctl |
97 | unsigned int sar1, dar1, tcr1; // same for chan 1 |
98 | unsigned int chcr1; |
99 | int pad[4]; |
100 | unsigned int dmaor; |
101 | } * dmac0; |
102 | |
103 | static void dma_68k2sh2_do(void) |
104 | { |
105 | unsigned short *dreqlen = &Pico32x.regs[0x10 / 2]; |
106 | int i; |
107 | |
108 | if (dmac0->tcr0 != *dreqlen) |
109 | elprintf(EL_32X|EL_ANOMALY, "tcr0 and dreq len differ: %d != %d", dmac0->tcr0, *dreqlen); |
110 | |
111 | for (i = 0; i < Pico32x.dmac_ptr && dmac0->tcr0 > 0; i++) { |
b78efee2 |
112 | extern void p32x_sh2_write16(u32 a, u32 d, int id); |
4ea707e1 |
113 | elprintf(EL_32X|EL_ANOMALY, "dmaw [%08x] %04x, left %d", dmac0->dar0, Pico32x.dmac_fifo[i], *dreqlen); |
b78efee2 |
114 | p32x_sh2_write16(dmac0->dar0, Pico32x.dmac_fifo[i], 0); |
4ea707e1 |
115 | dmac0->dar0 += 2; |
116 | dmac0->tcr0--; |
117 | (*dreqlen)--; |
118 | } |
119 | |
120 | Pico32x.dmac_ptr = 0; // HACK |
121 | Pico32x.regs[6 / 2] &= ~P32XS_FULL; |
122 | if (*dreqlen == 0) |
123 | Pico32x.regs[6 / 2] &= ~P32XS_68S; // transfer complete |
124 | if (dmac0->tcr0 == 0) |
125 | dmac0->chcr0 |= 2; // DMA has ended normally |
b78efee2 |
126 | p32x_poll_undetect(&m68k_poll, 0); |
4ea707e1 |
127 | } |
128 | |
129 | // ------------------------------------------------------------------ |
b78efee2 |
130 | // 68k regs |
4ea707e1 |
131 | |
be2c4208 |
132 | static u32 p32x_reg_read16(u32 a) |
133 | { |
134 | a &= 0x3e; |
135 | |
3cf9570b |
136 | #if 0 |
974fdb5b |
137 | if ((a & 0x30) == 0x20) |
acd35d4c |
138 | return sh2_comm_faker(a); |
266c6afa |
139 | #else |
b78efee2 |
140 | if (p32x_poll_detect(&m68k_poll, a, SekPc, 0)) { |
266c6afa |
141 | SekEndRun(16); |
142 | } |
acd35d4c |
143 | #endif |
3cf9570b |
144 | #ifdef FAKE_SH2 |
145 | // fake only slave for now |
146 | if (a == 0x24 || a == 0x26) |
147 | return sh2_comm_faker(a); |
148 | #endif |
974fdb5b |
149 | |
be2c4208 |
150 | return Pico32x.regs[a / 2]; |
151 | } |
152 | |
be2c4208 |
153 | static void p32x_reg_write8(u32 a, u32 d) |
154 | { |
acd35d4c |
155 | u16 *r = Pico32x.regs; |
be2c4208 |
156 | a &= 0x3f; |
157 | |
acd35d4c |
158 | if (a == 1 && !(r[0] & 1)) { |
159 | r[0] |= 1; |
be2c4208 |
160 | Pico32xStartup(); |
161 | return; |
162 | } |
5e49c3a8 |
163 | |
acd35d4c |
164 | if (!(r[0] & 1)) |
5e49c3a8 |
165 | return; |
166 | |
acd35d4c |
167 | switch (a) { |
4ea707e1 |
168 | case 0: // adapter ctl |
acd35d4c |
169 | r[0] = (r[0] & 0x83) | ((d << 8) & P32XS_FM); |
170 | break; |
4ea707e1 |
171 | case 3: // irq ctl |
172 | if ((d & 1) && !(Pico32x.sh2irqi[0] & P32XI_CMD)) { |
173 | Pico32x.sh2irqi[0] |= P32XI_CMD; |
174 | p32x_update_irls(); |
175 | } |
b78efee2 |
176 | if ((d & 2) && !(Pico32x.sh2irqi[1] & P32XI_CMD)) { |
177 | Pico32x.sh2irqi[1] |= P32XI_CMD; |
178 | p32x_update_irls(); |
179 | } |
4ea707e1 |
180 | break; |
181 | case 5: // bank |
acd35d4c |
182 | d &= 7; |
4ea707e1 |
183 | if (r[4 / 2] != d) { |
184 | r[4 / 2] = d; |
acd35d4c |
185 | bank_switch(d); |
186 | } |
187 | break; |
4ea707e1 |
188 | case 7: // DREQ ctl |
189 | r[6 / 2] = (r[6 / 2] & P32XS_FULL) | (d & (P32XS_68S|P32XS_RV)); |
190 | break; |
5e49c3a8 |
191 | } |
192 | } |
193 | |
194 | static void p32x_reg_write16(u32 a, u32 d) |
195 | { |
acd35d4c |
196 | u16 *r = Pico32x.regs; |
197 | a &= 0x3e; |
198 | |
4ea707e1 |
199 | // for write loops with FIFO checks.. |
200 | m68k_poll.cnt = 0; |
201 | |
acd35d4c |
202 | switch (a) { |
4ea707e1 |
203 | case 0x00: // adapter ctl |
acd35d4c |
204 | r[0] = (r[0] & 0x83) | (d & P32XS_FM); |
205 | return; |
4ea707e1 |
206 | case 0x10: // DREQ len |
207 | r[a / 2] = d & ~3; |
208 | return; |
209 | case 0x12: // FIFO reg |
210 | if (!(r[6 / 2] & P32XS_68S)) { |
211 | elprintf(EL_32X|EL_ANOMALY, "DREQ FIFO w16 without 68S?"); |
212 | return; |
213 | } |
214 | if (Pico32x.dmac_ptr < DMAC_FIFO_LEN) { |
215 | Pico32x.dmac_fifo[Pico32x.dmac_ptr++] = d; |
216 | if ((Pico32x.dmac_ptr & 3) == 0 && (dmac0->chcr0 & 3) == 1 && (dmac0->dmaor & 1)) |
217 | dma_68k2sh2_do(); |
218 | if (Pico32x.dmac_ptr == DMAC_FIFO_LEN) |
219 | r[6 / 2] |= P32XS_FULL; |
220 | } |
221 | break; |
acd35d4c |
222 | } |
223 | |
4ea707e1 |
224 | // DREQ src, dst |
225 | if ((a & 0x38) == 0x08) { |
226 | r[a / 2] = d; |
227 | return; |
228 | } |
229 | // comm port |
230 | else if ((a & 0x30) == 0x20 && r[a / 2] != d) { |
acd35d4c |
231 | r[a / 2] = d; |
b78efee2 |
232 | if (p32x_poll_undetect(&sh2_poll[0], 0) || p32x_poll_undetect(&sh2_poll[1], 0)) |
233 | // if some SH2 is busy waiting, it needs to see the result ASAP |
3cf9570b |
234 | SekEndRun(16); |
acd35d4c |
235 | return; |
236 | } |
237 | |
5e49c3a8 |
238 | p32x_reg_write8(a + 1, d); |
be2c4208 |
239 | } |
240 | |
4ea707e1 |
241 | // ------------------------------------------------------------------ |
be2c4208 |
242 | // VDP regs |
243 | static u32 p32x_vdp_read16(u32 a) |
244 | { |
245 | a &= 0x0e; |
246 | |
247 | return Pico32x.vdp_regs[a / 2]; |
248 | } |
249 | |
be2c4208 |
250 | static void p32x_vdp_write8(u32 a, u32 d) |
251 | { |
974fdb5b |
252 | u16 *r = Pico32x.vdp_regs; |
be2c4208 |
253 | a &= 0x0f; |
254 | |
4ea707e1 |
255 | // for FEN checks between writes |
b78efee2 |
256 | sh2_poll[0].cnt = 0; |
4ea707e1 |
257 | |
974fdb5b |
258 | // TODO: verify what's writeable |
be2c4208 |
259 | switch (a) { |
974fdb5b |
260 | case 0x01: |
5e49c3a8 |
261 | // priority inversion is handled in palette |
262 | if ((r[0] ^ d) & P32XV_PRI) |
263 | Pico32x.dirty_pal = 1; |
974fdb5b |
264 | r[0] = (r[0] & P32XV_nPAL) | (d & 0xff); |
265 | break; |
be2c4208 |
266 | case 0x0b: |
974fdb5b |
267 | d &= 1; |
268 | Pico32x.pending_fb = d; |
269 | // if we are blanking and FS bit is changing |
4ea707e1 |
270 | if (((r[0x0a/2] & P32XV_VBLK) || (r[0] & P32XV_Mx) == 0) && ((r[0x0a/2] ^ d) & P32XV_FS)) { |
974fdb5b |
271 | r[0x0a/2] ^= 1; |
272 | Pico32xSwapDRAM(d ^ 1); |
266c6afa |
273 | elprintf(EL_32X, "VDP FS: %d", r[0x0a/2] & P32XV_FS); |
be2c4208 |
274 | } |
275 | break; |
276 | } |
277 | } |
278 | |
974fdb5b |
279 | static void p32x_vdp_write16(u32 a, u32 d) |
280 | { |
281 | p32x_vdp_write8(a | 1, d); |
282 | } |
283 | |
4ea707e1 |
284 | // ------------------------------------------------------------------ |
acd35d4c |
285 | // SH2 regs |
b78efee2 |
286 | |
287 | static u32 p32x_sh2reg_read16(u32 a, int cpuid) |
acd35d4c |
288 | { |
4ea707e1 |
289 | u16 *r = Pico32x.regs; |
290 | a &= 0xfe; // ? |
266c6afa |
291 | |
4ea707e1 |
292 | switch (a) { |
293 | case 0x00: // adapter/irq ctl |
b78efee2 |
294 | return (r[0] & P32XS_FM) | P32XS2_ADEN | Pico32x.sh2irq_mask[cpuid]; |
4ea707e1 |
295 | case 0x10: // DREQ len |
296 | return r[a / 2]; |
acd35d4c |
297 | } |
4ea707e1 |
298 | |
299 | // DREQ src, dst; comm port |
300 | if ((a & 0x38) == 0x08 || (a & 0x30) == 0x20) |
301 | return r[a / 2]; |
acd35d4c |
302 | |
303 | return 0; |
304 | } |
305 | |
b78efee2 |
306 | static void p32x_sh2reg_write8(u32 a, u32 d, int cpuid) |
acd35d4c |
307 | { |
4ea707e1 |
308 | a &= 0xff; |
309 | if (a == 1) { |
b78efee2 |
310 | Pico32x.sh2irq_mask[cpuid] = d & 0x0f; |
4ea707e1 |
311 | p32x_update_irls(); |
312 | } |
acd35d4c |
313 | } |
314 | |
b78efee2 |
315 | static void p32x_sh2reg_write16(u32 a, u32 d, int cpuid) |
acd35d4c |
316 | { |
4ea707e1 |
317 | a &= 0xfe; |
acd35d4c |
318 | |
4ea707e1 |
319 | if ((a & 0x30) == 0x20 && Pico32x.regs[a/2] != d) { |
b78efee2 |
320 | Pico32x.regs[a / 2] = d; |
321 | p32x_poll_undetect(&m68k_poll, 0); |
322 | p32x_poll_undetect(&sh2_poll[cpuid ^ 1], 0); |
acd35d4c |
323 | return; |
324 | } |
325 | |
4ea707e1 |
326 | switch (a) { |
327 | case 0x14: Pico32x.sh2irqs &= ~P32XI_VRES; goto irls; |
328 | case 0x16: Pico32x.sh2irqs &= ~P32XI_VINT; goto irls; |
329 | case 0x18: Pico32x.sh2irqs &= ~P32XI_HINT; goto irls; |
b78efee2 |
330 | case 0x1a: Pico32x.sh2irqi[cpuid] &= ~P32XI_CMD; goto irls; |
4ea707e1 |
331 | case 0x1c: Pico32x.sh2irqs &= ~P32XI_PWM; goto irls; |
332 | } |
333 | |
b78efee2 |
334 | p32x_sh2reg_write8(a | 1, d, cpuid); |
4ea707e1 |
335 | return; |
336 | |
337 | irls: |
338 | p32x_update_irls(); |
339 | } |
340 | |
b78efee2 |
341 | static u32 sh2_peripheral_read(u32 a, int id) |
4ea707e1 |
342 | { |
343 | u32 d; |
344 | a &= 0x1fc; |
345 | d = Pico32xMem->sh2_peri_regs[0][a / 4]; |
346 | |
b78efee2 |
347 | elprintf(EL_32X, "%csh2 peri r32 [%08x] %08x @%06x", id ? 's' : 'm', a, d, sh2_pc(id)); |
4ea707e1 |
348 | return d; |
acd35d4c |
349 | } |
350 | |
b78efee2 |
351 | static void sh2_peripheral_write(u32 a, u32 d, int id) |
4ea707e1 |
352 | { |
353 | unsigned int *r = Pico32xMem->sh2_peri_regs[0]; |
b78efee2 |
354 | elprintf(EL_32X, "%csh2 peri w32 [%08x] %08x @%06x", id ? 's' : 'm', a, d, sh2_pc(id)); |
4ea707e1 |
355 | |
356 | a &= 0x1fc; |
357 | r[a / 4] = d; |
358 | |
359 | if ((a == 0x1b0 || a == 0x18c) && (dmac0->chcr0 & 3) == 1 && (dmac0->dmaor & 1)) { |
360 | elprintf(EL_32X, "sh2 DMA %08x -> %08x, cnt %d, chcr %04x @%06x", |
b78efee2 |
361 | dmac0->sar0, dmac0->dar0, dmac0->tcr0, dmac0->chcr0, sh2_pc(id)); |
4ea707e1 |
362 | dmac0->tcr0 &= 0xffffff; |
363 | // DREQ is only sent after first 4 words are written. |
364 | // we do multiple of 4 words to avoid messing up alignment |
365 | if (dmac0->sar0 == 0x20004012 && Pico32x.dmac_ptr && (Pico32x.dmac_ptr & 3) == 0) { |
366 | elprintf(EL_32X, "68k -> sh2 DMA"); |
367 | dma_68k2sh2_do(); |
368 | } |
369 | } |
370 | } |
371 | |
372 | // ------------------------------------------------------------------ |
be2c4208 |
373 | // default 32x handlers |
374 | u32 PicoRead8_32x(u32 a) |
375 | { |
376 | u32 d = 0; |
377 | if ((a & 0xffc0) == 0x5100) { // a15100 |
378 | d = p32x_reg_read16(a); |
379 | goto out_16to8; |
380 | } |
381 | |
974fdb5b |
382 | if (!(Pico32x.regs[0] & 1)) |
383 | goto no_vdp; |
384 | |
385 | if ((a & 0xfff0) == 0x5180) { // a15180 |
be2c4208 |
386 | d = p32x_vdp_read16(a); |
387 | goto out_16to8; |
388 | } |
389 | |
974fdb5b |
390 | if ((a & 0xfe00) == 0x5200) { // a15200 |
391 | d = Pico32xMem->pal[(a & 0x1ff) / 2]; |
392 | goto out_16to8; |
393 | } |
394 | |
395 | no_vdp: |
be2c4208 |
396 | if ((a & 0xfffc) == 0x30ec) { // a130ec |
397 | d = str_mars[a & 3]; |
398 | goto out; |
399 | } |
400 | |
401 | elprintf(EL_UIO, "m68k unmapped r8 [%06x] @%06x", a, SekPc); |
402 | return d; |
403 | |
404 | out_16to8: |
405 | if (a & 1) |
406 | d &= 0xff; |
407 | else |
408 | d >>= 8; |
409 | |
410 | out: |
411 | elprintf(EL_32X, "m68k 32x r8 [%06x] %02x @%06x", a, d, SekPc); |
412 | return d; |
413 | } |
414 | |
415 | u32 PicoRead16_32x(u32 a) |
416 | { |
417 | u32 d = 0; |
418 | if ((a & 0xffc0) == 0x5100) { // a15100 |
419 | d = p32x_reg_read16(a); |
420 | goto out; |
421 | } |
422 | |
974fdb5b |
423 | if (!(Pico32x.regs[0] & 1)) |
424 | goto no_vdp; |
425 | |
426 | if ((a & 0xfff0) == 0x5180) { // a15180 |
be2c4208 |
427 | d = p32x_vdp_read16(a); |
428 | goto out; |
429 | } |
430 | |
974fdb5b |
431 | if ((a & 0xfe00) == 0x5200) { // a15200 |
432 | d = Pico32xMem->pal[(a & 0x1ff) / 2]; |
433 | goto out; |
434 | } |
435 | |
436 | no_vdp: |
be2c4208 |
437 | if ((a & 0xfffc) == 0x30ec) { // a130ec |
438 | d = !(a & 2) ? ('M'<<8)|'A' : ('R'<<8)|'S'; |
439 | goto out; |
440 | } |
441 | |
442 | elprintf(EL_UIO, "m68k unmapped r16 [%06x] @%06x", a, SekPc); |
443 | return d; |
444 | |
445 | out: |
446 | elprintf(EL_32X, "m68k 32x r16 [%06x] %04x @%06x", a, d, SekPc); |
447 | return d; |
448 | } |
449 | |
450 | void PicoWrite8_32x(u32 a, u32 d) |
451 | { |
452 | if ((a & 0xfc00) == 0x5000) |
453 | elprintf(EL_32X, "m68k 32x w8 [%06x] %02x @%06x", a, d & 0xff, SekPc); |
454 | |
455 | if ((a & 0xffc0) == 0x5100) { // a15100 |
456 | p32x_reg_write8(a, d); |
457 | return; |
458 | } |
459 | |
974fdb5b |
460 | if (!(Pico32x.regs[0] & 1)) |
461 | goto no_vdp; |
462 | |
463 | if ((a & 0xfff0) == 0x5180) { // a15180 |
be2c4208 |
464 | p32x_vdp_write8(a, d); |
465 | return; |
466 | } |
467 | |
974fdb5b |
468 | // TODO: verify |
469 | if ((a & 0xfe00) == 0x5200) { // a15200 |
470 | elprintf(EL_32X|EL_ANOMALY, "m68k 32x PAL w8 [%06x] %02x @%06x", a, d & 0xff, SekPc); |
471 | ((u8 *)Pico32xMem->pal)[(a & 0x1ff) ^ 1] = d; |
472 | Pico32x.dirty_pal = 1; |
473 | return; |
474 | } |
475 | |
476 | no_vdp: |
be2c4208 |
477 | elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc); |
478 | } |
479 | |
480 | void PicoWrite16_32x(u32 a, u32 d) |
481 | { |
482 | if ((a & 0xfc00) == 0x5000) |
483 | elprintf(EL_UIO, "m68k 32x w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc); |
484 | |
485 | if ((a & 0xffc0) == 0x5100) { // a15100 |
486 | p32x_reg_write16(a, d); |
487 | return; |
488 | } |
489 | |
974fdb5b |
490 | if (!(Pico32x.regs[0] & 1)) |
491 | goto no_vdp; |
492 | |
493 | if ((a & 0xfff0) == 0x5180) { // a15180 |
be2c4208 |
494 | p32x_vdp_write16(a, d); |
495 | return; |
496 | } |
497 | |
974fdb5b |
498 | if ((a & 0xfe00) == 0x5200) { // a15200 |
499 | Pico32xMem->pal[(a & 0x1ff) / 2] = d; |
500 | Pico32x.dirty_pal = 1; |
501 | return; |
502 | } |
503 | |
504 | no_vdp: |
be2c4208 |
505 | elprintf(EL_UIO, "m68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc); |
506 | } |
507 | |
508 | // hint vector is writeable |
509 | static void PicoWrite8_hint(u32 a, u32 d) |
510 | { |
511 | if ((a & 0xfffc) == 0x0070) { |
512 | Pico32xMem->m68k_rom[a ^ 1] = d; |
513 | return; |
514 | } |
515 | |
516 | elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc); |
517 | } |
518 | |
519 | static void PicoWrite16_hint(u32 a, u32 d) |
520 | { |
521 | if ((a & 0xfffc) == 0x0070) { |
522 | ((u16 *)Pico32xMem->m68k_rom)[a/2] = d; |
523 | return; |
524 | } |
525 | |
526 | elprintf(EL_UIO, "m68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc); |
527 | } |
528 | |
974fdb5b |
529 | void Pico32xSwapDRAM(int b) |
530 | { |
531 | cpu68k_map_set(m68k_read8_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0); |
532 | cpu68k_map_set(m68k_read16_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0); |
533 | cpu68k_map_set(m68k_write8_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0); |
534 | cpu68k_map_set(m68k_write16_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0); |
535 | } |
536 | |
5e49c3a8 |
537 | static void bank_switch(int b) |
538 | { |
539 | unsigned int rs, bank; |
540 | |
541 | bank = b << 20; |
542 | if (bank >= Pico.romsize) { |
543 | elprintf(EL_32X|EL_ANOMALY, "missing bank @ %06x", bank); |
544 | return; |
545 | } |
546 | |
547 | // 32X ROM (unbanked, XXX: consider mirroring?) |
548 | rs = (Pico.romsize + M68K_BANK_MASK) & ~M68K_BANK_MASK; |
549 | rs -= bank; |
550 | if (rs > 0x100000) |
551 | rs = 0x100000; |
552 | cpu68k_map_set(m68k_read8_map, 0x900000, 0x900000 + rs - 1, Pico.rom + bank, 0); |
553 | cpu68k_map_set(m68k_read16_map, 0x900000, 0x900000 + rs - 1, Pico.rom + bank, 0); |
554 | |
555 | elprintf(EL_32X, "bank %06x-%06x -> %06x", 0x900000, 0x900000 + rs - 1, bank); |
556 | } |
557 | |
acd35d4c |
558 | // ----------------------------------------------------------------- |
559 | // SH2 |
560 | // ----------------------------------------------------------------- |
561 | |
b78efee2 |
562 | u32 p32x_sh2_read8(u32 a, int id) |
acd35d4c |
563 | { |
b78efee2 |
564 | int pd_vdp = 0; |
acd35d4c |
565 | u32 d = 0; |
4ea707e1 |
566 | |
b78efee2 |
567 | if (id == 0 && a < sizeof(Pico32xMem->sh2_rom_m)) |
acd35d4c |
568 | return Pico32xMem->sh2_rom_m[a ^ 1]; |
b78efee2 |
569 | if (id == 1 && a < sizeof(Pico32xMem->sh2_rom_s)) |
570 | return Pico32xMem->sh2_rom_s[a ^ 1]; |
acd35d4c |
571 | |
572 | if ((a & 0x0ffc0000) == 0x06000000) |
573 | return Pico32xMem->sdram[(a & 0x3ffff) ^ 1]; |
574 | |
575 | if ((a & 0x0fc00000) == 0x02000000) |
576 | if ((a & 0x003fffff) < Pico.romsize) |
577 | return Pico.rom[(a & 0x3fffff) ^ 1]; |
578 | |
b78efee2 |
579 | if ((a & ~0xfff) == 0xc0000000) |
580 | return Pico32xMem->data_array[id][(a & 0xfff) ^ 1]; |
581 | |
acd35d4c |
582 | if ((a & 0x0fffff00) == 0x4000) { |
b78efee2 |
583 | d = p32x_sh2reg_read16(a, id); |
4ea707e1 |
584 | goto out_pd; |
acd35d4c |
585 | } |
586 | |
587 | if ((a & 0x0fffff00) == 0x4100) { |
588 | d = p32x_vdp_read16(a); |
b78efee2 |
589 | pd_vdp = 1; |
4ea707e1 |
590 | goto out_pd; |
acd35d4c |
591 | } |
592 | |
593 | if ((a & 0x0fffff00) == 0x4200) { |
594 | d = Pico32xMem->pal[(a & 0x1ff) / 2]; |
595 | goto out_16to8; |
596 | } |
597 | |
b78efee2 |
598 | elprintf(EL_UIO, "%csh2 unmapped r8 [%08x] %02x @%06x", |
599 | id ? 's' : 'm', a, d, sh2_pc(id)); |
acd35d4c |
600 | return d; |
601 | |
4ea707e1 |
602 | out_pd: |
b78efee2 |
603 | if (p32x_poll_detect(&sh2_poll[id], a, sh2_pc(id), pd_vdp)) |
4ea707e1 |
604 | ash2_end_run(8); |
605 | |
acd35d4c |
606 | out_16to8: |
607 | if (a & 1) |
608 | d &= 0xff; |
609 | else |
610 | d >>= 8; |
611 | |
b78efee2 |
612 | elprintf(EL_32X, "%csh2 r8 [%08x] %02x @%06x", |
613 | id ? 's' : 'm', a, d, sh2_pc(id)); |
acd35d4c |
614 | return d; |
615 | } |
616 | |
b78efee2 |
617 | u32 p32x_sh2_read16(u32 a, int id) |
acd35d4c |
618 | { |
b78efee2 |
619 | int pd_vdp = 0; |
acd35d4c |
620 | u32 d = 0; |
3cf9570b |
621 | |
b78efee2 |
622 | if (id == 0 && a < sizeof(Pico32xMem->sh2_rom_m)) |
acd35d4c |
623 | return *(u16 *)(Pico32xMem->sh2_rom_m + a); |
b78efee2 |
624 | if (id == 1 && a < sizeof(Pico32xMem->sh2_rom_s)) |
625 | return *(u16 *)(Pico32xMem->sh2_rom_s + a); |
acd35d4c |
626 | |
627 | if ((a & 0x0ffc0000) == 0x06000000) |
628 | return ((u16 *)Pico32xMem->sdram)[(a & 0x3ffff) / 2]; |
629 | |
630 | if ((a & 0x0fc00000) == 0x02000000) |
631 | if ((a & 0x003fffff) < Pico.romsize) |
632 | return ((u16 *)Pico.rom)[(a & 0x3fffff) / 2]; |
633 | |
b78efee2 |
634 | if ((a & ~0xfff) == 0xc0000000) |
635 | return ((u16 *)Pico32xMem->data_array[id])[(a & 0xfff) / 2]; |
636 | |
acd35d4c |
637 | if ((a & 0x0fffff00) == 0x4000) { |
b78efee2 |
638 | d = p32x_sh2reg_read16(a, id); |
4ea707e1 |
639 | goto out_pd; |
acd35d4c |
640 | } |
641 | |
642 | if ((a & 0x0fffff00) == 0x4100) { |
643 | d = p32x_vdp_read16(a); |
b78efee2 |
644 | pd_vdp = 1; |
4ea707e1 |
645 | goto out_pd; |
acd35d4c |
646 | } |
647 | |
648 | if ((a & 0x0fffff00) == 0x4200) { |
649 | d = Pico32xMem->pal[(a & 0x1ff) / 2]; |
650 | goto out; |
651 | } |
652 | |
b78efee2 |
653 | elprintf(EL_UIO, "%csh2 unmapped r16 [%08x] %04x @%06x", |
654 | id ? 's' : 'm', a, d, sh2_pc(id)); |
acd35d4c |
655 | return d; |
656 | |
4ea707e1 |
657 | out_pd: |
b78efee2 |
658 | if (p32x_poll_detect(&sh2_poll[id], a, sh2_pc(id), pd_vdp)) |
4ea707e1 |
659 | ash2_end_run(8); |
660 | |
acd35d4c |
661 | out: |
b78efee2 |
662 | elprintf(EL_32X, "%csh2 r16 [%08x] %04x @%06x", |
663 | id ? 's' : 'm', a, d, sh2_pc(id)); |
acd35d4c |
664 | return d; |
665 | } |
666 | |
b78efee2 |
667 | u32 p32x_sh2_read32(u32 a, int id) |
acd35d4c |
668 | { |
4ea707e1 |
669 | if ((a & 0xfffffe00) == 0xfffffe00) |
b78efee2 |
670 | return sh2_peripheral_read(a, id); |
4ea707e1 |
671 | |
acd35d4c |
672 | // elprintf(EL_UIO, "sh2 r32 [%08x] %08x @%06x", a, d, ash2_pc()); |
b78efee2 |
673 | return (p32x_sh2_read16(a, id) << 16) | p32x_sh2_read16(a + 2, id); |
acd35d4c |
674 | } |
675 | |
b78efee2 |
676 | void p32x_sh2_write8(u32 a, u32 d, int id) |
acd35d4c |
677 | { |
678 | if ((a & 0x0ffffc00) == 0x4000) |
b78efee2 |
679 | elprintf(EL_32X, "%csh2 w8 [%08x] %02x @%06x", |
680 | id ? 's' : 'm', a, d & 0xff, sh2_pc(id)); |
acd35d4c |
681 | |
682 | if ((a & 0x0ffc0000) == 0x06000000) { |
683 | Pico32xMem->sdram[(a & 0x3ffff) ^ 1] = d; |
684 | return; |
685 | } |
686 | |
266c6afa |
687 | if ((a & 0x0ffe0000) == 0x04000000) { |
688 | u8 *dram = (u8 *)Pico32xMem->dram[(Pico32x.vdp_regs[0x0a/2] & P32XV_FS) ^ 1]; |
689 | dram[(a & 0x1ffff) ^ 1] = d; |
690 | return; |
691 | } |
692 | |
b78efee2 |
693 | if ((a & ~0xfff) == 0xc0000000) { |
694 | Pico32xMem->data_array[id][(a & 0xfff) ^ 1] = d; |
695 | return; |
696 | } |
697 | |
acd35d4c |
698 | if ((a & 0x0fffff00) == 0x4100) { |
699 | p32x_vdp_write8(a, d); |
700 | return; |
701 | } |
702 | |
703 | if ((a & 0x0fffff00) == 0x4000) { |
b78efee2 |
704 | p32x_sh2reg_write8(a, d, id); |
acd35d4c |
705 | return; |
706 | } |
707 | |
b78efee2 |
708 | elprintf(EL_UIO, "%csh2 unmapped w8 [%08x] %02x @%06x", |
709 | id ? 's' : 'm', a, d & 0xff, sh2_pc(id)); |
acd35d4c |
710 | } |
711 | |
b78efee2 |
712 | void p32x_sh2_write16(u32 a, u32 d, int id) |
acd35d4c |
713 | { |
714 | if ((a & 0x0ffffc00) == 0x4000) |
b78efee2 |
715 | elprintf(EL_32X, "%csh2 w16 [%08x] %04x @%06x", |
716 | id ? 's' : 'm', a, d & 0xffff, sh2_pc(id)); |
acd35d4c |
717 | |
718 | if ((a & 0x0ffc0000) == 0x06000000) { |
719 | ((u16 *)Pico32xMem->sdram)[(a & 0x3ffff) / 2] = d; |
720 | return; |
721 | } |
722 | |
b78efee2 |
723 | if ((a & ~0xfff) == 0xc0000000) { |
724 | ((u16 *)Pico32xMem->data_array[id])[(a & 0xfff) / 2] = d; |
725 | return; |
726 | } |
727 | |
266c6afa |
728 | if ((a & 0x0ffe0000) == 0x04000000) { |
729 | Pico32xMem->dram[(Pico32x.vdp_regs[0x0a/2] & P32XV_FS) ^ 1][(a & 0x1ffff) / 2] = d; |
730 | return; |
731 | } |
732 | |
acd35d4c |
733 | if ((a & 0x0fffff00) == 0x4100) { |
734 | p32x_vdp_write16(a, d); |
735 | return; |
736 | } |
737 | |
738 | if ((a & 0x0ffffe00) == 0x4200) { |
739 | Pico32xMem->pal[(a & 0x1ff) / 2] = d; |
740 | Pico32x.dirty_pal = 1; |
741 | return; |
742 | } |
743 | |
744 | if ((a & 0x0fffff00) == 0x4000) { |
b78efee2 |
745 | p32x_sh2reg_write16(a, d, id); |
acd35d4c |
746 | return; |
747 | } |
748 | |
b78efee2 |
749 | elprintf(EL_UIO, "%csh2 unmapped w16 [%08x] %04x @%06x", |
750 | id ? 's' : 'm', a, d & 0xffff, sh2_pc(id)); |
acd35d4c |
751 | } |
752 | |
b78efee2 |
753 | void p32x_sh2_write32(u32 a, u32 d, int id) |
acd35d4c |
754 | { |
4ea707e1 |
755 | if ((a & 0xfffffe00) == 0xfffffe00) { |
b78efee2 |
756 | sh2_peripheral_write(a, d, id); |
4ea707e1 |
757 | return; |
758 | } |
759 | |
b78efee2 |
760 | p32x_sh2_write16(a, d >> 16, id); |
761 | p32x_sh2_write16(a + 2, d, id); |
acd35d4c |
762 | } |
763 | |
be2c4208 |
764 | #define HWSWAP(x) (((x) << 16) | ((x) >> 16)) |
765 | void PicoMemSetup32x(void) |
766 | { |
767 | unsigned short *ps; |
768 | unsigned int *pl; |
5e49c3a8 |
769 | unsigned int rs; |
be2c4208 |
770 | int i; |
771 | |
772 | Pico32xMem = calloc(1, sizeof(*Pico32xMem)); |
773 | if (Pico32xMem == NULL) { |
774 | elprintf(EL_STATUS, "OOM"); |
775 | return; |
776 | } |
777 | |
4ea707e1 |
778 | dmac0 = (void *)&Pico32xMem->sh2_peri_regs[0][0x180 / 4]; |
779 | |
be2c4208 |
780 | // generate 68k ROM |
781 | ps = (unsigned short *)Pico32xMem->m68k_rom; |
782 | pl = (unsigned int *)Pico32xMem->m68k_rom; |
783 | for (i = 1; i < 0xc0/4; i++) |
974fdb5b |
784 | pl[i] = HWSWAP(0x880200 + (i - 1) * 6); |
be2c4208 |
785 | |
786 | // fill with nops |
787 | for (i = 0xc0/2; i < 0x100/2; i++) |
788 | ps[i] = 0x4e71; |
789 | |
5e49c3a8 |
790 | #if 0 |
be2c4208 |
791 | ps[0xc0/2] = 0x46fc; |
792 | ps[0xc2/2] = 0x2700; // move #0x2700,sr |
793 | ps[0xfe/2] = 0x60fe; // jump to self |
5e49c3a8 |
794 | #else |
795 | ps[0xfe/2] = 0x4e75; // rts |
796 | #endif |
be2c4208 |
797 | |
798 | // fill remaining mem with ROM |
974fdb5b |
799 | memcpy(Pico32xMem->m68k_rom + 0x100, Pico.rom + 0x100, sizeof(Pico32xMem->m68k_rom) - 0x100); |
be2c4208 |
800 | |
acd35d4c |
801 | // 32X ROM |
802 | // TODO: move |
803 | { |
804 | FILE *f = fopen("32X_M_BIOS.BIN", "rb"); |
805 | int i; |
806 | if (f == NULL) { |
b78efee2 |
807 | printf("missing 32X_M_BIOS.BIN\n"); |
acd35d4c |
808 | exit(1); |
809 | } |
810 | fread(Pico32xMem->sh2_rom_m, 1, sizeof(Pico32xMem->sh2_rom_m), f); |
811 | fclose(f); |
b78efee2 |
812 | f = fopen("32X_S_BIOS.BIN", "rb"); |
813 | if (f == NULL) { |
814 | printf("missing 32X_S_BIOS.BIN\n"); |
815 | exit(1); |
816 | } |
817 | fread(Pico32xMem->sh2_rom_s, 1, sizeof(Pico32xMem->sh2_rom_s), f); |
818 | fclose(f); |
819 | // byteswap |
acd35d4c |
820 | for (i = 0; i < sizeof(Pico32xMem->sh2_rom_m); i += 2) { |
821 | int t = Pico32xMem->sh2_rom_m[i]; |
822 | Pico32xMem->sh2_rom_m[i] = Pico32xMem->sh2_rom_m[i + 1]; |
823 | Pico32xMem->sh2_rom_m[i + 1] = t; |
824 | } |
b78efee2 |
825 | for (i = 0; i < sizeof(Pico32xMem->sh2_rom_s); i += 2) { |
826 | int t = Pico32xMem->sh2_rom_s[i]; |
827 | Pico32xMem->sh2_rom_s[i] = Pico32xMem->sh2_rom_s[i + 1]; |
828 | Pico32xMem->sh2_rom_s[i + 1] = t; |
829 | } |
acd35d4c |
830 | } |
831 | |
be2c4208 |
832 | // cartridge area becomes unmapped |
833 | // XXX: we take the easy way and don't unmap ROM, |
834 | // so that we can avoid handling the RV bit. |
835 | // m68k_map_unmap(0x000000, 0x3fffff); |
836 | |
837 | // MD ROM area |
974fdb5b |
838 | rs = sizeof(Pico32xMem->m68k_rom); |
839 | cpu68k_map_set(m68k_read8_map, 0x000000, rs - 1, Pico32xMem->m68k_rom, 0); |
840 | cpu68k_map_set(m68k_read16_map, 0x000000, rs - 1, Pico32xMem->m68k_rom, 0); |
841 | cpu68k_map_set(m68k_write8_map, 0x000000, rs - 1, PicoWrite8_hint, 1); // TODO verify |
842 | cpu68k_map_set(m68k_write16_map, 0x000000, rs - 1, PicoWrite16_hint, 1); |
843 | |
844 | // DRAM area |
845 | Pico32xSwapDRAM(1); |
be2c4208 |
846 | |
847 | // 32X ROM (unbanked, XXX: consider mirroring?) |
5e49c3a8 |
848 | rs = (Pico.romsize + M68K_BANK_MASK) & ~M68K_BANK_MASK; |
849 | if (rs > 0x80000) |
850 | rs = 0x80000; |
851 | cpu68k_map_set(m68k_read8_map, 0x880000, 0x880000 + rs - 1, Pico.rom, 0); |
852 | cpu68k_map_set(m68k_read16_map, 0x880000, 0x880000 + rs - 1, Pico.rom, 0); |
be2c4208 |
853 | |
854 | // 32X ROM (banked) |
5e49c3a8 |
855 | bank_switch(0); |
b78efee2 |
856 | |
857 | // setup poll detector |
858 | m68k_poll.flag = P32XF_68KPOLL; |
859 | sh2_poll[0].flag = P32XF_MSH2POLL; |
860 | sh2_poll[1].flag = P32XF_SSH2POLL; |
be2c4208 |
861 | } |
862 | |