32x: built-in BIOS; reset handling; 68k memhandler split
[picodrive.git] / pico / cd / memory.c
CommitLineData
6cadc2da 1// Memory I/O handlers for Sega/Mega CD.\r
af37bca8 2// (c) Copyright 2007-2009, Grazvydas "notaz" Ignotas\r
cc68a136 3\r
efcba75f 4#include "../pico_int.h"\r
af37bca8 5#include "../memory.h"\r
cc68a136 6\r
cb4a513a 7#include "gfx_cd.h"\r
4f265db7 8#include "pcm.h"\r
cb4a513a 9\r
af37bca8 10unsigned long s68k_read8_map [0x1000000 >> M68K_MEM_SHIFT];\r
11unsigned long s68k_read16_map [0x1000000 >> M68K_MEM_SHIFT];\r
12unsigned long s68k_write8_map [0x1000000 >> M68K_MEM_SHIFT];\r
13unsigned long s68k_write16_map[0x1000000 >> M68K_MEM_SHIFT];\r
cc68a136 14\r
af37bca8 15MAKE_68K_READ8(s68k_read8, s68k_read8_map)\r
16MAKE_68K_READ16(s68k_read16, s68k_read16_map)\r
17MAKE_68K_READ32(s68k_read32, s68k_read16_map)\r
18MAKE_68K_WRITE8(s68k_write8, s68k_write8_map)\r
19MAKE_68K_WRITE16(s68k_write16, s68k_write16_map)\r
20MAKE_68K_WRITE32(s68k_write32, s68k_write16_map)\r
b5e5172d 21\r
cc68a136 22// -----------------------------------------------------------------\r
23\r
0ace9b9a 24// provided by ASM code:\r
25#ifdef _ASM_CD_MEMORY_C\r
26u32 PicoReadM68k8_io(u32 a);\r
27u32 PicoReadM68k16_io(u32 a);\r
28void PicoWriteM68k8_io(u32 a, u32 d);\r
29void PicoWriteM68k16_io(u32 a, u32 d);\r
30\r
31u32 PicoReadS68k8_pr(u32 a);\r
32u32 PicoReadS68k16_pr(u32 a);\r
33void PicoWriteS68k8_pr(u32 a, u32 d);\r
34void PicoWriteS68k16_pr(u32 a, u32 d);\r
35\r
36u32 PicoReadM68k8_cell0(u32 a);\r
37u32 PicoReadM68k8_cell1(u32 a);\r
38u32 PicoReadM68k16_cell0(u32 a);\r
39u32 PicoReadM68k16_cell1(u32 a);\r
40void PicoWriteM68k8_cell0(u32 a, u32 d);\r
41void PicoWriteM68k8_cell1(u32 a, u32 d);\r
42void PicoWriteM68k16_cell0(u32 a, u32 d);\r
43void PicoWriteM68k16_cell1(u32 a, u32 d);\r
44\r
45u32 PicoReadS68k8_dec0(u32 a);\r
46u32 PicoReadS68k8_dec1(u32 a);\r
47u32 PicoReadS68k16_dec0(u32 a);\r
48u32 PicoReadS68k16_dec1(u32 a);\r
49void PicoWriteS68k8_dec_m0b0(u32 a, u32 d);\r
50void PicoWriteS68k8_dec_m1b0(u32 a, u32 d);\r
51void PicoWriteS68k8_dec_m2b0(u32 a, u32 d);\r
52void PicoWriteS68k8_dec_m0b1(u32 a, u32 d);\r
53void PicoWriteS68k8_dec_m1b1(u32 a, u32 d);\r
54void PicoWriteS68k8_dec_m2b1(u32 a, u32 d);\r
55void PicoWriteS68k16_dec_m0b0(u32 a, u32 d);\r
56void PicoWriteS68k16_dec_m1b0(u32 a, u32 d);\r
57void PicoWriteS68k16_dec_m2b0(u32 a, u32 d);\r
58void PicoWriteS68k16_dec_m0b1(u32 a, u32 d);\r
59void PicoWriteS68k16_dec_m1b1(u32 a, u32 d);\r
60void PicoWriteS68k16_dec_m2b1(u32 a, u32 d);\r
61#endif\r
62\r
63static void remap_prg_window(void);\r
64static void remap_word_ram(int r3);\r
65\r
7a1f6e45 66// poller detection\r
7a1f6e45 67#define POLL_LIMIT 16\r
68#define POLL_CYCLES 124\r
7a1f6e45 69unsigned int s68k_poll_adclk, s68k_poll_cnt;\r
cc68a136 70\r
4ff2d527 71#ifndef _ASM_CD_MEMORY_C\r
cb4a513a 72static u32 m68k_reg_read16(u32 a)\r
cc68a136 73{\r
74 u32 d=0;\r
75 a &= 0x3e;\r
cc68a136 76\r
77 switch (a) {\r
672ad671 78 case 0:\r
c459aefd 79 d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens\r
672ad671 80 goto end;\r
cc68a136 81 case 2:\r
672ad671 82 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);\r
af37bca8 83 elprintf(EL_CDREG3, "m68k_regs r3: %02x @%06x", (u8)d, SekPc);\r
cc68a136 84 goto end;\r
c459aefd 85 case 4:\r
86 d = Pico_mcd->s68k_regs[4]<<8;\r
87 goto end;\r
88 case 6:\r
913ef4b7 89 d = *(u16 *)(Pico_mcd->bios + 0x72);\r
c459aefd 90 goto end;\r
cc68a136 91 case 8:\r
cc68a136 92 d = Read_CDC_Host(0);\r
93 goto end;\r
c459aefd 94 case 0xA:\r
ca61ee42 95 elprintf(EL_UIO, "m68k FIXME: reserved read");\r
c459aefd 96 goto end;\r
cc68a136 97 case 0xC:\r
1cd356a3 98 d = Pico_mcd->m.timer_stopwatch >> 16;\r
af37bca8 99 elprintf(EL_CDREGS, "m68k stopwatch timer read (%04x)", d);\r
1cd356a3 100 goto end;\r
cc68a136 101 }\r
102\r
cc68a136 103 if (a < 0x30) {\r
104 // comm flag/cmd/status (0xE-0x2F)\r
105 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r
106 goto end;\r
107 }\r
108\r
ca61ee42 109 elprintf(EL_UIO, "m68k_regs FIXME invalid read @ %02x", a);\r
cc68a136 110\r
111end:\r
112\r
cc68a136 113 return d;\r
114}\r
4ff2d527 115#endif\r
cc68a136 116\r
4ff2d527 117#ifndef _ASM_CD_MEMORY_C\r
118static\r
119#endif\r
120void m68k_reg_write8(u32 a, u32 d)\r
cc68a136 121{\r
af37bca8 122 u32 dold;\r
cc68a136 123 a &= 0x3f;\r
cc68a136 124\r
125 switch (a) {\r
126 case 0:\r
672ad671 127 d &= 1;\r
ca61ee42 128 if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { elprintf(EL_INTS, "m68k: s68k irq 2"); SekInterruptS68k(2); }\r
c459aefd 129 return;\r
cc68a136 130 case 1:\r
672ad671 131 d &= 3;\r
51a902ae 132 if (!(d&1)) Pico_mcd->m.state_flags |= 1; // reset pending, needed to be sure we fetch the right vectors on reset\r
ef090115 133 if ( (Pico_mcd->m.busreq&1) != (d&1)) elprintf(EL_INTSW, "m68k: s68k reset %i", !(d&1));\r
134 if ( (Pico_mcd->m.busreq&2) != (d&2)) elprintf(EL_INTSW, "m68k: s68k brq %i", (d&2)>>1);\r
51a902ae 135 if ((Pico_mcd->m.state_flags&1) && (d&3)==1) {\r
cc68a136 136 SekResetS68k(); // S68k comes out of RESET or BRQ state\r
4ff2d527 137 Pico_mcd->m.state_flags&=~1;\r
af37bca8 138 elprintf(EL_CDREGS, "m68k: resetting s68k, cycles=%i", SekCyclesLeft);\r
cc68a136 139 }\r
af37bca8 140 if (!(d & 1))\r
141 d |= 2; // verified: reset also gives bus\r
142 if ((d ^ Pico_mcd->m.busreq) & 2)\r
0ace9b9a 143 remap_prg_window();\r
c459aefd 144 Pico_mcd->m.busreq = d;\r
145 return;\r
672ad671 146 case 2:\r
af37bca8 147 elprintf(EL_CDREGS, "m68k: prg wp=%02x", d);\r
672ad671 148 Pico_mcd->s68k_regs[2] = d; // really use s68k side register\r
149 return;\r
af37bca8 150 case 3:\r
151 dold = Pico_mcd->s68k_regs[3];\r
152 elprintf(EL_CDREG3, "m68k_regs w3: %02x @%06x", (u8)d, SekPc);\r
672ad671 153 //if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);\r
154 //if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :\r
155 // ((d&2) ? "word ram to s68k" : "word ram to m68k"));\r
ef090115 156 if (dold & 4) { // 1M mode\r
157 d ^= 2; // writing 0 to DMNA actually sets it, 1 does nothing\r
66fdc0f0 158 } else {\r
ef090115 159 if ((d ^ dold) & d & 2) { // DMNA is being set\r
160 dold &= ~1; // return word RAM to s68k\r
161 /* Silpheed hack: bset(w3), r3, btst, bne, r3 */\r
162 SekEndRun(20+16+10+12+16);\r
163 }\r
66fdc0f0 164 }\r
af37bca8 165 Pico_mcd->s68k_regs[3] = (d & 0xc2) | (dold & 0x1f);\r
166 if ((d ^ dold) & 0xc0) {\r
167 elprintf(EL_CDREGS, "m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));\r
0ace9b9a 168 remap_prg_window();\r
af37bca8 169 }\r
7a1f6e45 170#ifdef USE_POLL_DETECT\r
171 if ((s68k_poll_adclk&0xfe) == 2 && s68k_poll_cnt > POLL_LIMIT) {\r
172 SekSetStopS68k(0); s68k_poll_adclk = 0;\r
8f8fe01e 173 elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r
7a1f6e45 174 }\r
175#endif\r
672ad671 176 return;\r
c459aefd 177 case 6:\r
d1df8786 178 Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer\r
c459aefd 179 return;\r
180 case 7:\r
d1df8786 181 Pico_mcd->bios[0x72] = d;\r
af37bca8 182 elprintf(EL_CDREGS, "hint vector set to %04x%04x",\r
183 ((u16 *)Pico_mcd->bios)[0x70/2], ((u16 *)Pico_mcd->bios)[0x72/2]);\r
c459aefd 184 return;\r
7a1f6e45 185 case 0xf:\r
186 d = (d << 1) | ((d >> 7) & 1); // rol8 1 (special case)\r
cc68a136 187 case 0xe:\r
672ad671 188 //dprintf("m68k: comm flag: %02x", d);\r
cc68a136 189 Pico_mcd->s68k_regs[0xe] = d;\r
7a1f6e45 190#ifdef USE_POLL_DETECT\r
191 if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {\r
192 SekSetStopS68k(0); s68k_poll_adclk = 0;\r
8f8fe01e 193 elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r
7a1f6e45 194 }\r
195#endif\r
c459aefd 196 return;\r
672ad671 197 }\r
198\r
199 if ((a&0xf0) == 0x10) {\r
cc68a136 200 Pico_mcd->s68k_regs[a] = d;\r
7a1f6e45 201#ifdef USE_POLL_DETECT\r
202 if ((a&0xfe) == (s68k_poll_adclk&0xfe) && s68k_poll_cnt > POLL_LIMIT) {\r
203 SekSetStopS68k(0); s68k_poll_adclk = 0;\r
8f8fe01e 204 elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r
7a1f6e45 205 }\r
206#endif\r
672ad671 207 return;\r
cc68a136 208 }\r
209\r
ca61ee42 210 elprintf(EL_UIO, "m68k FIXME: invalid write? [%02x] %02x", a, d);\r
cc68a136 211}\r
212\r
2433f409 213#ifndef _ASM_CD_MEMORY_C\r
214static\r
215#endif\r
216u32 s68k_poll_detect(u32 a, u32 d)\r
217{\r
218#ifdef USE_POLL_DETECT\r
ca61ee42 219 // needed mostly for Cyclone, which doesn't always check it's cycle counter\r
220 if (SekIsStoppedS68k()) return d;\r
2433f409 221 // polling detection\r
222 if (a == (s68k_poll_adclk&0xff)) {\r
223 unsigned int clkdiff = SekCyclesDoneS68k() - (s68k_poll_adclk>>8);\r
224 if (clkdiff <= POLL_CYCLES) {\r
225 s68k_poll_cnt++;\r
226 //printf("-- diff: %u, cnt = %i\n", clkdiff, s68k_poll_cnt);\r
227 if (s68k_poll_cnt > POLL_LIMIT) {\r
228 SekSetStopS68k(1);\r
8f8fe01e 229 elprintf(EL_CDPOLL, "s68k poll detected @ %06x, a=%02x", SekPcS68k, a);\r
2433f409 230 }\r
231 s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;\r
232 return d;\r
233 }\r
234 }\r
235 s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;\r
236 s68k_poll_cnt = 0;\r
237#endif\r
238 return d;\r
239}\r
cc68a136 240\r
913ef4b7 241#define READ_FONT_DATA(basemask) \\r
242{ \\r
243 unsigned int fnt = *(unsigned int *)(Pico_mcd->s68k_regs + 0x4c); \\r
244 unsigned int col0 = (fnt >> 8) & 0x0f, col1 = (fnt >> 12) & 0x0f; \\r
245 if (fnt & (basemask << 0)) d = col1 ; else d = col0; \\r
246 if (fnt & (basemask << 1)) d |= col1 << 4; else d |= col0 << 4; \\r
247 if (fnt & (basemask << 2)) d |= col1 << 8; else d |= col0 << 8; \\r
248 if (fnt & (basemask << 3)) d |= col1 << 12; else d |= col0 << 12; \\r
249}\r
250\r
cc68a136 251\r
4ff2d527 252#ifndef _ASM_CD_MEMORY_C\r
253static\r
254#endif\r
255u32 s68k_reg_read16(u32 a)\r
cc68a136 256{\r
257 u32 d=0;\r
cc68a136 258\r
cc68a136 259 switch (a) {\r
260 case 0:\r
7a1f6e45 261 return ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state\r
672ad671 262 case 2:\r
2433f409 263 d = (Pico_mcd->s68k_regs[2]<<8) | (Pico_mcd->s68k_regs[3]&0x1f);\r
af37bca8 264 elprintf(EL_CDREG3, "s68k_regs r3: %02x @%06x", (u8)d, SekPcS68k);\r
2433f409 265 return s68k_poll_detect(a, d);\r
cc68a136 266 case 6:\r
7a1f6e45 267 return CDC_Read_Reg();\r
cc68a136 268 case 8:\r
7a1f6e45 269 return Read_CDC_Host(1); // Gens returns 0 here on byte reads\r
cc68a136 270 case 0xC:\r
4f265db7 271 d = Pico_mcd->m.timer_stopwatch >> 16;\r
af37bca8 272 elprintf(EL_CDREGS, "s68k stopwatch timer read (%04x)", d);\r
7a1f6e45 273 return d;\r
d1df8786 274 case 0x30:\r
af37bca8 275 elprintf(EL_CDREGS, "s68k int3 timer read (%02x)", Pico_mcd->s68k_regs[31]);\r
7a1f6e45 276 return Pico_mcd->s68k_regs[31];\r
cc68a136 277 case 0x34: // fader\r
7a1f6e45 278 return 0; // no busy bit\r
913ef4b7 279 case 0x50: // font data (check: Lunar 2, Silpheed)\r
280 READ_FONT_DATA(0x00100000);\r
7a1f6e45 281 return d;\r
913ef4b7 282 case 0x52:\r
283 READ_FONT_DATA(0x00010000);\r
7a1f6e45 284 return d;\r
913ef4b7 285 case 0x54:\r
286 READ_FONT_DATA(0x10000000);\r
7a1f6e45 287 return d;\r
913ef4b7 288 case 0x56:\r
289 READ_FONT_DATA(0x01000000);\r
7a1f6e45 290 return d;\r
cc68a136 291 }\r
292\r
293 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r
294\r
2433f409 295 if (a >= 0x0e && a < 0x30)\r
296 return s68k_poll_detect(a, d);\r
7a1f6e45 297\r
cc68a136 298 return d;\r
299}\r
300\r
4ff2d527 301#ifndef _ASM_CD_MEMORY_C\r
302static\r
303#endif\r
304void s68k_reg_write8(u32 a, u32 d)\r
cc68a136 305{\r
48e8482f 306 // Warning: d might have upper bits set\r
cc68a136 307 switch (a) {\r
672ad671 308 case 2:\r
309 return; // only m68k can change WP\r
fa1e5e29 310 case 3: {\r
311 int dold = Pico_mcd->s68k_regs[3];\r
af37bca8 312 elprintf(EL_CDREG3, "s68k_regs w3: %02x @%06x", (u8)d, SekPcS68k);\r
672ad671 313 d &= 0x1d;\r
af37bca8 314 d |= dold & 0xc2;\r
315 if (d & 4)\r
39230401 316 {\r
0ace9b9a 317 if ((d ^ dold) & 0x1d) {\r
4ff2d527 318 d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit\r
0ace9b9a 319 remap_word_ram(d);\r
4ff2d527 320 }\r
fa1e5e29 321 if (!(dold & 4)) {\r
af37bca8 322 elprintf(EL_CDREG3, "wram mode 2M->1M");\r
fa1e5e29 323 wram_2M_to_1M(Pico_mcd->word_ram2M);\r
4ff2d527 324 }\r
39230401 325 }\r
326 else\r
327 {\r
fa1e5e29 328 if (dold & 4) {\r
af37bca8 329 elprintf(EL_CDREG3, "wram mode 1M->2M");\r
4ff2d527 330 if (!(d&1)) { // it didn't set the ret bit, which means it doesn't want to give WRAM to m68k\r
331 d &= ~3;\r
332 d |= (dold&1) ? 2 : 1; // then give it to the one which had bank0 in 1M mode\r
333 }\r
fa1e5e29 334 wram_1M_to_2M(Pico_mcd->word_ram2M);\r
0ace9b9a 335 remap_word_ram(d);\r
4ff2d527 336 }\r
ef090115 337 // s68k can only set RET, writing 0 has no effect\r
07ceafdb 338 else if ((dold ^ d) & d & 1) { // RET being set\r
339 SekEndRunS68k(20+16+10+12+16); // see DMNA case\r
340 } else\r
341 d |= dold & 1;\r
342 if (d & 1)\r
343 d &= ~2; // DMNA clears\r
d0d47c5b 344 }\r
672ad671 345 break;\r
fa1e5e29 346 }\r
cc68a136 347 case 4:\r
af37bca8 348 elprintf(EL_CDREGS, "s68k CDC dest: %x", d&7);\r
cc68a136 349 Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode\r
350 return;\r
351 case 5:\r
c459aefd 352 //dprintf("s68k CDC reg addr: %x", d&0xf);\r
cc68a136 353 break;\r
354 case 7:\r
355 CDC_Write_Reg(d);\r
356 return;\r
357 case 0xa:\r
af37bca8 358 elprintf(EL_CDREGS, "s68k set CDC dma addr");\r
cc68a136 359 break;\r
d1df8786 360 case 0xc:\r
4f265db7 361 case 0xd:\r
af37bca8 362 elprintf(EL_CDREGS, "s68k set stopwatch timer");\r
4f265db7 363 Pico_mcd->m.timer_stopwatch = 0;\r
364 return;\r
1cd356a3 365 case 0xe:\r
7a1f6e45 366 Pico_mcd->s68k_regs[0xf] = (d>>1) | (d<<7); // ror8 1, Gens note: Dragons lair\r
1cd356a3 367 return;\r
d1df8786 368 case 0x31:\r
af37bca8 369 elprintf(EL_CDREGS, "s68k set int3 timer: %02x", d);\r
48e8482f 370 Pico_mcd->m.timer_int3 = (d & 0xff) << 16;\r
d1df8786 371 break;\r
cc68a136 372 case 0x33: // IRQ mask\r
af37bca8 373 elprintf(EL_CDREGS, "s68k irq mask: %02x", d);\r
cc68a136 374 if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) {\r
375 CDD_Export_Status();\r
cc68a136 376 }\r
377 break;\r
378 case 0x34: // fader\r
379 Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;\r
380 return;\r
672ad671 381 case 0x36:\r
382 return; // d/m bit is unsetable\r
383 case 0x37: {\r
384 u32 d_old = Pico_mcd->s68k_regs[0x37];\r
385 Pico_mcd->s68k_regs[0x37] = d&7;\r
386 if ((d&4) && !(d_old&4)) {\r
cc68a136 387 CDD_Export_Status();\r
cc68a136 388 }\r
672ad671 389 return;\r
390 }\r
cc68a136 391 case 0x4b:\r
392 Pico_mcd->s68k_regs[a] = (u8) d;\r
393 CDD_Import_Command();\r
394 return;\r
395 }\r
396\r
1cd356a3 397 if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))\r
cc68a136 398 {\r
ca61ee42 399 elprintf(EL_UIO, "s68k FIXME: invalid write @ %02x?", a);\r
cc68a136 400 return;\r
401 }\r
402\r
403 Pico_mcd->s68k_regs[a] = (u8) d;\r
404}\r
405\r
af37bca8 406// -----------------------------------------------------------------\r
407// Main 68k\r
408// -----------------------------------------------------------------\r
cc68a136 409\r
af37bca8 410#ifndef _ASM_CD_MEMORY_C\r
411#include "cell_map.c"\r
af37bca8 412\r
413// WORD RAM, cell aranged area (220000 - 23ffff)\r
0ace9b9a 414static u32 PicoReadM68k8_cell0(u32 a)\r
cc68a136 415{\r
af37bca8 416 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged\r
0ace9b9a 417 return Pico_mcd->word_ram1M[0][a ^ 1];\r
418}\r
419\r
420static u32 PicoReadM68k8_cell1(u32 a)\r
421{\r
422 a = (a&3) | (cell_map(a >> 2) << 2);\r
423 return Pico_mcd->word_ram1M[1][a ^ 1];\r
424}\r
425\r
426static u32 PicoReadM68k16_cell0(u32 a)\r
427{\r
428 a = (a&2) | (cell_map(a >> 2) << 2);\r
429 return *(u16 *)(Pico_mcd->word_ram1M[0] + a);\r
af37bca8 430}\r
cc68a136 431\r
0ace9b9a 432static u32 PicoReadM68k16_cell1(u32 a)\r
af37bca8 433{\r
af37bca8 434 a = (a&2) | (cell_map(a >> 2) << 2);\r
0ace9b9a 435 return *(u16 *)(Pico_mcd->word_ram1M[1] + a);\r
af37bca8 436}\r
cc68a136 437\r
0ace9b9a 438static void PicoWriteM68k8_cell0(u32 a, u32 d)\r
af37bca8 439{\r
af37bca8 440 a = (a&3) | (cell_map(a >> 2) << 2);\r
0ace9b9a 441 Pico_mcd->word_ram1M[0][a ^ 1] = d;\r
af37bca8 442}\r
8022f53d 443\r
0ace9b9a 444static void PicoWriteM68k8_cell1(u32 a, u32 d)\r
af37bca8 445{\r
af37bca8 446 a = (a&3) | (cell_map(a >> 2) << 2);\r
0ace9b9a 447 Pico_mcd->word_ram1M[1][a ^ 1] = d;\r
af37bca8 448}\r
449\r
0ace9b9a 450static void PicoWriteM68k16_cell0(u32 a, u32 d)\r
451{\r
452 a = (a&3) | (cell_map(a >> 2) << 2);\r
453 *(u16 *)(Pico_mcd->word_ram1M[0] + a) = d;\r
454}\r
455\r
456static void PicoWriteM68k16_cell1(u32 a, u32 d)\r
457{\r
458 a = (a&3) | (cell_map(a >> 2) << 2);\r
459 *(u16 *)(Pico_mcd->word_ram1M[1] + a) = d;\r
460}\r
461#endif\r
462\r
af37bca8 463// RAM cart (40000 - 7fffff, optional)\r
464static u32 PicoReadM68k8_ramc(u32 a)\r
465{\r
466 u32 d = 0;\r
467 if (a == 0x400001) {\r
468 if (SRam.data != NULL)\r
469 d = 3; // 64k cart\r
470 return d;\r
8022f53d 471 }\r
472\r
af37bca8 473 if ((a & 0xfe0000) == 0x600000) {\r
474 if (SRam.data != NULL)\r
475 d = SRam.data[((a >> 1) & 0xffff) + 0x2000];\r
476 return d;\r
8022f53d 477 }\r
478\r
af37bca8 479 if (a == 0x7fffff)\r
480 return Pico_mcd->m.bcram_reg;\r
cc68a136 481\r
af37bca8 482 elprintf(EL_UIO, "m68k unmapped r8 [%06x] @%06x", a, SekPc);\r
cc68a136 483 return d;\r
484}\r
485\r
af37bca8 486static u32 PicoReadM68k16_ramc(u32 a)\r
cc68a136 487{\r
af37bca8 488 elprintf(EL_ANOMALY, "ramcart r16: [%06x] @%06x", a, SekPcS68k);\r
489 return PicoReadM68k8_ramc(a + 1);\r
490}\r
cc68a136 491\r
af37bca8 492static void PicoWriteM68k8_ramc(u32 a, u32 d)\r
493{\r
494 if ((a & 0xfe0000) == 0x600000) {\r
495 if (SRam.data != NULL && (Pico_mcd->m.bcram_reg & 1)) {\r
496 SRam.data[((a>>1) & 0xffff) + 0x2000] = d;\r
8022f53d 497 SRam.changed = 1;\r
498 }\r
499 return;\r
500 }\r
501\r
af37bca8 502 if (a == 0x7fffff) {\r
503 Pico_mcd->m.bcram_reg = d;\r
8022f53d 504 return;\r
505 }\r
506\r
af37bca8 507 elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);\r
cc68a136 508}\r
509\r
af37bca8 510static void PicoWriteM68k16_ramc(u32 a, u32 d)\r
cc68a136 511{\r
af37bca8 512 elprintf(EL_ANOMALY, "ramcart w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
513 PicoWriteM68k8_ramc(a + 1, d);\r
cc68a136 514}\r
515\r
af37bca8 516// IO/control/cd registers (a10000 - ...)\r
0ace9b9a 517#ifndef _ASM_CD_MEMORY_C\r
af37bca8 518static u32 PicoReadM68k8_io(u32 a)\r
cc68a136 519{\r
af37bca8 520 u32 d;\r
521 if ((a & 0xff00) == 0x2000) { // a12000 - a120ff\r
522 d = m68k_reg_read16(a); // TODO: m68k_reg_read8\r
523 if (!(a & 1))\r
524 d >>= 8;\r
525 d &= 0xff;\r
526 elprintf(EL_CDREGS, "m68k_regs r8: [%02x] %02x @%06x", a & 0x3f, d, SekPc);\r
527 return d;\r
528 }\r
529\r
530 // fallback to default MD handler\r
531 return PicoRead8_io(a);\r
cc68a136 532}\r
533\r
af37bca8 534static u32 PicoReadM68k16_io(u32 a)\r
cc68a136 535{\r
af37bca8 536 u32 d;\r
537 if ((a & 0xff00) == 0x2000) {\r
538 d = m68k_reg_read16(a);\r
539 elprintf(EL_CDREGS, "m68k_regs r16: [%02x] %04x @%06x", a & 0x3f, d, SekPc);\r
540 return d;\r
b542be46 541 }\r
cc68a136 542\r
af37bca8 543 return PicoRead16_io(a);\r
cc68a136 544}\r
545\r
af37bca8 546static void PicoWriteM68k8_io(u32 a, u32 d)\r
cc68a136 547{\r
af37bca8 548 if ((a & 0xff00) == 0x2000) { // a12000 - a120ff\r
549 elprintf(EL_CDREGS, "m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);\r
2433f409 550 m68k_reg_write8(a, d);\r
551 return;\r
552 }\r
672ad671 553\r
af37bca8 554 PicoWrite16_io(a, d);\r
cc68a136 555}\r
ab0607f7 556\r
af37bca8 557static void PicoWriteM68k16_io(u32 a, u32 d)\r
cc68a136 558{\r
af37bca8 559 if ((a & 0xff00) == 0x2000) { // a12000 - a120ff\r
560 elprintf(EL_CDREGS, "m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);\r
561/* TODO FIXME?\r
7a1f6e45 562 if (a == 0xe) { // special case, 2 byte writes would be handled differently\r
563 Pico_mcd->s68k_regs[0xe] = d >> 8;\r
564#ifdef USE_POLL_DETECT\r
565 if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {\r
6cadc2da 566 SekSetStopS68k(0); s68k_poll_adclk = 0;\r
8f8fe01e 567 elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r
7a1f6e45 568 }\r
569#endif\r
570 return;\r
571 }\r
af37bca8 572*/\r
573 m68k_reg_write8(a, d >> 8);\r
574 m68k_reg_write8(a + 1, d & 0xff);\r
b542be46 575 return;\r
576 }\r
577\r
af37bca8 578 PicoWrite16_io(a, d);\r
cc68a136 579}\r
0ace9b9a 580#endif\r
cc68a136 581\r
721cd396 582// -----------------------------------------------------------------\r
af37bca8 583// Sub 68k\r
cc68a136 584// -----------------------------------------------------------------\r
585\r
af37bca8 586static u32 s68k_unmapped_read8(u32 a)\r
cc68a136 587{\r
af37bca8 588 elprintf(EL_UIO, "s68k unmapped r8 [%06x] @%06x", a, SekPc);\r
589 return 0;\r
cc68a136 590}\r
591\r
af37bca8 592static u32 s68k_unmapped_read16(u32 a)\r
cc68a136 593{\r
af37bca8 594 elprintf(EL_UIO, "s68k unmapped r16 [%06x] @%06x", a, SekPc);\r
595 return 0;\r
596}\r
4f265db7 597\r
af37bca8 598static void s68k_unmapped_write8(u32 a, u32 d)\r
599{\r
600 elprintf(EL_UIO, "s68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);\r
601}\r
cc68a136 602\r
af37bca8 603static void s68k_unmapped_write16(u32 a, u32 d)\r
604{\r
605 elprintf(EL_UIO, "s68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);\r
606}\r
cc68a136 607\r
0ace9b9a 608// PRG RAM protected range (000000 - 00ff00)?\r
609// XXX verify: ff00 or 1fe00 max?\r
610static void PicoWriteS68k8_prgwp(u32 a, u32 d)\r
611{\r
612 if (a >= (Pico_mcd->s68k_regs[2] << 8))\r
613 Pico_mcd->prg_ram[a ^ 1] = d;\r
614}\r
615\r
616static void PicoWriteS68k16_prgwp(u32 a, u32 d)\r
617{\r
618 if (a >= (Pico_mcd->s68k_regs[2] << 8))\r
619 *(u16 *)(Pico_mcd->prg_ram + a) = d;\r
620}\r
621\r
622#ifndef _ASM_CD_MEMORY_C\r
623\r
af37bca8 624// decode (080000 - 0bffff, in 1M mode)\r
0ace9b9a 625static u32 PicoReadS68k8_dec0(u32 a)\r
626{\r
627 u32 d = Pico_mcd->word_ram1M[0][((a >> 1) ^ 1) & 0x1ffff];\r
628 if (a & 1)\r
629 d &= 0x0f;\r
630 else\r
631 d >>= 4;\r
632 return d;\r
633}\r
634\r
635static u32 PicoReadS68k8_dec1(u32 a)\r
af37bca8 636{\r
0ace9b9a 637 u32 d = Pico_mcd->word_ram1M[1][((a >> 1) ^ 1) & 0x1ffff];\r
af37bca8 638 if (a & 1)\r
639 d &= 0x0f;\r
640 else\r
641 d >>= 4;\r
cc68a136 642 return d;\r
643}\r
644\r
0ace9b9a 645static u32 PicoReadS68k16_dec0(u32 a)\r
cc68a136 646{\r
0ace9b9a 647 u32 d = Pico_mcd->word_ram1M[0][((a >> 1) ^ 1) & 0x1ffff];\r
af37bca8 648 d |= d << 4;\r
649 d &= ~0xf0;\r
cc68a136 650 return d;\r
651}\r
ab0607f7 652\r
0ace9b9a 653static u32 PicoReadS68k16_dec1(u32 a)\r
0a051f55 654{\r
0ace9b9a 655 u32 d = Pico_mcd->word_ram1M[1][((a >> 1) ^ 1) & 0x1ffff];\r
656 d |= d << 4;\r
657 d &= ~0xf0;\r
658 return d;\r
0a051f55 659}\r
660\r
0ace9b9a 661/* check: jaguar xj 220 (draws entire world using decode) */\r
662#define mk_decode_w8(bank) \\r
663static void PicoWriteS68k8_dec_m0b##bank(u32 a, u32 d) \\r
664{ \\r
665 u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \\r
666 \\r
667 if (!(a & 1)) \\r
668 *pd = (*pd & 0x0f) | (d << 4); \\r
669 else \\r
670 *pd = (*pd & 0xf0) | (d & 0x0f); \\r
671} \\r
672 \\r
673static void PicoWriteS68k8_dec_m1b##bank(u32 a, u32 d) \\r
674{ \\r
675 u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \\r
676 u8 mask = (a & 1) ? 0x0f : 0xf0; \\r
677 \\r
678 if (!(*pd & mask) && (d & 0x0f)) /* underwrite */ \\r
679 PicoWriteS68k8_dec_m0b##bank(a, d); \\r
680} \\r
681 \\r
682static void PicoWriteS68k8_dec_m2b##bank(u32 a, u32 d) /* ...and m3? */ \\r
683{ \\r
684 if (d & 0x0f) /* overwrite */ \\r
685 PicoWriteS68k8_dec_m0b##bank(a, d); \\r
686}\r
0a051f55 687\r
0ace9b9a 688mk_decode_w8(0)\r
689mk_decode_w8(1)\r
690\r
691#define mk_decode_w16(bank) \\r
692static void PicoWriteS68k16_dec_m0b##bank(u32 a, u32 d) \\r
693{ \\r
694 u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \\r
695 \\r
696 d &= 0x0f0f; \\r
697 *pd = d | (d >> 4); \\r
698} \\r
699 \\r
700static void PicoWriteS68k16_dec_m1b##bank(u32 a, u32 d) \\r
701{ \\r
702 u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \\r
703 \\r
704 d &= 0x0f0f; /* underwrite */ \\r
705 if (!(*pd & 0xf0)) *pd |= d >> 4; \\r
706 if (!(*pd & 0x0f)) *pd |= d; \\r
707} \\r
708 \\r
709static void PicoWriteS68k16_dec_m2b##bank(u32 a, u32 d) \\r
710{ \\r
711 u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \\r
712 \\r
713 d &= 0x0f0f; /* overwrite */ \\r
714 d |= d >> 4; \\r
715 \\r
716 if (!(d & 0xf0)) d |= *pd & 0xf0; \\r
717 if (!(d & 0x0f)) d |= *pd & 0x0f; \\r
718 *pd = d; \\r
719}\r
0a051f55 720\r
0ace9b9a 721mk_decode_w16(0)\r
722mk_decode_w16(1)\r
0a051f55 723\r
0ace9b9a 724#endif\r
0a051f55 725\r
af37bca8 726// backup RAM (fe0000 - feffff)\r
727static u32 PicoReadS68k8_bram(u32 a)\r
728{\r
729 return Pico_mcd->bram[(a>>1)&0x1fff];\r
730}\r
cc68a136 731\r
af37bca8 732static u32 PicoReadS68k16_bram(u32 a)\r
cc68a136 733{\r
af37bca8 734 u32 d;\r
735 elprintf(EL_ANOMALY, "FIXME: s68k_bram r16: [%06x] @%06x", a, SekPcS68k);\r
736 a = (a >> 1) & 0x1fff;\r
737 d = Pico_mcd->bram[a++];\r
738 d|= Pico_mcd->bram[a++] << 8; // probably wrong, TODO: verify\r
739 return d;\r
740}\r
cc68a136 741\r
af37bca8 742static void PicoWriteS68k8_bram(u32 a, u32 d)\r
743{\r
744 Pico_mcd->bram[(a >> 1) & 0x1fff] = d;\r
745 SRam.changed = 1;\r
746}\r
cc68a136 747\r
af37bca8 748static void PicoWriteS68k16_bram(u32 a, u32 d)\r
749{\r
750 elprintf(EL_ANOMALY, "s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
751 a = (a >> 1) & 0x1fff;\r
752 Pico_mcd->bram[a++] = d;\r
753 Pico_mcd->bram[a++] = d >> 8; // TODO: verify..\r
754 SRam.changed = 1;\r
755}\r
b5e5172d 756\r
0ace9b9a 757#ifndef _ASM_CD_MEMORY_C\r
758\r
af37bca8 759// PCM and registers (ff0000 - ffffff)\r
760static u32 PicoReadS68k8_pr(u32 a)\r
761{\r
762 u32 d = 0;\r
cc68a136 763\r
764 // regs\r
af37bca8 765 if ((a & 0xfe00) == 0x8000) {\r
cb4a513a 766 a &= 0x1ff;\r
af37bca8 767 elprintf(EL_CDREGS, "s68k_regs r8: [%02x] @ %06x", a, SekPcS68k);\r
768 if (a >= 0x0e && a < 0x30) {\r
769 d = Pico_mcd->s68k_regs[a];\r
770 s68k_poll_detect(a, d);\r
771 elprintf(EL_CDREGS, "ret = %02x", (u8)d);\r
772 return d;\r
d0d47c5b 773 }\r
af37bca8 774 else if (a >= 0x58 && a < 0x68)\r
775 d = gfx_cd_read(a & ~1);\r
776 else d = s68k_reg_read16(a & ~1);\r
777 if (!(a & 1))\r
778 d >>= 8;\r
779 elprintf(EL_CDREGS, "ret = %02x", (u8)d);\r
780 return d & 0xff;\r
d0d47c5b 781 }\r
782\r
4f265db7 783 // PCM\r
0ace9b9a 784 // XXX: verify: probably odd addrs only?\r
af37bca8 785 if ((a & 0x8000) == 0x0000) {\r
4f265db7 786 a &= 0x7fff;\r
787 if (a >= 0x2000)\r
af37bca8 788 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a >> 1) & 0xfff];\r
789 else if (a >= 0x20) {\r
790 a &= 0x1e;\r
791 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r
792 if (a & 2)\r
793 d >>= 8;\r
794 }\r
795 return d & 0xff;\r
ab0607f7 796 }\r
797\r
af37bca8 798 return s68k_unmapped_read8(a);\r
cc68a136 799}\r
800\r
af37bca8 801static u32 PicoReadS68k16_pr(u32 a)\r
cc68a136 802{\r
af37bca8 803 u32 d = 0;\r
cc68a136 804\r
805 // regs\r
af37bca8 806 if ((a & 0xfe00) == 0x8000) {\r
cb4a513a 807 a &= 0x1fe;\r
af37bca8 808 elprintf(EL_CDREGS, "s68k_regs r16: [%02x] @ %06x", a, SekPcS68k);\r
809 if (0x58 <= a && a < 0x68)\r
810 d = gfx_cd_read(a);\r
811 else d = s68k_reg_read16(a);\r
812 elprintf(EL_CDREGS, "ret = %04x", d);\r
813 return d;\r
cc68a136 814 }\r
815\r
af37bca8 816 // PCM\r
817 if ((a & 0x8000) == 0x0000) {\r
818 //elprintf(EL_ANOMALY, "FIXME: s68k_pcm r16: [%06x] @%06x", a, SekPcS68k);\r
819 a &= 0x7fff;\r
820 if (a >= 0x2000)\r
821 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];\r
822 else if (a >= 0x20) {\r
823 a &= 0x1e;\r
824 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r
825 if (a & 2) d >>= 8;\r
d0d47c5b 826 }\r
af37bca8 827 elprintf(EL_CDREGS, "ret = %04x", d);\r
828 return d;\r
d0d47c5b 829 }\r
830\r
af37bca8 831 return s68k_unmapped_read16(a);\r
832}\r
833\r
834static void PicoWriteS68k8_pr(u32 a, u32 d)\r
835{\r
836 // regs\r
837 if ((a & 0xfe00) == 0x8000) {\r
838 a &= 0x1ff;\r
839 elprintf(EL_CDREGS, "s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k);\r
840 if (0x58 <= a && a < 0x68)\r
841 gfx_cd_write16(a&~1, (d<<8)|d);\r
842 else s68k_reg_write8(a,d);\r
d0d47c5b 843 return;\r
844 }\r
845\r
4f265db7 846 // PCM\r
af37bca8 847 if ((a & 0x8000) == 0x0000) {\r
4f265db7 848 a &= 0x7fff;\r
849 if (a >= 0x2000)\r
850 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;\r
851 else if (a < 0x12)\r
af37bca8 852 pcm_write(a>>1, d);\r
ab0607f7 853 return;\r
854 }\r
855\r
af37bca8 856 s68k_unmapped_write8(a, d);\r
cc68a136 857}\r
ab0607f7 858\r
af37bca8 859static void PicoWriteS68k16_pr(u32 a, u32 d)\r
cc68a136 860{\r
cc68a136 861 // regs\r
af37bca8 862 if ((a & 0xfe00) == 0x8000) {\r
cb4a513a 863 a &= 0x1fe;\r
af37bca8 864 elprintf(EL_CDREGS, "s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k);\r
865 if (a >= 0x58 && a < 0x68)\r
866 gfx_cd_write16(a, d);\r
867 else {\r
868 if (a == 0xe) {\r
869 // special case, 2 byte writes would be handled differently\r
870 // TODO: verify\r
871 Pico_mcd->s68k_regs[0xf] = d;\r
872 return;\r
873 }\r
874 s68k_reg_write8(a, d >> 8);\r
875 s68k_reg_write8(a + 1, d & 0xff);\r
d0d47c5b 876 }\r
877 return;\r
878 }\r
879\r
4f265db7 880 // PCM\r
af37bca8 881 if ((a & 0x8000) == 0x0000) {\r
4f265db7 882 a &= 0x7fff;\r
af37bca8 883 if (a >= 0x2000)\r
884 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;\r
885 else if (a < 0x12)\r
886 pcm_write(a>>1, d & 0xff);\r
ab0607f7 887 return;\r
888 }\r
889\r
af37bca8 890 s68k_unmapped_write16(a, d);\r
cc68a136 891}\r
cc68a136 892\r
0ace9b9a 893#endif\r
894\r
895static const void *m68k_cell_read8[] = { PicoReadM68k8_cell0, PicoReadM68k8_cell1 };\r
896static const void *m68k_cell_read16[] = { PicoReadM68k16_cell0, PicoReadM68k16_cell1 };\r
897static const void *m68k_cell_write8[] = { PicoWriteM68k8_cell0, PicoWriteM68k8_cell1 };\r
898static const void *m68k_cell_write16[] = { PicoWriteM68k16_cell0, PicoWriteM68k16_cell1 };\r
899\r
900static const void *s68k_dec_read8[] = { PicoReadS68k8_dec0, PicoReadS68k8_dec1 };\r
901static const void *s68k_dec_read16[] = { PicoReadS68k16_dec0, PicoReadS68k16_dec1 };\r
902\r
903static const void *s68k_dec_write8[2][4] = {\r
904 { PicoWriteS68k8_dec_m0b0, PicoWriteS68k8_dec_m1b0, PicoWriteS68k8_dec_m2b0, PicoWriteS68k8_dec_m2b0 },\r
905 { PicoWriteS68k8_dec_m0b1, PicoWriteS68k8_dec_m1b1, PicoWriteS68k8_dec_m2b1, PicoWriteS68k8_dec_m2b1 },\r
906};\r
907\r
908static const void *s68k_dec_write16[2][4] = {\r
909 { PicoWriteS68k16_dec_m0b0, PicoWriteS68k16_dec_m1b0, PicoWriteS68k16_dec_m2b0, PicoWriteS68k16_dec_m2b0 },\r
910 { PicoWriteS68k16_dec_m0b1, PicoWriteS68k16_dec_m1b1, PicoWriteS68k16_dec_m2b1, PicoWriteS68k16_dec_m2b1 },\r
911};\r
912\r
cc68a136 913// -----------------------------------------------------------------\r
914\r
0ace9b9a 915static void remap_prg_window(void)\r
3aa1e148 916{\r
af37bca8 917 // PRG RAM\r
918 if (Pico_mcd->m.busreq & 2) {\r
0ace9b9a 919 void *bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3] >> 6];\r
af37bca8 920 cpu68k_map_all_ram(0x020000, 0x03ffff, bank, 0);\r
921 }\r
922 else {\r
923 m68k_map_unmap(0x020000, 0x03ffff);\r
924 }\r
0ace9b9a 925}\r
926\r
927static void remap_word_ram(int r3)\r
928{\r
929 void *bank;\r
af37bca8 930\r
931 // WORD RAM\r
932 if (!(r3 & 4)) {\r
933 // 2M mode. XXX: allowing access in all cases for simplicity\r
934 bank = Pico_mcd->word_ram2M;\r
935 cpu68k_map_all_ram(0x200000, 0x23ffff, bank, 0);\r
936 cpu68k_map_all_ram(0x080000, 0x0bffff, bank, 1);\r
937 // TODO: handle 0x0c0000\r
938 }\r
939 else {\r
0ace9b9a 940 int b0 = r3 & 1;\r
941 int m = (r3 & 0x18) >> 3;\r
942 bank = Pico_mcd->word_ram1M[b0];\r
af37bca8 943 cpu68k_map_all_ram(0x200000, 0x21ffff, bank, 0);\r
0ace9b9a 944 bank = Pico_mcd->word_ram1M[b0 ^ 1];\r
af37bca8 945 cpu68k_map_all_ram(0x0c0000, 0x0effff, bank, 1);\r
946 // "cell arrange" on m68k\r
0ace9b9a 947 cpu68k_map_set(m68k_read8_map, 0x220000, 0x23ffff, m68k_cell_read8[b0], 1);\r
948 cpu68k_map_set(m68k_read16_map, 0x220000, 0x23ffff, m68k_cell_read16[b0], 1);\r
949 cpu68k_map_set(m68k_write8_map, 0x220000, 0x23ffff, m68k_cell_write8[b0], 1);\r
950 cpu68k_map_set(m68k_write16_map, 0x220000, 0x23ffff, m68k_cell_write16[b0], 1);\r
af37bca8 951 // "decode format" on s68k\r
0ace9b9a 952 cpu68k_map_set(s68k_read8_map, 0x080000, 0x0bffff, s68k_dec_read8[b0 ^ 1], 1);\r
953 cpu68k_map_set(s68k_read16_map, 0x080000, 0x0bffff, s68k_dec_read16[b0 ^ 1], 1);\r
954 cpu68k_map_set(s68k_write8_map, 0x080000, 0x0bffff, s68k_dec_write8[b0 ^ 1][m], 1);\r
955 cpu68k_map_set(s68k_write16_map, 0x080000, 0x0bffff, s68k_dec_write16[b0 ^ 1][m], 1);\r
af37bca8 956 }\r
957\r
3aa1e148 958#ifdef EMU_F68K\r
959 // update fetchmap..\r
960 int i;\r
961 if (!(r3 & 4))\r
962 {\r
963 for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x240000; i++)\r
964 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram2M - 0x200000;\r
965 }\r
966 else\r
967 {\r
968 for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x220000; i++)\r
969 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram1M[r3 & 1] - 0x200000;\r
970 for (i = M68K_FETCHBANK1*0x0c/0x100; (i<<(24-FAMEC_FETCHBITS)) < 0x0e0000; i++)\r
971 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram1M[(r3&1)^1] - 0x0c0000;\r
972 }\r
973#endif\r
974}\r
b837b69b 975\r
0ace9b9a 976void PicoMemStateLoaded(void)\r
977{\r
978 int r3 = Pico_mcd->s68k_regs[3];\r
979\r
980 /* after load events */\r
981 if (r3 & 4) // 1M mode?\r
982 wram_2M_to_1M(Pico_mcd->word_ram2M);\r
983 remap_word_ram(r3);\r
984 remap_prg_window();\r
985\r
986 // restore hint vector\r
987 *(unsigned short *)(Pico_mcd->bios + 0x72) = Pico_mcd->m.hint_vector;\r
988}\r
989\r
9037e45d 990#ifdef EMU_M68K\r
991static void m68k_mem_setup_cd(void);\r
992#endif\r
993\r
eff55556 994PICO_INTERNAL void PicoMemSetupCD(void)\r
b837b69b 995{\r
af37bca8 996 // setup default main68k map\r
997 PicoMemSetup();\r
998\r
af37bca8 999 // main68k map (BIOS mapped by PicoMemSetup()):\r
1000 // RAM cart\r
1001 if (PicoOpt & POPT_EN_MCD_RAMCART) {\r
1002 cpu68k_map_set(m68k_read8_map, 0x400000, 0x7fffff, PicoReadM68k8_ramc, 1);\r
1003 cpu68k_map_set(m68k_read16_map, 0x400000, 0x7fffff, PicoReadM68k16_ramc, 1);\r
1004 cpu68k_map_set(m68k_write8_map, 0x400000, 0x7fffff, PicoWriteM68k8_ramc, 1);\r
1005 cpu68k_map_set(m68k_write16_map, 0x400000, 0x7fffff, PicoWriteM68k16_ramc, 1);\r
1006 }\r
1007\r
1008 // registers/IO:\r
1009 cpu68k_map_set(m68k_read8_map, 0xa10000, 0xa1ffff, PicoReadM68k8_io, 1);\r
1010 cpu68k_map_set(m68k_read16_map, 0xa10000, 0xa1ffff, PicoReadM68k16_io, 1);\r
1011 cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, PicoWriteM68k8_io, 1);\r
1012 cpu68k_map_set(m68k_write16_map, 0xa10000, 0xa1ffff, PicoWriteM68k16_io, 1);\r
1013\r
1014 // sub68k map\r
1015 cpu68k_map_set(s68k_read8_map, 0x000000, 0xffffff, s68k_unmapped_read8, 1);\r
1016 cpu68k_map_set(s68k_read16_map, 0x000000, 0xffffff, s68k_unmapped_read16, 1);\r
1017 cpu68k_map_set(s68k_write8_map, 0x000000, 0xffffff, s68k_unmapped_write8, 1);\r
1018 cpu68k_map_set(s68k_write16_map, 0x000000, 0xffffff, s68k_unmapped_write16, 1);\r
1019\r
1020 // PRG RAM\r
1021 cpu68k_map_set(s68k_read8_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);\r
1022 cpu68k_map_set(s68k_read16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);\r
1023 cpu68k_map_set(s68k_write8_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);\r
1024 cpu68k_map_set(s68k_write16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);\r
0ace9b9a 1025 cpu68k_map_set(s68k_write8_map, 0x000000, 0x00ffff, PicoWriteS68k8_prgwp, 1);\r
1026 cpu68k_map_set(s68k_write16_map, 0x000000, 0x00ffff, PicoWriteS68k16_prgwp, 1);\r
af37bca8 1027\r
1028 // BRAM\r
1029 cpu68k_map_set(s68k_read8_map, 0xfe0000, 0xfeffff, PicoReadS68k8_bram, 1);\r
1030 cpu68k_map_set(s68k_read16_map, 0xfe0000, 0xfeffff, PicoReadS68k16_bram, 1);\r
1031 cpu68k_map_set(s68k_write8_map, 0xfe0000, 0xfeffff, PicoWriteS68k8_bram, 1);\r
1032 cpu68k_map_set(s68k_write16_map, 0xfe0000, 0xfeffff, PicoWriteS68k16_bram, 1);\r
1033\r
1034 // PCM, regs\r
1035 cpu68k_map_set(s68k_read8_map, 0xff0000, 0xffffff, PicoReadS68k8_pr, 1);\r
1036 cpu68k_map_set(s68k_read16_map, 0xff0000, 0xffffff, PicoReadS68k16_pr, 1);\r
1037 cpu68k_map_set(s68k_write8_map, 0xff0000, 0xffffff, PicoWriteS68k8_pr, 1);\r
1038 cpu68k_map_set(s68k_write16_map, 0xff0000, 0xffffff, PicoWriteS68k16_pr, 1);\r
f53f286a 1039\r
0ace9b9a 1040 // RAMs\r
1041 remap_word_ram(1);\r
1042\r
b837b69b 1043#ifdef EMU_C68K\r
b837b69b 1044 // s68k\r
5e89f0f5 1045 PicoCpuCS68k.read8 = (void *)s68k_read8_map;\r
1046 PicoCpuCS68k.read16 = (void *)s68k_read16_map;\r
1047 PicoCpuCS68k.read32 = (void *)s68k_read16_map;\r
1048 PicoCpuCS68k.write8 = (void *)s68k_write8_map;\r
1049 PicoCpuCS68k.write16 = (void *)s68k_write16_map;\r
1050 PicoCpuCS68k.write32 = (void *)s68k_write16_map;\r
1051 PicoCpuCS68k.checkpc = NULL; /* unused */\r
1052 PicoCpuCS68k.fetch8 = NULL;\r
1053 PicoCpuCS68k.fetch16 = NULL;\r
1054 PicoCpuCS68k.fetch32 = NULL;\r
b837b69b 1055#endif\r
3aa1e148 1056#ifdef EMU_F68K\r
3aa1e148 1057 // s68k\r
af37bca8 1058 PicoCpuFS68k.read_byte = s68k_read8;\r
1059 PicoCpuFS68k.read_word = s68k_read16;\r
1060 PicoCpuFS68k.read_long = s68k_read32;\r
1061 PicoCpuFS68k.write_byte = s68k_write8;\r
1062 PicoCpuFS68k.write_word = s68k_write16;\r
1063 PicoCpuFS68k.write_long = s68k_write32;\r
3aa1e148 1064\r
1065 // setup FAME fetchmap\r
1066 {\r
1067 int i;\r
1068 // M68k\r
1069 // by default, point everything to fitst 64k of ROM (BIOS)\r
1070 for (i = 0; i < M68K_FETCHBANK1; i++)\r
1071 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r
1072 // now real ROM (BIOS)\r
1073 for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)\r
1074 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom;\r
1075 // .. and RAM\r
1076 for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)\r
1077 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.ram - (i<<(24-FAMEC_FETCHBITS));\r
1078 // S68k\r
1079 // PRG RAM is default\r
1080 for (i = 0; i < M68K_FETCHBANK1; i++)\r
1081 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->prg_ram - (i<<(24-FAMEC_FETCHBITS));\r
1082 // real PRG RAM\r
1083 for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0x80000; i++)\r
1084 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->prg_ram;\r
1085 // WORD RAM 2M area\r
1086 for (i = M68K_FETCHBANK1*0x08/0x100; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0xc0000; i++)\r
1087 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram2M - 0x80000;\r
0ace9b9a 1088 // remap_word_ram() will setup word ram for both\r
3aa1e148 1089 }\r
1090#endif\r
9037e45d 1091#ifdef EMU_M68K\r
1092 m68k_mem_setup_cd();\r
1093#endif\r
3aa1e148 1094\r
7a1f6e45 1095 // m68k_poll_addr = m68k_poll_cnt = 0;\r
1096 s68k_poll_adclk = s68k_poll_cnt = 0;\r
b837b69b 1097}\r
1098\r
1099\r
cc68a136 1100#ifdef EMU_M68K\r
af37bca8 1101u32 m68k_read8(u32 a);\r
1102u32 m68k_read16(u32 a);\r
1103u32 m68k_read32(u32 a);\r
1104void m68k_write8(u32 a, u8 d);\r
1105void m68k_write16(u32 a, u16 d);\r
1106void m68k_write32(u32 a, u32 d);\r
1107\r
9037e45d 1108static unsigned int PicoReadCD8w (unsigned int a) {\r
af37bca8 1109 return m68ki_cpu_p == &PicoCpuMS68k ? s68k_read8(a) : m68k_read8(a);\r
cc68a136 1110}\r
9037e45d 1111static unsigned int PicoReadCD16w(unsigned int a) {\r
af37bca8 1112 return m68ki_cpu_p == &PicoCpuMS68k ? s68k_read16(a) : m68k_read16(a);\r
cc68a136 1113}\r
9037e45d 1114static unsigned int PicoReadCD32w(unsigned int a) {\r
af37bca8 1115 return m68ki_cpu_p == &PicoCpuMS68k ? s68k_read32(a) : m68k_read32(a);\r
cc68a136 1116}\r
9037e45d 1117static void PicoWriteCD8w (unsigned int a, unsigned char d) {\r
af37bca8 1118 if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write8(a, d); else m68k_write8(a, d);\r
cc68a136 1119}\r
9037e45d 1120static void PicoWriteCD16w(unsigned int a, unsigned short d) {\r
af37bca8 1121 if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write16(a, d); else m68k_write16(a, d);\r
cc68a136 1122}\r
9037e45d 1123static void PicoWriteCD32w(unsigned int a, unsigned int d) {\r
af37bca8 1124 if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write32(a, d); else m68k_write32(a, d);\r
cc68a136 1125}\r
1126\r
9037e45d 1127extern unsigned int (*pm68k_read_memory_8) (unsigned int address);\r
1128extern unsigned int (*pm68k_read_memory_16)(unsigned int address);\r
1129extern unsigned int (*pm68k_read_memory_32)(unsigned int address);\r
1130extern void (*pm68k_write_memory_8) (unsigned int address, unsigned char value);\r
1131extern void (*pm68k_write_memory_16)(unsigned int address, unsigned short value);\r
1132extern void (*pm68k_write_memory_32)(unsigned int address, unsigned int value);\r
9037e45d 1133\r
1134static void m68k_mem_setup_cd(void)\r
1135{\r
1136 pm68k_read_memory_8 = PicoReadCD8w;\r
1137 pm68k_read_memory_16 = PicoReadCD16w;\r
1138 pm68k_read_memory_32 = PicoReadCD32w;\r
1139 pm68k_write_memory_8 = PicoWriteCD8w;\r
1140 pm68k_write_memory_16 = PicoWriteCD16w;\r
1141 pm68k_write_memory_32 = PicoWriteCD32w;\r
9037e45d 1142}\r
cc68a136 1143#endif // EMU_M68K\r
1144\r