2 * (C) GraÅžvydas "notaz" Ignotas, 2009-2010
4 * This work is licensed under the terms of any of these licenses
6 * - GNU GPL, version 2 or later.
7 * - GNU LGPL, version 2.1 or later.
9 * See the COPYING file in the top-level directory.
11 * <random_info=mem_map>
12 * 00000000-029fffff linux (42MB)
13 * 02a00000-02dfffff fb (4MB, 153600B really used)
14 * 02e00000-02ffffff sound dma (2MB)
15 * 03000000-03ffffff MPEGDEC (?, 16MB)
22 #include <sys/types.h>
27 #include <sys/ioctl.h>
28 #include <linux/soundcard.h>
31 #include "plat_gp2x.h"
32 #include "pollux_set.h"
35 static int battdev = -1, mixerdev = -1;
36 static int cpu_clock_allowed;
37 static unsigned short saved_memtimex[2];
38 static unsigned int saved_video_regs[2][6];
39 static unsigned int timer_drift; // count per real second
42 #define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0]))
45 /* note: both PLLs are programmed the same way,
46 * the databook incorrectly states that PLL1 differs */
47 static int decode_pll(unsigned int reg)
52 p = (reg >> 18) & 0x3f;
53 m = (reg >> 8) & 0x3ff;
59 v = 27000000; // master clock
65 static void set_ram_timings(void)
67 pollux_set_fromenv(memregs, "POLLUX_RAM_TIMINGS");
70 static void unset_ram_timings(void)
74 memregs[0x14802>>1] = saved_memtimex[0];
75 memregs[0x14804>>1] = saved_memtimex[1] | 0x8000;
77 for (i = 0; i < 0x100000; i++)
78 if (!(memregs[0x14804>>1] & 0x8000))
81 printf("RAM timings reset to startup values.\n");
84 #define TIMER_BASE3 0x1980
85 #define TIMER_REG(x) memregl[(TIMER_BASE3 + x) >> 2]
87 static unsigned int gp2x_get_ticks_us_(void)
89 TIMER_REG(0x08) = 0x4b; /* run timer, latch value */
93 static unsigned int gp2x_get_ticks_ms_(void)
95 /* approximate /= 1000 */
96 unsigned long long v64;
97 v64 = (unsigned long long)gp2x_get_ticks_us_() * 4294968;
101 static void timer_cleanup(void)
103 TIMER_REG(0x40) = 0x0c; /* be sure clocks are on */
104 TIMER_REG(0x08) = 0x23; /* stop the timer, clear irq in case it's pending */
105 TIMER_REG(0x00) = 0; /* clear counter */
106 TIMER_REG(0x40) = 0; /* clocks off */
107 TIMER_REG(0x44) = 0; /* dividers back to default */
110 static void save_multiple_regs(unsigned int *dest, int base, int count)
112 const volatile unsigned int *regs = memregl + base / 4;
115 for (i = 0; i < count; i++)
119 static void restore_multiple_regs(int base, const unsigned int *src, int count)
121 volatile unsigned int *regs = memregl + base / 4;
124 for (i = 0; i < count; i++)
128 int pollux_get_real_snd_rate(int req_rate)
130 int clk0_src, clk1_src, rate, div;
132 clk0_src = (memregl[0xdbc4>>2] >> 1) & 7;
133 clk1_src = (memregl[0xdbc8>>2] >> 1) & 7;
134 if (clk0_src > 1 || clk1_src != 7) {
135 fprintf(stderr, "get_real_snd_rate: bad clk sources: %d %d\n", clk0_src, clk1_src);
139 rate = decode_pll(clk0_src ? memregl[0xf008>>2] : memregl[0xf004>>2]);
142 div = ((memregl[0xdbc4>>2] >> 4) & 0x3f) + 1;
144 div = ((memregl[0xdbc8>>2] >> 4) & 0x3f) + 1;
148 //printf("rate %d\n", rate);
149 rate -= rate * timer_drift / 1000000;
150 printf("adjusted rate: %d\n", rate);
152 if (rate < 8000-1000 || rate > 44100+1000) {
153 fprintf(stderr, "get_real_snd_rate: got bad rate: %d\n", rate);
161 static int pollux_cpu_clock_get(void)
163 return decode_pll(memregl[0xf004>>2]) / 1000000;
166 int pollux_cpu_clock_set(int mhz)
168 int adiv, mdiv, pdiv, sdiv = 0;
171 if (!cpu_clock_allowed)
173 if (mhz == pollux_cpu_clock_get())
176 // m = MDIV, p = PDIV, s = SDIV
177 #define SYS_CLK_FREQ 27
179 mdiv = (mhz * pdiv) / SYS_CLK_FREQ;
182 vf004 = (pdiv<<18) | (mdiv<<8) | sdiv;
184 // attempt to keep the AHB divider close to 250, but not higher
185 for (adiv = 1; mhz / adiv > 250; adiv++)
188 vf000 = memregl[0xf000>>2];
189 vf000 = (vf000 & ~0x3c0) | ((adiv - 1) << 6);
190 memregl[0xf000>>2] = vf000;
191 memregl[0xf004>>2] = vf004;
192 memregl[0xf07c>>2] |= 0x8000;
193 for (i = 0; (memregl[0xf07c>>2] & 0x8000) && i < 0x100000; i++)
196 printf("clock set to %dMHz, AHB set to %dMHz\n", mhz, mhz / adiv);
200 static int pollux_bat_capacity_get(void)
202 unsigned short magic_val = 0;
206 if (read(battdev, &magic_val, sizeof(magic_val)) != sizeof(magic_val))
217 static int step_volume(int *volume, int diff)
227 else if (*volume < 0)
233 ret = ioctl(mixerdev, SOUND_MIXER_WRITE_PCM, &val);
242 void pollux_init(void)
244 int rate, timer_div, timer_div2;
246 memdev = open("/dev/mem", O_RDWR);
248 perror("open(/dev/mem) failed");
252 memregs = mmap(0, 0x20000, PROT_READ|PROT_WRITE, MAP_SHARED,
254 if (memregs == MAP_FAILED) {
255 perror("mmap(memregs) failed");
258 memregl = (volatile void *)memregs;
260 saved_memtimex[0] = memregs[0x14802>>1];
261 saved_memtimex[1] = memregs[0x14804>>1];
265 // save video regs of both MLCs
266 save_multiple_regs(saved_video_regs[0], 0x4058, ARRAY_SIZE(saved_video_regs[0]));
267 save_multiple_regs(saved_video_regs[1], 0x4458, ARRAY_SIZE(saved_video_regs[1]));
269 /* some firmwares have sys clk on PLL0, we can't adjust CPU clock
270 * by reprogramming the PLL0 then, as it overclocks system bus */
271 if ((memregl[0xf000>>2] & 0x03000030) == 0x01000000)
272 cpu_clock_allowed = 1;
274 cpu_clock_allowed = 0;
275 fprintf(stderr, "unexpected PLL config (%08x), overclocking disabled\n",
279 /* find what PLL1 runs at, for the timer */
280 rate = decode_pll(memregl[0xf008>>2]);
281 printf("PLL1 @ %dHz\n", rate);
284 timer_div = (rate + 500000) / 1000000;
286 while (timer_div > 256) {
290 if (1 <= timer_div && timer_div <= 256 && timer_div2 < 4) {
291 int timer_rate = (rate >> timer_div2) / timer_div;
292 if (TIMER_REG(0x08) & 8) {
293 fprintf(stderr, "warning: timer in use, overriding!\n");
296 timer_drift = timer_rate - 1000000;
297 if (timer_drift != 0)
298 fprintf(stderr, "warning: timer drift %d us\n",
301 timer_div2 = (timer_div2 + 3) & 3;
302 TIMER_REG(0x44) = ((timer_div - 1) << 4) | 2; /* using PLL1 */
303 TIMER_REG(0x40) = 0x0c; /* clocks on */
304 TIMER_REG(0x08) = 0x68 | timer_div2; /* run timer, clear irq, latch value */
307 fprintf(stderr, "warning: could not make use of timer\n");
309 // those functions are actually not good at all on Wiz kernel
310 gp2x_get_ticks_ms = plat_get_ticks_ms_good;
311 gp2x_get_ticks_us = plat_get_ticks_us_good;
314 battdev = open("/dev/pollux_batt", O_RDONLY);
316 perror("Warning: could't open pollux_batt");
318 mixerdev = open("/dev/mixer", O_RDWR);
320 perror("open(/dev/mixer)");
322 plat_target.cpu_clock_get = pollux_cpu_clock_get;
323 plat_target.cpu_clock_set = pollux_cpu_clock_set;
324 plat_target.bat_capacity_get = pollux_bat_capacity_get;
325 plat_target.step_volume = step_volume;
327 gp2x_get_ticks_ms = gp2x_get_ticks_ms_;
328 gp2x_get_ticks_us = gp2x_get_ticks_us_;
331 void pollux_finish(void)
337 restore_multiple_regs(0x4058, saved_video_regs[0],
338 ARRAY_SIZE(saved_video_regs[0]));
339 restore_multiple_regs(0x4458, saved_video_regs[1],
340 ARRAY_SIZE(saved_video_regs[1]));
341 memregl[0x4058>>2] |= 0x10;
342 memregl[0x4458>>2] |= 0x10;
348 munmap((void *)memregs, 0x20000);