adjust bios handling again
[pcsx_rearmed.git] / libpcsxcore / r3000a.h
CommitLineData
ef79bbde
P
1/***************************************************************************
2 * Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team *
3 * *
4 * This program is free software; you can redistribute it and/or modify *
5 * it under the terms of the GNU General Public License as published by *
6 * the Free Software Foundation; either version 2 of the License, or *
7 * (at your option) any later version. *
8 * *
9 * This program is distributed in the hope that it will be useful, *
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
12 * GNU General Public License for more details. *
13 * *
14 * You should have received a copy of the GNU General Public License *
15 * along with this program; if not, write to the *
16 * Free Software Foundation, Inc., *
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA. *
18 ***************************************************************************/
19
20#ifndef __R3000A_H__
21#define __R3000A_H__
22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
27#include "psxcommon.h"
28#include "psxmem.h"
29#include "psxcounters.h"
30#include "psxbios.h"
31
980f7a58 32enum R3000Anote {
943a507a 33 R3000ACPU_NOTIFY_CACHE_ISOLATED = 0,
34 R3000ACPU_NOTIFY_CACHE_UNISOLATED = 1,
980f7a58 35 R3000ACPU_NOTIFY_BEFORE_SAVE,
36 R3000ACPU_NOTIFY_AFTER_LOAD,
943a507a 37};
943a507a 38
da65071f 39enum blockExecCaller {
40 EXEC_CALLER_BOOT,
41 EXEC_CALLER_HLE,
42};
43
ef79bbde
P
44typedef struct {
45 int (*Init)();
46 void (*Reset)();
da65071f 47 void (*Execute)();
48 void (*ExecuteBlock)(enum blockExecCaller caller); /* executes up to a jump */
ef79bbde 49 void (*Clear)(u32 Addr, u32 Size);
980f7a58 50 void (*Notify)(enum R3000Anote note, void *data);
32631e6a 51 void (*ApplyConfig)();
ef79bbde
P
52 void (*Shutdown)();
53} R3000Acpu;
54
55extern R3000Acpu *psxCpu;
56extern R3000Acpu psxInt;
ef79bbde 57extern R3000Acpu psxRec;
ef79bbde
P
58
59typedef union {
04bd10b1 60#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
ef79bbde
P
61 struct { u8 h3, h2, h, l; } b;
62 struct { s8 h3, h2, h, l; } sb;
63 struct { u16 h, l; } w;
64 struct { s16 h, l; } sw;
65#else
66 struct { u8 l, h, h2, h3; } b;
67 struct { u16 l, h; } w;
68 struct { s8 l, h, h2, h3; } sb;
69 struct { s16 l, h; } sw;
70#endif
71} PAIR;
72
73typedef union {
74 struct {
75 u32 r0, at, v0, v1, a0, a1, a2, a3,
76 t0, t1, t2, t3, t4, t5, t6, t7,
77 s0, s1, s2, s3, s4, s5, s6, s7,
78 t8, t9, k0, k1, gp, sp, s8, ra, lo, hi;
79 } n;
80 u32 r[34]; /* Lo, Hi in r[32] and r[33] */
81 PAIR p[34];
82} psxGPRRegs;
83
6d75addf 84typedef union psxCP0Regs_ {
ef79bbde
P
85 struct {
86 u32 Index, Random, EntryLo0, EntryLo1,
87 Context, PageMask, Wired, Reserved0,
88 BadVAddr, Count, EntryHi, Compare,
89 Status, Cause, EPC, PRid,
90 Config, LLAddr, WatchLO, WatchHI,
91 XContext, Reserved1, Reserved2, Reserved3,
92 Reserved4, Reserved5, ECC, CacheErr,
93 TagLo, TagHi, ErrorEPC, Reserved6;
94 } n;
95 u32 r[32];
96 PAIR p[32];
97} psxCP0Regs;
98
99typedef struct {
100 short x, y;
101} SVector2D;
102
103typedef struct {
104 short z, pad;
105} SVector2Dz;
106
107typedef struct {
108 short x, y, z, pad;
109} SVector3D;
110
111typedef struct {
112 short x, y, z, pad;
113} LVector3D;
114
115typedef struct {
116 unsigned char r, g, b, c;
117} CBGR;
118
119typedef struct {
120 short m11, m12, m13, m21, m22, m23, m31, m32, m33, pad;
121} SMatrix3D;
122
123typedef union {
124 struct {
125 SVector3D v0, v1, v2;
126 CBGR rgb;
127 s32 otz;
128 s32 ir0, ir1, ir2, ir3;
129 SVector2D sxy0, sxy1, sxy2, sxyp;
130 SVector2Dz sz0, sz1, sz2, sz3;
131 CBGR rgb0, rgb1, rgb2;
132 s32 reserved;
133 s32 mac0, mac1, mac2, mac3;
134 u32 irgb, orgb;
135 s32 lzcs, lzcr;
136 } n;
137 u32 r[32];
138 PAIR p[32];
139} psxCP2Data;
140
141typedef union {
142 struct {
143 SMatrix3D rMatrix;
144 s32 trX, trY, trZ;
145 SMatrix3D lMatrix;
146 s32 rbk, gbk, bbk;
147 SMatrix3D cMatrix;
148 s32 rfc, gfc, bfc;
149 s32 ofx, ofy;
150 s32 h;
151 s32 dqa, dqb;
152 s32 zsf3, zsf4;
153 s32 flag;
154 } n;
155 u32 r[32];
156 PAIR p[32];
157} psxCP2Ctrl;
158
d28b54b1 159enum {
160 PSXINT_SIO = 0,
161 PSXINT_CDR,
162 PSXINT_CDREAD,
163 PSXINT_GPUDMA,
164 PSXINT_MDECOUTDMA,
165 PSXINT_SPUDMA,
528ad661 166 PSXINT_GPUBUSY,
167 PSXINT_MDECINDMA,
57a757ce 168 PSXINT_GPUOTCDMA,
9f8b032d 169 PSXINT_CDRDMA,
d28b54b1 170 PSXINT_NEWDRC_CHECK,
5b8c000f 171 PSXINT_RCNT,
9f8b032d 172 PSXINT_CDRLID,
d9a02493 173 PSXINT_CDRPLAY_OLD, /* unused */
2b30c129 174 PSXINT_SPU_UPDATE,
d28b54b1 175 PSXINT_COUNT
176};
177
eac38522 178typedef struct psxCP2Regs {
179 psxCP2Data CP2D; /* Cop2 data registers */
180 psxCP2Ctrl CP2C; /* Cop2 control registers */
181} psxCP2Regs;
182
ef79bbde 183typedef struct {
6d75addf 184 // note: some cores like lightrec don't keep their data here,
185 // so use R3000ACPU_NOTIFY_BEFORE_SAVE to sync
ef79bbde
P
186 psxGPRRegs GPR; /* General Purpose Registers */
187 psxCP0Regs CP0; /* Coprocessor0 Registers */
eac38522 188 union {
189 struct {
190 psxCP2Data CP2D; /* Cop2 data registers */
191 psxCP2Ctrl CP2C; /* Cop2 control registers */
192 };
193 psxCP2Regs CP2;
194 };
6d75addf 195 u32 pc; /* Program counter */
196 u32 code; /* The instruction */
ef79bbde
P
197 u32 cycle;
198 u32 interrupt;
d28b54b1 199 struct { u32 sCycle, cycle; } intCycle[32];
81dbbf4c 200 u32 gteBusyCycle;
32631e6a 201 u32 muldivBusyCycle;
d5aeda23 202 u32 subCycle; /* interpreter cycle counting */
203 u32 subCycleStep;
679d5ee3 204 u32 biuReg;
205 u32 reserved[3];
81dbbf4c 206 // warning: changing anything in psxRegisters requires update of all
d5aeda23 207 // asm in libpcsxcore/new_dynarec/
ef79bbde
P
208} psxRegisters;
209
210extern psxRegisters psxRegs;
211
d28b54b1 212/* new_dynarec stuff */
213extern u32 event_cycles[PSXINT_COUNT];
214extern u32 next_interupt;
215
03f55e6b 216void new_dyna_freeze(void *f, int mode);
52082bc1 217
df717ca9 218#define new_dyna_set_event_abs(e, abs) { \
219 u32 abs_ = abs; \
220 s32 di_ = next_interupt - abs_; \
d28b54b1 221 event_cycles[e] = abs_; \
df717ca9 222 if (di_ > 0) { \
223 /*printf("%u: next_interupt %u -> %u\n", psxRegs.cycle, next_interupt, abs_);*/ \
d28b54b1 224 next_interupt = abs_; \
225 } \
226}
227
df717ca9 228#define new_dyna_set_event(e, c) \
229 new_dyna_set_event_abs(e, psxRegs.cycle + (c))
230
ef79bbde
P
231int psxInit();
232void psxReset();
233void psxShutdown();
6d75addf 234void psxException(u32 code, u32 bd, psxCP0Regs *cp0);
ef79bbde
P
235void psxBranchTest();
236void psxExecuteBios();
ef79bbde
P
237void psxJumpTest();
238
239#ifdef __cplusplus
240}
241#endif
242#endif