libpcsxcore/new_dynarec/patches/trace_intr

   1 diff --git a/libpcsxcore/new_dynarec/emu_if.c b/libpcsxcore/new_dynarec/emu_if.c
   2 index 2862c546..8af9a27e 100644
   3 --- a/libpcsxcore/new_dynarec/emu_if.c
   4 +++ b/libpcsxcore/new_dynarec/emu_if.c
   5 @@ -322,13 +322,18 @@ static void ari64_shutdown()
   6  {
   7         new_dynarec_cleanup();
   8         new_dyna_pcsx_mem_shutdown();
   9 +       (void)ari64_execute;
  10 +       (void)ari64_execute_block;
  11  }
  12
  13 +extern void intExecuteT();
  14 +extern void intExecuteBlockT();
  15 +
  16  R3000Acpu psxRec = {
  17         ari64_init,
  18         ari64_reset,
  19 -       ari64_execute,
  20 -       ari64_execute_block,
  21 +       intExecuteT,
  22 +       intExecuteBlockT,
  23         ari64_clear,
  24         ari64_notify,
  25         ari64_apply_config,
  26 @@ -397,7 +402,7 @@ static u32 memcheck_read(u32 a)
  27         return *(u32 *)(psxM + (a & 0x1ffffc));
  28  }
  29
  30 -#if 0
  31 +#if 1
  32  void do_insn_trace(void)
  33  {
  34         static psxRegisters oldregs;
  35 diff --git a/libpcsxcore/new_dynarec/pcsxmem.c b/libpcsxcore/new_dynarec/pcsxmem.c
  36 index 190f8fc7..5feb7a02 100644
  37 --- a/libpcsxcore/new_dynarec/pcsxmem.c
  38 +++ b/libpcsxcore/new_dynarec/pcsxmem.c
  39 @@ -289,6 +289,8 @@ static void write_biu(u32 value)
  40                 return;
  41         }
  42
  43 +extern u32 handler_cycle;
  44 +handler_cycle = psxRegs.cycle;
  45         memprintf("write_biu %08x @%08x %u\n", value, psxRegs.pc, psxRegs.cycle);
  46         psxRegs.biuReg = value;
  47  }
  48 diff --git a/libpcsxcore/psxcounters.c b/libpcsxcore/psxcounters.c
  49 index 18bd6a4e..bc2eb3f6 100644
  50 --- a/libpcsxcore/psxcounters.c
  51 +++ b/libpcsxcore/psxcounters.c
  52 @@ -389,9 +389,12 @@ void psxRcntUpdate()
  53
  54  /******************************************************************************/
  55
  56 +extern u32 handler_cycle;
  57 +
  58  void psxRcntWcount( u32 index, u32 value )
  59  {
  60      verboseLog( 2, "[RCNT %i] wcount: %x\n", index, value );
  61 +handler_cycle = psxRegs.cycle;
  62
  63      _psxRcntWcount( index, value );
  64      psxRcntSet();
  65 @@ -400,6 +403,7 @@ void psxRcntWcount( u32 index, u32 value )
  66  void psxRcntWmode( u32 index, u32 value )
  67  {
  68      verboseLog( 1, "[RCNT %i] wmode: %x\n", index, value );
  69 +handler_cycle = psxRegs.cycle;
  70
  71      _psxRcntWmode( index, value );
  72      _psxRcntWcount( index, 0 );
  73 @@ -411,6 +415,7 @@ void psxRcntWmode( u32 index, u32 value )
  74  void psxRcntWtarget( u32 index, u32 value )
  75  {
  76      verboseLog( 1, "[RCNT %i] wtarget: %x\n", index, value );
  77 +handler_cycle = psxRegs.cycle;
  78
  79      rcnts[index].target = value;
  80
  81 @@ -423,6 +428,7 @@ void psxRcntWtarget( u32 index, u32 value )
  82  u32 psxRcntRcount( u32 index )
  83  {
  84      u32 count;
  85 +handler_cycle = psxRegs.cycle;
  86
  87      count = _psxRcntRcount( index );
  88
  89 diff --git a/libpcsxcore/psxhw.c b/libpcsxcore/psxhw.c
  90 index 27ddfeab..d7c6ff05 100644
  91 --- a/libpcsxcore/psxhw.c
  92 +++ b/libpcsxcore/psxhw.c
  93 @@ -377,13 +377,14 @@ void psxHwWrite8(u32 add, u8 value) {
  94                 case 0x1f801803: cdrWrite3(value); break;
  95
  96                 default:
  97 +                       if (add < 0x1f802000)
  98                         psxHu8(add) = value;
  99  #ifdef PSXHW_LOG
 100                         PSXHW_LOG("*Unknown 8bit write at address %x value %x\n", add, value);
 101  #endif
 102                         return;
 103         }
 104 -       psxHu8(add) = value;
 105 +       //psxHu8(add) = value;
 106  #ifdef PSXHW_LOG
 107         PSXHW_LOG("*Known 8bit write at address %x value %x\n", add, value);
 108  #endif
 109 @@ -506,6 +507,7 @@ void psxHwWrite16(u32 add, u16 value) {
 110                                 return;
 111                         }
 112
 113 +                       if (add < 0x1f802000)
 114                         psxHu16ref(add) = SWAPu16(value);
 115  #ifdef PSXHW_LOG
 116                         PSXHW_LOG("*Unknown 16bit write at address %x value %x\n", add, value);
 117 @@ -701,9 +703,9 @@ void psxHwWrite32(u32 add, u32 value) {
 118                         return;
 119
 120                 case 0x1f801820:
 121 -                       mdecWrite0(value); break;
 122 +                       mdecWrite0(value); return;
 123                 case 0x1f801824:
 124 -                       mdecWrite1(value); break;
 125 +                       mdecWrite1(value); return;
 126
 127                 case 0x1f801100:
 128  #ifdef PSXHW_LOG
 129 @@ -761,6 +763,7 @@ void psxHwWrite32(u32 add, u32 value) {
 130                                 return;
 131                         }
 132
 133 +                       if (add < 0x1f802000)
 134                         psxHu32ref(add) = SWAPu32(value);
 135  #ifdef PSXHW_LOG
 136                         PSXHW_LOG("*Unknown 32bit write at address %x value %x\n", add, value);
 137 diff --git a/libpcsxcore/psxinterpreter.c b/libpcsxcore/psxinterpreter.c
 138 index e212d8a9..42498e96 100644
 139 --- a/libpcsxcore/psxinterpreter.c
 140 +++ b/libpcsxcore/psxinterpreter.c
 141 @@ -237,7 +237,7 @@ static inline void addCycle(psxRegisters *regs)
 142  {
 143         assert(regs->subCycleStep >= 0x10000);
 144         regs->subCycle += regs->subCycleStep;
 145 -       regs->cycle += regs->subCycle >> 16;
 146 +       regs->cycle += 2; //regs->subCycle >> 16;
 147         regs->subCycle &= 0xffff;
 148  }
 149
 150 @@ -434,7 +434,9 @@ static void doBranch(psxRegisters *regs, u32 tar, enum R3000Abdt taken) {
 151                 regs->CP0.n.Target = pc_final;
 152         regs->branching = 0;
 153
 154 +       psxRegs.cycle += 2;
 155         psxBranchTest();
 156 +       psxRegs.cycle -= 2;
 157  }
 158
 159  static void doBranchReg(psxRegisters *regs, u32 tar) {
 160 @@ -959,7 +961,7 @@ void MTC0(psxRegisters *regs_, int reg, u32 val) {
 161         }
 162  }
 163
 164 -OP(psxMTC0) { MTC0(regs_, _Rd_, _u32(_rRt_)); }
 165 +OP(psxMTC0) { MTC0(regs_, _Rd_, _u32(_rRt_)); psxBranchTest(); }
 166
 167  // no exception
 168  static inline void psxNULLne(psxRegisters *regs) {
 169 @@ -1167,18 +1169,20 @@ static void intReset() {
 170  static inline void execI_(u8 **memRLUT, psxRegisters *regs) {
 171         u32 pc = regs->pc;
 172
 173 -       addCycle(regs);
 174 +       //addCycle(regs);
 175         dloadStep(regs);
 176
 177         regs->pc += 4;
 178         regs->code = fetch(regs, memRLUT, pc);
 179         psxBSC[regs->code >> 26](regs, regs->code);
 180 +       psxRegs.cycle += 2;
 181 +       fetchNoCache(regs, memRLUT, regs->pc); // bus err check
 182  }
 183
 184  static inline void execIbp(u8 **memRLUT, psxRegisters *regs) {
 185         u32 pc = regs->pc;
 186
 187 -       addCycle(regs);
 188 +       //addCycle(regs);
 189         dloadStep(regs);
 190
 191         if (execBreakCheck(regs, pc))
 192 @@ -1187,6 +1191,8 @@ static inline void execIbp(u8 **memRLUT, psxRegisters *regs) {
 193         regs->pc += 4;
 194         regs->code = fetch(regs, memRLUT, pc);
 195         psxBSC[regs->code >> 26](regs, regs->code);
 196 +       psxRegs.cycle += 2;
 197 +       fetchNoCache(regs, memRLUT, regs->pc); // bus err check
 198  }
 199
 200  static void intExecute() {
 201 @@ -1216,6 +1222,30 @@ void intExecuteBlock(enum blockExecCaller caller) {
 202                 execI_(memRLUT, regs_);
 203  }
 204
 205 +extern void do_insn_trace(void);
 206 +
 207 +void intExecuteT() {
 208 +       psxRegisters *regs_ = &psxRegs;
 209 +       u8 **memRLUT = psxMemRLUT;
 210 +       extern int stop;
 211 +
 212 +       while (!stop) {
 213 +               do_insn_trace();
 214 +               execIbp(memRLUT, regs_);
 215 +       }
 216 +}
 217 +
 218 +void intExecuteBlockT() {
 219 +       psxRegisters *regs_ = &psxRegs;
 220 +       u8 **memRLUT = psxMemRLUT;
 221 +
 222 +       branchSeen = 0;
 223 +       while (!branchSeen) {
 224 +               do_insn_trace();
 225 +               execIbp(memRLUT, regs_);
 226 +       }
 227 +}
 228 +
 229  static void intClear(u32 Addr, u32 Size) {
 230  }
 231
 232 @@ -1263,7 +1293,7 @@ void intApplyConfig() {
 233         assert(psxSPC[26] == psxDIV   || psxSPC[26] == psxDIV_stall);
 234         assert(psxSPC[27] == psxDIVU  || psxSPC[27] == psxDIVU_stall);
 235
 236 -       if (Config.DisableStalls) {
 237 +       if (1) {
 238                 psxBSC[18] = psxCOP2;
 239                 psxBSC[50] = gteLWC2;
 240                 psxBSC[58] = gteSWC2;
 241 diff --git a/libpcsxcore/psxmem.c b/libpcsxcore/psxmem.c
 242 index 54219ae0..41168ced 100644
 243 --- a/libpcsxcore/psxmem.c
 244 +++ b/libpcsxcore/psxmem.c
 245 @@ -278,10 +278,13 @@ void psxMemOnIsolate(int enable)
 246                         : R3000ACPU_NOTIFY_CACHE_UNISOLATED, NULL);
 247  }
 248
 249 +extern u32 last_io_addr;
 250 +
 251  u8 psxMemRead8(u32 mem) {
 252         char *p;
 253         u32 t;
 254
 255 +       last_io_addr = mem;
 256         t = mem >> 16;
 257         if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
 258                 if ((mem & 0xffff) < 0x400)
 259 @@ -307,6 +310,7 @@ u16 psxMemRead16(u32 mem) {
 260         char *p;
 261         u32 t;
 262
 263 +       last_io_addr = mem;
 264         t = mem >> 16;
 265         if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
 266                 if ((mem & 0xffff) < 0x400)
 267 @@ -332,6 +336,7 @@ u32 psxMemRead32(u32 mem) {
 268         char *p;
 269         u32 t;
 270
 271 +       last_io_addr = mem;
 272         t = mem >> 16;
 273         if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
 274                 if ((mem & 0xffff) < 0x400)
 275 @@ -359,6 +364,7 @@ void psxMemWrite8(u32 mem, u8 value) {
 276         char *p;
 277         u32 t;
 278
 279 +       last_io_addr = mem;
 280         t = mem >> 16;
 281         if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
 282                 if ((mem & 0xffff) < 0x400)
 283 @@ -386,6 +392,7 @@ void psxMemWrite16(u32 mem, u16 value) {
 284         char *p;
 285         u32 t;
 286
 287 +       last_io_addr = mem;
 288         t = mem >> 16;
 289         if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
 290                 if ((mem & 0xffff) < 0x400)
 291 @@ -413,6 +420,7 @@ void psxMemWrite32(u32 mem, u32 value) {
 292         char *p;
 293         u32 t;
 294
 295 +       last_io_addr = mem;
 296  //     if ((mem&0x1fffff) == 0x71E18 || value == 0x48088800) SysPrintf("t2fix!!\n");
 297         t = mem >> 16;
 298         if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
 299 @@ -431,6 +439,8 @@ void psxMemWrite32(u32 mem, u32 value) {
 300  #endif
 301                 } else {
 302                         if (mem == 0xfffe0130) {
 303 +extern u32 handler_cycle;
 304 +handler_cycle = psxRegs.cycle;
 305                                 psxRegs.biuReg = value;
 306                                 return;
 307                         }
 308 diff --git a/libpcsxcore/r3000a.c b/libpcsxcore/r3000a.c
 309 index dffbf6e7..0a3bdb65 100644
 310 --- a/libpcsxcore/r3000a.c
 311 +++ b/libpcsxcore/r3000a.c
 312 @@ -124,6 +124,8 @@ void psxException(u32 cause, enum R3000Abdt bdt, psxCP0Regs *cp0) {
 313  }
 314
 315  void psxBranchTest() {
 316 + extern u32 irq_test_cycle;
 317 + irq_test_cycle = psxRegs.cycle;
 318         if ((psxRegs.cycle - psxNextsCounter) >= psxNextCounter)
 319                 psxRcntUpdate();
 320